[people/ms/u-boot.git] / drivers / serial / serial_arc.c

/*
 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <common.h>
#include <dm.h>
#include <serial.h>

DECLARE_GLOBAL_DATA_PTR;

struct arc_serial_regs {
	unsigned int id0;
	unsigned int id1;
	unsigned int id2;
	unsigned int id3;
	unsigned int data;
	unsigned int status;
	unsigned int baudl;
	unsigned int baudh;
};


struct arc_serial_platdata {
	struct arc_serial_regs *reg;
	unsigned int uartclk;
};

/* Bit definitions of STATUS register */
#define UART_RXEMPTY		(1 << 5)
#define UART_OVERFLOW_ERR	(1 << 1)
#define UART_TXEMPTY		(1 << 7)

static int arc_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct arc_serial_platdata *plat = dev->platdata;
	struct arc_serial_regs *const regs = plat->reg;
	int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1;

	writeb(arc_console_baud & 0xff, &regs->baudl);

#ifdef CONFIG_ARC
	/*
	 * UART ISS(Instruction Set simulator) emulation has a subtle bug:
	 * A existing value of Baudh = 0 is used as a indication to startup
	 * it's internal state machine.
	 * Thus if baudh is set to 0, 2 times, it chokes.
	 * This happens with BAUD=115200 and the formaula above
	 * Until that is fixed, when running on ISS, we will set baudh to !0
	 */
	if (gd->arch.running_on_hw)
		writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
	else
		writeb(1, &regs->baudh);
#else
	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
#endif

	return 0;
}

static int arc_serial_putc(struct udevice *dev, const char c)
{
	struct arc_serial_platdata *plat = dev->platdata;
	struct arc_serial_regs *const regs = plat->reg;

	while (!(readb(&regs->status) & UART_TXEMPTY))
		;

	writeb(c, &regs->data);

	return 0;
}

static int arc_serial_tstc(struct arc_serial_regs *const regs)
{
	return !(readb(&regs->status) & UART_RXEMPTY);
}

static int arc_serial_pending(struct udevice *dev, bool input)
{
	struct arc_serial_platdata *plat = dev->platdata;
	struct arc_serial_regs *const regs = plat->reg;
	uint32_t status = readb(&regs->status);

	if (input)
		return status & UART_RXEMPTY ? 0 : 1;
	else
		return status & UART_TXEMPTY ? 0 : 1;
}

static int arc_serial_getc(struct udevice *dev)
{
	struct arc_serial_platdata *plat = dev->platdata;
	struct arc_serial_regs *const regs = plat->reg;

	while (!arc_serial_tstc(regs))
		;

	/* Check for overflow errors */
	if (readb(&regs->status) & UART_OVERFLOW_ERR)
		return 0;

	return readb(&regs->data) & 0xFF;
}

static int arc_serial_probe(struct udevice *dev)
{
	return 0;
}

static const struct dm_serial_ops arc_serial_ops = {
	.putc = arc_serial_putc,
	.pending = arc_serial_pending,
	.getc = arc_serial_getc,
	.setbrg = arc_serial_setbrg,
};

static const struct udevice_id arc_serial_ids[] = {
	{ .compatible = "snps,arc-uart" },
	{ }
};

static int arc_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct arc_serial_platdata *plat = dev_get_platdata(dev);
	DECLARE_GLOBAL_DATA_PTR;

	plat->reg = (struct arc_serial_regs *)dev_get_addr(dev);
	plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
				       "clock-frequency", 0);

	return 0;
}

U_BOOT_DRIVER(serial_arc) = {
	.name	= "serial_arc",
	.id	= UCLASS_SERIAL,
	.of_match = arc_serial_ids,
	.ofdata_to_platdata = arc_serial_ofdata_to_platdata,
	.probe = arc_serial_probe,
	.ops	= &arc_serial_ops,
	.flags = DM_FLAG_PRE_RELOC,
};
Commit	Line	Data
22a240c3 AB	1	/*
	2	* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	*/
	9
	10	#include <common.h>
01496c4f	11	#include <dm.h>
22a240c3 AB	12	#include <serial.h>
	13
	14	DECLARE_GLOBAL_DATA_PTR;
	15
	16	struct arc_serial_regs {
	17	unsigned int id0;
	18	unsigned int id1;
	19	unsigned int id2;
	20	unsigned int id3;
	21	unsigned int data;
	22	unsigned int status;
	23	unsigned int baudl;
	24	unsigned int baudh;
	25	};
	26
01496c4f AB	27
	28	struct arc_serial_platdata {
	29	struct arc_serial_regs *reg;
	30	unsigned int uartclk;
	31	};
	32
22a240c3 AB	33	/* Bit definitions of STATUS register */
	34	#define UART_RXEMPTY (1 << 5)
	35	#define UART_OVERFLOW_ERR (1 << 1)
	36	#define UART_TXEMPTY (1 << 7)
	37
01496c4f	38	static int arc_serial_setbrg(struct udevice *dev, int baudrate)
22a240c3	39	{
01496c4f AB	40	struct arc_serial_platdata *plat = dev->platdata;
	41	struct arc_serial_regs *const regs = plat->reg;
	42	int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1;
22a240c3	43
94b5400e	44	writeb(arc_console_baud & 0xff, &regs->baudl);
1d568c76 AB	45
	46	#ifdef CONFIG_ARC
	47	/*
	48	* UART ISS(Instruction Set simulator) emulation has a subtle bug:
	49	* A existing value of Baudh = 0 is used as a indication to startup
	50	* it's internal state machine.
	51	* Thus if baudh is set to 0, 2 times, it chokes.
	52	* This happens with BAUD=115200 and the formaula above
	53	* Until that is fixed, when running on ISS, we will set baudh to !0
	54	*/
	55	if (gd->arch.running_on_hw)
94b5400e	56	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
1d568c76	57	else
94b5400e	58	writeb(1, &regs->baudh);
1d568c76	59	#else
94b5400e	60	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
1d568c76	61	#endif
22a240c3	62
22a240c3 AB	63	return 0;
	64	}
	65
01496c4f	66	static int arc_serial_putc(struct udevice *dev, const char c)
22a240c3	67	{
01496c4f AB	68	struct arc_serial_platdata *plat = dev->platdata;
	69	struct arc_serial_regs *const regs = plat->reg;
	70
94b5400e	71	while (!(readb(&regs->status) & UART_TXEMPTY))
22a240c3 AB	72	;
22a240c3 AB	73
94b5400e	74	writeb(c, &regs->data);
01496c4f AB	75
01496c4f AB	76	return 0;
22a240c3 AB	77	}
22a240c3 AB	78
01496c4f	79	static int arc_serial_tstc(struct arc_serial_regs *const regs)
22a240c3	80	{
94b5400e	81	return !(readb(&regs->status) & UART_RXEMPTY);
22a240c3 AB	82	}
22a240c3 AB	83
01496c4f AB	84	static int arc_serial_pending(struct udevice *dev, bool input)
	85	{
	86	struct arc_serial_platdata *plat = dev->platdata;
	87	struct arc_serial_regs *const regs = plat->reg;
	88	uint32_t status = readb(&regs->status);
	89
	90	if (input)
	91	return status & UART_RXEMPTY ? 0 : 1;
	92	else
	93	return status & UART_TXEMPTY ? 0 : 1;
	94	}
	95
	96	static int arc_serial_getc(struct udevice *dev)
22a240c3	97	{
01496c4f AB	98	struct arc_serial_platdata *plat = dev->platdata;
	99	struct arc_serial_regs *const regs = plat->reg;
	100
	101	while (!arc_serial_tstc(regs))
22a240c3 AB	102	;
	103
	104	/* Check for overflow errors */
94b5400e	105	if (readb(&regs->status) & UART_OVERFLOW_ERR)
22a240c3 AB	106	return 0;
22a240c3 AB	107
94b5400e	108	return readb(&regs->data) & 0xFF;
22a240c3 AB	109	}
22a240c3 AB	110
01496c4f	111	static int arc_serial_probe(struct udevice *dev)
22a240c3	112	{
01496c4f	113	return 0;
22a240c3 AB	114	}
22a240c3 AB	115
01496c4f AB	116	static const struct dm_serial_ops arc_serial_ops = {
	117	.putc = arc_serial_putc,
	118	.pending = arc_serial_pending,
	119	.getc = arc_serial_getc,
	120	.setbrg = arc_serial_setbrg,
	121	};
	122
	123	static const struct udevice_id arc_serial_ids[] = {
	124	{ .compatible = "snps,arc-uart" },
	125	{ }
	126	};
	127
	128	static int arc_serial_ofdata_to_platdata(struct udevice *dev)
22a240c3	129	{
01496c4f AB	130	struct arc_serial_platdata *plat = dev_get_platdata(dev);
	131	DECLARE_GLOBAL_DATA_PTR;
	132
4e9838c1	133	plat->reg = (struct arc_serial_regs *)dev_get_addr(dev);
01496c4f AB	134	plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
	135	"clock-frequency", 0);
	136
	137	return 0;
22a240c3	138	}
01496c4f AB	139
	140	U_BOOT_DRIVER(serial_arc) = {
	141	.name = "serial_arc",
	142	.id = UCLASS_SERIAL,
	143	.of_match = arc_serial_ids,
	144	.ofdata_to_platdata = arc_serial_ofdata_to_platdata,
	145	.probe = arc_serial_probe,
	146	.ops = &arc_serial_ops,
	147	.flags = DM_FLAG_PRE_RELOC,
	148	};