[people/ms/u-boot.git] / include / configs / actux1.h

/*
 * (C) Copyright 2007
 * Michael Schwingen, michael@schwingen.org
 *
 * Configuration settings for the AcTux-1 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_IXP425			1
#define CONFIG_ACTUX1			1

#define	CONFIG_MACH_TYPE		1479

#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

#define CONFIG_IXP_SERIAL
#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART2
#define CONFIG_BAUDRATE			115200
#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
#define CONFIG_BOARD_EARLY_INIT_F	1
#define CONFIG_SYS_LDSCRIPT	"board/actux1/u-boot.lds"

/***************************************************************
 * U-boot generic defines start here.
 ***************************************************************/
/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Command line configuration. */
#include <config_cmd_default.h>

#define CONFIG_CMD_ELF
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
#define CONFIG_PCI_PNP
#define CONFIG_IXP_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI_ENUM
#endif

#define CONFIG_BOOTCOMMAND		"run boot_flash"
/* enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG		1
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_REVISION_TAG		1

#if defined(CONFIG_CMD_KGDB)
# define CONFIG_KGDB_BAUDRATE		230400
/* which serial port to use */
# define CONFIG_KGDB_SER_INDEX		1
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT			"=> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE			256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
/* max number of command args */
#define CONFIG_SYS_MAXARGS			16
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START		0x00400000
#define CONFIG_SYS_MEMTEST_END			0x00800000

/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK                 66666666
#define CONFIG_SYS_HZ				1000

/* default load address */
#define CONFIG_SYS_LOAD_ADDR			0x00010000

/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600,	\
					  115200, 230400 }
#define CONFIG_SERIAL_RTS_ACTIVE	1

/* Expansion bus settings */
#define CONFIG_SYS_EXP_CS0			0xbd113842

/* SDRAM settings */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x00000000
#define CONFIG_SYS_SDRAM_BASE			0x00000000

#ifdef CONFIG_RAM_32MB
# define CONFIG_SYS_SDR_CONFIG			0x18
# define PHYS_SDRAM_1_SIZE		0x02000000
# define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
# define CONFIG_SYS_SDR_MODE_CONFIG		0x1
# define CONFIG_SYS_DRAM_SIZE			0x02000000
#else /* 16MB SDRAM */
# define CONFIG_SYS_SDR_CONFIG			0x3A
# define PHYS_SDRAM_1_SIZE		0x01000000
# define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
# define CONFIG_SYS_SDR_MODE_CONFIG		0x1
# define CONFIG_SYS_DRAM_SIZE			0x01000000
#endif

/* FLASH organization */
#define CONFIG_SYS_TEXT_BASE		0x50000000
#ifdef CONFIG_FLASH2X2
# define CONFIG_SYS_MAX_FLASH_BANKS		2
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT		40
# define PHYS_FLASH_1			0x50000000
# define PHYS_FLASH_2			0x50200000
# define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1, PHYS_FLASH_2 }
#endif
#ifdef CONFIG_FLASH1X8
# define CONFIG_SYS_MAX_FLASH_BANKS		1
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT		140
# define PHYS_FLASH_1			0x50000000
# define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1 }
#endif

#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN			(256 << 10)
#define CONFIG_BOARD_SIZE_LIMIT			262144

/* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
/* no byte writes on IXP4xx */
#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT
/* print 'E' for empty sector on flinfo */
#define CONFIG_SYS_FLASH_EMPTY_INFO

/* Ethernet */

/* include IXP4xx NPE support */
#define CONFIG_IXP4XX_NPE		1
/* NPE0 PHY address */
#define	CONFIG_PHY_ADDR			0
/* NPE1 PHY address (HW Release E only) */
#define	CONFIG_PHY1_ADDR		1
/* MII PHY management */
#define CONFIG_MII			1
/* Number of ethernet rx buffers & descriptors */
#define CONFIG_SYS_RX_ETH_BUFFER		16
#define CONFIG_RESET_PHY_R		1

#define CONFIG_HAS_ETH1			1

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#undef  CONFIG_CMD_NFS

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE		32

/*
 * environment organization:
 * one flash sector, embedded in uboot area (bottom bootblock flash)
 */
#define	CONFIG_ENV_IS_IN_FLASH		1
#define CONFIG_ENV_SIZE			0x2000
#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
#define CONFIG_SYS_USE_PPCENV			1

#define CONFIG_EXTRA_ENV_SETTINGS					\
	"npe_ucode=50040000\0"						\
	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
	"kerneladdr=50050000\0"						\
	"kernelfile=actux1/uImage\0"					\
	"rootfile=actux1/rootfs\0"					\
	"rootaddr=50170000\0"						\
	"loadaddr=10000\0"						\
	"updateboot_ser=mw.b 10000 ff 40000;"				\
	" loady ${loadaddr};"						\
	" run eraseboot writeboot\0"					\
	"updateboot_net=mw.b 10000 ff 40000;"				\
	" tftp ${loadaddr} actux1/u-boot.bin;"				\
	" run eraseboot writeboot\0"					\
	"eraseboot=protect off 50000000 50003fff;"			\
	" protect off 50006000 5003ffff;"				\
	" erase 50000000 50003fff;"					\
	" erase 50006000 5003ffff\0"					\
	"writeboot=cp.b 10000 50000000 4000;"				\
	" cp.b 16000 50006000 3a000\0"					\
	"updateucode=loady;"						\
	" era ${npe_ucode} +${filesize};"				\
	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
	"updateroot=tftp ${loadaddr} ${rootfile};"			\
	" era ${rootaddr} +${filesize};"				\
	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
	" era ${kerneladdr} +${filesize};"				\
	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
	"boot_flash=run flashargs addtty addeth;"			\
	" bootm ${kerneladdr}\0"					\
	"boot_net=run netargs addtty addeth;"				\
	" tftpboot ${loadaddr} ${kernelfile};"				\
	" bootm\0"

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_INIT_SP_ADDR						\
	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
ea99e8f0 MS	1	/*
	2	* (C) Copyright 2007
	3	* Michael Schwingen, michael@schwingen.org
	4	*
	5	* Configuration settings for the AcTux-1 board.
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
ea99e8f0 MS	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
ea99e8f0 MS	13	#define CONFIG_IXP425 1
	14	#define CONFIG_ACTUX1 1
	15
8e807ec3 MV	16	#define CONFIG_MACH_TYPE 1479
8e807ec3 MV	17
ea99e8f0 MS	18	#define CONFIG_DISPLAY_CPUINFO 1
	19	#define CONFIG_DISPLAY_BOARDINFO 1
	20
930590f3	21	#define CONFIG_IXP_SERIAL
6d0f6bcf	22	#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
ea99e8f0 MS	23	#define CONFIG_BAUDRATE 115200
	24	#define CONFIG_BOOTDELAY 3
	25	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
517c5dfe MS	26	#define CONFIG_BOARD_EARLY_INIT_F 1
517c5dfe MS	27	#define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds"
ea99e8f0 MS	28
	29	/***************************************************************
	30	* U-boot generic defines start here.
	31	***************************************************************/
ea99e8f0 MS	32	/*
	33	* Size of malloc() pool
	34	*/
6d0f6bcf	35	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
ea99e8f0 MS	36
	37	/* allow to overwrite serial and ethaddr */
	38	#define CONFIG_ENV_OVERWRITE
	39
	40	/* Command line configuration. */
	41	#include <config_cmd_default.h>
	42
	43	#define CONFIG_CMD_ELF
517c5dfe MS	44	#ifdef CONFIG_PCI
	45	#define CONFIG_CMD_PCI
	46	#define CONFIG_PCI_PNP
	47	#define CONFIG_IXP_PCI
	48	#define CONFIG_PCI_SCAN_SHOW
	49	#define CONFIG_CMD_PCI_ENUM
	50	#endif
ea99e8f0 MS	51
	52	#define CONFIG_BOOTCOMMAND "run boot_flash"
	53	/* enable passing of ATAGs */
	54	#define CONFIG_CMDLINE_TAG 1
	55	#define CONFIG_SETUP_MEMORY_TAGS 1
	56	#define CONFIG_INITRD_TAG 1
	57	#define CONFIG_REVISION_TAG 1
	58
	59	#if defined(CONFIG_CMD_KGDB)
	60	# define CONFIG_KGDB_BAUDRATE 230400
	61	/* which serial port to use */
	62	# define CONFIG_KGDB_SER_INDEX 1
	63	#endif
	64
	65	/* Miscellaneous configurable options */
6d0f6bcf JCPV	66	#define CONFIG_SYS_LONGHELP
6d0f6bcf JCPV	67	#define CONFIG_SYS_PROMPT "=> "
ea99e8f0	68	/* Console I/O Buffer Size */
6d0f6bcf	69	#define CONFIG_SYS_CBSIZE 256
ea99e8f0	70	/* Print Buffer Size */
6d0f6bcf	71	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
ea99e8f0	72	/* max number of command args */
6d0f6bcf	73	#define CONFIG_SYS_MAXARGS 16
ea99e8f0	74	/* Boot Argument Buffer Size */
6d0f6bcf	75	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
ea99e8f0	76
6d0f6bcf JCPV	77	#define CONFIG_SYS_MEMTEST_START 0x00400000
6d0f6bcf JCPV	78	#define CONFIG_SYS_MEMTEST_END 0x00800000
ea99e8f0	79
517c5dfe MS	80	/* timer clock - 2* OSC_IN system clock */
	81	#define CONFIG_IXP425_TIMER_CLK 66666666
	82	#define CONFIG_SYS_HZ 1000
ea99e8f0 MS	83
ea99e8f0 MS	84	/* default load address */
6d0f6bcf	85	#define CONFIG_SYS_LOAD_ADDR 0x00010000
ea99e8f0 MS	86
ea99e8f0 MS	87	/* valid baudrates */
6d0f6bcf	88	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
ea99e8f0 MS	89	115200, 230400 }
	90	#define CONFIG_SERIAL_RTS_ACTIVE 1
	91
ea99e8f0	92	/* Expansion bus settings */
6d0f6bcf	93	#define CONFIG_SYS_EXP_CS0 0xbd113842
ea99e8f0 MS	94
	95	/* SDRAM settings */
	96	#define CONFIG_NR_DRAM_BANKS 1
	97	#define PHYS_SDRAM_1 0x00000000
517c5dfe	98	#define CONFIG_SYS_SDRAM_BASE 0x00000000
ea99e8f0	99
517c5dfe	100	#ifdef CONFIG_RAM_32MB
6d0f6bcf	101	# define CONFIG_SYS_SDR_CONFIG 0x18
ea99e8f0	102	# define PHYS_SDRAM_1_SIZE 0x02000000
6d0f6bcf JCPV	103	# define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
	104	# define CONFIG_SYS_SDR_MODE_CONFIG 0x1
	105	# define CONFIG_SYS_DRAM_SIZE 0x02000000
ea99e8f0	106	#else /* 16MB SDRAM */
6d0f6bcf	107	# define CONFIG_SYS_SDR_CONFIG 0x3A
ea99e8f0	108	# define PHYS_SDRAM_1_SIZE 0x01000000
6d0f6bcf JCPV	109	# define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
	110	# define CONFIG_SYS_SDR_MODE_CONFIG 0x1
	111	# define CONFIG_SYS_DRAM_SIZE 0x01000000
ea99e8f0 MS	112	#endif
	113
	114	/* FLASH organization */
517c5dfe MS	115	#define CONFIG_SYS_TEXT_BASE 0x50000000
517c5dfe MS	116	#ifdef CONFIG_FLASH2X2
6d0f6bcf	117	# define CONFIG_SYS_MAX_FLASH_BANKS 2
ea99e8f0	118	/* max number of sectors on one chip */
6d0f6bcf	119	# define CONFIG_SYS_MAX_FLASH_SECT 40
ea99e8f0 MS	120	# define PHYS_FLASH_1 0x50000000
ea99e8f0 MS	121	# define PHYS_FLASH_2 0x50200000
6d0f6bcf	122	# define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
ea99e8f0	123	#endif
517c5dfe	124	#ifdef CONFIG_FLASH1X8
6d0f6bcf	125	# define CONFIG_SYS_MAX_FLASH_BANKS 1
ea99e8f0	126	/* max number of sectors on one chip */
6d0f6bcf	127	# define CONFIG_SYS_MAX_FLASH_SECT 140
ea99e8f0	128	# define PHYS_FLASH_1 0x50000000
6d0f6bcf	129	# define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
ea99e8f0 MS	130	#endif
ea99e8f0 MS	131
6d0f6bcf JCPV	132	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
	133	#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
	134	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
517c5dfe	135	#define CONFIG_BOARD_SIZE_LIMIT 262144
ea99e8f0 MS	136
ea99e8f0 MS	137	/* Use common CFI driver */
6d0f6bcf	138	#define CONFIG_SYS_FLASH_CFI
00b1883a	139	#define CONFIG_FLASH_CFI_DRIVER
ea99e8f0	140	/* no byte writes on IXP4xx */
6d0f6bcf	141	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
ea99e8f0	142	/* print 'E' for empty sector on flinfo */
6d0f6bcf	143	#define CONFIG_SYS_FLASH_EMPTY_INFO
ea99e8f0 MS	144
	145	/* Ethernet */
	146
	147	/* include IXP4xx NPE support */
	148	#define CONFIG_IXP4XX_NPE 1
ea99e8f0 MS	149	/* NPE0 PHY address */
ea99e8f0 MS	150	#define CONFIG_PHY_ADDR 0
517c5dfe MS	151	/* NPE1 PHY address (HW Release E only) */
517c5dfe MS	152	#define CONFIG_PHY1_ADDR 1
ea99e8f0 MS	153	/* MII PHY management */
	154	#define CONFIG_MII 1
	155	/* Number of ethernet rx buffers & descriptors */
6d0f6bcf	156	#define CONFIG_SYS_RX_ETH_BUFFER 16
ea99e8f0 MS	157	#define CONFIG_RESET_PHY_R 1
ea99e8f0 MS	158
517c5dfe MS	159	#define CONFIG_HAS_ETH1 1
517c5dfe MS	160
ea99e8f0 MS	161	#define CONFIG_CMD_DHCP
	162	#define CONFIG_CMD_NET
	163	#define CONFIG_CMD_MII
	164	#define CONFIG_CMD_PING
	165	#undef CONFIG_CMD_NFS
	166
	167	/* BOOTP options */
	168	#define CONFIG_BOOTP_BOOTFILESIZE
	169	#define CONFIG_BOOTP_BOOTPATH
	170	#define CONFIG_BOOTP_GATEWAY
	171	#define CONFIG_BOOTP_HOSTNAME
	172
	173	/* Cache Configuration */
6d0f6bcf	174	#define CONFIG_SYS_CACHELINE_SIZE 32
ea99e8f0 MS	175
	176	/*
	177	* environment organization:
	178	* one flash sector, embedded in uboot area (bottom bootblock flash)
	179	*/
5a1aceb0	180	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	181	#define CONFIG_ENV_SIZE 0x2000
0e8d1586 JCPV	182	#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
6d0f6bcf	183	#define CONFIG_SYS_USE_PPCENV 1
ea99e8f0	184
517c5dfe	185	#define CONFIG_EXTRA_ENV_SETTINGS \
b4e2f89d	186	"npe_ucode=50040000\0" \
ea99e8f0 MS	187	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
ea99e8f0 MS	188	"kerneladdr=50050000\0" \
517c5dfe MS	189	"kernelfile=actux1/uImage\0" \
517c5dfe MS	190	"rootfile=actux1/rootfs\0" \
ea99e8f0 MS	191	"rootaddr=50170000\0" \
	192	"loadaddr=10000\0" \
	193	"updateboot_ser=mw.b 10000 ff 40000;" \
	194	" loady ${loadaddr};" \
	195	" run eraseboot writeboot\0" \
	196	"updateboot_net=mw.b 10000 ff 40000;" \
517c5dfe	197	" tftp ${loadaddr} actux1/u-boot.bin;" \
ea99e8f0 MS	198	" run eraseboot writeboot\0" \
	199	"eraseboot=protect off 50000000 50003fff;" \
	200	" protect off 50006000 5003ffff;" \
	201	" erase 50000000 50003fff;" \
	202	" erase 50006000 5003ffff\0" \
	203	"writeboot=cp.b 10000 50000000 4000;" \
	204	" cp.b 16000 50006000 3a000\0" \
517c5dfe MS	205	"updateucode=loady;" \
	206	" era ${npe_ucode} +${filesize};" \
	207	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
ea99e8f0 MS	208	"updateroot=tftp ${loadaddr} ${rootfile};" \
	209	" era ${rootaddr} +${filesize};" \
	210	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
	211	"updatekern=tftp ${loadaddr} ${kernelfile};" \
	212	" era ${kerneladdr} +${filesize};" \
	213	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
	214	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
	215	" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
	216	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
	217	" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
517c5dfe	218	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
ea99e8f0 MS	219	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
	220	"boot_flash=run flashargs addtty addeth;" \
	221	" bootm ${kerneladdr}\0" \
	222	"boot_net=run netargs addtty addeth;" \
	223	" tftpboot ${loadaddr} ${kernelfile};" \
	224	" bootm\0"
	225
517c5dfe MS	226	/* additions for new relocation code, must be added to all boards */
	227	#define CONFIG_SYS_INIT_SP_ADDR \
	228	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
	229
ea99e8f0	230	#endif /* __CONFIG_H */