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8d0afcd7 LV |
1 | /* |
2 | * am43xx_evm.h | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_AM43XX_EVM_H | |
10 | #define __CONFIG_AM43XX_EVM_H | |
11 | ||
369cbe1e | 12 | #define CONFIG_ARCH_CPU_INIT |
42da5adf | 13 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ |
8d0afcd7 | 14 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
369cbe1e LV |
15 | |
16 | #include <asm/arch/omap.h> | |
8d0afcd7 LV |
17 | |
18 | /* NS16550 Configuration */ | |
c7b9686d | 19 | #define CONFIG_SYS_NS16550_CLK 48000000 |
19c1c700 LV |
20 | #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL) |
21 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
8d0afcd7 | 22 | #define CONFIG_SYS_NS16550_SERIAL |
2a429d23 | 23 | #endif |
8d0afcd7 | 24 | |
9f1a8cd3 | 25 | /* I2C Configuration */ |
9f1a8cd3 SN |
26 | #define CONFIG_ENV_EEPROM_IS_ON_I2C |
27 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ | |
28 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
9f1a8cd3 | 29 | |
83bad102 | 30 | /* Power */ |
7aa5598a TR |
31 | #define CONFIG_POWER |
32 | #define CONFIG_POWER_I2C | |
83bad102 | 33 | #define CONFIG_POWER_TPS65218 |
403d70ab | 34 | #define CONFIG_POWER_TPS62362 |
83bad102 | 35 | |
369cbe1e | 36 | /* SPL defines. */ |
9aac7d0e | 37 | #define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR |
d3289aac TR |
38 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
39 | (128 << 20)) | |
8d0afcd7 | 40 | |
573b020e LV |
41 | /* Enabling L2 Cache */ |
42 | #define CONFIG_SYS_L2_PL310 | |
43 | #define CONFIG_SYS_PL310_BASE 0x48242000 | |
573b020e | 44 | |
8d0afcd7 | 45 | /* |
369cbe1e LV |
46 | * Since SPL did pll and ddr initialization for us, |
47 | * we don't need to do it twice. | |
8d0afcd7 | 48 | */ |
7a5f71bc | 49 | #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT) |
8d0afcd7 LV |
50 | #define CONFIG_SKIP_LOWLEVEL_INIT |
51 | #endif | |
52 | ||
196311dc TR |
53 | /* |
54 | * When building U-Boot such that there is no previous loader | |
55 | * we need to call board_early_init_f. This is taken care of in | |
56 | * s_init when we have SPL used. | |
57 | */ | |
196311dc | 58 | |
369cbe1e | 59 | /* Now bring in the rest of the common code. */ |
9a0f4004 | 60 | #include <configs/ti_armv7_omap.h> |
8d0afcd7 | 61 | |
7a5f71bc SP |
62 | /* Always 64 KiB env size */ |
63 | #define CONFIG_ENV_SIZE (64 << 10) | |
8d0afcd7 | 64 | |
369cbe1e | 65 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
8d0afcd7 | 66 | |
369cbe1e LV |
67 | /* Clock Defines */ |
68 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
69 | #define V_SCLK (V_OSCK) | |
8d0afcd7 | 70 | |
369cbe1e LV |
71 | /* NS16550 Configuration */ |
72 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
73 | ||
76bfd162 FB |
74 | #define CONFIG_ENV_IS_IN_FAT |
75 | #define FAT_ENV_INTERFACE "mmc" | |
76 | #define FAT_ENV_DEVICE_AND_PART "0:1" | |
77 | #define FAT_ENV_FILE "uboot.env" | |
369cbe1e | 78 | |
983e3700 | 79 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" |
8d0afcd7 | 80 | |
2b36fe57 | 81 | /* SPL USB Support */ |
2b36fe57 | 82 | |
592bc5e2 M |
83 | #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) |
84 | #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 | |
3d799c7f | 85 | #define CONFIG_USB_XHCI_OMAP |
3d799c7f DM |
86 | #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 |
87 | ||
88 | #define CONFIG_OMAP_USB_PHY | |
89 | #define CONFIG_AM437X_USB2PHY2_HOST | |
aee119bd | 90 | #endif |
3d799c7f | 91 | |
a59a77f8 | 92 | #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT) |
b142729d | 93 | #undef CONFIG_USB_DWC3_PHY_OMAP |
c16bf621 | 94 | #undef CONFIG_USB_DWC3_OMAP |
3457bbaf | 95 | #undef CONFIG_USB_DWC3 |
65403f30 | 96 | #undef CONFIG_USB_DWC3_GADGET |
3457bbaf | 97 | |
aaa4a9e3 | 98 | #undef CONFIG_USB_GADGET_DOWNLOAD |
a59a77f8 | 99 | #undef CONFIG_USB_GADGET_VBUS_DRAW |
e6c0bc06 SP |
100 | #undef CONFIG_G_DNL_MANUFACTURER |
101 | #undef CONFIG_G_DNL_VENDOR_NUM | |
102 | #undef CONFIG_G_DNL_PRODUCT_NUM | |
3457bbaf | 103 | #undef CONFIG_USB_GADGET_DUALSPEED |
a59a77f8 SP |
104 | #endif |
105 | ||
8aff39e3 M |
106 | /* |
107 | * Disable MMC DM for SPL build and can be re-enabled after adding | |
108 | * DM support in SPL | |
109 | */ | |
110 | #ifdef CONFIG_SPL_BUILD | |
1ce32ba7 | 111 | #undef CONFIG_TIMER |
8aff39e3 M |
112 | #endif |
113 | ||
a69e2c22 KVA |
114 | #ifndef CONFIG_SPL_BUILD |
115 | /* USB Device Firmware Update support */ | |
a69e2c22 KVA |
116 | #define DFUARGS \ |
117 | "dfu_bufsiz=0x10000\0" \ | |
118 | DFU_ALT_INFO_MMC \ | |
119 | DFU_ALT_INFO_EMMC \ | |
42d1b818 | 120 | DFU_ALT_INFO_RAM \ |
f843770a | 121 | DFU_ALT_INFO_QSPI_XIP |
a69e2c22 KVA |
122 | #else |
123 | #define DFUARGS | |
124 | #endif | |
125 | ||
7a5f71bc | 126 | #ifdef CONFIG_QSPI_BOOT |
9aac7d0e MS |
127 | #ifndef CONFIG_SYS_TEXT_BASE |
128 | #define CONFIG_SYS_TEXT_BASE CONFIG_ISW_ENTRY_ADDR | |
129 | #endif | |
76bfd162 | 130 | #undef CONFIG_ENV_IS_IN_FAT |
7a5f71bc SP |
131 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
132 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
133 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
134 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ | |
135 | #define CONFIG_ENV_OFFSET 0x110000 | |
136 | #define CONFIG_ENV_OFFSET_REDUND 0x120000 | |
137 | #ifdef MTDIDS_DEFAULT | |
138 | #undef MTDIDS_DEFAULT | |
139 | #endif | |
140 | #ifdef MTDPARTS_DEFAULT | |
141 | #undef MTDPARTS_DEFAULT | |
142 | #endif | |
143 | #define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \ | |
144 | "512k(QSPI.u-boot.backup)," \ | |
145 | "512k(QSPI.u-boot-spl-os)," \ | |
146 | "64k(QSPI.u-boot-env)," \ | |
147 | "64k(QSPI.u-boot-env.backup)," \ | |
148 | "8m(QSPI.kernel)," \ | |
149 | "-(QSPI.file-system)" | |
150 | #endif | |
151 | ||
ea4c7a83 SP |
152 | /* SPI */ |
153 | #undef CONFIG_OMAP3_SPI | |
ea4c7a83 SP |
154 | #define CONFIG_TI_SPI_MMAP |
155 | #define CONFIG_QSPI_SEL_GPIO 48 | |
156 | #define CONFIG_SF_DEFAULT_SPEED 48000000 | |
46f7bb00 | 157 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
2d134597 V |
158 | #define CONFIG_QSPI_QUAD_SUPPORT |
159 | #define CONFIG_TI_EDMA3 | |
ea4c7a83 | 160 | |
1564dba7 | 161 | #ifndef CONFIG_SPL_BUILD |
88fdfcd2 SN |
162 | #include <environment/ti/dfu.h> |
163 | #include <environment/ti/mmc.h> | |
164 | ||
1564dba7 | 165 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
fb3ad9bd | 166 | DEFAULT_LINUX_BOOT_ENV \ |
85d17be3 | 167 | DEFAULT_MMC_TI_ARGS \ |
1e93cc84 | 168 | DEFAULT_FIT_TI_ARGS \ |
1564dba7 LV |
169 | "fdtfile=undefined\0" \ |
170 | "bootpart=0:2\0" \ | |
171 | "bootdir=/boot\0" \ | |
172 | "bootfile=zImage\0" \ | |
173 | "console=ttyO0,115200n8\0" \ | |
0f1b0443 TR |
174 | "partitions=" \ |
175 | "uuid_disk=${uuid_gpt_disk};" \ | |
176 | "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ | |
1564dba7 | 177 | "optargs=\0" \ |
2b36fe57 DM |
178 | "usbroot=/dev/sda2 rw\0" \ |
179 | "usbrootfstype=ext4 rootwait\0" \ | |
180 | "usbdev=0\0" \ | |
bea0fd5e | 181 | "ramroot=/dev/ram0 rw\0" \ |
1564dba7 | 182 | "ramrootfstype=ext2\0" \ |
2b36fe57 DM |
183 | "usbargs=setenv bootargs console=${console} " \ |
184 | "${optargs} " \ | |
185 | "root=${usbroot} " \ | |
186 | "rootfstype=${usbrootfstype}\0" \ | |
1564dba7 LV |
187 | "ramargs=setenv bootargs console=${console} " \ |
188 | "${optargs} " \ | |
189 | "root=${ramroot} " \ | |
190 | "rootfstype=${ramrootfstype}\0" \ | |
2b36fe57 | 191 | "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ |
2b36fe57 DM |
192 | "usbboot=" \ |
193 | "setenv devnum ${usbdev}; " \ | |
194 | "setenv devtype usb; " \ | |
195 | "usb start ${usbdev}; " \ | |
196 | "if usb dev ${usbdev}; then " \ | |
197 | "if run loadbootenv; then " \ | |
198 | "echo Loaded environment from ${bootenv};" \ | |
199 | "run importbootenv;" \ | |
200 | "fi;" \ | |
201 | "if test -n $uenvcmd; then " \ | |
202 | "echo Running uenvcmd ...;" \ | |
203 | "run uenvcmd;" \ | |
204 | "fi;" \ | |
205 | "if run loadimage; then " \ | |
206 | "run loadfdt; " \ | |
207 | "echo Booting from usb ${usbdev}...; " \ | |
208 | "run usbargs;" \ | |
209 | "bootz ${loadaddr} - ${fdtaddr}; " \ | |
210 | "fi;" \ | |
211 | "fi\0" \ | |
bf0385d7 KVA |
212 | "fi;" \ |
213 | "usb stop ${usbdev};\0" \ | |
1564dba7 LV |
214 | "findfdt="\ |
215 | "if test $board_name = AM43EPOS; then " \ | |
216 | "setenv fdtfile am43x-epos-evm.dtb; fi; " \ | |
217 | "if test $board_name = AM43__GP; then " \ | |
218 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
a5051b72 MS |
219 | "if test $board_name = AM43XXHS; then " \ |
220 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
9cb9f333 FB |
221 | "if test $board_name = AM43__SK; then " \ |
222 | "setenv fdtfile am437x-sk-evm.dtb; fi; " \ | |
403d70ab FB |
223 | "if test $board_name = AM43_IDK; then " \ |
224 | "setenv fdtfile am437x-idk-evm.dtb; fi; " \ | |
1564dba7 | 225 | "if test $fdtfile = undefined; then " \ |
a69e2c22 | 226 | "echo WARNING: Could not determine device tree; fi; \0" \ |
0ad5eaa4 | 227 | NANDARGS \ |
2320866b | 228 | NETARGS \ |
a69e2c22 | 229 | DFUARGS \ |
1564dba7 LV |
230 | |
231 | #define CONFIG_BOOTCOMMAND \ | |
1e93cc84 LV |
232 | "if test ${boot_fit} -eq 1; then " \ |
233 | "run update_to_fit;" \ | |
234 | "fi;" \ | |
1564dba7 | 235 | "run findfdt; " \ |
18c534bb | 236 | "run envboot;" \ |
2b36fe57 | 237 | "run mmcboot;" \ |
0ad5eaa4 TR |
238 | "run usbboot;" \ |
239 | NANDBOOT \ | |
1564dba7 | 240 | |
3a3939bf M |
241 | #endif |
242 | ||
f4787eab | 243 | #ifndef CONFIG_SPL_BUILD |
4cdd7fda | 244 | /* CPSW Ethernet */ |
4cdd7fda M |
245 | #define CONFIG_MII |
246 | #define CONFIG_BOOTP_DEFAULT | |
247 | #define CONFIG_BOOTP_DNS | |
248 | #define CONFIG_BOOTP_DNS2 | |
249 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
250 | #define CONFIG_BOOTP_GATEWAY | |
251 | #define CONFIG_BOOTP_SUBNETMASK | |
252 | #define CONFIG_NET_RETRY_COUNT 10 | |
4cdd7fda | 253 | #define CONFIG_PHY_GIGE |
f4787eab M |
254 | #endif |
255 | ||
256 | #define CONFIG_DRIVER_TI_CPSW | |
4cdd7fda | 257 | #define CONFIG_PHYLIB |
d9da26ec | 258 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ |
3a3939bf | 259 | |
4cdd7fda | 260 | #define CONFIG_SYS_RX_ETH_BUFFER 64 |
4cdd7fda | 261 | |
e53ad4b4 | 262 | /* NAND support */ |
263 | #ifdef CONFIG_NAND | |
264 | /* NAND: device related configs */ | |
265 | #define CONFIG_SYS_NAND_PAGE_SIZE 4096 | |
266 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
267 | #define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) | |
268 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
269 | CONFIG_SYS_NAND_PAGE_SIZE) | |
270 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
271 | /* NAND: driver related configs */ | |
272 | #define CONFIG_NAND_OMAP_GPMC | |
273 | #define CONFIG_NAND_OMAP_ELM | |
274 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
275 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW | |
276 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
277 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
278 | 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ | |
279 | 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ | |
280 | 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ | |
281 | 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ | |
282 | 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ | |
283 | 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ | |
284 | 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ | |
285 | 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ | |
286 | 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ | |
287 | 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ | |
288 | 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ | |
289 | 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ | |
290 | 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ | |
291 | 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ | |
292 | 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ | |
293 | 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ | |
294 | 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ | |
295 | 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ | |
296 | 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ | |
297 | 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ | |
298 | } | |
299 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
300 | #define CONFIG_SYS_NAND_ECCBYTES 26 | |
301 | #define MTDIDS_DEFAULT "nand0=nand.0" | |
302 | #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ | |
303 | "256k(NAND.SPL)," \ | |
304 | "256k(NAND.SPL.backup1)," \ | |
305 | "256k(NAND.SPL.backup2)," \ | |
306 | "256k(NAND.SPL.backup3)," \ | |
307 | "512k(NAND.u-boot-spl-os)," \ | |
308 | "1m(NAND.u-boot)," \ | |
309 | "256k(NAND.u-boot-env)," \ | |
310 | "256k(NAND.u-boot-env.backup1)," \ | |
311 | "7m(NAND.kernel)," \ | |
9ddef489 | 312 | "-(NAND.file-system)" |
e53ad4b4 | 313 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 |
314 | /* NAND: SPL related configs */ | |
315 | #ifdef CONFIG_SPL_NAND_SUPPORT | |
316 | #define CONFIG_SPL_NAND_AM33XX_BCH | |
317 | #endif | |
318 | /* NAND: SPL falcon mode configs */ | |
319 | #ifdef CONFIG_SPL_OS_BOOT | |
320 | #define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */ | |
321 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ | |
322 | #define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE | |
323 | #endif | |
0ad5eaa4 TR |
324 | #define NANDARGS \ |
325 | "mtdids=" MTDIDS_DEFAULT "\0" \ | |
326 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
327 | "nandargs=setenv bootargs console=${console} " \ | |
328 | "${optargs} " \ | |
329 | "root=${nandroot} " \ | |
330 | "rootfstype=${nandrootfstype}\0" \ | |
331 | "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ | |
332 | "nandrootfstype=ubifs rootwait=1\0" \ | |
333 | "nandboot=echo Booting from nand ...; " \ | |
334 | "run nandargs; " \ | |
335 | "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ | |
336 | "nand read ${loadaddr} NAND.kernel; " \ | |
337 | "bootz ${loadaddr} - ${fdtaddr}\0" | |
338 | #define NANDBOOT "run nandboot; " | |
339 | #else /* !CONFIG_NAND */ | |
340 | #define NANDARGS | |
341 | #define NANDBOOT | |
342 | #endif /* CONFIG_NAND */ | |
e53ad4b4 | 343 | |
8d0afcd7 | 344 | #endif /* __CONFIG_AM43XX_EVM_H */ |