]>
Commit | Line | Data |
---|---|---|
1a31ca4a HS |
1 | /* |
2 | * Configuation settings for the bonito board | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
1a31ca4a HS |
7 | */ |
8 | ||
9 | #ifndef __ARMADILLO_800EVA_H | |
10 | #define __ARMADILLO_800EVA_H | |
11 | ||
12 | #undef DEBUG | |
1a31ca4a | 13 | #define CONFIG_R8A7740 |
1a31ca4a HS |
14 | #define CONFIG_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n" |
15 | #define CONFIG_SH_GPIO_PFC | |
16 | ||
17 | #include <asm/arch/rmobile.h> | |
18 | ||
1a31ca4a HS |
19 | #define CONFIG_CMD_DFL |
20 | #define CONFIG_CMD_SDRAM | |
1a31ca4a | 21 | #define CONFIG_CMD_MII |
ca2fbeaa | 22 | #define CONFIG_CMD_BOOTZ |
09a3be08 | 23 | |
1a31ca4a HS |
24 | #define BOARD_LATE_INIT |
25 | ||
26 | #define CONFIG_BAUDRATE 115200 | |
27 | #define CONFIG_BOOTDELAY 3 | |
28 | #define CONFIG_BOOTARGS "" | |
29 | ||
30 | #define CONFIG_VERSION_VARIABLE | |
31 | #undef CONFIG_SHOW_BOOT_PROGRESS | |
32 | ||
33 | #define CONFIG_ARCH_CPU_INIT | |
34 | #define CONFIG_DISPLAY_CPUINFO | |
1a31ca4a HS |
35 | #define CONFIG_DISPLAY_BOARDINFO |
36 | #define CONFIG_BOARD_EARLY_INIT_F | |
37 | #define CONFIG_USE_ARCH_MEMSET | |
38 | #define CONFIG_USE_ARCH_MEMCPY | |
39 | #define CONFIG_TMU_TIMER | |
40 | #define CONFIG_SYS_DCACHE_OFF | |
41 | ||
42 | /* STACK */ | |
43 | #define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 | |
44 | #define STACK_AREA_SIZE 0xC000 | |
45 | #define LOW_LEVEL_MERAM_STACK \ | |
46 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) | |
47 | ||
48 | /* MEMORY */ | |
49 | #define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 | |
50 | #define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024) | |
51 | ||
52 | #define CONFIG_SYS_LONGHELP | |
1a31ca4a HS |
53 | #define CONFIG_SYS_CBSIZE 256 |
54 | #define CONFIG_SYS_PBSIZE 256 | |
55 | #define CONFIG_SYS_MAXARGS 16 | |
56 | #define CONFIG_SYS_BARGSIZE 512 | |
57 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } | |
58 | ||
59 | /* SCIF */ | |
60 | #define CONFIG_SCIF_CONSOLE | |
61 | #define CONFIG_CONS_SCIF1 | |
62 | #define SCIF0_BASE 0xe6c40000 | |
63 | #define SCIF1_BASE 0xe6c50000 | |
64 | #define SCIF2_BASE 0xe6c60000 | |
65 | #define SCIF4_BASE 0xe6c80000 | |
66 | #define CONFIG_SCIF_A | |
67 | #undef CONFIG_SYS_CONSOLE_INFO_QUIET | |
68 | #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | |
69 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE | |
70 | ||
71 | #define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE) | |
72 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ | |
73 | 504 * 1024 * 1024) | |
74 | #undef CONFIG_SYS_ALT_MEMTEST | |
75 | #undef CONFIG_SYS_MEMTEST_SCRATCH | |
76 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE | |
77 | ||
78 | #define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE) | |
79 | #define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE) | |
80 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ | |
81 | 64 * 1024 * 1024) | |
82 | #define CONFIG_NR_DRAM_BANKS 1 | |
83 | ||
84 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
85 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
86 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) | |
1a31ca4a HS |
87 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
88 | #define CONFIG_SYS_TEXT_BASE 0xE80C0000 | |
89 | ||
90 | /* FLASH */ | |
91 | #define CONFIG_SYS_NO_FLASH | |
92 | #define CONFIG_SYS_FLASH_CFI | |
93 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT | |
94 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
95 | #define CONFIG_SYS_MAX_FLASH_SECT 512 | |
96 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
97 | #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } | |
98 | ||
99 | #define CONFIG_SYS_FLASH_ERASE_TOUT 3000 | |
100 | #define CONFIG_SYS_FLASH_WRITE_TOUT 3000 | |
101 | #define CONFIG_SYS_FLASH_LOCK_TOUT 3000 | |
102 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 | |
103 | ||
104 | /* ENV setting */ | |
105 | #define CONFIG_ENV_IS_IN_FLASH | |
106 | #define CONFIG_ENV_OVERWRITE 1 | |
107 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
108 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ | |
109 | CONFIG_SYS_MONITOR_LEN) | |
110 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) | |
111 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) | |
112 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) | |
113 | ||
114 | /* SH Ether */ | |
1a31ca4a HS |
115 | #define CONFIG_SH_ETHER |
116 | #define CONFIG_SH_ETHER_USE_PORT 0 | |
117 | #define CONFIG_SH_ETHER_PHY_ADDR 0x0 | |
118 | #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 | |
119 | #define CONFIG_SH_ETHER_SH7734_MII (0x01) | |
120 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII | |
121 | #define CONFIG_PHYLIB | |
122 | #define CONFIG_PHY_SMSC | |
123 | #define CONFIG_BITBANGMII | |
124 | #define CONFIG_BITBANGMII_MULTI | |
125 | ||
126 | /* Board Clock */ | |
127 | #define CONFIG_SYS_CLK_FREQ 50000000 | |
717ceb63 NI |
128 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
129 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ | |
1a31ca4a | 130 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
1a31ca4a HS |
131 | |
132 | #endif /* __ARMADILLO_800EVA_H */ |