[people/ms/u-boot.git] / include / configs / h2200.h

/*
 * iPAQ h2200 board configuration
 *
 * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MACH_TYPE		MACH_TYPE_H2200

#define CONFIG_CPU_PXA25X		1
#define CONFIG_BOARD_H2200

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE		0x04000000 /* 64 MB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_1_SIZE

#define CONFIG_SYS_INIT_SP_ADDR		0xfffff800

#define CONFIG_ENV_SIZE			0x00040000
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)

#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_LOAD_ADDR		0xa3000000 /* default load address */

/*
 * iPAQ 1st stage bootloader loads 2nd stage bootloader
 * at address 0xa0040000 but bootloader requires header
 * which is 0x1000 long.
 *
 * --- Header begin ---
 *	.word 0xea0003fe ; b 0x1000
 *
 *	.org 0x40
 *	.ascii "ECEC"
 *
 *	.org 0x1000
 * --- Header end ---
 */

#define CONFIG_SYS_TEXT_BASE		0xa0041000

/*
 * Static chips
 */

#define CONFIG_SYS_MSC0_VAL		0x246c7ffc
#define CONFIG_SYS_MSC1_VAL		0x7ff07ff0
#define CONFIG_SYS_MSC2_VAL		0x7ff07ff0

/*
 * PCMCIA and CF Interfaces
 */

#define CONFIG_SYS_MECR_VAL		0x00000000
#define CONFIG_SYS_MCMEM0_VAL		0x00000000
#define CONFIG_SYS_MCMEM1_VAL		0x00000000
#define CONFIG_SYS_MCATT0_VAL		0x00000000
#define CONFIG_SYS_MCATT1_VAL		0x00000000
#define CONFIG_SYS_MCIO0_VAL		0x00000000
#define CONFIG_SYS_MCIO1_VAL		0x00000000

#define CONFIG_SYS_FLYCNFG_VAL		0x00000000
#define CONFIG_SYS_SXCNFG_VAL		0x00040004

#define CONFIG_SYS_MDREFR_VAL		0x0099E018
#define CONFIG_SYS_MDCNFG_VAL		0x01C801CB
#define CONFIG_SYS_MDMRS_VAL		0x00220022

#define CONFIG_SYS_PSSR_VAL		0x00000000
#define CONFIG_SYS_CKEN			0x00004840
#define CONFIG_SYS_CCCR			0x00000161

/*
 * GPIOs
 */

#define CONFIG_SYS_GPSR0_VAL		0x01000000
#define CONFIG_SYS_GPSR1_VAL		0x00000000
#define CONFIG_SYS_GPSR2_VAL		0x00010000

#define CONFIG_SYS_GPCR0_VAL		0x00000000
#define CONFIG_SYS_GPCR1_VAL		0x00000000
#define CONFIG_SYS_GPCR2_VAL		0x00000000

#define CONFIG_SYS_GPDR0_VAL		0xF7E38C00
#define CONFIG_SYS_GPDR1_VAL		0xBCFFBF83
#define CONFIG_SYS_GPDR2_VAL		0x000157FF

#define CONFIG_SYS_GAFR0_L_VAL		0x80401000
#define CONFIG_SYS_GAFR0_U_VAL		0x00000112
#define CONFIG_SYS_GAFR1_L_VAL		0x600A9550
#define CONFIG_SYS_GAFR1_U_VAL		0x0005AAAA
#define CONFIG_SYS_GAFR2_L_VAL		0x20000000
#define CONFIG_SYS_GAFR2_U_VAL		0x00000000

/*
 * Serial port
 */
#define CONFIG_FFUART
#define CONFIG_CONS_INDEX		3

#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 38400, 115200 }

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG

/* Monitor Command Prompt */

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

#define CONFIG_USB_DEV_PULLUP_GPIO	33
/* USB VBUS GPIO 3 */

#define CONFIG_BOOTCOMMAND		\
	"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
	"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
	"source :script ; " \
	"bootm ; "

#define CONFIG_USB_GADGET_PXA2XX
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_SUBSET

#define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"
#define CONFIG_EXTRA_ENV_SETTINGS \
	"stdin=serial\0" \
	"stdout=serial\0" \
	"stderr=serial\0"

#endif /* __CONFIG_H */
Commit	Line	Data
34cda7a0 ŁD	1	/*
	2	* iPAQ h2200 board configuration
	3	*
	4	* Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
34cda7a0 ŁD	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
34cda7a0 ŁD	12	#define CONFIG_MACH_TYPE MACH_TYPE_H2200
	13
	14	#define CONFIG_CPU_PXA25X 1
	15	#define CONFIG_BOARD_H2200
	16
34cda7a0 ŁD	17	#define CONFIG_NR_DRAM_BANKS 1
	18	#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
	19	#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
	20
	21	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	22	#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
	23
	24	#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
	25
	26	#define CONFIG_ENV_SIZE 0x00040000
	27	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
	28
34cda7a0 ŁD	29	#define CONFIG_SYS_MAXARGS 16
	30	#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */
	31
	32	/*
	33	* iPAQ 1st stage bootloader loads 2nd stage bootloader
	34	* at address 0xa0040000 but bootloader requires header
	35	* which is 0x1000 long.
	36	*
	37	* --- Header begin ---
	38	* .word 0xea0003fe ; b 0x1000
	39	*
	40	* .org 0x40
	41	* .ascii "ECEC"
	42	*
	43	* .org 0x1000
	44	* --- Header end ---
	45	*/
	46
	47	#define CONFIG_SYS_TEXT_BASE 0xa0041000
	48
	49	/*
	50	* Static chips
	51	*/
	52
	53	#define CONFIG_SYS_MSC0_VAL 0x246c7ffc
	54	#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
	55	#define CONFIG_SYS_MSC2_VAL 0x7ff07ff0
	56
	57	/*
	58	* PCMCIA and CF Interfaces
	59	*/
	60
	61	#define CONFIG_SYS_MECR_VAL 0x00000000
	62	#define CONFIG_SYS_MCMEM0_VAL 0x00000000
	63	#define CONFIG_SYS_MCMEM1_VAL 0x00000000
	64	#define CONFIG_SYS_MCATT0_VAL 0x00000000
	65	#define CONFIG_SYS_MCATT1_VAL 0x00000000
	66	#define CONFIG_SYS_MCIO0_VAL 0x00000000
	67	#define CONFIG_SYS_MCIO1_VAL 0x00000000
	68
	69	#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
	70	#define CONFIG_SYS_SXCNFG_VAL 0x00040004
	71
	72	#define CONFIG_SYS_MDREFR_VAL 0x0099E018
	73	#define CONFIG_SYS_MDCNFG_VAL 0x01C801CB
	74	#define CONFIG_SYS_MDMRS_VAL 0x00220022
	75
	76	#define CONFIG_SYS_PSSR_VAL 0x00000000
	77	#define CONFIG_SYS_CKEN 0x00004840
	78	#define CONFIG_SYS_CCCR 0x00000161
	79
	80	/*
	81	* GPIOs
	82	*/
	83
	84	#define CONFIG_SYS_GPSR0_VAL 0x01000000
	85	#define CONFIG_SYS_GPSR1_VAL 0x00000000
	86	#define CONFIG_SYS_GPSR2_VAL 0x00010000
	87
	88	#define CONFIG_SYS_GPCR0_VAL 0x00000000
	89	#define CONFIG_SYS_GPCR1_VAL 0x00000000
	90	#define CONFIG_SYS_GPCR2_VAL 0x00000000
	91
	92	#define CONFIG_SYS_GPDR0_VAL 0xF7E38C00
93	#define CONFIG_SYS_GPDR1_VAL 0xBCFFBF83
94	#define CONFIG_SYS_GPDR2_VAL 0x000157FF
95
96	#define CONFIG_SYS_GAFR0_L_VAL 0x80401000
97	#define CONFIG_SYS_GAFR0_U_VAL 0x00000112
98	#define CONFIG_SYS_GAFR1_L_VAL 0x600A9550
99	#define CONFIG_SYS_GAFR1_U_VAL 0x0005AAAA
100	#define CONFIG_SYS_GAFR2_L_VAL 0x20000000
101	#define CONFIG_SYS_GAFR2_U_VAL 0x00000000
102
103	/*
104	* Serial port
105	*/
34cda7a0 ŁD	106	#define CONFIG_FFUART
	107	#define CONFIG_CONS_INDEX 3
	108
34cda7a0 ŁD	109	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 }
34cda7a0 ŁD	110
34cda7a0 ŁD	111	#define CONFIG_SETUP_MEMORY_TAGS
	112	#define CONFIG_CMDLINE_TAG
	113	#define CONFIG_INITRD_TAG
	114
	115	/* Monitor Command Prompt */
34cda7a0	116
34cda7a0 ŁD	117	/* Print Buffer Size */
	118	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	119	sizeof(CONFIG_SYS_PROMPT) + 16)
	120
a33fada1 LD	121	#define CONFIG_USB_DEV_PULLUP_GPIO 33
	122	/* USB VBUS GPIO 3 */
	123
a33fada1 LD	124	#define CONFIG_BOOTCOMMAND \
	125	"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
	126	"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
	127	"source :script ; " \
	128	"bootm ; "
	129
	130	#define CONFIG_USB_GADGET_PXA2XX
	131	#define CONFIG_USB_ETHER
	132	#define CONFIG_USB_ETH_SUBSET
	133
	134	#define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
	135	#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
	136	#define CONFIG_EXTRA_ENV_SETTINGS \
	137	"stdin=serial\0" \
	138	"stdout=serial\0" \
	139	"stderr=serial\0"
	140
34cda7a0	141	#endif /* __CONFIG_H */