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7379f45a DB |
1 | /* |
2 | * (C) Copyright 2006-2008 | |
3 | * Texas Instruments. | |
4 | * Richard Woodruff <r-woodruff2@ti.com> | |
5 | * Syed Mohammed Khasim <x0khasim@ti.com> | |
6 | * Nishanth Menon <nm@ti.com> | |
7 | * | |
8 | * Configuration settings for the TI OMAP3430 Zoom MDK board. | |
9 | * | |
3765b3e7 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
7379f45a DB |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_H | |
14 | #define __CONFIG_H | |
7379f45a | 15 | |
161d2d5e | 16 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
7379f45a | 17 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
987ec585 | 18 | #include <asm/arch/omap.h> |
161d2d5e NM |
19 | #include <configs/ti_omap3_common.h> |
20 | ||
21 | /* Remove SPL boot option - we do not support that on LDP yet */ | |
161d2d5e | 22 | #undef CONFIG_SPL_FRAMEWORK |
161d2d5e NM |
23 | |
24 | /* Generic NAND definition conflicts with debug_base */ | |
25 | #undef CONFIG_SYS_NAND_BASE | |
7379f45a | 26 | |
7379f45a DB |
27 | #define CONFIG_MISC_INIT_R |
28 | ||
7379f45a DB |
29 | #define CONFIG_REVISION_TAG 1 |
30 | ||
9c44ddcc | 31 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
7379f45a DB |
32 | |
33 | /* | |
34 | * Hardware drivers | |
35 | */ | |
36 | ||
05be5a60 | 37 | /* USB */ |
95de1e2f | 38 | #define CONFIG_USB_MUSB_UDC 1 |
05be5a60 TR |
39 | #define CONFIG_USB_OMAP3 1 |
40 | #define CONFIG_TWL4030_USB 1 | |
41 | ||
42 | /* USB device configuration */ | |
43 | #define CONFIG_USB_DEVICE 1 | |
44 | #define CONFIG_USB_TTY 1 | |
05be5a60 TR |
45 | /* Change these to suit your needs */ |
46 | #define CONFIG_USBD_VENDORID 0x0451 | |
47 | #define CONFIG_USBD_PRODUCTID 0x5678 | |
48 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" | |
49 | #define CONFIG_USBD_PRODUCT_NAME "Zoom1" | |
50 | ||
161d2d5e | 51 | #if defined(CONFIG_CMD_NAND) |
434f2cfc | 52 | /* NAND: SPL falcon mode configs */ |
53 | #ifdef CONFIG_SPL_OS_BOOT | |
434f2cfc | 54 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 |
434f2cfc | 55 | #endif |
161d2d5e | 56 | #endif |
7379f45a | 57 | |
cd782635 TR |
58 | /* |
59 | * TWL4030 | |
60 | */ | |
2c155130 | 61 | #define CONFIG_TWL4030_LED 1 |
cd782635 | 62 | |
7379f45a DB |
63 | /* |
64 | * Board NAND Info. | |
65 | */ | |
7379f45a DB |
66 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
67 | /* to access nand */ | |
68 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ | |
69 | /* to access nand at */ | |
70 | /* CS0 */ | |
7379f45a DB |
71 | |
72 | /* Environment information */ | |
7379f45a DB |
73 | |
74 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
75 | "loadaddr=0x82000000\0" \ | |
c2e7c7b2 | 76 | "fdtaddr=0x80f80000\0" \ |
4e8183b7 | 77 | "bootfile=uImage\0" \ |
c2e7c7b2 | 78 | "fdtfile=omap3-ldp.dtb\0" \ |
4e8183b7 NM |
79 | "bootdir=/\0" \ |
80 | "bootpart=0:1\0" \ | |
05be5a60 | 81 | "usbtty=cdc_acm\0" \ |
ea467c73 | 82 | "console=ttyO2,115200n8\0" \ |
d6906cb8 | 83 | "mmcdev=0\0" \ |
7379f45a DB |
84 | "videomode=1024x768@60,vxres=1024,vyres=768\0" \ |
85 | "videospec=omapfb:vram:2M,vram:4M\0" \ | |
86 | "mmcargs=setenv bootargs console=${console} " \ | |
87 | "video=${videospec},mode:${videomode} " \ | |
88 | "root=/dev/mmcblk0p2 rw " \ | |
89 | "rootfstype=ext3 rootwait\0" \ | |
90 | "nandargs=setenv bootargs console=${console} " \ | |
91 | "video=${videospec},mode:${videomode} " \ | |
92 | "root=/dev/mtdblock4 rw " \ | |
93 | "rootfstype=jffs2\0" \ | |
d6906cb8 | 94 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
7379f45a | 95 | "bootscript=echo Running bootscript from mmc ...; " \ |
74de7aef | 96 | "source ${loadaddr}\0" \ |
4e8183b7 | 97 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
c2e7c7b2 NM |
98 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ |
99 | "loadzimage=setenv bootfile zImage; if run loadimage; then run loadfdt;fi\0"\ | |
7379f45a DB |
100 | "mmcboot=echo Booting from mmc ...; " \ |
101 | "run mmcargs; " \ | |
102 | "bootm ${loadaddr}\0" \ | |
c2e7c7b2 NM |
103 | "mmczboot=echo Booting from mmc ...; " \ |
104 | "run mmcargs; " \ | |
105 | "bootz ${loadaddr} - ${fdtaddr}\0" \ | |
7379f45a DB |
106 | "nandboot=echo Booting from nand ...; " \ |
107 | "run nandargs; " \ | |
108 | "nand read ${loadaddr} 280000 400000; " \ | |
109 | "bootm ${loadaddr}\0" \ | |
110 | ||
111 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 112 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
7379f45a DB |
113 | "if run loadbootscript; then " \ |
114 | "run bootscript; " \ | |
115 | "else " \ | |
4e8183b7 | 116 | "if run loadimage; then " \ |
7379f45a | 117 | "run mmcboot; " \ |
c2e7c7b2 NM |
118 | "else if run loadzimage; then " \ |
119 | "run mmczboot; " \ | |
7379f45a | 120 | "else run nandboot; " \ |
c2e7c7b2 | 121 | "fi; fi;" \ |
7379f45a DB |
122 | "fi; " \ |
123 | "else run nandboot; fi" | |
124 | ||
7379f45a DB |
125 | /* |
126 | * Miscellaneous configurable options | |
127 | */ | |
161d2d5e NM |
128 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) /* memtest */ |
129 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_2 + \ | |
7379f45a DB |
130 | 0x01F00000) /* 31MB */ |
131 | ||
7379f45a DB |
132 | /*----------------------------------------------------------------------- |
133 | * FLASH and environment organization | |
134 | */ | |
135 | ||
136 | /* **** PISMO SUPPORT *** */ | |
6cbec7b3 | 137 | #if defined(CONFIG_CMD_NAND) |
222a3113 | 138 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 139 | #endif |
7379f45a DB |
140 | |
141 | /* Monitor at start of flash */ | |
142 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
143 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP | |
144 | ||
7379f45a | 145 | #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ |
7379f45a | 146 | |
6cbec7b3 | 147 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
7672d9d5 AF |
148 | #define CONFIG_ENV_OFFSET 0x260000 |
149 | #define CONFIG_ENV_ADDR 0x260000 | |
7379f45a | 150 | |
7379f45a | 151 | #endif /* __CONFIG_H */ |