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1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
265817c7 15#define CONFIG_PB1X00 1
8bde63eb 16#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
265817c7 17
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18#define CONFIG_DISPLAY_BOARDINFO
19
265817c7 20#ifdef CONFIG_PB1000
8bde63eb 21#define CONFIG_SOC_AU1000 1
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22#else
23#ifdef CONFIG_PB1100
8bde63eb 24#define CONFIG_SOC_AU1100 1
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25#else
26#ifdef CONFIG_PB1500
8bde63eb 27#define CONFIG_SOC_AU1500 1
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28#else
29#error "No valid board set"
30#endif
31#endif
32#endif
33
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34#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
35
36#define CONFIG_BAUDRATE 115200
37
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38#define CONFIG_TIMESTAMP /* Print image info with timestamp */
39#undef CONFIG_BOOTARGS
40
41#define CONFIG_EXTRA_ENV_SETTINGS \
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42 "addmisc=setenv bootargs ${bootargs} " \
43 "console=ttyS0,${baudrate} " \
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44 "panic=1\0" \
45 "bootfile=/vmlinux.img\0" \
fe126d8b 46 "load=tftp 80500000 ${u-boot}\0" \
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47 ""
48/* Boot from NFS root */
fe126d8b 49#define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
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50
51/*
52 * Miscellaneous configurable options
53 */
6d0f6bcf 54#define CONFIG_SYS_LONGHELP /* undef to save memory */
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55#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
56#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
57#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
265817c7 58
6d0f6bcf 59#define CONFIG_SYS_MALLOC_LEN 128*1024
265817c7 60
6d0f6bcf 61#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
265817c7 62
6d0f6bcf 63#define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
a55d4817 64
6d0f6bcf 65#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
265817c7 66
6d0f6bcf 67#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
265817c7 68
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69#define CONFIG_SYS_MEMTEST_START 0x80100000
70#undef CONFIG_SYS_MEMTEST_START
71#define CONFIG_SYS_MEMTEST_START 0x80200000
72#define CONFIG_SYS_MEMTEST_END 0x83800000
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73
74/*-----------------------------------------------------------------------
75 * FLASH and environment organization
76 */
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77#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
78#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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79
80#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
81#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
82
83/* The following #defines are needed to get flash environment right */
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84/* ROM version */
85/* #define CONFIG_SYS_TEXT_BASE 0xbfc00000 */
86/* SDRAM version */
87#define CONFIG_SYS_TEXT_BASE 0x83800000
88
14d0a02a 89#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf 90#define CONFIG_SYS_MONITOR_LEN (192 << 10)
265817c7 91
6d0f6bcf 92#define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
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93
94/* We boot from this flash, selected with dip switch */
6d0f6bcf 95#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
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96
97/* timeout values are in ticks */
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98#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
99#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
265817c7 100
93f6d725 101#define CONFIG_ENV_IS_NOWHERE 1
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102
103/* Address and size of Primary Environment Sector */
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104#define CONFIG_ENV_ADDR 0xB0030000
105#define CONFIG_ENV_SIZE 0x10000
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106
107#define CONFIG_FLASH_16BIT
108
109#define CONFIG_NR_DRAM_BANKS 2
110
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111#define CONFIG_MEMSIZE_IN_BYTES
112
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113/*---USB -------------------------------------------*/
114#if 0
115#define CONFIG_USB_OHCI
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116#define CONFIG_USB_STORAGE
117#define CONFIG_DOS_PARTITION
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118#endif
119
120/*---ATA PCMCIA ------------------------------------*/
121#if 0
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122#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
123#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
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124#define CONFIG_PCMCIA_SLOT_A
125
126#define CONFIG_ATAPI 1
127#define CONFIG_MAC_PARTITION 1
128
129/* We run CF in "true ide" mode or a harddrive via pcmcia */
130#define CONFIG_IDE_PCMCIA 1
131
132/* We only support one slot for now */
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133#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
134#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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135
136#undef CONFIG_IDE_LED /* LED for ide not supported */
137#undef CONFIG_IDE_RESET /* reset for ide not supported */
138
6d0f6bcf 139#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
265817c7 140
6d0f6bcf 141#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
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142
143/* Offset for data I/O */
6d0f6bcf 144#define CONFIG_SYS_ATA_DATA_OFFSET 8
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145
146/* Offset for normal register accesses */
6d0f6bcf 147#define CONFIG_SYS_ATA_REG_OFFSET 0
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148
149/* Offset for alternate registers */
6d0f6bcf 150#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
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151
152#endif
153/*-----------------------------------------------------------------------
154 * Cache Configuration
155 */
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156#define CONFIG_SYS_DCACHE_SIZE 16384
157#define CONFIG_SYS_ICACHE_SIZE 16384
158#define CONFIG_SYS_CACHELINE_SIZE 32
265817c7 159
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160/*
161 * BOOTP options
162 */
163#define CONFIG_BOOTP_BOOTFILESIZE
164#define CONFIG_BOOTP_BOOTPATH
165#define CONFIG_BOOTP_GATEWAY
166#define CONFIG_BOOTP_HOSTNAME
167
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168/*
169 * Command line configuration.
170 */
26a34560 171#define CONFIG_CMD_MII
26a34560 172
26a34560 173#undef CONFIG_CMD_FAT
26a34560 174#undef CONFIG_CMD_IDE
26a34560 175#undef CONFIG_CMD_BEDBUG
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176
177#endif /* __CONFIG_H */