[people/ms/u-boot.git] / include / configs / pcm052.h

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the phytec PCM-052 SoM.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

#define CONFIG_VF610

#define CONFIG_SKIP_LOWLEVEL_INIT

/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_NAND_ONFI_DETECTION

#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR

#define CONFIG_JFFS2_NAND

/* UBI */
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO

/* Dynamic MTD partition support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE

#ifndef MTDIDS_DEFAULT
#define MTDIDS_DEFAULT			"nand0=NAND"
#endif

#ifndef MTDPARTS_DEFAULT
#define MTDPARTS_DEFAULT		"mtdparts=NAND:640k(bootloader)"\
					",128k(env1)"\
					",128k(env2)"\
					",128k(dtb)"\
					",6144k(kernel)"\
					",-(root)"
#endif

#endif

#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/

#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_FEC_MXC_PHYADDR          0
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL

/* QSPI Configs*/

#ifdef CONFIG_FSL_QSPI
#define FSL_QSPI_FLASH_SIZE		(1 << 24)
#define FSL_QSPI_FLASH_NUM		2
#define CONFIG_SYS_FSL_QSPI_LE
#endif

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC_I2C3
#define CONFIG_SYS_I2C_MXC

/* RTC (actually an RV-4162 but M41T62-compatible) */
#define CONFIG_CMD_DATE
#define CONFIG_RTC_M41T62
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_RTC_BUS_NUM 2

/* EEPROM (24FC256) */
#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_BUS 2


#define CONFIG_LOADADDR			0x82000000

/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_SYS_TEXT_BASE		0x3f408000
#define CONFIG_BOARD_SIZE_LIMIT		524288

/* if no target-specific extra environment settings were defined by the
   target, define an empty one */
#ifndef PCM052_EXTRA_ENV_SETTINGS
#define PCM052_EXTRA_ENV_SETTINGS
#endif

/* if no target-specific boot command was defined by the target,
   define an empty one */
#ifndef PCM052_BOOTCOMMAND
#define PCM052_BOOTCOMMAND
#endif

/* if no target-specific extra environment settings were defined by the
   target, define an empty one */
#ifndef PCM052_NET_INIT
#define PCM052_NET_INIT
#endif

/* boot command, including the target-defined one if any */
#define CONFIG_BOOTCOMMAND	PCM052_BOOTCOMMAND "run bootcmd_nand"

/* Extra env settings (including the target-defined ones if any) */
#define CONFIG_EXTRA_ENV_SETTINGS \
	PCM052_EXTRA_ENV_SETTINGS \
	"autoload=no\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"blimg_file=u-boot.vyb\0" \
	"blimg_addr=0x81000000\0" \
	"kernel_file=zImage\0" \
	"kernel_addr=0x82000000\0" \
	"fdt_file=zImage.dtb\0" \
	"fdt_addr=0x81000000\0" \
	"ram_file=uRamdisk\0" \
	"ram_addr=0x83000000\0" \
	"filesys=rootfs.ubifs\0" \
	"sys_addr=0x81000000\0" \
	"tftploc=/path/to/tftp/directory/\0" \
	"nfs_root=/path/to/nfs/root\0" \
	"tftptimeout=1000\0" \
	"tftptimeoutcountmax=1000000\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"bootargs_base=setenv bootargs rw " \
		" mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
		"console=ttyLP1,115200n8\0" \
	"bootargs_sd=setenv bootargs ${bootargs} " \
		"root=/dev/mmcblk0p2 rootwait\0" \
	"bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
		"nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
	"bootargs_nand=setenv bootargs ${bootargs} " \
		"ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
	"bootargs_ram=setenv bootargs ${bootargs} " \
		"root=/dev/ram rw initrd=${ram_addr}\0" \
	"bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	"bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
		"fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
		"fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
		"bootz ${kernel_addr} - ${fdt_addr}\0" \
	"bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
		"tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
		"tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
		"bootz ${kernel_addr} - ${fdt_addr}\0" \
	"bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
		"nand read ${fdt_addr} dtb; " \
		"nand read ${kernel_addr} kernel; " \
		"bootz ${kernel_addr} - ${fdt_addr}\0" \
	"bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
		"nand read ${fdt_addr} dtb; " \
		"nand read ${kernel_addr} kernel; " \
		"nand read ${ram_addr} root; " \
		"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
	"update_bootloader_from_tftp=" PCM052_NET_INIT \
		"if tftp ${blimg_addr} "\
		"${tftpdir}${blimg_file}; then " \
		"mtdparts default; " \
		"nand erase.part bootloader; " \
		"nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
	"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
		"${kernel_file}; " \
		"then mtdparts default; " \
		"nand erase.part kernel; " \
		"nand write ${kernel_addr} kernel ${filesize}; " \
		"if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
		"nand erase.part dtb; " \
		"nand write ${fdt_addr} dtb ${filesize}; fi\0" \
	"update_kernel_from_tftp=" PCM052_NET_INIT \
		"if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
		"then setenv fdtsize ${filesize}; " \
		"if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
		"mtdparts default; " \
		"nand erase.part dtb; " \
		"nand write ${fdt_addr} dtb ${fdtsize}; " \
		"nand erase.part kernel; " \
		"nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
	"update_rootfs_from_tftp=" PCM052_NET_INIT \
		"if tftp ${sys_addr} ${tftpdir}${filesys}; " \
		"then mtdparts default; " \
		"nand erase.part root; " \
		"ubi part root; " \
		"ubi create rootfs; " \
		"ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
	"update_ramdisk_from_tftp=" PCM052_NET_INIT \
		"if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
		"then mtdparts default; " \
		"nand erase.part root; " \
		"nand write ${ram_addr} root ${filesize}; fi\0"

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		\
			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START	0x80010000
#define CONFIG_SYS_MEMTEST_END		0x87C00000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

/*
 * Stack sizes
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */

/* Physical memory map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			(0x80000000)
#define PHYS_SDRAM_SIZE			(CONFIG_PCM052_DDR_SIZE * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0
#endif

#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SECT_SIZE		(128 * 1024)
#define CONFIG_ENV_SIZE			(8 * 1024)
#define CONFIG_ENV_OFFSET		0xA0000
#define CONFIG_ENV_SIZE_REDUND		(8 * 1024)
#define CONFIG_ENV_OFFSET_REDUND	0xC0000
#endif

#endif
Commit	Line	Data
931a1d2a AA	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the phytec PCM-052 SoM.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
	12	#include <asm/arch/imx-regs.h>
	13
	14	#define CONFIG_VF610
	15
931a1d2a AA	16	#define CONFIG_SKIP_LOWLEVEL_INIT
	17
	18	/* Enable passing of ATAGs */
	19	#define CONFIG_CMDLINE_TAG
	20
	21	/* Size of malloc() pool */
	22	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
	23
931a1d2a AA	24	/* Allow to overwrite serial and ethaddr */
931a1d2a AA	25	#define CONFIG_ENV_OVERWRITE
931a1d2a	26
931a1d2a AA	27	/* NAND support */
	28	#define CONFIG_CMD_NAND
	29	#define CONFIG_CMD_NAND_TRIMFFS
	30	#define CONFIG_SYS_NAND_ONFI_DETECTION
	31
	32	#ifdef CONFIG_CMD_NAND
931a1d2a AA	33	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	34	#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
	35
	36	#define CONFIG_JFFS2_NAND
	37
	38	/* UBI */
931a1d2a AA	39	#define CONFIG_CMD_UBIFS
	40	#define CONFIG_RBTREE
	41	#define CONFIG_LZO
	42
	43	/* Dynamic MTD partition support */
	44	#define CONFIG_CMD_MTDPARTS
	45	#define CONFIG_MTD_PARTITIONS
	46	#define CONFIG_MTD_DEVICE
27192d16 AA	47
27192d16 AA	48	#ifndef MTDIDS_DEFAULT
040ef8f5	49	#define MTDIDS_DEFAULT "nand0=NAND"
27192d16 AA	50	#endif
	51
	52	#ifndef MTDPARTS_DEFAULT
27f7d4f5	53	#define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
931a1d2a AA	54	",128k(env1)"\
931a1d2a AA	55	",128k(env2)"\
040ef8f5 AA	56	",128k(dtb)"\
040ef8f5 AA	57	",6144k(kernel)"\
27f7d4f5	58	",-(root)"
931a1d2a AA	59	#endif
931a1d2a AA	60
27192d16 AA	61	#endif
27192d16 AA	62
931a1d2a AA	63	#define CONFIG_FSL_ESDHC
	64	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	65	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	66
	67	/#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1/
931a1d2a	68
931a1d2a AA	69	#define CONFIG_FEC_MXC
	70	#define CONFIG_MII
	71	#define IMX_FEC_BASE ENET_BASE_ADDR
	72	#define CONFIG_FEC_XCV_TYPE RMII
	73	#define CONFIG_FEC_MXC_PHYADDR 0
	74	#define CONFIG_PHYLIB
	75	#define CONFIG_PHY_MICREL
	76
	77	/* QSPI Configs*/
931a1d2a AA	78
931a1d2a AA	79	#ifdef CONFIG_FSL_QSPI
931a1d2a AA	80	#define FSL_QSPI_FLASH_SIZE (1 << 24)
	81	#define FSL_QSPI_FLASH_NUM 2
	82	#define CONFIG_SYS_FSL_QSPI_LE
	83	#endif
	84
	85	/* I2C Configs */
931a1d2a AA	86	#define CONFIG_SYS_I2C
	87	#define CONFIG_SYS_I2C_MXC_I2C3
	88	#define CONFIG_SYS_I2C_MXC
	89
	90	/* RTC (actually an RV-4162 but M41T62-compatible) */
	91	#define CONFIG_CMD_DATE
	92	#define CONFIG_RTC_M41T62
	93	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
	94	#define CONFIG_SYS_RTC_BUS_NUM 2
	95
	96	/* EEPROM (24FC256) */
	97	#define CONFIG_CMD_EEPROM
	98	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	99	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	100	#define CONFIG_SYS_I2C_EEPROM_BUS 2
	101
931a1d2a AA	102
	103	#define CONFIG_LOADADDR 0x82000000
	104
	105	/* We boot from the gfxRAM area of the OCRAM. */
	106	#define CONFIG_SYS_TEXT_BASE 0x3f408000
	107	#define CONFIG_BOARD_SIZE_LIMIT 524288
	108
27192d16 AA	109	/* if no target-specific extra environment settings were defined by the
	110	target, define an empty one */
	111	#ifndef PCM052_EXTRA_ENV_SETTINGS
	112	#define PCM052_EXTRA_ENV_SETTINGS
	113	#endif
	114
	115	/* if no target-specific boot command was defined by the target,
	116	define an empty one */
	117	#ifndef PCM052_BOOTCOMMAND
	118	#define PCM052_BOOTCOMMAND
	119	#endif
	120
	121	/* if no target-specific extra environment settings were defined by the
	122	target, define an empty one */
	123	#ifndef PCM052_NET_INIT
	124	#define PCM052_NET_INIT
	125	#endif
	126
	127	/* boot command, including the target-defined one if any */
	128	#define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
	129
	130	/* Extra env settings (including the target-defined ones if any) */
040ef8f5	131	#define CONFIG_EXTRA_ENV_SETTINGS \
27192d16 AA	132	PCM052_EXTRA_ENV_SETTINGS \
27192d16 AA	133	"autoload=no\0" \
040ef8f5 AA	134	"fdt_high=0xffffffff\0" \
040ef8f5 AA	135	"initrd_high=0xffffffff\0" \
ed0c2c0a AA	136	"blimg_file=u-boot.vyb\0" \
ed0c2c0a AA	137	"blimg_addr=0x81000000\0" \
040ef8f5 AA	138	"kernel_file=zImage\0" \
040ef8f5 AA	139	"kernel_addr=0x82000000\0" \
083e4fd4	140	"fdt_file=zImage.dtb\0" \
040ef8f5 AA	141	"fdt_addr=0x81000000\0" \
	142	"ram_file=uRamdisk\0" \
	143	"ram_addr=0x83000000\0" \
	144	"filesys=rootfs.ubifs\0" \
	145	"sys_addr=0x81000000\0" \
	146	"tftploc=/path/to/tftp/directory/\0" \
	147	"nfs_root=/path/to/nfs/root\0" \
	148	"tftptimeout=1000\0" \
	149	"tftptimeoutcountmax=1000000\0" \
	150	"mtdparts=" MTDPARTS_DEFAULT "\0" \
a7e5f7f3 AA	151	"bootargs_base=setenv bootargs rw " \
a7e5f7f3 AA	152	" mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
040ef8f5 AA	153	"console=ttyLP1,115200n8\0" \
	154	"bootargs_sd=setenv bootargs ${bootargs} " \
	155	"root=/dev/mmcblk0p2 rootwait\0" \
931a1d2a	156	"bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
040ef8f5 AA	157	"nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
040ef8f5 AA	158	"bootargs_nand=setenv bootargs ${bootargs} " \
27f7d4f5	159	"ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
040ef8f5 AA	160	"bootargs_ram=setenv bootargs ${bootargs} " \
	161	"root=/dev/ram rw initrd=${ram_addr}\0" \
	162	"bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	163	"bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
	164	"fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
	165	"fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
	166	"bootz ${kernel_addr} - ${fdt_addr}\0" \
	167	"bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
	168	"tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
	169	"tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
	170	"bootz ${kernel_addr} - ${fdt_addr}\0" \
	171	"bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
	172	"nand read ${fdt_addr} dtb; " \
	173	"nand read ${kernel_addr} kernel; " \
	174	"bootz ${kernel_addr} - ${fdt_addr}\0" \
	175	"bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
	176	"nand read ${fdt_addr} dtb; " \
	177	"nand read ${kernel_addr} kernel; " \
27f7d4f5	178	"nand read ${ram_addr} root; " \
040ef8f5	179	"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
27192d16 AA	180	"update_bootloader_from_tftp=" PCM052_NET_INIT \
27192d16 AA	181	"if tftp ${blimg_addr} "\
ed0c2c0a AA	182	"${tftpdir}${blimg_file}; then " \
ed0c2c0a AA	183	"mtdparts default; " \
040ef8f5	184	"nand erase.part bootloader; " \
ed0c2c0a	185	"nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
040ef8f5 AA	186	"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
	187	"${kernel_file}; " \
	188	"then mtdparts default; " \
	189	"nand erase.part kernel; " \
	190	"nand write ${kernel_addr} kernel ${filesize}; " \
	191	"if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
	192	"nand erase.part dtb; " \
	193	"nand write ${fdt_addr} dtb ${filesize}; fi\0" \
27192d16 AA	194	"update_kernel_from_tftp=" PCM052_NET_INIT \
27192d16 AA	195	"if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
040ef8f5 AA	196	"then setenv fdtsize ${filesize}; " \
	197	"if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
	198	"mtdparts default; " \
	199	"nand erase.part dtb; " \
	200	"nand write ${fdt_addr} dtb ${fdtsize}; " \
	201	"nand erase.part kernel; " \
	202	"nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
27192d16 AA	203	"update_rootfs_from_tftp=" PCM052_NET_INIT \
27192d16 AA	204	"if tftp ${sys_addr} ${tftpdir}${filesys}; " \
040ef8f5 AA	205	"then mtdparts default; " \
	206	"nand erase.part root; " \
	207	"ubi part root; " \
	208	"ubi create rootfs; " \
	209	"ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
27192d16 AA	210	"update_ramdisk_from_tftp=" PCM052_NET_INIT \
27192d16 AA	211	"if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
040ef8f5	212	"then mtdparts default; " \
27f7d4f5 AA	213	"nand erase.part root; " \
27f7d4f5 AA	214	"nand write ${ram_addr} root ${filesize}; fi\0"
931a1d2a	215
931a1d2a AA	216	/* Miscellaneous configurable options */
931a1d2a AA	217	#define CONFIG_SYS_LONGHELP /* undef to save memory */
931a1d2a AA	218	#define CONFIG_AUTO_COMPLETE
	219	#define CONFIG_CMDLINE_EDITING
	220	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	221	#define CONFIG_SYS_PBSIZE \
	222	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	223	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	224	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	225
931a1d2a AA	226	#define CONFIG_SYS_MEMTEST_START 0x80010000
	227	#define CONFIG_SYS_MEMTEST_END 0x87C00000
	228
	229	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	230
	231	/*
	232	* Stack sizes
	233	* The stack sizes are set up in start.S using the settings below
	234	*/
	235	#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
	236
	237	/* Physical memory map */
	238	#define CONFIG_NR_DRAM_BANKS 1
	239	#define PHYS_SDRAM (0x80000000)
a7e5f7f3	240	#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
931a1d2a AA	241
	242	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	243	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	244	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	245
	246	#define CONFIG_SYS_INIT_SP_OFFSET \
	247	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	248	#define CONFIG_SYS_INIT_SP_ADDR \
	249	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	250
e856bdcf	251	/* environment organization */
931a1d2a AA	252	#ifdef CONFIG_ENV_IS_IN_MMC
	253	#define CONFIG_ENV_SIZE (8 * 1024)
	254
	255	#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
	256	#define CONFIG_SYS_MMC_ENV_DEV 0
	257	#endif
	258
	259	#ifdef CONFIG_ENV_IS_IN_NAND
	260	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
	261	#define CONFIG_ENV_SIZE (8 * 1024)
040ef8f5	262	#define CONFIG_ENV_OFFSET 0xA0000
931a1d2a	263	#define CONFIG_ENV_SIZE_REDUND (8 * 1024)
040ef8f5	264	#define CONFIG_ENV_OFFSET_REDUND 0xC0000
931a1d2a AA	265	#endif
931a1d2a AA	266
931a1d2a	267	#endif