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1/*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 *
393cb361 5 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
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6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * High Level Configuration Options
31 * (easy to change)
32 */
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33#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
34#define CONFIG_S5P 1 /* which is in a S5P Family */
393cb361 35#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */
9e40808c 36#define CONFIG_UNIVERSAL 1 /* working with Universal */
d984b9f8 37#define CONFIG_TIZEN 1 /* TIZEN lib */
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38
39#include <asm/arch/cpu.h> /* get chip and board defs */
40
41#define CONFIG_ARCH_CPU_INIT
42#define CONFIG_DISPLAY_CPUINFO
43#define CONFIG_DISPLAY_BOARDINFO
44
45/* Keep L2 Cache Disabled */
e47f2db5 46#define CONFIG_SYS_L2CACHE_OFF 1
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47
48#define CONFIG_SYS_SDRAM_BASE 0x40000000
49#define CONFIG_SYS_TEXT_BASE 0x44800000
50
393cb361 51/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
9e40808c 52#define CONFIG_SYS_CLK_FREQ_C210 24000000
5e46f83c 53#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
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54
55#define CONFIG_SETUP_MEMORY_TAGS
56#define CONFIG_CMDLINE_TAG
57#define CONFIG_INITRD_TAG
58#define CONFIG_REVISION_TAG
59#define CONFIG_CMDLINE_EDITING
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60#define CONFIG_SKIP_LOWLEVEL_INIT
61#define CONFIG_BOARD_EARLY_INIT_F
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62
63/* Size of malloc() pool */
64#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
65
66/* select serial console configuration */
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67#define CONFIG_SERIAL2 1 /* use SERIAL 2 */
68#define CONFIG_BAUDRATE 115200
69
70/* MMC */
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71#define CONFIG_GENERIC_MMC
72#define CONFIG_MMC
73#define CONFIG_SDHCI
74#define CONFIG_S5P_SDHCI
9e40808c 75
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76/* PWM */
77#define CONFIG_PWM 1
78
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79/* It should define before config_cmd_default.h */
80#define CONFIG_SYS_NO_FLASH 1
81
82/* Command definition */
83#include <config_cmd_default.h>
84
85#undef CONFIG_CMD_FPGA
86#undef CONFIG_CMD_MISC
87#undef CONFIG_CMD_NET
88#undef CONFIG_CMD_NFS
89#undef CONFIG_CMD_XIMG
90#define CONFIG_CMD_CACHE
91#define CONFIG_CMD_ONENAND
92#define CONFIG_CMD_MTDPARTS
93#define CONFIG_CMD_MMC
94#define CONFIG_CMD_FAT
95
96#define CONFIG_BOOTDELAY 1
97#define CONFIG_ZERO_BOOTDELAY_CHECK
98
99#define CONFIG_MTD_DEVICE
100#define CONFIG_MTD_PARTITIONS
101
102/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
103#define MTDIDS_DEFAULT "onenand0=samsung-onenand"
104
105#define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\
106 "128k(s-boot)"\
107 ",896k(bootloader)"\
108 ",256k(params)"\
109 ",2816k(config)"\
110 ",8m(csa)"\
111 ",7m(kernel)"\
112 ",1m(log)"\
113 ",12m(modem)"\
114 ",60m(qboot)"\
115 ",-(UBI)\0"
116
117#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
118
119#define MBRPARTS_DEFAULT "20M(permanent)"\
120 ",20M(boot)"\
121 ",1G(system)"\
122 ",100M(swap)"\
123 ",-(UMS)\0"
124
125#define CONFIG_BOOTARGS "Please use defined boot"
126#define CONFIG_BOOTCOMMAND "run mmcboot"
127#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
128
129#define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
130#define CONFIG_BOOTBLOCK "10"
131#define CONFIG_UBIBLOCK "9"
132
133#define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc "
134#define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
135 "${mtdparts}"
136
137#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
138
139#define CONFIG_ENV_OVERWRITE
140#define CONFIG_SYS_CONSOLE_INFO_QUIET
141#define CONFIG_SYS_CONSOLE_IS_IN_ENV
142
143#define CONFIG_EXTRA_ENV_SETTINGS \
144 "updateb=" \
145 "onenand erase 0x0 0x100000;" \
146 "onenand write 0x42008000 0x0 0x100000\0" \
147 "updatek=" \
148 "onenand erase 0xc00000 0x500000;" \
149 "onenand write 0x41008000 0xc00000 0x500000\0" \
150 "bootk=" \
151 "run loaduimage; bootm 0x40007FC0\0" \
152 "updatemmc=" \
153 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
154 "mmc boot 0 1 1 0\0" \
155 "updatebackup=" \
156 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
157 "mmc boot 0 1 1 0\0" \
158 "updatebootb=" \
159 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
160 "lpj=lpj=3981312\0" \
161 "ubifsboot=" \
162 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \
163 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
164 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \
165 "tftpboot=" \
166 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
167 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
168 CONFIG_ENV_COMMON_BOOT \
169 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \
170 "nfsboot=" \
171 "set bootargs root=/dev/nfs rw " \
172 "nfsroot=${nfsroot},nolock,tcp " \
173 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
174 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
175 "; run bootk\0" \
176 "ramfsboot=" \
177 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
178 "${console} ${meminfo} " \
179 "initrd=0x43000000,8M ramdisk=8192\0" \
180 "mmcboot=" \
181 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
182 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
183 "run loaduimage; bootm 0x40007FC0\0" \
184 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
185 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
186 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
187 "verify=n\0" \
188 "rootfstype=ext4\0" \
189 "console=" CONFIG_DEFAULT_CONSOLE \
190 "mtdparts=" MTDPARTS_DEFAULT \
191 "mbrparts=" MBRPARTS_DEFAULT \
192 "meminfo=crashkernel=32M@0x50000000\0" \
193 "nfsroot=/nfsroot/arm\0" \
194 "bootblock=" CONFIG_BOOTBLOCK "\0" \
195 "ubiblock=" CONFIG_UBIBLOCK" \0" \
196 "ubi=enabled\0" \
197 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
198 "mmcdev=0\0" \
199 "mmcbootpart=2\0" \
200 "mmcrootpart=3\0" \
201 "opts=always_resume=1"
202
203/* Miscellaneous configurable options */
204#define CONFIG_SYS_LONGHELP /* undef to save memory */
205#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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206#define CONFIG_SYS_PROMPT "Universal # "
207#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
208#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
209#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
210/* Boot Argument Buffer Size */
211#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
212/* memtest works on */
213#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
214#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
215#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
216
217#define CONFIG_SYS_HZ 1000
218
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219/* Universal has 2 banks of DRAM */
220#define CONFIG_NR_DRAM_BANKS 2
221#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
222#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
223#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
224#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
225
226#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
227
228#define CONFIG_SYS_MONITOR_BASE 0x00000000
229#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
230
231#define CONFIG_USE_ONENAND_BOARD_INIT
a08a649d 232#define CONFIG_SAMSUNG_ONENAND
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233#define CONFIG_SYS_ONENAND_BASE 0x0C000000
234
235#define CONFIG_ENV_IS_IN_MMC 1
236#define CONFIG_SYS_MMC_ENV_DEV 0
237#define CONFIG_ENV_SIZE 4096
238#define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */
239
240#define CONFIG_DOS_PARTITION 1
241
242#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
243
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244#define CONFIG_SYS_CACHELINE_SIZE 32
245
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246#include <asm/arch/gpio.h>
247/*
248 * I2C Settings
249 */
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250#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
251#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
2427f5d5 252
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253#define CONFIG_SYS_I2C
254#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
255#define CONFIG_SYS_I2C_SOFT_SPEED 50000
256#define CONFIG_SYS_I2C_SOFT_SLAVE 0
2427f5d5 257#define CONFIG_SOFT_I2C_READ_REPEATED_START
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258#define CONFIG_I2C_MULTI_BUS
259#define CONFIG_SYS_MAX_I2C_BUS 7
260
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261#define CONFIG_POWER
262#define CONFIG_POWER_I2C
263#define CONFIG_POWER_MAX8998
2427f5d5 264
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265#define CONFIG_USB_GADGET
266#define CONFIG_USB_GADGET_S3C_UDC_OTG
267#define CONFIG_USB_GADGET_DUALSPEED
268
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269/*
270 * SPI Settings
271 */
272#define CONFIG_SOFT_SPI
273#define CONFIG_SOFT_SPI_MODE SPI_MODE_3
274#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
275#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
276#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
277#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)
278
279#define SPI_DELAY udelay(1)
280#undef SPI_INIT
281#define SPI_SCL(bit) universal_spi_scl(bit)
282#define SPI_SDA(bit) universal_spi_sda(bit)
283#define SPI_READ universal_spi_read()
284#ifndef __ASSEMBLY__
285void universal_spi_scl(int bit);
286void universal_spi_sda(int bit);
287int universal_spi_read(void);
288#endif
289
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290/*
291 * LCD Settings
292 */
293#define CONFIG_EXYNOS_FB
294#define CONFIG_LCD
295#define CONFIG_CMD_BMP
296#define CONFIG_BMP_32BPP
297#define CONFIG_LD9040
298#define CONFIG_EXYNOS_MIPI_DSIM
299#define CONFIG_VIDEO_BMP_GZIP
300#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12))
301
9e40808c 302#endif /* __CONFIG_H */