]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/sunxi-common.h
include/configs: drop default definitions of CONFIG_SYS_MAXARGS
[people/ms/u-boot.git] / include / configs / sunxi-common.h
CommitLineData
cba69eee
IC
1/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
daf6d399 16#include <asm/arch/cpu.h>
e049fe28
HG
17#include <linux/stringify.h>
18
77ef1369
SS
19#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20/*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25# define CONFIG_MACH_TYPE_COMPAT_REV 0
26#else
27/*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32# define CONFIG_MACH_TYPE_COMPAT_REV 1
33#endif
34
d29adf8e
AP
35#ifdef CONFIG_ARM64
36#define CONFIG_BUILD_TARGET "u-boot.itb"
37#endif
38
cba69eee 39/* Serial & console */
cba69eee
IC
40#define CONFIG_SYS_NS16550_SERIAL
41/* ns16550 reg in the low bits of cpu reg */
cba69eee 42#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552 43#ifndef CONFIG_DM_SERIAL
1a81cf83
SG
44# define CONFIG_SYS_NS16550_REG_SIZE -4
45# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
46# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
47# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
48# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
49# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
50#endif
cba69eee 51
8a65f69c 52/* CPU */
e4916e85 53#define COUNTER_FREQUENCY 24000000
8a65f69c 54
e049fe28
HG
55/*
56 * The DRAM Base differs between some models. We cannot use macros for the
57 * CONFIG_FOO defines which contain the DRAM base address since they end
58 * up unexpanded in include/autoconf.mk .
59 *
60 * So we have to have this #ifdef #else #endif block for these.
61 */
62#ifdef CONFIG_MACH_SUN9I
63#define SDRAM_OFFSET(x) 0x2##x
64#define CONFIG_SYS_SDRAM_BASE 0x20000000
65#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
66#define CONFIG_SYS_TEXT_BASE 0x2a000000
ff42d107
HG
67/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
68 * since it needs to fit in with the other values. By also #defining it
69 * we get warnings if the Kconfig value mismatches. */
70#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
e049fe28
HG
71#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
72#else
73#define SDRAM_OFFSET(x) 0x4##x
cba69eee 74#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28 75#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
c199489f
IZ
76/* V3s do not have enough memory to place code at 0x4a000000 */
77#ifndef CONFIG_MACH_SUN8I_V3S
e049fe28 78#define CONFIG_SYS_TEXT_BASE 0x4a000000
c199489f
IZ
79#else
80#define CONFIG_SYS_TEXT_BASE 0x42e00000
81#endif
ff42d107
HG
82/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
83 * since it needs to fit in with the other values. By also #defining it
84 * we get warnings if the Kconfig value mismatches. */
85#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
e049fe28
HG
86#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
87#endif
88
89#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28 90
bc613d85 91#ifdef CONFIG_SUNXI_HIGH_SRAM
77fe9887
HG
92/*
93 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
94 * slightly bigger. Note that it is possible to map the first 32 KiB of the
95 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
96 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
97 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
98 */
99#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
eb504fa1 100#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
77fe9887 101#else
cba69eee
IC
102#define CONFIG_SYS_INIT_RAM_ADDR 0x0
103#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887 104#endif
cba69eee
IC
105
106#define CONFIG_SYS_INIT_SP_OFFSET \
107 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108#define CONFIG_SYS_INIT_SP_ADDR \
109 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110
111#define CONFIG_NR_DRAM_BANKS 1
112#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
113#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
114
a6e50a88
IC
115#ifdef CONFIG_AHCI
116#define CONFIG_LIBATA
117#define CONFIG_SCSI_AHCI
118#define CONFIG_SCSI_AHCI_PLAT
119#define CONFIG_SUNXI_AHCI
0751b138 120#define CONFIG_SYS_64BIT_LBA
a6e50a88
IC
121#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
122#define CONFIG_SYS_SCSI_MAX_LUN 1
123#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
124 CONFIG_SYS_SCSI_MAX_LUN)
a6e50a88
IC
125#endif
126
cba69eee
IC
127#define CONFIG_SETUP_MEMORY_TAGS
128#define CONFIG_CMDLINE_TAG
129#define CONFIG_INITRD_TAG
9f852211 130#define CONFIG_SERIAL_TAG
cba69eee 131
e5268616 132#ifdef CONFIG_NAND_SUNXI
a0dfa88b 133#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
4ccae81c
BB
134#define CONFIG_SYS_NAND_ONFI_DETECTION
135#define CONFIG_SYS_MAX_NAND_DEVICE 8
d482a8df
HG
136
137#define CONFIG_MTD_DEVICE
138#define CONFIG_MTD_PARTITIONS
960caeba
PZ
139#endif
140
19e99fb4 141#ifdef CONFIG_SPL_SPI_SUNXI
19e99fb4
SS
142#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
143#endif
144
e24ea55c 145/* mmc config */
44c79879 146#ifdef CONFIG_MMC
e24ea55c 147#define CONFIG_MMC_SUNXI_SLOT 0
fb1c43cc
MR
148#endif
149
150#if defined(CONFIG_ENV_IS_IN_MMC)
e24ea55c 151#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ae042beb 152#define CONFIG_SYS_MMC_MAX_DEVICE 4
d6a7e0cb
MR
153#elif defined(CONFIG_ENV_IS_NOWHERE)
154#define CONFIG_ENV_SIZE (128 << 10)
ff2b47f6 155#endif
e24ea55c 156
c199489f 157#ifndef CONFIG_MACH_SUN8I_V3S
5c965ed9
HG
158/* 64MB of malloc() pool */
159#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
c199489f
IZ
160#else
161/* 2MB of malloc() pool */
162#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
163#endif
cba69eee
IC
164
165/*
166 * Miscellaneous configurable options
167 */
06beadb0
IC
168#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
169#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee
IC
170
171/* Boot Argument Buffer Size */
172#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
173
cba69eee 174/* standalone support */
e049fe28 175#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee 176
cba69eee
IC
177/* FLASH and environment organization */
178
fa5e1020 179#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee 180
cba69eee 181#define CONFIG_SPL_FRAMEWORK
cba69eee 182
eb77f5c9 183#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
942cb0b6 184#define CONFIG_SPL_BOARD_LOAD_IMAGE
eb77f5c9 185#endif
942cb0b6 186
bc613d85 187#ifdef CONFIG_SUNXI_HIGH_SRAM
7f0ef5a9
SS
188#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */
189#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
54522c92
AP
190#ifdef CONFIG_ARM64
191/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
192#define LOW_LEVEL_SRAM_STACK 0x00054000
193#else
bc613d85 194#define LOW_LEVEL_SRAM_STACK 0x00018000
54522c92 195#endif /* !CONFIG_ARM64 */
d96ebc46 196#else
7f0ef5a9
SS
197#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */
198#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
bc613d85 199#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
d96ebc46 200#endif
50827a59 201
bc613d85
AP
202#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
203
50827a59
IC
204#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
205
cba69eee 206
6620377e 207/* I2C */
0d8382ae
JW
208#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
209 defined CONFIG_SY8106A_POWER
ad40610b
HG
210#endif
211
6c739c5d
PK
212#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
213 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
9d082687 214 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
6620377e 215#define CONFIG_SYS_I2C_MVTWSI
a8f01ccf
JS
216#ifndef CONFIG_DM_I2C
217#define CONFIG_SYS_I2C
6620377e
HG
218#define CONFIG_SYS_I2C_SPEED 400000
219#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a 220#endif
a8f01ccf 221#endif
55410089
HG
222
223#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
224#define CONFIG_SYS_I2C_SOFT
225#define CONFIG_SYS_I2C_SOFT_SPEED 50000
226#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089
HG
227/* We use pin names in Kconfig and sunxi_name_to_gpio() */
228#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
229#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
230#ifndef __ASSEMBLY__
231extern int soft_i2c_gpio_sda;
232extern int soft_i2c_gpio_scl;
233#endif
1fc42018
HG
234#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
235#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
236#else
237#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
238#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089
HG
239#endif
240
14bc66bd 241/* PMU */
95ab8fee 242#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
0d8382ae
JW
243 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
244 defined CONFIG_SY8106A_POWER
14bc66bd
HN
245#endif
246
a5da3c83 247#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962
HG
248#if CONFIG_CONS_INDEX == 1
249#ifdef CONFIG_MACH_SUN9I
250#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
251#else
252#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
253#endif
254#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
255#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11
LI
256#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
257#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962
HG
258#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
259#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
260#else
261#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
262#endif
a5da3c83 263#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962 264
abce2c62
IC
265/* GPIO */
266#define CONFIG_SUNXI_GPIO
abce2c62 267
7f2c521f
LV
268#ifdef CONFIG_VIDEO
269/*
5633a296
HG
270 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
271 * to use as framebuffer. This must be a multiple of 4096.
7f2c521f 272 */
5c965ed9 273#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f 274
2d7a084b
LV
275/* Do we want to initialize a simple FB? */
276#define CONFIG_VIDEO_DT_SIMPLEFB
277
7f2c521f
LV
278#define CONFIG_VIDEO_SUNXI
279
7f2c521f 280#define CONFIG_VIDEO_LOGO
be8ec633 281#define CONFIG_VIDEO_STD_TIMINGS
75481607 282#define CONFIG_I2C_EDID
58332f89 283#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f
LV
284
285/* allow both serial and cfb console. */
7f2c521f 286/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
7f2c521f 287
7f2c521f
LV
288#endif /* CONFIG_VIDEO */
289
c26fb9db
HG
290/* Ethernet support */
291#ifdef CONFIG_SUNXI_EMAC
8145dea4 292#define CONFIG_PHY_ADDR 1
c26fb9db
HG
293#define CONFIG_MII /* MII PHY management */
294#endif
295
6ff005cf 296#ifdef CONFIG_SUN7I_GMAC
5835823d
IC
297#define CONFIG_PHY_ADDR 1
298#define CONFIG_MII /* MII PHY management */
1eae8f66 299#define CONFIG_PHY_REALTEK
5835823d
IC
300#endif
301
2582ca0d 302#ifdef CONFIG_USB_EHCI_HCD
6a72e804
HG
303#define CONFIG_USB_OHCI_NEW
304#define CONFIG_USB_OHCI_SUNXI
305#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
1a800f7a
HG
306#endif
307
308#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f 309#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a
HG
310#endif
311
b21144eb 312#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3 313#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
PK
314#endif
315
b21144eb 316#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb
PK
317#endif
318
86b49093 319#ifdef CONFIG_USB_KEYBOARD
86b49093 320#define CONFIG_PREBOOT
86b49093
HG
321#endif
322
b41d7d05
JL
323#define CONFIG_MISC_INIT_R
324
cba69eee
IC
325#ifndef CONFIG_SPL_BUILD
326#include <config_distro_defaults.h>
2ec3a612 327
671f9ad8
AP
328#ifdef CONFIG_ARM64
329/*
330 * Boards seem to come with at least 512MB of DRAM.
331 * The kernel should go at 512K, which is the default text offset (that will
332 * be adjusted at runtime if needed).
333 * There is no compression for arm64 kernels (yet), so leave some space
334 * for really big kernels, say 256MB for now.
335 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
336 * Align the initrd to a 2MB page.
337 */
c199489f 338#define BOOTM_SIZE __stringify(0xa000000)
671f9ad8
AP
339#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
340#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
341#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
342#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
343#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
344
345#else
8c95c556 346/*
5c965ed9 347 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556
HG
348 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
349 * 1M script, 1M pxe and the ramdisk at the end.
350 */
c199489f
IZ
351#ifndef CONFIG_MACH_SUN8I_V3S
352#define BOOTM_SIZE __stringify(0xa000000)
2a909c5f
SS
353#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
354#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
355#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
356#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
357#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
c199489f
IZ
358#else
359/*
360 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
361 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
362 * 1M script, 1M pxe and the ramdisk at the end.
363 */
364#define BOOTM_SIZE __stringify(0x2e00000)
365#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
366#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
367#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
368#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
369#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
370#endif
671f9ad8 371#endif
2a909c5f 372
846e3254 373#define MEM_LAYOUT_ENV_SETTINGS \
c199489f 374 "bootm_size=" BOOTM_SIZE "\0" \
2a909c5f
SS
375 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
376 "fdt_addr_r=" FDT_ADDR_R "\0" \
377 "scriptaddr=" SCRIPT_ADDR_R "\0" \
378 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
379 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
380
381#define DFU_ALT_INFO_RAM \
382 "dfu_alt_info_ram=" \
383 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
384 "fdt ram " FDT_ADDR_R " 0x100000;" \
385 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254 386
41f8e9f5
CYT
387#ifdef CONFIG_MMC
388#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400
KM
389#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
390#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
391#else
392#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
393#endif
41f8e9f5
CYT
394#else
395#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400 396#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5
CYT
397#endif
398
2ec3a612
HG
399#ifdef CONFIG_AHCI
400#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
401#else
402#define BOOT_TARGET_DEVICES_SCSI(func)
403#endif
404
2582ca0d 405#ifdef CONFIG_USB_STORAGE
859b3f14
CYT
406#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
407#else
408#define BOOT_TARGET_DEVICES_USB(func)
409#endif
410
f3b589c0
BN
411/* FEL boot support, auto-execute boot.scr if a script address was provided */
412#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
413 "bootcmd_fel=" \
414 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
415 "echo '(FEL boot)'; " \
416 "source ${fel_scriptaddr}; " \
417 "fi\0"
418#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
419 "fel "
420
2ec3a612 421#define BOOT_TARGET_DEVICES(func) \
f3b589c0 422 func(FEL, fel, na) \
41f8e9f5 423 BOOT_TARGET_DEVICES_MMC(func) \
5a37a400 424 BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612 425 BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14 426 BOOT_TARGET_DEVICES_USB(func) \
2ec3a612
HG
427 func(PXE, pxe, na) \
428 func(DHCP, dhcp, na)
429
3b824025
HG
430#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
431#define BOOTCMD_SUNXI_COMPAT \
432 "bootcmd_sunxi_compat=" \
433 "setenv root /dev/mmcblk0p3 rootwait; " \
434 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
435 "echo Loaded environment from uEnv.txt; " \
436 "env import -t 0x44000000 ${filesize}; " \
437 "fi; " \
438 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
439 "ext2load mmc 0 0x43000000 script.bin && " \
440 "ext2load mmc 0 0x48000000 uImage && " \
441 "bootm 0x48000000\0"
442#else
443#define BOOTCMD_SUNXI_COMPAT
444#endif
445
2ec3a612
HG
446#include <config_distro_bootcmd.h>
447
86b49093
HG
448#ifdef CONFIG_USB_KEYBOARD
449#define CONSOLE_STDIN_SETTINGS \
450 "preboot=usb start\0" \
451 "stdin=serial,usbkbd\0"
452#else
7f2c521f
LV
453#define CONSOLE_STDIN_SETTINGS \
454 "stdin=serial\0"
86b49093 455#endif
7f2c521f
LV
456
457#ifdef CONFIG_VIDEO
458#define CONSOLE_STDOUT_SETTINGS \
459 "stdout=serial,vga\0" \
460 "stderr=serial,vga\0"
56009451
JS
461#elif CONFIG_DM_VIDEO
462#define CONFIG_SYS_WHITE_ON_BLACK
463#define CONSOLE_STDOUT_SETTINGS \
464 "stdout=serial,vidconsole\0" \
465 "stderr=serial,vidconsole\0"
7f2c521f
LV
466#else
467#define CONSOLE_STDOUT_SETTINGS \
468 "stdout=serial\0" \
469 "stderr=serial\0"
470#endif
471
c8564b24
MR
472#ifdef CONFIG_MTDIDS_DEFAULT
473#define SUNXI_MTDIDS_DEFAULT \
474 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
475#else
476#define SUNXI_MTDIDS_DEFAULT
477#endif
478
479#ifdef CONFIG_MTDPARTS_DEFAULT
480#define SUNXI_MTDPARTS_DEFAULT \
481 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
482#else
483#define SUNXI_MTDPARTS_DEFAULT
484#endif
485
7f2c521f
LV
486#define CONSOLE_ENV_SETTINGS \
487 CONSOLE_STDIN_SETTINGS \
488 CONSOLE_STDOUT_SETTINGS
489
2eff3b71
AF
490#ifdef CONFIG_ARM64
491#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
492#else
493#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
494#endif
495
2ec3a612 496#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f 497 CONSOLE_ENV_SETTINGS \
846e3254 498 MEM_LAYOUT_ENV_SETTINGS \
2a909c5f 499 DFU_ALT_INFO_RAM \
2eff3b71 500 "fdtfile=" FDTFILE "\0" \
846e3254 501 "console=ttyS0,115200\0" \
c8564b24
MR
502 SUNXI_MTDIDS_DEFAULT \
503 SUNXI_MTDPARTS_DEFAULT \
3b824025 504 BOOTCMD_SUNXI_COMPAT \
2ec3a612
HG
505 BOOTENV
506
507#else /* ifndef CONFIG_SPL_BUILD */
508#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee
IC
509#endif
510
511#endif /* _SUNXI_COMMON_CONFIG_H */