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1#
2# (C) Copyright 2007
3# Stefan Roese, DENX Software Engineering, sr@denx.de.
4#
1a459660 5# SPDX-License-Identifier: GPL-2.0+
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6#
7#
8# AMCC 405EZ Reference Platform (Acadia) board
9#
10
11#
14d0a02a 12# CONFIG_SYS_TEXT_BASE for SPL:
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13#
14# On 4xx platforms the SPL is located at 0xfffff000...0xffffffff,
15# in the last 4kBytes of memory space in cache.
16# We will copy this SPL into internal SRAM in start.S. So we set
14d0a02a 17# CONFIG_SYS_TEXT_BASE to starting address in internal SRAM here.
c440bfe6 18#
14d0a02a 19CONFIG_SYS_TEXT_BASE = 0xf8004000
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20
21# PAD_TO used to generate a 16kByte binary needed for the combined image
14d0a02a 22# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 0x4000
df8a24cd 23PAD_TO = 0xf8008000
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24
25ifeq ($(debug),1)
26PLATFORM_CPPFLAGS += -DDEBUG
27endif
28
29ifeq ($(dbcr),1)
6d0f6bcf 30PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
c440bfe6 31endif