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Commit | Line | Data |
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3f7f6b85 RZ |
1 | # |
2 | # Copyright 2010-2011 Freescale Semiconductor, Inc. | |
3 | # | |
1a459660 | 4 | # SPDX-License-Identifier: GPL-2.0+ |
3f7f6b85 | 5 | # |
3f7f6b85 | 6 | |
a0b14c3f | 7 | PAD_TO := 0xfff01000 |
3f7f6b85 RZ |
8 | |
9 | nandobj := $(OBJTREE)/nand_spl/ | |
10 | ||
11 | LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds | |
12 | LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ | |
13 | $(LDFLAGS) $(LDFLAGS_FINAL) | |
14 | AFLAGS += -DCONFIG_NAND_SPL | |
15 | CFLAGS += -DCONFIG_NAND_SPL | |
16 | ||
17 | SOBJS = start.o resetvec.o | |
b9735cba | 18 | COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ |
59629c28 | 19 | nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o |
3f7f6b85 RZ |
20 | |
21 | SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) | |
22 | OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) | |
23 | __OBJS := $(SOBJS) $(COBJS) | |
24 | LNDIR := $(nandobj)board/$(BOARDDIR) | |
25 | ||
5310b8b2 | 26 | all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin |
3f7f6b85 RZ |
27 | |
28 | $(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl | |
29 | $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ | |
30 | ||
31 | $(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl | |
32 | $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ | |
33 | ||
34 | $(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds | |
35 | cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ | |
5310b8b2 | 36 | -Map $(nandobj)u-boot-spl.map -o $@ |
3f7f6b85 | 37 | |
ef123c52 | 38 | $(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) |
a6d0f62a SW |
39 | $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ |
40 | -ansi -D__ASSEMBLY__ -P - <$< >$@ | |
3f7f6b85 RZ |
41 | |
42 | # create symbolic links for common files | |
43 | ||
44 | $(obj)cache.c: | |
5310b8b2 MY |
45 | @rm -f $@ |
46 | ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $@ | |
3f7f6b85 RZ |
47 | |
48 | $(obj)cpu_init_early.c: | |
5310b8b2 MY |
49 | @rm -f $@ |
50 | ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $@ | |
3f7f6b85 | 51 | |
b9735cba | 52 | $(obj)spl_minimal.c: |
5310b8b2 MY |
53 | @rm -f $@ |
54 | ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $@ | |
3f7f6b85 RZ |
55 | |
56 | $(obj)fsl_law.c: | |
5310b8b2 MY |
57 | @rm -f $@ |
58 | ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc8xxx/law.c $@ | |
3f7f6b85 RZ |
59 | |
60 | $(obj)law.c: | |
5310b8b2 MY |
61 | @rm -f $@ |
62 | ln -sf $(SRCTREE)/board/$(BOARDDIR)/law.c $@ | |
3f7f6b85 RZ |
63 | |
64 | $(obj)nand_boot_fsl_elbc.c: | |
5310b8b2 MY |
65 | @rm -f $@ |
66 | ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c $@ | |
3f7f6b85 RZ |
67 | |
68 | $(obj)ns16550.c: | |
5310b8b2 MY |
69 | @rm -f $@ |
70 | ln -sf $(SRCTREE)/drivers/serial/ns16550.c $@ | |
3f7f6b85 RZ |
71 | |
72 | $(obj)resetvec.S: | |
5310b8b2 MY |
73 | @rm -f $@ |
74 | ln -s $(SRCTREE)/$(CPUDIR)/resetvec.S $@ | |
3f7f6b85 RZ |
75 | |
76 | $(obj)fixed_ivor.S: | |
5310b8b2 MY |
77 | @rm -f $@ |
78 | ln -sf $(SRCTREE)/$(CPUDIR)/fixed_ivor.S $@ | |
3f7f6b85 RZ |
79 | |
80 | $(obj)start.S: $(obj)fixed_ivor.S | |
5310b8b2 MY |
81 | @rm -f $@ |
82 | ln -sf $(SRCTREE)/$(CPUDIR)/start.S $@ | |
3f7f6b85 RZ |
83 | |
84 | $(obj)tlb.c: | |
5310b8b2 MY |
85 | @rm -f $@ |
86 | ln -sf $(SRCTREE)/$(CPUDIR)/tlb.c $@ | |
3f7f6b85 RZ |
87 | |
88 | $(obj)tlb_table.c: | |
5310b8b2 MY |
89 | @rm -f $@ |
90 | ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $@ | |
3f7f6b85 RZ |
91 | |
92 | ifneq ($(OBJTREE), $(SRCTREE)) | |
93 | $(obj)nand_boot.c: | |
5310b8b2 MY |
94 | @rm -f $@ |
95 | ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_boot.c $@ | |
3f7f6b85 RZ |
96 | endif |
97 | ||
98 | ######################################################################### | |
99 | ||
100 | $(obj)%.o: $(obj)%.S | |
101 | $(CC) $(AFLAGS) -c -o $@ $< | |
102 | ||
103 | $(obj)%.o: $(obj)%.c | |
104 | $(CC) $(CFLAGS) -c -o $@ $< |