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8f15d4ad YT |
1 | /* |
2 | * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com | |
3 | * | |
4 | * Developed for DENX Software Engineering GmbH | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
8f15d4ad YT |
7 | */ |
8 | ||
9 | #include <common.h> | |
10 | ||
65b20dce | 11 | /* This test verifies if the reason of last reset was an abnormal voltage |
8f15d4ad YT |
12 | * condition, than it performs watchdog test, measuing time required to |
13 | * trigger watchdog reset. | |
14 | */ | |
15 | ||
8f15d4ad YT |
16 | #include <post.h> |
17 | ||
6d0f6bcf | 18 | #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG |
8f15d4ad YT |
19 | |
20 | #include <watchdog.h> | |
09887762 | 21 | #include <asm/ppc4xx-gpio.h> |
8f15d4ad YT |
22 | #include <asm/io.h> |
23 | ||
24 | static uint watchdog_magic_read(void) | |
25 | { | |
6d0f6bcf JCPV |
26 | return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) & |
27 | CONFIG_SYS_WATCHDOG_MAGIC_MASK; | |
8f15d4ad YT |
28 | } |
29 | ||
30 | static void watchdog_magic_write(uint value) | |
31 | { | |
6d0f6bcf JCPV |
32 | out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value | |
33 | (in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) & | |
34 | ~CONFIG_SYS_WATCHDOG_MAGIC_MASK)); | |
8f15d4ad YT |
35 | } |
36 | ||
37 | int sysmon1_post_test(int flags) | |
38 | { | |
6d0f6bcf | 39 | if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) { |
3e4615ab SL |
40 | /* |
41 | * 3.1. GPIO62 is low | |
8f15d4ad YT |
42 | * Assuming system voltage failure. |
43 | */ | |
f14ae418 SL |
44 | post_log("sysmon1 Abnormal voltage detected (GPIO62)\n"); |
45 | post_log("POST sysmon1 FAILED\n"); | |
8f15d4ad | 46 | return 1; |
f14ae418 SL |
47 | } else { |
48 | post_log("sysmon1 PASSED\n"); | |
8f15d4ad YT |
49 | } |
50 | ||
51 | return 0; | |
52 | } | |
53 | ||
54 | int lwmon5_watchdog_post_test(int flags) | |
55 | { | |
56 | /* On each reset scratch register 1 should be tested, | |
57 | * but first test GPIO62: | |
58 | */ | |
59 | if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) { | |
65b20dce | 60 | /* 3.1. GPIO62 is low |
8f15d4ad YT |
61 | * Assuming system voltage failure. |
62 | */ | |
63 | /* 3.1.1. Set scratch register 1 to 0x0000xxxx */ | |
64 | watchdog_magic_write(0); | |
65 | /* 3.1.2. Mark test as failed due to voltage?! */ | |
66 | return 1; | |
67 | } | |
68 | ||
6d0f6bcf | 69 | if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) { |
65b20dce | 70 | /* 3.2. Scratch register 1 differs from magic value 0x1248xxxx |
8f15d4ad YT |
71 | * Assuming PowerOn |
72 | */ | |
73 | int ints; | |
74 | ulong base; | |
65b20dce | 75 | ulong time; |
8f15d4ad YT |
76 | |
77 | /* 3.2.1. Set magic value to scratch register */ | |
6d0f6bcf | 78 | watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC); |
8f15d4ad YT |
79 | |
80 | ints = disable_interrupts (); | |
81 | /* 3.2.2. strobe watchdog once */ | |
82 | WATCHDOG_RESET(); | |
6d0f6bcf | 83 | out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0); |
8f15d4ad YT |
84 | /* 3.2.3. save time of strobe in scratch register 2 */ |
85 | base = post_time_ms (0); | |
86 | ||
87 | /* 3.2.4. Wait for 150 ms (enough for reset to happen) */ | |
88 | while ((time = post_time_ms (base)) < 150) | |
6d0f6bcf | 89 | out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time); |
8f15d4ad YT |
90 | if (ints) |
91 | enable_interrupts (); | |
92 | ||
65b20dce | 93 | /* 3.2.5. Reset didn't happen. - Set 0x0000xxxx |
8f15d4ad YT |
94 | * into scratch register 1 |
95 | */ | |
96 | watchdog_magic_write(0); | |
97 | /* 3.2.6. Mark test as failed. */ | |
98 | post_log("hw watchdog time : %u ms, failed ", time); | |
99 | return 2; | |
65b20dce YT |
100 | } else { |
101 | /* 3.3. Scratch register matches magic value 0x1248xxxx | |
102 | * Assume this is watchdog-initiated reset | |
103 | */ | |
104 | ulong time; | |
105 | /* 3.3.1. So, the test succeed, save measured time to syslog. */ | |
6d0f6bcf | 106 | time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR); |
f14ae418 SL |
107 | if (time > 90 ) { /* ms*/ |
108 | post_log("hw watchdog time : %u ms, passed ", time); | |
109 | /* 3.3.2. Set scratch register 1 to 0x0000xxxx */ | |
110 | watchdog_magic_write(0); | |
111 | return 0; | |
112 | } else { | |
113 | /*test minimum watchdogtime */ | |
114 | post_log("hw watchdog time : %u ms, failed ", time); | |
115 | return 2; | |
116 | } | |
8f15d4ad | 117 | } |
65b20dce | 118 | return -1; |
81a0ac62 | 119 | } |
8f15d4ad | 120 | |
6d0f6bcf | 121 | #endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */ |