Add GPL-2.0+ SPDX-License-Identifier to source files

[people/ms/u-boot.git] / board / dbau1x00 / dbau1x00.c

diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
index df1c15c292d2b9549e30ad1a38b66a126a51758c..bd20f6e4b0d691d2eea06e18cef44008c6639807 100644 (file)
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -2,54 +2,41 @@
  * (C) Copyright 2003
  * Thomas.Lange@corelatus.se
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <command.h>
 #include <asm/au1x00.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
        /* Sdram is setup by assembler code */
        /* If memory could be changed, we should return the true value here */
-       return 64*1024*1024;
+       return MEM_SIZE*1024*1024;
 }
 
 #define BCSR_PCMCIA_PC0DRVEN           0x0010
 #define BCSR_PCMCIA_PC0RST             0x0080
 
-/* In cpu/mips/cpu.c */
+/* In arch/mips/cpu/cpu.c */
 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
 
 int checkboard (void)
 {
+#ifdef CONFIG_IDE_PCMCIA
        u16 status;
-       volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10);
-       volatile u32 *phy = (u32*)(DB1000_BCSR_ADDR+0xC);
+       volatile u32 *pcmcia_bcsr = (u32*)(DB1XX0_BCSR_ADDR+0x10);
+#endif /* CONFIG_IDE_PCMCIA */
+       volatile u32 *phy = (u32*)(DB1XX0_BCSR_ADDR+0xC);
        volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
        u32 proc_id;
 
        *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
 
-       proc_id = read_32bit_cp0_register(CP0_PRID);
+       proc_id = read_c0_prid();
 
        switch (proc_id >> 24) {
        case 0:
@@ -67,9 +54,17 @@ int checkboard (void)
                printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
                break;
+       case 3:
+               puts ("Board: DbAu1550\n");
+               printf ("CPU: Au1550, id: 0x%02x, rev: 0x%02x\n",
+                       (proc_id >> 8) & 0xFF, proc_id & 0xFF);
+               break;
        default:
                printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
        }
+
+       set_io_port_base(0);
+
 #ifdef CONFIG_IDE_PCMCIA
        /* Enable 3.3 V on slot 0 ( VCC )
           No 5V */
@@ -95,19 +90,19 @@ int checkboard (void)
        /* We dont need theese unless we run whole pcmcia package */
        write_one_tlb(20,                 /* index */
                      0x01ffe000,         /* Pagemask, 16 MB pages */
-                     CFG_PCMCIA_IO_BASE, /* Hi */
+                     CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
                      0x3C000017,         /* Lo0 */
                      0x3C200017);        /* Lo1 */
 
        write_one_tlb(21,                   /* index */
                      0x01ffe000,           /* Pagemask, 16 MB pages */
-                     CFG_PCMCIA_ATTR_BASE, /* Hi */
+                     CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
                      0x3D000017,           /* Lo0 */
                      0x3D200017);          /* Lo1 */
 #endif /* 0 */
        write_one_tlb(22,                   /* index */
                      0x01ffe000,           /* Pagemask, 16 MB pages */
-                     CFG_PCMCIA_MEM_ADDR,  /* Hi */
+                     CONFIG_SYS_PCMCIA_MEM_ADDR,  /* Hi */
                      0x3E000017,           /* Lo0 */
                      0x3E200017);          /* Lo1 */
 #endif /* CONFIG_IDE_PCMCIA */