icorem6: Use drive strength macros

[people/ms/u-boot.git] / board / engicam / icorem6 / icorem6.c

diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index 8aaac40cc2748da95e698706b666bc67ffec0027..c04dbe7c80be3f55852e35a09d4d90e62584b702 100644 (file)
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -369,80 +369,80 @@ int board_fit_config_name_match(const char *name)
 
 /* configure MX6Q/DUAL mmdc DDR io registers */
 static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {
-       .dram_sdqs0 = 0x30,
-       .dram_sdqs1 = 0x30,
-       .dram_sdqs2 = 0x30,
-       .dram_sdqs3 = 0x30,
-       .dram_sdqs4 = 0x30,
-       .dram_sdqs5 = 0x30,
-       .dram_sdqs6 = 0x30,
-       .dram_sdqs7 = 0x30,
-       .dram_dqm0 = 0x30,
-       .dram_dqm1 = 0x30,
-       .dram_dqm2 = 0x30,
-       .dram_dqm3 = 0x30,
-       .dram_dqm4 = 0x30,
-       .dram_dqm5 = 0x30,
-       .dram_dqm6 = 0x30,
-       .dram_dqm7 = 0x30,
-       .dram_cas = 0x30,
-       .dram_ras = 0x30,
-       .dram_sdclk_0 = 0x30,
-       .dram_sdclk_1 = 0x30,
-       .dram_reset = 0x30,
-       .dram_sdcke0 = 0x30,
-       .dram_sdcke1 = 0x30,
+       .dram_sdqs0 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs1 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs2 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs3 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs4 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs5 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs6 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdqs7 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm0 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm1 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm2 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm3 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm4 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm5 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm6 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_dqm7 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_cas = IMX6DQ_DRIVE_STRENGTH,
+       .dram_ras = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdclk_0 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdclk_1 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_reset = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdcke0 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdcke1 = IMX6DQ_DRIVE_STRENGTH,
        .dram_sdba2 = 0x00000000,
-       .dram_sdodt0 = 0x30,
-       .dram_sdodt1 = 0x30,
+       .dram_sdodt0 = IMX6DQ_DRIVE_STRENGTH,
+       .dram_sdodt1 = IMX6DQ_DRIVE_STRENGTH,
 };
 
 /* configure MX6Q/DUAL mmdc GRP io registers */
 static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {
-       .grp_b0ds = 0x30,
-       .grp_b1ds = 0x30,
-       .grp_b2ds = 0x30,
-       .grp_b3ds = 0x30,
-       .grp_b4ds = 0x30,
-       .grp_b5ds = 0x30,
-       .grp_b6ds = 0x30,
-       .grp_b7ds = 0x30,
-       .grp_addds = 0x30,
+       .grp_b0ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b1ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b2ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b3ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b4ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b5ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b6ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_b7ds = IMX6DQ_DRIVE_STRENGTH,
+       .grp_addds = IMX6DQ_DRIVE_STRENGTH,
        .grp_ddrmode_ctl = 0x00020000,
        .grp_ddrpke = 0x00000000,
        .grp_ddrmode = 0x00020000,
-       .grp_ctlds = 0x30,
+       .grp_ctlds = IMX6DQ_DRIVE_STRENGTH,
        .grp_ddr_type = 0x000c0000,
 };
 
 /* configure MX6SOLO/DUALLITE mmdc DDR io registers */
 struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {
-       .dram_sdclk_0 = 0x28,
-       .dram_sdclk_1 = 0x28,
-       .dram_cas = 0x28,
-       .dram_ras = 0x28,
-       .dram_reset = 0x28,
-       .dram_sdcke0 = 0x28,
-       .dram_sdcke1 = 0x28,
+       .dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_cas = IMX6SDL_DRIVE_STRENGTH,
+       .dram_ras = IMX6SDL_DRIVE_STRENGTH,
+       .dram_reset = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH,
        .dram_sdba2 = 0x00000000,
-       .dram_sdodt0 = 0x28,
-       .dram_sdodt1 = 0x28,
-       .dram_sdqs0 = 0x28,
-       .dram_sdqs1 = 0x28,
-       .dram_sdqs2 = 0x28,
-       .dram_sdqs3 = 0x28,
-       .dram_sdqs4 = 0x28,
-       .dram_sdqs5 = 0x28,
-       .dram_sdqs6 = 0x28,
-       .dram_sdqs7 = 0x28,
-       .dram_dqm0 = 0x28,
-       .dram_dqm1 = 0x28,
-       .dram_dqm2 = 0x28,
-       .dram_dqm3 = 0x28,
-       .dram_dqm4 = 0x28,
-       .dram_dqm5 = 0x28,
-       .dram_dqm6 = 0x28,
-       .dram_dqm7 = 0x28,
+       .dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm0 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm1 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm2 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm3 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm4 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm5 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm6 = IMX6SDL_DRIVE_STRENGTH,
+       .dram_dqm7 = IMX6SDL_DRIVE_STRENGTH,
 };
 
 /* configure MX6SOLO/DUALLITE mmdc GRP io registers */
@@ -450,17 +450,17 @@ struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {
        .grp_ddr_type = 0x000c0000,
        .grp_ddrmode_ctl = 0x00020000,
        .grp_ddrpke = 0x00000000,
-       .grp_addds = 0x28,
-       .grp_ctlds = 0x28,
+       .grp_addds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_ctlds = IMX6SDL_DRIVE_STRENGTH,
        .grp_ddrmode = 0x00020000,
-       .grp_b0ds = 0x28,
-       .grp_b1ds = 0x28,
-       .grp_b2ds = 0x28,
-       .grp_b3ds = 0x28,
-       .grp_b4ds = 0x28,
-       .grp_b5ds = 0x28,
-       .grp_b6ds = 0x28,
-       .grp_b7ds = 0x28,
+       .grp_b0ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b1ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b2ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b3ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b4ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b5ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b6ds = IMX6SDL_DRIVE_STRENGTH,
+       .grp_b7ds = IMX6SDL_DRIVE_STRENGTH,
 };
 
 /* mt41j256 */