]> git.ipfire.org Git - people/pmueller/ipfire-2.x.git/blobdiff - src/patches/linux/linux-5-15-arm64-dpaa2-add-support-for-10g-modes.patch
kernel: add patches for SFP support on NXP Layerscape/DPAA2 (arm64)
[people/pmueller/ipfire-2.x.git] / src / patches / linux / linux-5-15-arm64-dpaa2-add-support-for-10g-modes.patch
diff --git a/src/patches/linux/linux-5-15-arm64-dpaa2-add-support-for-10g-modes.patch b/src/patches/linux/linux-5-15-arm64-dpaa2-add-support-for-10g-modes.patch
new file mode 100644 (file)
index 0000000..ef8d459
--- /dev/null
@@ -0,0 +1,39 @@
+From c314138bd045e050432158ab021160de3ba51c5e Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Thu, 30 Jan 2020 22:42:38 +0000
+Subject: [PATCH 2/4] net: dpaa2-mac: add support for more 10G modes
+
+Phylink documentation says:
+ * Note that the PHY may be able to transform from one connection
+ * technology to another, so, eg, don't clear 1000BaseX just
+ * because the MAC is unable to BaseX mode. This is more about
+ * clearing unsupported speeds and duplex settings. The port modes
+ * should not be cleared; phylink_set_port_modes() will help with this.
+
+So add the missing 10G modes.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+index 8fe32ed4f6dc..3be849cee47b 100644
+--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
++++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+@@ -140,6 +140,12 @@ static void dpaa2_mac_validate(struct phylink_config *config,
+       case PHY_INTERFACE_MODE_10GBASER:
+       case PHY_INTERFACE_MODE_USXGMII:
+               phylink_set(mask, 10000baseT_Full);
++              phylink_set(mask, 10000baseKR_Full);
++              phylink_set(mask, 10000baseCR_Full);
++              phylink_set(mask, 10000baseSR_Full);
++              phylink_set(mask, 10000baseLR_Full);
++              phylink_set(mask, 10000baseLRM_Full);
++              phylink_set(mask, 10000baseER_Full);
+               if (state->interface == PHY_INTERFACE_MODE_10GBASER)
+                       break;
+               phylink_set(mask, 5000baseT_Full);
+-- 
+2.30.1
+