+++ /dev/null
-From: Michael Neuling <mikey@neuling.org>
-Subject: change giveup_fpu/altivec to disable VSX for current
-Patch-mainline: 2.6.30
-References: bnc#492324
-
-[PATCH] powerpc: change giveup_fpu/altivec to disable VSX for current
-
-When we call giveup_fpu, we need to need to turn off VSX in current.
-If we don't, on return to current it may execute a VSX instruction
-(before the next FP), and not have it's register state refreshed
-correctly from the thread_struct. Ditto for altivec.
-
-This caused a bug where an unaligned lfs or stfs (which calls
-giveup_fpu so it can use the FPRs) to return to userspace with FP off
-but VSX on. Then if a VSX instruction is executed, before another FP
-instruction, it will proceed without another exception and hence have
-the incorrect register state for VSX registers 0-31.
-
- lfs unaligned <- alignment exception turns FP off but leaves VSX on
-
- VSX instruction <- no exception since VSX on, hence we get the
- wrong VSX register values for VSX registers 0-31
- (overlapping the FPRs)
-
-Signed-off-by: Michael Neuling <mikey@neuling.org>
-Acked-by: duwe@suse.de
-
----
- arch/powerpc/kernel/fpu.S | 5 +++++
- arch/powerpc/kernel/misc_64.S | 8 ++++++++
- 2 files changed, 13 insertions(+)
-
-Index: clone3/arch/powerpc/kernel/fpu.S
-===================================================================
---- clone3.orig/arch/powerpc/kernel/fpu.S
-+++ clone3/arch/powerpc/kernel/fpu.S
-@@ -145,6 +145,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
- beq 1f
- PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- li r3,MSR_FP|MSR_FE0|MSR_FE1
-+#ifdef CONFIG_VSX
-+BEGIN_FTR_SECTION
-+ oris r3,r3,MSR_VSX@h
-+END_FTR_SECTION_IFSET(CPU_FTR_VSX)
-+#endif
- andc r4,r4,r3 /* disable FP for previous task */
- PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- 1:
-Index: clone3/arch/powerpc/kernel/misc_64.S
-===================================================================
---- clone3.orig/arch/powerpc/kernel/misc_64.S
-+++ clone3/arch/powerpc/kernel/misc_64.S
-@@ -493,7 +493,15 @@ _GLOBAL(giveup_altivec)
- stvx vr0,r4,r3
- beq 1f
- ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-+#ifdef CONFIG_VSX
-+BEGIN_FTR_SECTION
-+ lis r3,(MSR_VEC|MSR_VSX)@h
-+FTR_SECTION_ELSE
-+ lis r3,MSR_VEC@h
-+ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX)
-+#else
- lis r3,MSR_VEC@h
-+#endif
- andc r4,r4,r3 /* disable FP for previous task */
- std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- 1: