Move xen patchset to new version's subdir.

[people/pmueller/ipfire-2.x.git] / src / patches / suse-2.6.27.31 / patches.arch / x2APIC_PATCH_07_of_41_cf1337f0447e5be8e66daa944f0ea3bcac2b6179

diff --git a/src/patches/suse-2.6.27.31/patches.arch/x2APIC_PATCH_07_of_41_cf1337f0447e5be8e66daa944f0ea3bcac2b6179 b/src/patches/suse-2.6.27.31/patches.arch/x2APIC_PATCH_07_of_41_cf1337f0447e5be8e66daa944f0ea3bcac2b6179
new file mode 100644 (file)
index 0000000..5b57341
--- /dev/null
+++ b/src/patches/suse-2.6.27.31/patches.arch/x2APIC_PATCH_07_of_41_cf1337f0447e5be8e66daa944f0ea3bcac2b6179
@@ -0,0 +1,81 @@
+From: Suresh Siddha <suresh.b.siddha@intel.com>
+Subject: x64, x2apic/intr-remap: move IOMMU_WAIT_OP() macro to intel-iommu.h
+References: fate #303948 and fate #303984
+Patch-Mainline: queued for .28
+Commit-ID: cf1337f0447e5be8e66daa944f0ea3bcac2b6179
+
+Signed-off-by: Thomas Renninger <trenn@suse.de>
+
+move IOMMU_WAIT_OP() macro to header file.
+
+This will be used by both DMA-remapping and Intr-remapping.
+
+Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
+Cc: akpm@linux-foundation.org
+Cc: arjan@linux.intel.com
+Cc: andi@firstfloor.org
+Cc: ebiederm@xmission.com
+Cc: jbarnes@virtuousgeek.org
+Cc: steiner@sgi.com
+Signed-off-by: Ingo Molnar <mingo@elte.hu>
+
+---
+ drivers/pci/intel-iommu.c |   15 ---------------
+ drivers/pci/intel-iommu.h |   15 +++++++++++++++
+ 2 files changed, 15 insertions(+), 15 deletions(-)
+
+--- a/drivers/pci/intel-iommu.c
++++ b/drivers/pci/intel-iommu.c
+@@ -49,8 +49,6 @@
+ 
+ #define DEFAULT_DOMAIN_ADDRESS_WIDTH 48
+ 
+-#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */
+-
+ #define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1)
+ 
+ 
+@@ -488,19 +486,6 @@ static int iommu_alloc_root_entry(struct
+       return 0;
+ }
+ 
+-#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \
+-{\
+-      cycles_t start_time = get_cycles();\
+-      while (1) {\
+-              sts = op (iommu->reg + offset);\
+-              if (cond)\
+-                      break;\
+-              if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\
+-                      panic("DMAR hardware is malfunctioning\n");\
+-              cpu_relax();\
+-      }\
+-}
+-
+ static void iommu_set_root_entry(struct intel_iommu *iommu)
+ {
+       void *addr;
+--- a/drivers/pci/intel-iommu.h
++++ b/drivers/pci/intel-iommu.h
+@@ -177,6 +177,21 @@ static inline void dmar_writeq(void __io
+ #define dma_frcd_source_id(c) (c & 0xffff)
+ #define dma_frcd_page_addr(d) (d & (((u64)-1) << 12)) /* low 64 bit */
+ 
++#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */
++
++#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \
++{\
++      cycles_t start_time = get_cycles();\
++      while (1) {\
++              sts = op (iommu->reg + offset);\
++              if (cond)\
++                      break;\
++              if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\
++                      panic("DMAR hardware is malfunctioning\n");\
++              cpu_relax();\
++      }\
++}
++
+ struct intel_iommu {
+       void __iomem    *reg; /* Pointer to hardware regs, virtual addr */
+       u64             cap;