Move xen patchset to new version's subdir.

[people/pmueller/ipfire-2.x.git] / src / patches / suse-2.6.27.31 / patches.arch / x86_fix_llc_shared_map__cpu_llc_id_anomolies.patch

diff --git a/src/patches/suse-2.6.27.31/patches.arch/x86_fix_llc_shared_map__cpu_llc_id_anomolies.patch b/src/patches/suse-2.6.27.31/patches.arch/x86_fix_llc_shared_map__cpu_llc_id_anomolies.patch
new file mode 100644 (file)
index 0000000..c8872f2
--- /dev/null
+++ b/src/patches/suse-2.6.27.31/patches.arch/x86_fix_llc_shared_map__cpu_llc_id_anomolies.patch
@@ -0,0 +1,76 @@
+From: Suresh Siddha <suresh.b.siddha@intel.com>
+Subject: x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomolies
+References: bnc#464329
+Patch-Mainline: In .28 x86 -tip tree, soon in .29, will possibly/hopefully pop up in stable trees
+Signed-off-by: Thomas Renninger <trenn@suse.de>
+
+Date:   Thu Dec 18 18:09:21 2008 -0800
+commit 345077cd98ff5532b2d1158013c3fec7b1ae85ec
+    
+    Impact: fix wrong cache sharing detection on platforms supporting > 8 bit apicid's
+    
+    In the presence of extended topology eumeration leaf 0xb provided
+    by cpuid, 32bit extended initial_apicid in cpuinfo_x86 struct will be
+    updated by detect_extended_topology(). At this instance, we should also
+    reinit the apicid (which could also potentially be extended to 32bit).
+    
+    With out this there will potentially be duplicate apicid's populated in the
+    per cpu's cpuinfo_x86 struct, resulting in wrong cache sharing topology etc
+    detected by init_intel_cacheinfo().
+    
+    Reported-by: Dimitri Sivanich <sivanich@sgi.com>
+    Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
+    Acked-by: Dimitri Sivanich <sivanich@sgi.com>
+    Signed-off-by: Ingo Molnar <mingo@elte.hu>
+    Cc: <stable@kernel.org>
+
+---
+ arch/x86/kernel/cpu/addon_cpuid_features.c |    8 ++++++++
+ arch/x86/kernel/cpu/intel.c                |    9 +++++++--
+ 2 files changed, 15 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
++++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
+@@ -120,9 +120,17 @@ void __cpuinit detect_extended_topology(
+       c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
+                                                & core_select_mask;
+       c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
++      /*
++       * Reinit the apicid, now that we have extended initial_apicid.
++       */
++      c->apicid = phys_pkg_id(c->initial_apicid, 0);
+ #else
+       c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
+       c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
++      /*
++       * Reinit the apicid, now that we have extended initial_apicid.
++       */
++      c->apicid = phys_pkg_id(0);
+ #endif
+       c->x86_max_cores = (core_level_siblings / smp_num_siblings);
+ 
+--- a/arch/x86/kernel/cpu/intel.c
++++ b/arch/x86/kernel/cpu/intel.c
+@@ -151,6 +151,13 @@ static void __cpuinit init_intel(struct 
+       }
+ #endif
+ 
++      /*
++       * Detect the extended topology information if available. This
++       * will reinitialise the initial_apicid which will be used
++       * in init_intel_cacheinfo()
++       */
++      detect_extended_topology(c);
++
+       l2 = init_intel_cacheinfo(c);
+       if (c->cpuid_level > 9) {
+               unsigned eax = cpuid_eax(10);
+@@ -196,8 +203,6 @@ static void __cpuinit init_intel(struct 
+       if (p)
+               strcpy(c->x86_model_id, p);
+ 
+-      detect_extended_topology(c);
+-
+       if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
+               /*
+                * let's use the legacy cpuid vector 0x1 and 0x4 for topology