]> git.ipfire.org Git - people/teissler/ipfire-2.x.git/blobdiff - src/patches/suse-2.6.27.31/patches.arch/x2APIC_PATCH_17_of_41_32e1d0a0651004f5fe47f85a2a5c725ad579a90c
Move xen patchset to new version's subdir.
[people/teissler/ipfire-2.x.git] / src / patches / suse-2.6.27.31 / patches.arch / x2APIC_PATCH_17_of_41_32e1d0a0651004f5fe47f85a2a5c725ad579a90c
diff --git a/src/patches/suse-2.6.27.31/patches.arch/x2APIC_PATCH_17_of_41_32e1d0a0651004f5fe47f85a2a5c725ad579a90c b/src/patches/suse-2.6.27.31/patches.arch/x2APIC_PATCH_17_of_41_32e1d0a0651004f5fe47f85a2a5c725ad579a90c
new file mode 100644 (file)
index 0000000..4a6e123
--- /dev/null
@@ -0,0 +1,53 @@
+From: Suresh Siddha <suresh.b.siddha@intel.com>
+Subject: x64, x2apic/intr-remap: cpuid bits for x2apic feature
+References: fate #303948 and fate #303984
+Patch-Mainline: queued for .28
+Commit-ID: 32e1d0a0651004f5fe47f85a2a5c725ad579a90c
+
+Signed-off-by: Thomas Renninger <trenn@suse.de>
+
+cpuid feature for x2apic.
+
+Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
+Cc: akpm@linux-foundation.org
+Cc: arjan@linux.intel.com
+Cc: andi@firstfloor.org
+Cc: ebiederm@xmission.com
+Cc: jbarnes@virtuousgeek.org
+Cc: steiner@sgi.com
+Signed-off-by: Ingo Molnar <mingo@elte.hu>
+
+---
+ arch/x86/kernel/cpu/feature_names.c |    2 +-
+ include/asm-x86/cpufeature.h        |    2 ++
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/cpu/feature_names.c
++++ b/arch/x86/kernel/cpu/feature_names.c
+@@ -46,7 +46,7 @@ const char * const x86_cap_flags[NCAPINT
+       /* Intel-defined (#2) */
+       "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
+       "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
+-      NULL, NULL, "dca", "sse4_1", "sse4_2", NULL, NULL, "popcnt",
++      NULL, NULL, "dca", "sse4_1", "sse4_2", "x2apic", NULL, "popcnt",
+       NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+       /* VIA/Cyrix/Centaur-defined */
+--- a/include/asm-x86/cpufeature.h
++++ b/include/asm-x86/cpufeature.h
+@@ -94,6 +94,7 @@
+ #define X86_FEATURE_XTPR      (4*32+14) /* Send Task Priority Messages */
+ #define X86_FEATURE_DCA               (4*32+18) /* Direct Cache Access */
+ #define X86_FEATURE_XMM4_2    (4*32+20) /* Streaming SIMD Extensions-4.2 */
++#define X86_FEATURE_X2APIC    (4*32+21) /* x2APIC */
+ /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
+ #define X86_FEATURE_XSTORE    (5*32+ 2) /* on-CPU RNG present (xstore insn) */
+@@ -193,6 +194,7 @@ extern const char * const x86_power_flag
+ #define cpu_has_arch_perfmon  boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
+ #define cpu_has_pat           boot_cpu_has(X86_FEATURE_PAT)
+ #define cpu_has_xmm4_2                boot_cpu_has(X86_FEATURE_XMM4_2)
++#define cpu_has_x2apic                boot_cpu_has(X86_FEATURE_X2APIC)
+ #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
+ # define cpu_has_invlpg               1