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252b5132 1/* BFD PowerPC CPU definition
fd67aa11 2 Copyright (C) 1994-2024 Free Software Foundation, Inc.
252b5132
RH
3 Contributed by Ian Lance Taylor, Cygnus Support.
4
cd123cb7
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5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
252b5132 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
252b5132
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24#include "libbfd.h"
25
26/* The common PowerPC architecture is compatible with the RS/6000. */
27
252b5132 28static const bfd_arch_info_type *
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29powerpc_compatible (const bfd_arch_info_type *a,
30 const bfd_arch_info_type *b)
252b5132
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31{
32 BFD_ASSERT (a->arch == bfd_arch_powerpc);
33 switch (b->arch)
34 {
35 default:
36 return NULL;
37 case bfd_arch_powerpc:
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38 if (a->mach == bfd_mach_ppc_vle && b->bits_per_word == 32)
39 return a;
40 if (b->mach == bfd_mach_ppc_vle && a->bits_per_word == 32)
41 return b;
252b5132
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42 return bfd_default_compatible (a, b);
43 case bfd_arch_rs6000:
43dd9340 44 if (b->mach == bfd_mach_rs6k)
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45 return a;
46 return NULL;
47 }
48 /*NOTREACHED*/
49}
50
22216541
AM
51/* Return a COUNT sized buffer filled with nops (if CODE is TRUE) or
52 zeros (if CODE is FALSE). This is the fill used between input
53 sections for alignment. It won't normally be executed. */
54
55static void *
56bfd_arch_ppc_nop_fill (bfd_size_type count,
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57 bool is_bigendian,
58 bool code)
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59{
60 bfd_byte *fill;
61
62 if (count == 0)
63 return NULL;
64 fill = bfd_malloc (count);
65 if (fill == NULL)
66 return fill;
67
68 if (code && (count & 3) == 0)
69 {
70 static const char nop_be[4] = {0x60, 0, 0, 0};
71 static const char nop_le[4] = {0, 0, 0, 0x60};
72 const char *nop = is_bigendian ? nop_be : nop_le;
73 bfd_byte *p = fill;
74
75 while (count != 0)
76 {
77 memcpy (p, nop, 4);
78 p += 4;
79 count -= 4;
80 }
81 }
82 else
83 memset (fill, 0, count);
84
85 return fill;
86}
87
aebcfb76
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88#define N(BITS, NUMBER, PRINT, DEFAULT, NEXT) \
89 { \
90 BITS, /* Bits in a word. */ \
91 BITS, /* Bits in an address. */ \
92 8, /* Bits in a byte. */ \
93 bfd_arch_powerpc, \
94 NUMBER, \
95 "powerpc", \
96 PRINT, \
97 3, /* Section alignment power. */ \
98 DEFAULT, \
99 powerpc_compatible, \
100 bfd_default_scan, \
22216541 101 bfd_arch_ppc_nop_fill, \
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102 NEXT, \
103 0 /* Maximum offset of a reloc from the start of an insn. */ \
104 }
105
899f54f5 106const bfd_arch_info_type bfd_powerpc_archs[] =
252b5132 107{
feee612b 108#if BFD_DEFAULT_TARGET_SIZE == 64
aebcfb76 109 /* Default for 64 bit target. */
0a1b45a2 110 N (64, bfd_mach_ppc64, "powerpc:common64", true, bfd_powerpc_archs + 1),
feee612b
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111 /* elf32-ppc:ppc_elf_object_p relies on the default 32 bit arch
112 being immediately after the 64 bit default. */
0a1b45a2 113 N (32, bfd_mach_ppc, "powerpc:common", false, bfd_powerpc_archs + 2),
99dc0092 114#else
feee612b 115 /* Default arch must come first. */
0a1b45a2 116 N (32, bfd_mach_ppc, "powerpc:common", true, bfd_powerpc_archs + 1),
feee612b
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117 /* elf64-ppc:ppc64_elf_object_p relies on the default 64 bit arch
118 being immediately after the 32 bit default. */
0a1b45a2 119 N (64, bfd_mach_ppc64, "powerpc:common64", false, bfd_powerpc_archs + 2),
99dc0092 120#endif
0a1b45a2
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121 N (32, bfd_mach_ppc_603, "powerpc:603", false, bfd_powerpc_archs + 3),
122 N (32, bfd_mach_ppc_ec603e, "powerpc:EC603e", false, bfd_powerpc_archs + 4),
123 N (32, bfd_mach_ppc_604, "powerpc:604", false, bfd_powerpc_archs + 5),
124 N (32, bfd_mach_ppc_403, "powerpc:403", false, bfd_powerpc_archs + 6),
125 N (32, bfd_mach_ppc_601, "powerpc:601", false, bfd_powerpc_archs + 7),
126 N (64, bfd_mach_ppc_620, "powerpc:620", false, bfd_powerpc_archs + 8),
127 N (64, bfd_mach_ppc_630, "powerpc:630", false, bfd_powerpc_archs + 9),
128 N (64, bfd_mach_ppc_a35, "powerpc:a35", false, bfd_powerpc_archs + 10),
129 N (64, bfd_mach_ppc_rs64ii, "powerpc:rs64ii", false, bfd_powerpc_archs + 11),
130 N (64, bfd_mach_ppc_rs64iii, "powerpc:rs64iii", false, bfd_powerpc_archs + 12),
131 N (32, bfd_mach_ppc_7400, "powerpc:7400", false, bfd_powerpc_archs + 13),
132 N (32, bfd_mach_ppc_e500, "powerpc:e500", false, bfd_powerpc_archs + 14),
133 N (32, bfd_mach_ppc_e500mc, "powerpc:e500mc", false, bfd_powerpc_archs + 15),
134 N (64, bfd_mach_ppc_e500mc64, "powerpc:e500mc64",false, bfd_powerpc_archs + 16),
135 N (32, bfd_mach_ppc_860, "powerpc:MPC8XX", false, bfd_powerpc_archs + 17),
136 N (32, bfd_mach_ppc_750, "powerpc:750", false, bfd_powerpc_archs + 18),
137 N (32, bfd_mach_ppc_titan, "powerpc:titan", false, bfd_powerpc_archs + 19),
aebcfb76 138
252b5132 139 {
aebcfb76
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140 16, /* Bits in a word. */
141 32, /* Bits in an address. */
142 8, /* Bits in a byte. */
b9c361e0
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143 bfd_arch_powerpc,
144 bfd_mach_ppc_vle,
145 "powerpc",
146 "powerpc:vle",
147 3,
0a1b45a2 148 false, /* Not the default. */
b9c361e0
JL
149 powerpc_compatible,
150 bfd_default_scan,
151 bfd_arch_default_fill,
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152 bfd_powerpc_archs + 20,
153 0 /* Maximum offset of a reloc from the start of an insn. */
b9c361e0 154 },
aebcfb76 155
0a1b45a2
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156 N (64, bfd_mach_ppc_e5500, "powerpc:e5500", false, bfd_powerpc_archs + 21),
157 N (64, bfd_mach_ppc_e6500, "powerpc:e6500", false, NULL)
899f54f5 158};