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Support ARM Cortex-M7
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
4b95cf5c 2 Copyright (C) 1998-2014 Free Software Foundation, Inc.
252b5132
RH		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
6e6718a3 21#include "sysdep.h"
2468f9c9
PB		 22#include <limits.h>
23
3db64b00 24#include "bfd.h"
6034aab8 25#include "bfd_stdint.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
79f08007
YZ		 65/* The Adjusted Place, as defined by AAELF. */
66#define Pa(X) ((X) & 0xfffffffc)
67
3e6b1042
DJ		 68static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
7f266840
DJ		 73/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
c19d1205 77static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 78{
8029a119 79 /* No relocation. */
7f266840
DJ		 80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
c19d1205 138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 139 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 142 32, /* bitsize */
143 TRUE, /* pc_relative */
7f266840 144 0, /* bitpos */
4962c51a 145 complain_overflow_dont,/* complain_on_overflow */
7f266840 146 bfd_elf_generic_reloc, /* special_function */
4962c51a 147 "R_ARM_LDR_PC_G0", /* name */
7f266840 148 FALSE, /* partial_inplace */
4962c51a
MS		 149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
7f266840
DJ		 152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
00a97672
RS		 179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
7f266840
DJ		 181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
c19d1205 226 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 229 24, /* bitsize */
7f266840
DJ		 230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
c19d1205 234 "R_ARM_THM_CALL", /* name */
7f266840 235 FALSE, /* partial_inplace */
7f6ab9f8
AM		 236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
7f266840
DJ		 238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
c19d1205 254 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 257 32, /* bitsize */
258 FALSE, /* pc_relative */
7f266840
DJ		 259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
c19d1205 262 "R_ARM_BREL_ADJ", /* name */
7f266840 263 FALSE, /* partial_inplace */
c19d1205
ZW		 264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
7f266840 267
0855e32b 268 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 269 0, /* rightshift */
0855e32b
NS		 270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
7f266840
DJ		 272 FALSE, /* pc_relative */
273 0, /* bitpos */
0855e32b 274 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 275 bfd_elf_generic_reloc, /* special_function */
0855e32b 276 "R_ARM_TLS_DESC", /* name */
7f266840 277 FALSE, /* partial_inplace */
0855e32b
NS		 278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
7f266840
DJ		 280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 300 24, /* bitsize */
7f266840
DJ		 301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 315 24, /* bitsize */
7f266840
DJ		 316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
7f6ab9f8
AM		 322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
7f266840
DJ		 324 TRUE), /* pcrel_offset */
325
ba93b8ac 326 /* Dynamic TLS relocations. */
7f266840 327
ba93b8ac 328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
99059e56
RM		 329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
7f266840 341
ba93b8ac 342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
99059e56
RM		 343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
7f266840 355
ba93b8ac 356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
99059e56
RM		 357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
7f266840
DJ		 369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
99059e56
RM		 373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
7f266840
DJ		 385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
99059e56
RM		 387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
7f266840
DJ		 399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
99059e56
RM		 401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
7f266840
DJ		 413
414 HOWTO (R_ARM_RELATIVE, /* type */
99059e56
RM		 415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
7f266840 427
c19d1205 428 HOWTO (R_ARM_GOTOFF32, /* type */
99059e56
RM		 429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
7f266840
DJ		 441
442 HOWTO (R_ARM_GOTPC, /* type */
99059e56
RM		 443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
7f266840
DJ		 455
456 HOWTO (R_ARM_GOT32, /* type */
99059e56
RM		 457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
7f266840
DJ		 469
470 HOWTO (R_ARM_PLT32, /* type */
99059e56
RM		 471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
7f266840
DJ		 483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
c19d1205
ZW		 512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
7f266840 517 0, /* bitpos */
c19d1205 518 complain_overflow_signed,/* complain_on_overflow */
7f266840 519 bfd_elf_generic_reloc, /* special_function */
c19d1205 520 "R_ARM_THM_JUMP24", /* name */
7f266840 521 FALSE, /* partial_inplace */
c19d1205
ZW		 522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
7f266840 525
c19d1205 526 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 527 0, /* rightshift */
c19d1205
ZW		 528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
7f266840
DJ		 530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
c19d1205 534 "R_ARM_BASE_ABS", /* name */
7f266840 535 FALSE, /* partial_inplace */
c19d1205
ZW		 536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
7f266840
DJ		 538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
c19d1205
ZW		 693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
39623e12
PB		 704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
c19d1205
ZW		 706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
39623e12
PB		 718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
c19d1205
ZW		 720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
39623e12
PB		 732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
c19d1205
ZW		 734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
39623e12
PB		 746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
c19d1205
ZW		 748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
2cab6cc3 843 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
2cab6cc3
MS		 847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
c19d1205
ZW		 849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
2cab6cc3 857 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
2cab6cc3
MS		 861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
c19d1205
ZW		 863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
7f266840 892
4962c51a
MS		 893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
c19d1205 1274
c19d1205
ZW		 1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
0855e32b
NS		 1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
c19d1205
ZW		 1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
99059e56
RM		 1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
c19d1205
ZW		 1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
99059e56
RM		 1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
c19d1205
ZW		 1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
ba93b8ac 1544
c19d1205
ZW		 1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
99059e56
RM		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
ba93b8ac 1559
ba93b8ac 1560 HOWTO (R_ARM_TLS_LDM32, /* type */
99059e56
RM		 1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
ba93b8ac 1573
c19d1205 1574 HOWTO (R_ARM_TLS_LDO32, /* type */
99059e56
RM		 1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
ba93b8ac 1587
ba93b8ac 1588 HOWTO (R_ARM_TLS_IE32, /* type */
99059e56
RM		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
7f266840 1601
c19d1205 1602 HOWTO (R_ARM_TLS_LE32, /* type */
99059e56
RM		 1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
7f266840 1615
c19d1205
ZW		 1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
7f266840 1621 0, /* bitpos */
c19d1205 1622 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1623 bfd_elf_generic_reloc, /* special_function */
c19d1205 1624 "R_ARM_TLS_LDO12", /* name */
7f266840 1625 FALSE, /* partial_inplace */
c19d1205
ZW		 1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
7f266840 1629
c19d1205
ZW		 1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
7f266840 1635 0, /* bitpos */
c19d1205 1636 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1637 bfd_elf_generic_reloc, /* special_function */
c19d1205 1638 "R_ARM_TLS_LE12", /* name */
7f266840 1639 FALSE, /* partial_inplace */
c19d1205
ZW		 1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
7f266840 1643
c19d1205 1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
7f266840 1649 0, /* bitpos */
c19d1205 1650 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1651 bfd_elf_generic_reloc, /* special_function */
c19d1205 1652 "R_ARM_TLS_IE12GP", /* name */
7f266840 1653 FALSE, /* partial_inplace */
c19d1205
ZW		 1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
0855e32b 1657
34e77a92 1658 /* 112-127 private relocations. */
0855e32b
NS		 1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
34e77a92
RS		 1675
1676 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
c19d1205
ZW		 1692};
1693
34e77a92
RS		 1694/* 160 onwards: */
1695static reloc_howto_type elf32_arm_howto_table_2[1] =
1696{
1697 HOWTO (R_ARM_IRELATIVE, /* type */
99059e56
RM		 1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
34e77a92 1710};
c19d1205 1711
34e77a92
RS		 1712/* 249-255 extended, currently unused, relocations: */
1713static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1714{
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770};
1771
1772static reloc_howto_type *
1773elf32_arm_howto_from_type (unsigned int r_type)
1774{
906e58ca 1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1776 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1777
34e77a92
RS		 1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
c19d1205 1781 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1784
c19d1205 1785 return NULL;
7f266840
DJ		 1786}
1787
1788static void
1789elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791{
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796}
1797
1798struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804/* All entries in this list must also be present in elf32_arm_howto_table. */
1805static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1893 };
1894
1895static reloc_howto_type *
f1c71a59
ZW		 1896elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
7f266840
DJ		 1898{
1899 unsigned int i;
8029a119 1900
906e58ca 1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1904
c19d1205 1905 return NULL;
7f266840
DJ		 1906}
1907
157090f7
AM		 1908static reloc_howto_type *
1909elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911{
1912 unsigned int i;
1913
906e58ca 1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
906e58ca 1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
34e77a92
RS		 1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
157090f7
AM		 1929 return NULL;
1930}
1931
906e58ca
NC		 1932/* Support for core dump NOTE sections. */
1933
7f266840 1934static bfd_boolean
f1c71a59 1935elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1936{
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
8029a119 1945 case 148: /* Linux/ARM 32-bit. */
7f266840 1946 /* pr_cursig */
228e534f 1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1948
1949 /* pr_pid */
228e534f 1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962}
1963
1964static bfd_boolean
f1c71a59 1965elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1966{
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
8029a119 1972 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1973 elf_tdata (abfd)->core->pid
4395ee08 1974 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1975 elf_tdata (abfd)->core->program
7f266840 1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1977 elf_tdata (abfd)->core->command
7f266840
DJ		 1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
7f266840 1984 {
228e534f 1985 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993}
1994
1f20dca5
UW		 1995static char *
1996elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998{
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041}
2042
6d00b590 2043#define TARGET_LITTLE_SYM arm_elf32_le_vec
7f266840 2044#define TARGET_LITTLE_NAME "elf32-littlearm"
6d00b590 2045#define TARGET_BIG_SYM arm_elf32_be_vec
7f266840
DJ		 2046#define TARGET_BIG_NAME "elf32-bigarm"
2047
2048#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2050#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2051
252b5132
RH		 2052typedef unsigned long int insn32;
2053typedef unsigned short int insn16;
2054
3a4a14e9
PB		 2055/* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
57e8b36a 2057#define INTERWORK_FLAG(abfd) \
3a4a14e9 2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2061
252b5132
RH		 2062/* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
9b485d32 2065 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2066#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
c7b8f16e
JB		 2072#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
845b51d6
PB		 2075#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
7413f23f
DJ		 2078#define STUB_ENTRY_NAME "__%s_veneer"
2079
252b5132
RH		 2080/* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
0855e32b 2084static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2085{
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089};
0855e32b
NS		 2090
2091static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2092{
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
99059e56 2100 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102};
0855e32b 2103
5e681ec4
PB		 2104#ifdef FOUR_WORD_PLT
2105
252b5132
RH		 2106/* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
59f2c4e7 2108 called before the relocation has been set up calls the dynamic
9b485d32 2109 linker first. */
e5a52504 2110static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2111{
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116};
5e681ec4
PB		 2117
2118/* Subsequent entries in a procedure linkage table look like
2119 this. */
e5a52504 2120static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2121{
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126};
5e681ec4 2127
eed94f8f 2128#else /* not FOUR_WORD_PLT */
5e681ec4 2129
5e681ec4
PB		 2130/* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
e5a52504 2134static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2135{
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141};
252b5132 2142
1db37fe6
YG		 2143/* By default subsequent entries in a procedure linkage table look like
2144 this. Offsets that don't fit into 28 bits will cause link error. */
2145static const bfd_vma elf32_arm_plt_entry_short [] =
b38cadfb
NC		 2146{
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150};
5e681ec4 2151
1db37fe6
YG		 2152/* When explicitly asked, we'll use this "long" entry format
2153 which can cope with arbitrary displacements. */
2154static const bfd_vma elf32_arm_plt_entry_long [] =
2155{
2156 0xe28fc200, /* add ip, pc, #0xN0000000 */
2157 0xe28cc600, /* add ip, ip, #0xNN00000 */
2158 0xe28cca00, /* add ip, ip, #0xNN000 */
2159 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2160};
2161
2162static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2163
eed94f8f
NC		 2164#endif /* not FOUR_WORD_PLT */
2165
2166/* The first entry in a procedure linkage table looks like this.
2167 It is set up so that any shared library function that is called before the
2168 relocation has been set up calls the dynamic linker first. */
2169static const bfd_vma elf32_thumb2_plt0_entry [] =
2170{
2171 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2172 an instruction maybe encoded to one or two array elements. */
2173 0xf8dfb500, /* push {lr} */
2174 0x44fee008, /* ldr.w lr, [pc, #8] */
469a3493 2175 /* add lr, pc */
eed94f8f
NC		 2176 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2177 0x00000000, /* &GOT[0] - . */
2178};
2179
2180/* Subsequent entries in a procedure linkage table for thumb only target
2181 look like this. */
2182static const bfd_vma elf32_thumb2_plt_entry [] =
2183{
2184 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2185 an instruction maybe encoded to one or two array elements. */
2186 0x0c00f240, /* movw ip, #0xNNNN */
2187 0x0c00f2c0, /* movt ip, #0xNNNN */
2188 0xf8dc44fc, /* add ip, pc */
2189 0xbf00f000 /* ldr.w pc, [ip] */
469a3493 2190 /* nop */
eed94f8f 2191};
252b5132 2192
00a97672
RS		 2193/* The format of the first entry in the procedure linkage table
2194 for a VxWorks executable. */
2195static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2196{
2197 0xe52dc008, /* str ip,[sp,#-8]! */
2198 0xe59fc000, /* ldr ip,[pc] */
2199 0xe59cf008, /* ldr pc,[ip,#8] */
2200 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2201};
00a97672
RS		 2202
2203/* The format of subsequent entries in a VxWorks executable. */
2204static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2205{
2206 0xe59fc000, /* ldr ip,[pc] */
2207 0xe59cf000, /* ldr pc,[ip] */
2208 0x00000000, /* .long @got */
2209 0xe59fc000, /* ldr ip,[pc] */
2210 0xea000000, /* b _PLT */
2211 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2212};
00a97672
RS		 2213
2214/* The format of entries in a VxWorks shared library. */
2215static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2216{
2217 0xe59fc000, /* ldr ip,[pc] */
2218 0xe79cf009, /* ldr pc,[ip,r9] */
2219 0x00000000, /* .long @got */
2220 0xe59fc000, /* ldr ip,[pc] */
2221 0xe599f008, /* ldr pc,[r9,#8] */
2222 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2223};
00a97672 2224
b7693d02
DJ		 2225/* An initial stub used if the PLT entry is referenced from Thumb code. */
2226#define PLT_THUMB_STUB_SIZE 4
2227static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2228{
2229 0x4778, /* bx pc */
2230 0x46c0 /* nop */
2231};
b7693d02 2232
e5a52504
MM		 2233/* The entries in a PLT when using a DLL-based target with multiple
2234 address spaces. */
906e58ca 2235static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2236{
2237 0xe51ff004, /* ldr pc, [pc, #-4] */
2238 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2239};
2240
2241/* The first entry in a procedure linkage table looks like
2242 this. It is set up so that any shared library function that is
2243 called before the relocation has been set up calls the dynamic
2244 linker first. */
2245static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2246{
2247 /* First bundle: */
2248 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2249 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2250 0xe08cc00f, /* add ip, ip, pc */
2251 0xe52dc008, /* str ip, [sp, #-8]! */
2252 /* Second bundle: */
edccdf7c
RM		 2253 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2254 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2255 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2256 0xe12fff1c, /* bx ip */
b38cadfb 2257 /* Third bundle: */
edccdf7c
RM		 2258 0xe320f000, /* nop */
2259 0xe320f000, /* nop */
2260 0xe320f000, /* nop */
b38cadfb
NC		 2261 /* .Lplt_tail: */
2262 0xe50dc004, /* str ip, [sp, #-4] */
2263 /* Fourth bundle: */
edccdf7c
RM		 2264 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2265 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2266 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2267 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2268};
2269#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2270
2271/* Subsequent entries in a procedure linkage table look like this. */
2272static const bfd_vma elf32_arm_nacl_plt_entry [] =
2273{
2274 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2275 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2276 0xe08cc00f, /* add ip, ip, pc */
2277 0xea000000, /* b .Lplt_tail */
2278};
e5a52504 2279
906e58ca
NC		 2280#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2281#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2282#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2283#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2284#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2285#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
c5423981
TG		 2286#define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2287#define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
906e58ca 2288
461a49ca 2289enum stub_insn_type
b38cadfb
NC		 2290{
2291 THUMB16_TYPE = 1,
2292 THUMB32_TYPE,
2293 ARM_TYPE,
2294 DATA_TYPE
2295};
461a49ca 2296
48229727
JB		 2297#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2298/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2299 is inserted in arm_build_one_stub(). */
2300#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2301#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2302#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2303#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2304#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2305#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2306
2307typedef struct
2308{
b38cadfb
NC		 2309 bfd_vma data;
2310 enum stub_insn_type type;
2311 unsigned int r_type;
2312 int reloc_addend;
461a49ca
DJ		 2313} insn_sequence;
2314
fea2b4d6
CL		 2315/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2316 to reach the stub if necessary. */
461a49ca 2317static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2318{
2319 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2320 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2321};
906e58ca 2322
fea2b4d6
CL		 2323/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2324 available. */
461a49ca 2325static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2326{
2327 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2328 ARM_INSN (0xe12fff1c), /* bx ip */
2329 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2330};
906e58ca 2331
d3626fb0 2332/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2333static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2334{
2335 THUMB16_INSN (0xb401), /* push {r0} */
2336 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2337 THUMB16_INSN (0x4684), /* mov ip, r0 */
2338 THUMB16_INSN (0xbc01), /* pop {r0} */
2339 THUMB16_INSN (0x4760), /* bx ip */
2340 THUMB16_INSN (0xbf00), /* nop */
2341 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2342};
906e58ca 2343
d3626fb0
CL		 2344/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2345 allowed. */
2346static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2347{
2348 THUMB16_INSN (0x4778), /* bx pc */
2349 THUMB16_INSN (0x46c0), /* nop */
2350 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2351 ARM_INSN (0xe12fff1c), /* bx ip */
2352 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2353};
d3626fb0 2354
fea2b4d6
CL		 2355/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2356 available. */
461a49ca 2357static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2358{
2359 THUMB16_INSN (0x4778), /* bx pc */
2360 THUMB16_INSN (0x46c0), /* nop */
2361 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2362 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2363};
906e58ca 2364
fea2b4d6
CL		 2365/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2366 one, when the destination is close enough. */
461a49ca 2367static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2368{
2369 THUMB16_INSN (0x4778), /* bx pc */
2370 THUMB16_INSN (0x46c0), /* nop */
2371 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2372};
c820be07 2373
cf3eccff 2374/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2375 blx to reach the stub if necessary. */
cf3eccff 2376static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2377{
2378 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2379 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2380 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2381};
906e58ca 2382
cf3eccff
DJ		 2383/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2384 blx to reach the stub if necessary. We can not add into pc;
2385 it is not guaranteed to mode switch (different in ARMv6 and
2386 ARMv7). */
2387static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2388{
2389 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2390 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2391 ARM_INSN (0xe12fff1c), /* bx ip */
2392 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2393};
cf3eccff 2394
ebe24dd4
CL		 2395/* V4T ARM -> ARM long branch stub, PIC. */
2396static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2397{
2398 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2399 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2400 ARM_INSN (0xe12fff1c), /* bx ip */
2401 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2402};
ebe24dd4
CL		 2403
2404/* V4T Thumb -> ARM long branch stub, PIC. */
2405static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2406{
2407 THUMB16_INSN (0x4778), /* bx pc */
2408 THUMB16_INSN (0x46c0), /* nop */
2409 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2410 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2411 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2412};
ebe24dd4 2413
d3626fb0
CL		 2414/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2415 architectures. */
ebe24dd4 2416static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2417{
2418 THUMB16_INSN (0xb401), /* push {r0} */
2419 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2420 THUMB16_INSN (0x46fc), /* mov ip, pc */
2421 THUMB16_INSN (0x4484), /* add ip, r0 */
2422 THUMB16_INSN (0xbc01), /* pop {r0} */
2423 THUMB16_INSN (0x4760), /* bx ip */
2424 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2425};
ebe24dd4 2426
d3626fb0
CL		 2427/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2428 allowed. */
2429static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2430{
2431 THUMB16_INSN (0x4778), /* bx pc */
2432 THUMB16_INSN (0x46c0), /* nop */
2433 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2434 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2435 ARM_INSN (0xe12fff1c), /* bx ip */
2436 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2437};
d3626fb0 2438
0855e32b
NS		 2439/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2440 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2441static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2442{
b38cadfb
NC		 2443 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2444 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2445 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2446};
2447
2448/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2449 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2450static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2451{
b38cadfb
NC		 2452 THUMB16_INSN (0x4778), /* bx pc */
2453 THUMB16_INSN (0x46c0), /* nop */
2454 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2455 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2456 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2457};
2458
7a89b94e
NC		 2459/* NaCl ARM -> ARM long branch stub. */
2460static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2461{
2462 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2463 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2464 ARM_INSN (0xe12fff1c), /* bx ip */
2465 ARM_INSN (0xe320f000), /* nop */
2466 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2467 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2468 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2469 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2470};
2471
2472/* NaCl ARM -> ARM long branch stub, PIC. */
2473static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2474{
2475 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2476 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2477 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2478 ARM_INSN (0xe12fff1c), /* bx ip */
2479 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2480 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2481 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2482 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2483};
2484
2485
48229727
JB		 2486/* Cortex-A8 erratum-workaround stubs. */
2487
2488/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2489 can't use a conditional branch to reach this stub). */
2490
2491static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2492{
2493 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2494 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2495 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2496};
48229727
JB		 2497
2498/* Stub used for b.w and bl.w instructions. */
2499
2500static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2501{
2502 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2503};
48229727
JB		 2504
2505static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2506{
2507 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2508};
48229727
JB		 2509
2510/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2511 instruction (which switches to ARM mode) to point to this stub. Jump to the
2512 real destination using an ARM-mode branch. */
2513
2514static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2515{
2516 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2517};
48229727 2518
9553db3c
NC		 2519/* For each section group there can be a specially created linker section
2520 to hold the stubs for that group. The name of the stub section is based
2521 upon the name of another section within that group with the suffix below
2522 applied.
2523
2524 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2525 create what appeared to be a linker stub section when it actually
2526 contained user code/data. For example, consider this fragment:
b38cadfb 2527
9553db3c
NC		 2528 const char * stubborn_problems[] = { "np" };
2529
2530 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2531 section called:
2532
2533 .data.rel.local.stubborn_problems
2534
2535 This then causes problems in arm32_arm_build_stubs() as it triggers:
2536
2537 // Ignore non-stub sections.
2538 if (!strstr (stub_sec->name, STUB_SUFFIX))
2539 continue;
2540
2541 And so the section would be ignored instead of being processed. Hence
2542 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2543 C identifier. */
2544#define STUB_SUFFIX ".__stub"
906e58ca 2545
738a79f6
CL		 2546/* One entry per long/short branch stub defined above. */
2547#define DEF_STUBS \
2548 DEF_STUB(long_branch_any_any) \
2549 DEF_STUB(long_branch_v4t_arm_thumb) \
2550 DEF_STUB(long_branch_thumb_only) \
2551 DEF_STUB(long_branch_v4t_thumb_thumb) \
2552 DEF_STUB(long_branch_v4t_thumb_arm) \
2553 DEF_STUB(short_branch_v4t_thumb_arm) \
2554 DEF_STUB(long_branch_any_arm_pic) \
2555 DEF_STUB(long_branch_any_thumb_pic) \
2556 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2557 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2558 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2559 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2560 DEF_STUB(long_branch_any_tls_pic) \
2561 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
7a89b94e
NC		 2562 DEF_STUB(long_branch_arm_nacl) \
2563 DEF_STUB(long_branch_arm_nacl_pic) \
48229727
JB		 2564 DEF_STUB(a8_veneer_b_cond) \
2565 DEF_STUB(a8_veneer_b) \
2566 DEF_STUB(a8_veneer_bl) \
2567 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2568
2569#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2570enum elf32_arm_stub_type
2571{
906e58ca 2572 arm_stub_none,
738a79f6 2573 DEF_STUBS
6a631e86 2574 /* Note the first a8_veneer type. */
eb7c4339 2575 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2576};
2577#undef DEF_STUB
2578
2579typedef struct
2580{
d3ce72d0 2581 const insn_sequence* template_sequence;
738a79f6
CL		 2582 int template_size;
2583} stub_def;
2584
2585#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2586static const stub_def stub_definitions[] =
2587{
738a79f6
CL		 2588 {NULL, 0},
2589 DEF_STUBS
906e58ca
NC		 2590};
2591
2592struct elf32_arm_stub_hash_entry
2593{
2594 /* Base hash table entry structure. */
2595 struct bfd_hash_entry root;
2596
2597 /* The stub section. */
2598 asection *stub_sec;
2599
2600 /* Offset within stub_sec of the beginning of this stub. */
2601 bfd_vma stub_offset;
2602
2603 /* Given the symbol's value and its section we can determine its final
2604 value when building the stubs (so the stub knows where to jump). */
2605 bfd_vma target_value;
2606 asection *target_section;
2607
48229727
JB		 2608 /* Offset to apply to relocation referencing target_value. */
2609 bfd_vma target_addend;
2610
2611 /* The instruction which caused this stub to be generated (only valid for
2612 Cortex-A8 erratum workaround stubs at present). */
2613 unsigned long orig_insn;
2614
461a49ca 2615 /* The stub type. */
906e58ca 2616 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2617 /* Its encoding size in bytes. */
2618 int stub_size;
2619 /* Its template. */
2620 const insn_sequence *stub_template;
2621 /* The size of the template (number of entries). */
2622 int stub_template_size;
906e58ca
NC		 2623
2624 /* The symbol table entry, if any, that this was derived from. */
2625 struct elf32_arm_link_hash_entry *h;
2626
35fc36a8
RS		 2627 /* Type of branch. */
2628 enum arm_st_branch_type branch_type;
906e58ca
NC		 2629
2630 /* Where this stub is being called from, or, in the case of combined
2631 stub sections, the first input section in the group. */
2632 asection *id_sec;
7413f23f
DJ		 2633
2634 /* The name for the local symbol at the start of this stub. The
2635 stub name in the hash table has to be unique; this does not, so
2636 it can be friendlier. */
2637 char *output_name;
906e58ca
NC		 2638};
2639
e489d0ae
PB		 2640/* Used to build a map of a section. This is required for mixed-endian
2641 code/data. */
2642
2643typedef struct elf32_elf_section_map
2644{
2645 bfd_vma vma;
2646 char type;
2647}
2648elf32_arm_section_map;
2649
c7b8f16e
JB		 2650/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2651
2652typedef enum
2653{
2654 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2655 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2656 VFP11_ERRATUM_ARM_VENEER,
2657 VFP11_ERRATUM_THUMB_VENEER
2658}
2659elf32_vfp11_erratum_type;
2660
2661typedef struct elf32_vfp11_erratum_list
2662{
2663 struct elf32_vfp11_erratum_list *next;
2664 bfd_vma vma;
2665 union
2666 {
2667 struct
2668 {
2669 struct elf32_vfp11_erratum_list *veneer;
2670 unsigned int vfp_insn;
2671 } b;
2672 struct
2673 {
2674 struct elf32_vfp11_erratum_list *branch;
2675 unsigned int id;
2676 } v;
2677 } u;
2678 elf32_vfp11_erratum_type type;
2679}
2680elf32_vfp11_erratum_list;
2681
2468f9c9
PB		 2682typedef enum
2683{
2684 DELETE_EXIDX_ENTRY,
2685 INSERT_EXIDX_CANTUNWIND_AT_END
2686}
2687arm_unwind_edit_type;
2688
2689/* A (sorted) list of edits to apply to an unwind table. */
2690typedef struct arm_unwind_table_edit
2691{
2692 arm_unwind_edit_type type;
2693 /* Note: we sometimes want to insert an unwind entry corresponding to a
2694 section different from the one we're currently writing out, so record the
2695 (text) section this edit relates to here. */
2696 asection *linked_section;
2697 unsigned int index;
2698 struct arm_unwind_table_edit *next;
2699}
2700arm_unwind_table_edit;
2701
8e3de13a 2702typedef struct _arm_elf_section_data
e489d0ae 2703{
2468f9c9 2704 /* Information about mapping symbols. */
e489d0ae 2705 struct bfd_elf_section_data elf;
8e3de13a 2706 unsigned int mapcount;
c7b8f16e 2707 unsigned int mapsize;
e489d0ae 2708 elf32_arm_section_map *map;
2468f9c9 2709 /* Information about CPU errata. */
c7b8f16e
JB		 2710 unsigned int erratumcount;
2711 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2712 /* Information about unwind tables. */
2713 union
2714 {
2715 /* Unwind info attached to a text section. */
2716 struct
2717 {
2718 asection *arm_exidx_sec;
2719 } text;
2720
2721 /* Unwind info attached to an .ARM.exidx section. */
2722 struct
2723 {
2724 arm_unwind_table_edit *unwind_edit_list;
2725 arm_unwind_table_edit *unwind_edit_tail;
2726 } exidx;
2727 } u;
8e3de13a
NC		 2728}
2729_arm_elf_section_data;
e489d0ae
PB		 2730
2731#define elf32_arm_section_data(sec) \
8e3de13a 2732 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2733
48229727
JB		 2734/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2735 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2736 so may be created multiple times: we use an array of these entries whilst
2737 relaxing which we can refresh easily, then create stubs for each potentially
2738 erratum-triggering instruction once we've settled on a solution. */
2739
b38cadfb
NC		 2740struct a8_erratum_fix
2741{
48229727
JB		 2742 bfd *input_bfd;
2743 asection *section;
2744 bfd_vma offset;
2745 bfd_vma addend;
2746 unsigned long orig_insn;
2747 char *stub_name;
2748 enum elf32_arm_stub_type stub_type;
35fc36a8 2749 enum arm_st_branch_type branch_type;
48229727
JB		 2750};
2751
2752/* A table of relocs applied to branches which might trigger Cortex-A8
2753 erratum. */
2754
b38cadfb
NC		 2755struct a8_erratum_reloc
2756{
48229727
JB		 2757 bfd_vma from;
2758 bfd_vma destination;
92750f34
DJ		 2759 struct elf32_arm_link_hash_entry *hash;
2760 const char *sym_name;
48229727 2761 unsigned int r_type;
35fc36a8 2762 enum arm_st_branch_type branch_type;
48229727
JB		 2763 bfd_boolean non_a8_stub;
2764};
2765
ba93b8ac
DJ		 2766/* The size of the thread control block. */
2767#define TCB_SIZE 8
2768
34e77a92
RS		 2769/* ARM-specific information about a PLT entry, over and above the usual
2770 gotplt_union. */
b38cadfb
NC		 2771struct arm_plt_info
2772{
34e77a92
RS		 2773 /* We reference count Thumb references to a PLT entry separately,
2774 so that we can emit the Thumb trampoline only if needed. */
2775 bfd_signed_vma thumb_refcount;
2776
2777 /* Some references from Thumb code may be eliminated by BL->BLX
2778 conversion, so record them separately. */
2779 bfd_signed_vma maybe_thumb_refcount;
2780
2781 /* How many of the recorded PLT accesses were from non-call relocations.
2782 This information is useful when deciding whether anything takes the
2783 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2784 non-call references to the function should resolve directly to the
2785 real runtime target. */
2786 unsigned int noncall_refcount;
2787
2788 /* Since PLT entries have variable size if the Thumb prologue is
2789 used, we need to record the index into .got.plt instead of
2790 recomputing it from the PLT offset. */
2791 bfd_signed_vma got_offset;
2792};
2793
2794/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2795struct arm_local_iplt_info
2796{
34e77a92
RS		 2797 /* The information that is usually found in the generic ELF part of
2798 the hash table entry. */
2799 union gotplt_union root;
2800
2801 /* The information that is usually found in the ARM-specific part of
2802 the hash table entry. */
2803 struct arm_plt_info arm;
2804
2805 /* A list of all potential dynamic relocations against this symbol. */
2806 struct elf_dyn_relocs *dyn_relocs;
2807};
2808
0ffa91dd 2809struct elf_arm_obj_tdata
ba93b8ac
DJ		 2810{
2811 struct elf_obj_tdata root;
2812
2813 /* tls_type for each local got entry. */
2814 char *local_got_tls_type;
ee065d83 2815
0855e32b
NS		 2816 /* GOTPLT entries for TLS descriptors. */
2817 bfd_vma *local_tlsdesc_gotent;
2818
34e77a92
RS		 2819 /* Information for local symbols that need entries in .iplt. */
2820 struct arm_local_iplt_info **local_iplt;
2821
bf21ed78
MS		 2822 /* Zero to warn when linking objects with incompatible enum sizes. */
2823 int no_enum_size_warning;
a9dc9481
JM		 2824
2825 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2826 int no_wchar_size_warning;
ba93b8ac
DJ		 2827};
2828
0ffa91dd
NC		 2829#define elf_arm_tdata(bfd) \
2830 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2831
0ffa91dd
NC		 2832#define elf32_arm_local_got_tls_type(bfd) \
2833 (elf_arm_tdata (bfd)->local_got_tls_type)
2834
0855e32b
NS		 2835#define elf32_arm_local_tlsdesc_gotent(bfd) \
2836 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2837
34e77a92
RS		 2838#define elf32_arm_local_iplt(bfd) \
2839 (elf_arm_tdata (bfd)->local_iplt)
2840
0ffa91dd
NC		 2841#define is_arm_elf(bfd) \
2842 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2843 && elf_tdata (bfd) != NULL \
4dfe6ac6 2844 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2845
2846static bfd_boolean
2847elf32_arm_mkobject (bfd *abfd)
2848{
0ffa91dd 2849 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2850 ARM_ELF_DATA);
ba93b8ac
DJ		 2851}
2852
ba93b8ac
DJ		 2853#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2854
ba96a88f 2855/* Arm ELF linker hash entry. */
252b5132 2856struct elf32_arm_link_hash_entry
b38cadfb
NC		 2857{
2858 struct elf_link_hash_entry root;
252b5132 2859
b38cadfb
NC		 2860 /* Track dynamic relocs copied for this symbol. */
2861 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2862
b38cadfb
NC		 2863 /* ARM-specific PLT information. */
2864 struct arm_plt_info plt;
ba93b8ac
DJ		 2865
2866#define GOT_UNKNOWN 0
2867#define GOT_NORMAL 1
2868#define GOT_TLS_GD 2
2869#define GOT_TLS_IE 4
0855e32b
NS		 2870#define GOT_TLS_GDESC 8
2871#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2872 unsigned int tls_type : 8;
34e77a92 2873
b38cadfb
NC		 2874 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2875 unsigned int is_iplt : 1;
34e77a92 2876
b38cadfb 2877 unsigned int unused : 23;
a4fd1a8e 2878
b38cadfb
NC		 2879 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2880 starting at the end of the jump table. */
2881 bfd_vma tlsdesc_got;
0855e32b 2882
b38cadfb
NC		 2883 /* The symbol marking the real symbol location for exported thumb
2884 symbols with Arm stubs. */
2885 struct elf_link_hash_entry *export_glue;
906e58ca 2886
b38cadfb 2887 /* A pointer to the most recently used stub hash entry against this
8029a119 2888 symbol. */
b38cadfb
NC		 2889 struct elf32_arm_stub_hash_entry *stub_cache;
2890};
252b5132 2891
252b5132 2892/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2893#define elf32_arm_link_hash_traverse(table, func, info) \
2894 (elf_link_hash_traverse \
2895 (&(table)->root, \
b7693d02 2896 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2897 (info)))
2898
2899/* Get the ARM elf linker hash table from a link_info structure. */
2900#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2901 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2902 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2903
906e58ca
NC		 2904#define arm_stub_hash_lookup(table, string, create, copy) \
2905 ((struct elf32_arm_stub_hash_entry *) \
2906 bfd_hash_lookup ((table), (string), (create), (copy)))
2907
21d799b5
NC		 2908/* Array to keep track of which stub sections have been created, and
2909 information on stub grouping. */
2910struct map_stub
2911{
2912 /* This is the section to which stubs in the group will be
2913 attached. */
2914 asection *link_sec;
2915 /* The stub section. */
2916 asection *stub_sec;
2917};
2918
0855e32b
NS		 2919#define elf32_arm_compute_jump_table_size(htab) \
2920 ((htab)->next_tls_desc_index * 4)
2921
9b485d32 2922/* ARM ELF linker hash table. */
252b5132 2923struct elf32_arm_link_hash_table
906e58ca
NC		 2924{
2925 /* The main hash table. */
2926 struct elf_link_hash_table root;
252b5132 2927
906e58ca
NC		 2928 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2929 bfd_size_type thumb_glue_size;
252b5132 2930
906e58ca
NC		 2931 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2932 bfd_size_type arm_glue_size;
252b5132 2933
906e58ca
NC		 2934 /* The size in bytes of section containing the ARMv4 BX veneers. */
2935 bfd_size_type bx_glue_size;
845b51d6 2936
906e58ca
NC		 2937 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2938 veneer has been populated. */
2939 bfd_vma bx_glue_offset[15];
845b51d6 2940
906e58ca
NC		 2941 /* The size in bytes of the section containing glue for VFP11 erratum
2942 veneers. */
2943 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2944
48229727
JB		 2945 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2946 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2947 elf32_arm_write_section(). */
2948 struct a8_erratum_fix *a8_erratum_fixes;
2949 unsigned int num_a8_erratum_fixes;
2950
906e58ca
NC		 2951 /* An arbitrary input BFD chosen to hold the glue sections. */
2952 bfd * bfd_of_glue_owner;
ba96a88f 2953
906e58ca
NC		 2954 /* Nonzero to output a BE8 image. */
2955 int byteswap_code;
e489d0ae 2956
906e58ca
NC		 2957 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2958 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2959 int target1_is_rel;
9c504268 2960
906e58ca
NC		 2961 /* The relocation to use for R_ARM_TARGET2 relocations. */
2962 int target2_reloc;
eb043451 2963
906e58ca
NC		 2964 /* 0 = Ignore R_ARM_V4BX.
2965 1 = Convert BX to MOV PC.
2966 2 = Generate v4 interworing stubs. */
2967 int fix_v4bx;
319850b4 2968
48229727
JB		 2969 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2970 int fix_cortex_a8;
2971
2de70689
MGD		 2972 /* Whether we should fix the ARM1176 BLX immediate issue. */
2973 int fix_arm1176;
2974
906e58ca
NC		 2975 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2976 int use_blx;
33bfe774 2977
906e58ca
NC		 2978 /* What sort of code sequences we should look for which may trigger the
2979 VFP11 denorm erratum. */
2980 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2981
906e58ca
NC		 2982 /* Global counter for the number of fixes we have emitted. */
2983 int num_vfp11_fixes;
c7b8f16e 2984
906e58ca
NC		 2985 /* Nonzero to force PIC branch veneers. */
2986 int pic_veneer;
27e55c4d 2987
906e58ca
NC		 2988 /* The number of bytes in the initial entry in the PLT. */
2989 bfd_size_type plt_header_size;
e5a52504 2990
906e58ca
NC		 2991 /* The number of bytes in the subsequent PLT etries. */
2992 bfd_size_type plt_entry_size;
e5a52504 2993
906e58ca
NC		 2994 /* True if the target system is VxWorks. */
2995 int vxworks_p;
00a97672 2996
906e58ca
NC		 2997 /* True if the target system is Symbian OS. */
2998 int symbian_p;
e5a52504 2999
b38cadfb
NC		 3000 /* True if the target system is Native Client. */
3001 int nacl_p;
3002
906e58ca
NC		 3003 /* True if the target uses REL relocations. */
3004 int use_rel;
4e7fd91e 3005
0855e32b
NS		 3006 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3007 bfd_vma next_tls_desc_index;
3008
3009 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3010 bfd_vma num_tls_desc;
3011
906e58ca 3012 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 3013 asection *sdynbss;
3014 asection *srelbss;
5e681ec4 3015
906e58ca
NC		 3016 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3017 asection *srelplt2;
00a97672 3018
0855e32b
NS		 3019 /* The offset into splt of the PLT entry for the TLS descriptor
3020 resolver. Special values are 0, if not necessary (or not found
3021 to be necessary yet), and -1 if needed but not determined
3022 yet. */
3023 bfd_vma dt_tlsdesc_plt;
3024
3025 /* The offset into sgot of the GOT entry used by the PLT entry
3026 above. */
b38cadfb 3027 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 3028
3029 /* Offset in .plt section of tls_arm_trampoline. */
3030 bfd_vma tls_trampoline;
3031
906e58ca
NC		 3032 /* Data for R_ARM_TLS_LDM32 relocations. */
3033 union
3034 {
3035 bfd_signed_vma refcount;
3036 bfd_vma offset;
3037 } tls_ldm_got;
b7693d02 3038
87d72d41
AM		 3039 /* Small local sym cache. */
3040 struct sym_cache sym_cache;
906e58ca
NC		 3041
3042 /* For convenience in allocate_dynrelocs. */
3043 bfd * obfd;
3044
0855e32b
NS		 3045 /* The amount of space used by the reserved portion of the sgotplt
3046 section, plus whatever space is used by the jump slots. */
3047 bfd_vma sgotplt_jump_table_size;
3048
906e58ca
NC		 3049 /* The stub hash table. */
3050 struct bfd_hash_table stub_hash_table;
3051
3052 /* Linker stub bfd. */
3053 bfd *stub_bfd;
3054
3055 /* Linker call-backs. */
7a89b94e 3056 asection * (*add_stub_section) (const char *, asection *, unsigned int);
906e58ca
NC		 3057 void (*layout_sections_again) (void);
3058
3059 /* Array to keep track of which stub sections have been created, and
3060 information on stub grouping. */
21d799b5 3061 struct map_stub *stub_group;
906e58ca 3062
fe33d2fa
CL		 3063 /* Number of elements in stub_group. */
3064 int top_id;
3065
906e58ca
NC		 3066 /* Assorted information used by elf32_arm_size_stubs. */
3067 unsigned int bfd_count;
3068 int top_index;
3069 asection **input_list;
3070};
252b5132 3071
780a67af
NC		 3072/* Create an entry in an ARM ELF linker hash table. */
3073
3074static struct bfd_hash_entry *
57e8b36a 3075elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
99059e56
RM		 3076 struct bfd_hash_table * table,
3077 const char * string)
780a67af
NC		 3078{
3079 struct elf32_arm_link_hash_entry * ret =
3080 (struct elf32_arm_link_hash_entry *) entry;
3081
3082 /* Allocate the structure if it has not already been allocated by a
3083 subclass. */
906e58ca 3084 if (ret == NULL)
21d799b5 3085 ret = (struct elf32_arm_link_hash_entry *)
99059e56 3086 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3087 if (ret == NULL)
780a67af
NC		 3088 return (struct bfd_hash_entry *) ret;
3089
3090 /* Call the allocation method of the superclass. */
3091 ret = ((struct elf32_arm_link_hash_entry *)
3092 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3093 table, string));
57e8b36a 3094 if (ret != NULL)
b7693d02 3095 {
0bdcacaf 3096 ret->dyn_relocs = NULL;
ba93b8ac 3097 ret->tls_type = GOT_UNKNOWN;
0855e32b 3098 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3099 ret->plt.thumb_refcount = 0;
3100 ret->plt.maybe_thumb_refcount = 0;
3101 ret->plt.noncall_refcount = 0;
3102 ret->plt.got_offset = -1;
3103 ret->is_iplt = FALSE;
a4fd1a8e 3104 ret->export_glue = NULL;
906e58ca
NC		 3105
3106 ret->stub_cache = NULL;
b7693d02 3107 }
780a67af
NC		 3108
3109 return (struct bfd_hash_entry *) ret;
3110}
3111
34e77a92
RS		 3112/* Ensure that we have allocated bookkeeping structures for ABFD's local
3113 symbols. */
3114
3115static bfd_boolean
3116elf32_arm_allocate_local_sym_info (bfd *abfd)
3117{
3118 if (elf_local_got_refcounts (abfd) == NULL)
3119 {
3120 bfd_size_type num_syms;
3121 bfd_size_type size;
3122 char *data;
3123
3124 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3125 size = num_syms * (sizeof (bfd_signed_vma)
3126 + sizeof (struct arm_local_iplt_info *)
3127 + sizeof (bfd_vma)
3128 + sizeof (char));
3129 data = bfd_zalloc (abfd, size);
3130 if (data == NULL)
3131 return FALSE;
3132
3133 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3134 data += num_syms * sizeof (bfd_signed_vma);
3135
3136 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3137 data += num_syms * sizeof (struct arm_local_iplt_info *);
3138
3139 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3140 data += num_syms * sizeof (bfd_vma);
3141
3142 elf32_arm_local_got_tls_type (abfd) = data;
3143 }
3144 return TRUE;
3145}
3146
3147/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3148 to input bfd ABFD. Create the information if it doesn't already exist.
3149 Return null if an allocation fails. */
3150
3151static struct arm_local_iplt_info *
3152elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3153{
3154 struct arm_local_iplt_info **ptr;
3155
3156 if (!elf32_arm_allocate_local_sym_info (abfd))
3157 return NULL;
3158
3159 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3160 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3161 if (*ptr == NULL)
3162 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3163 return *ptr;
3164}
3165
3166/* Try to obtain PLT information for the symbol with index R_SYMNDX
3167 in ABFD's symbol table. If the symbol is global, H points to its
3168 hash table entry, otherwise H is null.
3169
3170 Return true if the symbol does have PLT information. When returning
3171 true, point *ROOT_PLT at the target-independent reference count/offset
3172 union and *ARM_PLT at the ARM-specific information. */
3173
3174static bfd_boolean
3175elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3176 unsigned long r_symndx, union gotplt_union **root_plt,
3177 struct arm_plt_info **arm_plt)
3178{
3179 struct arm_local_iplt_info *local_iplt;
3180
3181 if (h != NULL)
3182 {
3183 *root_plt = &h->root.plt;
3184 *arm_plt = &h->plt;
3185 return TRUE;
3186 }
3187
3188 if (elf32_arm_local_iplt (abfd) == NULL)
3189 return FALSE;
3190
3191 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3192 if (local_iplt == NULL)
3193 return FALSE;
3194
3195 *root_plt = &local_iplt->root;
3196 *arm_plt = &local_iplt->arm;
3197 return TRUE;
3198}
3199
3200/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3201 before it. */
3202
3203static bfd_boolean
3204elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3205 struct arm_plt_info *arm_plt)
3206{
3207 struct elf32_arm_link_hash_table *htab;
3208
3209 htab = elf32_arm_hash_table (info);
3210 return (arm_plt->thumb_refcount != 0
3211 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3212}
3213
3214/* Return a pointer to the head of the dynamic reloc list that should
3215 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3216 ABFD's symbol table. Return null if an error occurs. */
3217
3218static struct elf_dyn_relocs **
3219elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3220 Elf_Internal_Sym *isym)
3221{
3222 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3223 {
3224 struct arm_local_iplt_info *local_iplt;
3225
3226 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3227 if (local_iplt == NULL)
3228 return NULL;
3229 return &local_iplt->dyn_relocs;
3230 }
3231 else
3232 {
3233 /* Track dynamic relocs needed for local syms too.
3234 We really need local syms available to do this
3235 easily. Oh well. */
3236 asection *s;
3237 void *vpp;
3238
3239 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3240 if (s == NULL)
3241 abort ();
3242
3243 vpp = &elf_section_data (s)->local_dynrel;
3244 return (struct elf_dyn_relocs **) vpp;
3245 }
3246}
3247
906e58ca
NC		 3248/* Initialize an entry in the stub hash table. */
3249
3250static struct bfd_hash_entry *
3251stub_hash_newfunc (struct bfd_hash_entry *entry,
3252 struct bfd_hash_table *table,
3253 const char *string)
3254{
3255 /* Allocate the structure if it has not already been allocated by a
3256 subclass. */
3257 if (entry == NULL)
3258 {
21d799b5 3259 entry = (struct bfd_hash_entry *)
99059e56 3260 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3261 if (entry == NULL)
3262 return entry;
3263 }
3264
3265 /* Call the allocation method of the superclass. */
3266 entry = bfd_hash_newfunc (entry, table, string);
3267 if (entry != NULL)
3268 {
3269 struct elf32_arm_stub_hash_entry *eh;
3270
3271 /* Initialize the local fields. */
3272 eh = (struct elf32_arm_stub_hash_entry *) entry;
3273 eh->stub_sec = NULL;
3274 eh->stub_offset = 0;
3275 eh->target_value = 0;
3276 eh->target_section = NULL;
cedfb179
DK		 3277 eh->target_addend = 0;
3278 eh->orig_insn = 0;
906e58ca 3279 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3280 eh->stub_size = 0;
3281 eh->stub_template = NULL;
3282 eh->stub_template_size = 0;
906e58ca
NC		 3283 eh->h = NULL;
3284 eh->id_sec = NULL;
d8d2f433 3285 eh->output_name = NULL;
906e58ca
NC		 3286 }
3287
3288 return entry;
3289}
3290
00a97672 3291/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3292 shortcuts to them in our hash table. */
3293
3294static bfd_boolean
57e8b36a 3295create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3296{
3297 struct elf32_arm_link_hash_table *htab;
3298
e5a52504 3299 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3300 if (htab == NULL)
3301 return FALSE;
3302
e5a52504
MM		 3303 /* BPABI objects never have a GOT, or associated sections. */
3304 if (htab->symbian_p)
3305 return TRUE;
3306
5e681ec4
PB		 3307 if (! _bfd_elf_create_got_section (dynobj, info))
3308 return FALSE;
3309
5e681ec4
PB		 3310 return TRUE;
3311}
3312
34e77a92
RS		 3313/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3314
3315static bfd_boolean
3316create_ifunc_sections (struct bfd_link_info *info)
3317{
3318 struct elf32_arm_link_hash_table *htab;
3319 const struct elf_backend_data *bed;
3320 bfd *dynobj;
3321 asection *s;
3322 flagword flags;
b38cadfb 3323
34e77a92
RS		 3324 htab = elf32_arm_hash_table (info);
3325 dynobj = htab->root.dynobj;
3326 bed = get_elf_backend_data (dynobj);
3327 flags = bed->dynamic_sec_flags;
3328
3329 if (htab->root.iplt == NULL)
3330 {
3d4d4302
AM		 3331 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3332 flags | SEC_READONLY | SEC_CODE);
34e77a92 3333 if (s == NULL
a0f49396 3334 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3335 return FALSE;
3336 htab->root.iplt = s;
3337 }
3338
3339 if (htab->root.irelplt == NULL)
3340 {
3d4d4302
AM		 3341 s = bfd_make_section_anyway_with_flags (dynobj,
3342 RELOC_SECTION (htab, ".iplt"),
3343 flags | SEC_READONLY);
34e77a92 3344 if (s == NULL
a0f49396 3345 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3346 return FALSE;
3347 htab->root.irelplt = s;
3348 }
3349
3350 if (htab->root.igotplt == NULL)
3351 {
3d4d4302 3352 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3353 if (s == NULL
3354 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3355 return FALSE;
3356 htab->root.igotplt = s;
3357 }
3358 return TRUE;
3359}
3360
eed94f8f
NC		 3361/* Determine if we're dealing with a Thumb only architecture. */
3362
3363static bfd_boolean
3364using_thumb_only (struct elf32_arm_link_hash_table *globals)
3365{
3366 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3367 Tag_CPU_arch);
3368 int profile;
3369
3370 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3371 return TRUE;
3372
3373 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3374 return FALSE;
3375
3376 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3377 Tag_CPU_arch_profile);
3378
3379 return profile == 'M';
3380}
3381
3382/* Determine if we're dealing with a Thumb-2 object. */
3383
3384static bfd_boolean
3385using_thumb2 (struct elf32_arm_link_hash_table *globals)
3386{
3387 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3388 Tag_CPU_arch);
3389 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3390}
3391
00a97672
RS		 3392/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3393 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3394 hash table. */
3395
3396static bfd_boolean
57e8b36a 3397elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3398{
3399 struct elf32_arm_link_hash_table *htab;
3400
3401 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3402 if (htab == NULL)
3403 return FALSE;
3404
362d30a1 3405 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3406 return FALSE;
3407
3408 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3409 return FALSE;
3410
3d4d4302 3411 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3412 if (!info->shared)
3d4d4302
AM		 3413 htab->srelbss = bfd_get_linker_section (dynobj,
3414 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3415
3416 if (htab->vxworks_p)
3417 {
3418 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3419 return FALSE;
3420
3421 if (info->shared)
3422 {
3423 htab->plt_header_size = 0;
3424 htab->plt_entry_size
3425 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3426 }
3427 else
3428 {
3429 htab->plt_header_size
3430 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3431 htab->plt_entry_size
3432 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3433 }
3434 }
eed94f8f
NC		 3435 else
3436 {
3437 /* PR ld/16017
3438 Test for thumb only architectures. Note - we cannot just call
3439 using_thumb_only() as the attributes in the output bfd have not been
3440 initialised at this point, so instead we use the input bfd. */
3441 bfd * saved_obfd = htab->obfd;
3442
3443 htab->obfd = dynobj;
3444 if (using_thumb_only (htab))
3445 {
3446 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3447 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3448 }
3449 htab->obfd = saved_obfd;
3450 }
5e681ec4 3451
362d30a1
RS		 3452 if (!htab->root.splt
3453 || !htab->root.srelplt
e5a52504 3454 || !htab->sdynbss
5e681ec4
PB		 3455 || (!info->shared && !htab->srelbss))
3456 abort ();
3457
3458 return TRUE;
3459}
3460
906e58ca
NC		 3461/* Copy the extra info we tack onto an elf_link_hash_entry. */
3462
3463static void
3464elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3465 struct elf_link_hash_entry *dir,
3466 struct elf_link_hash_entry *ind)
3467{
3468 struct elf32_arm_link_hash_entry *edir, *eind;
3469
3470 edir = (struct elf32_arm_link_hash_entry *) dir;
3471 eind = (struct elf32_arm_link_hash_entry *) ind;
3472
0bdcacaf 3473 if (eind->dyn_relocs != NULL)
906e58ca 3474 {
0bdcacaf 3475 if (edir->dyn_relocs != NULL)
906e58ca 3476 {
0bdcacaf
RS		 3477 struct elf_dyn_relocs **pp;
3478 struct elf_dyn_relocs *p;
906e58ca
NC		 3479
3480 /* Add reloc counts against the indirect sym to the direct sym
3481 list. Merge any entries against the same section. */
0bdcacaf 3482 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3483 {
0bdcacaf 3484 struct elf_dyn_relocs *q;
906e58ca 3485
0bdcacaf
RS		 3486 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3487 if (q->sec == p->sec)
906e58ca
NC		 3488 {
3489 q->pc_count += p->pc_count;
3490 q->count += p->count;
3491 *pp = p->next;
3492 break;
3493 }
3494 if (q == NULL)
3495 pp = &p->next;
3496 }
0bdcacaf 3497 *pp = edir->dyn_relocs;
906e58ca
NC		 3498 }
3499
0bdcacaf
RS		 3500 edir->dyn_relocs = eind->dyn_relocs;
3501 eind->dyn_relocs = NULL;
906e58ca
NC		 3502 }
3503
3504 if (ind->root.type == bfd_link_hash_indirect)
3505 {
3506 /* Copy over PLT info. */
34e77a92
RS		 3507 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3508 eind->plt.thumb_refcount = 0;
3509 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3510 eind->plt.maybe_thumb_refcount = 0;
3511 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3512 eind->plt.noncall_refcount = 0;
3513
3514 /* We should only allocate a function to .iplt once the final
3515 symbol information is known. */
3516 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3517
3518 if (dir->got.refcount <= 0)
3519 {
3520 edir->tls_type = eind->tls_type;
3521 eind->tls_type = GOT_UNKNOWN;
3522 }
3523 }
3524
3525 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3526}
3527
68faa637
AM		 3528/* Destroy an ARM elf linker hash table. */
3529
3530static void
d495ab0d 3531elf32_arm_link_hash_table_free (bfd *obfd)
68faa637
AM		 3532{
3533 struct elf32_arm_link_hash_table *ret
d495ab0d 3534 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
68faa637
AM		 3535
3536 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3537 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM		 3538}
3539
906e58ca
NC		 3540/* Create an ARM elf linker hash table. */
3541
3542static struct bfd_link_hash_table *
3543elf32_arm_link_hash_table_create (bfd *abfd)
3544{
3545 struct elf32_arm_link_hash_table *ret;
3546 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3547
7bf52ea2 3548 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3549 if (ret == NULL)
3550 return NULL;
3551
3552 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3553 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3554 sizeof (struct elf32_arm_link_hash_entry),
3555 ARM_ELF_DATA))
906e58ca
NC		 3556 {
3557 free (ret);
3558 return NULL;
3559 }
3560
906e58ca 3561 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3562#ifdef FOUR_WORD_PLT
3563 ret->plt_header_size = 16;
3564 ret->plt_entry_size = 16;
3565#else
3566 ret->plt_header_size = 20;
1db37fe6 3567 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
906e58ca 3568#endif
906e58ca 3569 ret->use_rel = 1;
906e58ca 3570 ret->obfd = abfd;
906e58ca
NC		 3571
3572 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3573 sizeof (struct elf32_arm_stub_hash_entry)))
3574 {
d495ab0d 3575 _bfd_elf_link_hash_table_free (abfd);
906e58ca
NC		 3576 return NULL;
3577 }
d495ab0d 3578 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
906e58ca
NC		 3579
3580 return &ret->root.root;
3581}
3582
cd1dac3d
DG		 3583/* Determine what kind of NOPs are available. */
3584
3585static bfd_boolean
3586arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3587{
3588 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3589 Tag_CPU_arch);
3590 return arch == TAG_CPU_ARCH_V6T2
3591 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3592 || arch == TAG_CPU_ARCH_V7
3593 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3594}
3595
3596static bfd_boolean
3597arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3598{
3599 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3600 Tag_CPU_arch);
9e3c6df6
PB		 3601 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3602 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3603}
3604
f4ac8484
DJ		 3605static bfd_boolean
3606arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3607{
3608 switch (stub_type)
3609 {
fea2b4d6
CL		 3610 case arm_stub_long_branch_thumb_only:
3611 case arm_stub_long_branch_v4t_thumb_arm:
3612 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3613 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3614 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3615 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3616 return TRUE;
3617 case arm_stub_none:
3618 BFD_FAIL ();
3619 return FALSE;
3620 break;
3621 default:
3622 return FALSE;
3623 }
3624}
3625
906e58ca
NC		 3626/* Determine the type of stub needed, if any, for a call. */
3627
3628static enum elf32_arm_stub_type
3629arm_type_of_stub (struct bfd_link_info *info,
3630 asection *input_sec,
3631 const Elf_Internal_Rela *rel,
34e77a92 3632 unsigned char st_type,
35fc36a8 3633 enum arm_st_branch_type *actual_branch_type,
906e58ca 3634 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3635 bfd_vma destination,
3636 asection *sym_sec,
3637 bfd *input_bfd,
3638 const char *name)
906e58ca
NC		 3639{
3640 bfd_vma location;
3641 bfd_signed_vma branch_offset;
3642 unsigned int r_type;
3643 struct elf32_arm_link_hash_table * globals;
3644 int thumb2;
3645 int thumb_only;
3646 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3647 int use_plt = 0;
35fc36a8 3648 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3649 union gotplt_union *root_plt;
3650 struct arm_plt_info *arm_plt;
906e58ca 3651
35fc36a8 3652 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3653 return stub_type;
3654
906e58ca 3655 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3656 if (globals == NULL)
3657 return stub_type;
906e58ca
NC		 3658
3659 thumb_only = using_thumb_only (globals);
3660
3661 thumb2 = using_thumb2 (globals);
3662
3663 /* Determine where the call point is. */
3664 location = (input_sec->output_offset
3665 + input_sec->output_section->vma
3666 + rel->r_offset);
3667
906e58ca
NC		 3668 r_type = ELF32_R_TYPE (rel->r_info);
3669
39f21624
NC		 3670 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3671 are considering a function call relocation. */
c5423981
TG		 3672 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3673 || r_type == R_ARM_THM_JUMP19)
39f21624
NC		 3674 && branch_type == ST_BRANCH_TO_ARM)
3675 branch_type = ST_BRANCH_TO_THUMB;
3676
34e77a92
RS		 3677 /* For TLS call relocs, it is the caller's responsibility to provide
3678 the address of the appropriate trampoline. */
3679 if (r_type != R_ARM_TLS_CALL
3680 && r_type != R_ARM_THM_TLS_CALL
3681 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3682 &root_plt, &arm_plt)
3683 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3684 {
34e77a92 3685 asection *splt;
fe33d2fa 3686
34e77a92
RS		 3687 if (hash == NULL || hash->is_iplt)
3688 splt = globals->root.iplt;
3689 else
3690 splt = globals->root.splt;
3691 if (splt != NULL)
b38cadfb 3692 {
34e77a92
RS		 3693 use_plt = 1;
3694
3695 /* Note when dealing with PLT entries: the main PLT stub is in
3696 ARM mode, so if the branch is in Thumb mode, another
3697 Thumb->ARM stub will be inserted later just before the ARM
3698 PLT stub. We don't take this extra distance into account
3699 here, because if a long branch stub is needed, we'll add a
3700 Thumb->Arm one and branch directly to the ARM PLT entry
3701 because it avoids spreading offset corrections in several
3702 places. */
3703
3704 destination = (splt->output_section->vma
3705 + splt->output_offset
3706 + root_plt->offset);
3707 st_type = STT_FUNC;
3708 branch_type = ST_BRANCH_TO_ARM;
3709 }
5fa9e92f 3710 }
34e77a92
RS		 3711 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3712 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3713
fe33d2fa
CL		 3714 branch_offset = (bfd_signed_vma)(destination - location);
3715
0855e32b 3716 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
c5423981 3717 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
906e58ca 3718 {
5fa9e92f
CL		 3719 /* Handle cases where:
3720 - this call goes too far (different Thumb/Thumb2 max
99059e56 3721 distance)
155d87d7 3722 - it's a Thumb->Arm call and blx is not available, or it's a
99059e56
RM		 3723 Thumb->Arm branch (not bl). A stub is needed in this case,
3724 but only if this call is not through a PLT entry. Indeed,
3725 PLT stubs handle mode switching already.
5fa9e92f 3726 */
906e58ca
NC		 3727 if ((!thumb2
3728 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3729 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3730 || (thumb2
3731 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3732 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
c5423981
TG		 3733 || (thumb2
3734 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3735 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3736 && (r_type == R_ARM_THM_JUMP19))
35fc36a8 3737 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3738 && (((r_type == R_ARM_THM_CALL
3739 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
c5423981
TG		 3740 || (r_type == R_ARM_THM_JUMP24)
3741 || (r_type == R_ARM_THM_JUMP19))
5fa9e92f 3742 && !use_plt))
906e58ca 3743 {
35fc36a8 3744 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3745 {
3746 /* Thumb to thumb. */
3747 if (!thumb_only)
3748 {
3749 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3750 /* PIC stubs. */
155d87d7 3751 ? ((globals->use_blx
9553db3c 3752 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3753 /* V5T and above. Stub starts with ARM code, so
3754 we must be able to switch mode before
3755 reaching it, which is only possible for 'bl'
3756 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3757 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3758 /* On V4T, use Thumb code only. */
d3626fb0 3759 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3760
3761 /* non-PIC stubs. */
155d87d7 3762 : ((globals->use_blx
9553db3c 3763 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3764 /* V5T and above. */
3765 ? arm_stub_long_branch_any_any
3766 /* V4T. */
d3626fb0 3767 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3768 }
3769 else
3770 {
3771 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3772 /* PIC stub. */
3773 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3774 /* non-PIC stub. */
3775 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3776 }
3777 }
3778 else
3779 {
3780 /* Thumb to arm. */
c820be07
NC		 3781 if (sym_sec != NULL
3782 && sym_sec->owner != NULL
3783 && !INTERWORK_FLAG (sym_sec->owner))
3784 {
3785 (*_bfd_error_handler)
3786 (_("%B(%s): warning: interworking not enabled.\n"
3787 " first occurrence: %B: Thumb call to ARM"),
3788 sym_sec->owner, input_bfd, name);
3789 }
3790
0855e32b
NS		 3791 stub_type =
3792 (info->shared | globals->pic_veneer)
c2b4a39d 3793 /* PIC stubs. */
0855e32b 3794 ? (r_type == R_ARM_THM_TLS_CALL
6a631e86 3795 /* TLS PIC stubs. */
0855e32b
NS		 3796 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3797 : arm_stub_long_branch_v4t_thumb_tls_pic)
3798 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3799 /* V5T PIC and above. */
3800 ? arm_stub_long_branch_any_arm_pic
3801 /* V4T PIC stub. */
3802 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3803
3804 /* non-PIC stubs. */
0855e32b 3805 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3806 /* V5T and above. */
3807 ? arm_stub_long_branch_any_any
3808 /* V4T. */
3809 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3810
3811 /* Handle v4t short branches. */
fea2b4d6 3812 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3813 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3814 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3815 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3816 }
3817 }
3818 }
fe33d2fa
CL		 3819 else if (r_type == R_ARM_CALL
3820 || r_type == R_ARM_JUMP24
0855e32b
NS		 3821 || r_type == R_ARM_PLT32
3822 || r_type == R_ARM_TLS_CALL)
906e58ca 3823 {
35fc36a8 3824 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3825 {
3826 /* Arm to thumb. */
c820be07
NC		 3827
3828 if (sym_sec != NULL
3829 && sym_sec->owner != NULL
3830 && !INTERWORK_FLAG (sym_sec->owner))
3831 {
3832 (*_bfd_error_handler)
3833 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3834 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3835 sym_sec->owner, input_bfd, name);
3836 }
3837
3838 /* We have an extra 2-bytes reach because of
3839 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3840 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3841 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3842 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3843 || (r_type == R_ARM_JUMP24)
3844 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3845 {
3846 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3847 /* PIC stubs. */
ebe24dd4
CL		 3848 ? ((globals->use_blx)
3849 /* V5T and above. */
3850 ? arm_stub_long_branch_any_thumb_pic
3851 /* V4T stub. */
3852 : arm_stub_long_branch_v4t_arm_thumb_pic)
3853
c2b4a39d
CL		 3854 /* non-PIC stubs. */
3855 : ((globals->use_blx)
3856 /* V5T and above. */
3857 ? arm_stub_long_branch_any_any
3858 /* V4T. */
3859 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3860 }
3861 }
3862 else
3863 {
3864 /* Arm to arm. */
3865 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3866 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3867 {
0855e32b
NS		 3868 stub_type =
3869 (info->shared | globals->pic_veneer)
c2b4a39d 3870 /* PIC stubs. */
0855e32b 3871 ? (r_type == R_ARM_TLS_CALL
6a631e86 3872 /* TLS PIC Stub. */
0855e32b 3873 ? arm_stub_long_branch_any_tls_pic
7a89b94e
NC		 3874 : (globals->nacl_p
3875 ? arm_stub_long_branch_arm_nacl_pic
3876 : arm_stub_long_branch_any_arm_pic))
c2b4a39d 3877 /* non-PIC stubs. */
7a89b94e
NC		 3878 : (globals->nacl_p
3879 ? arm_stub_long_branch_arm_nacl
3880 : arm_stub_long_branch_any_any);
906e58ca
NC		 3881 }
3882 }
3883 }
3884
fe33d2fa
CL		 3885 /* If a stub is needed, record the actual destination type. */
3886 if (stub_type != arm_stub_none)
35fc36a8 3887 *actual_branch_type = branch_type;
fe33d2fa 3888
906e58ca
NC		 3889 return stub_type;
3890}
3891
3892/* Build a name for an entry in the stub hash table. */
3893
3894static char *
3895elf32_arm_stub_name (const asection *input_section,
3896 const asection *sym_sec,
3897 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3898 const Elf_Internal_Rela *rel,
3899 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3900{
3901 char *stub_name;
3902 bfd_size_type len;
3903
3904 if (hash)
3905 {
fe33d2fa 3906 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3907 stub_name = (char *) bfd_malloc (len);
906e58ca 3908 if (stub_name != NULL)
fe33d2fa 3909 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3910 input_section->id & 0xffffffff,
3911 hash->root.root.root.string,
fe33d2fa
CL		 3912 (int) rel->r_addend & 0xffffffff,
3913 (int) stub_type);
906e58ca
NC		 3914 }
3915 else
3916 {
fe33d2fa 3917 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3918 stub_name = (char *) bfd_malloc (len);
906e58ca 3919 if (stub_name != NULL)
fe33d2fa 3920 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3921 input_section->id & 0xffffffff,
3922 sym_sec->id & 0xffffffff,
0855e32b
NS		 3923 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3924 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3925 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3926 (int) rel->r_addend & 0xffffffff,
3927 (int) stub_type);
906e58ca
NC		 3928 }
3929
3930 return stub_name;
3931}
3932
3933/* Look up an entry in the stub hash. Stub entries are cached because
3934 creating the stub name takes a bit of time. */
3935
3936static struct elf32_arm_stub_hash_entry *
3937elf32_arm_get_stub_entry (const asection *input_section,
3938 const asection *sym_sec,
3939 struct elf_link_hash_entry *hash,
3940 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3941 struct elf32_arm_link_hash_table *htab,
3942 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3943{
3944 struct elf32_arm_stub_hash_entry *stub_entry;
3945 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3946 const asection *id_sec;
3947
3948 if ((input_section->flags & SEC_CODE) == 0)
3949 return NULL;
3950
3951 /* If this input section is part of a group of sections sharing one
3952 stub section, then use the id of the first section in the group.
3953 Stub names need to include a section id, as there may well be
3954 more than one stub used to reach say, printf, and we need to
3955 distinguish between them. */
3956 id_sec = htab->stub_group[input_section->id].link_sec;
3957
3958 if (h != NULL && h->stub_cache != NULL
3959 && h->stub_cache->h == h
fe33d2fa
CL		 3960 && h->stub_cache->id_sec == id_sec
3961 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3962 {
3963 stub_entry = h->stub_cache;
3964 }
3965 else
3966 {
3967 char *stub_name;
3968
fe33d2fa 3969 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3970 if (stub_name == NULL)
3971 return NULL;
3972
3973 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3974 stub_name, FALSE, FALSE);
3975 if (h != NULL)
3976 h->stub_cache = stub_entry;
3977
3978 free (stub_name);
3979 }
3980
3981 return stub_entry;
3982}
3983
48229727 3984/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3985 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3986 LINK_SEC_P may be NULL. */
906e58ca 3987
48229727
JB		 3988static asection *
3989elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3990 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3991{
3992 asection *link_sec;
3993 asection *stub_sec;
906e58ca
NC		 3994
3995 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3996 BFD_ASSERT (link_sec != NULL);
906e58ca 3997 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3998
906e58ca
NC		 3999 if (stub_sec == NULL)
4000 {
4001 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4002 if (stub_sec == NULL)
4003 {
4004 size_t namelen;
4005 bfd_size_type len;
4006 char *s_name;
4007
4008 namelen = strlen (link_sec->name);
4009 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 4010 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 4011 if (s_name == NULL)
4012 return NULL;
4013
4014 memcpy (s_name, link_sec->name, namelen);
4015 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
7a89b94e
NC		 4016 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4017 htab->nacl_p ? 4 : 3);
906e58ca
NC		 4018 if (stub_sec == NULL)
4019 return NULL;
4020 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4021 }
4022 htab->stub_group[section->id].stub_sec = stub_sec;
4023 }
b38cadfb 4024
48229727
JB		 4025 if (link_sec_p)
4026 *link_sec_p = link_sec;
b38cadfb 4027
48229727
JB		 4028 return stub_sec;
4029}
4030
4031/* Add a new stub entry to the stub hash. Not all fields of the new
4032 stub entry are initialised. */
4033
4034static struct elf32_arm_stub_hash_entry *
4035elf32_arm_add_stub (const char *stub_name,
4036 asection *section,
4037 struct elf32_arm_link_hash_table *htab)
4038{
4039 asection *link_sec;
4040 asection *stub_sec;
4041 struct elf32_arm_stub_hash_entry *stub_entry;
4042
4043 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4044 if (stub_sec == NULL)
4045 return NULL;
906e58ca
NC		 4046
4047 /* Enter this entry into the linker stub hash table. */
4048 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4049 TRUE, FALSE);
4050 if (stub_entry == NULL)
4051 {
4052 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4053 section->owner,
4054 stub_name);
4055 return NULL;
4056 }
4057
4058 stub_entry->stub_sec = stub_sec;
4059 stub_entry->stub_offset = 0;
4060 stub_entry->id_sec = link_sec;
4061
906e58ca
NC		 4062 return stub_entry;
4063}
4064
4065/* Store an Arm insn into an output section not processed by
4066 elf32_arm_write_section. */
4067
4068static void
8029a119
NC		 4069put_arm_insn (struct elf32_arm_link_hash_table * htab,
4070 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4071{
4072 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4073 bfd_putl32 (val, ptr);
4074 else
4075 bfd_putb32 (val, ptr);
4076}
4077
4078/* Store a 16-bit Thumb insn into an output section not processed by
4079 elf32_arm_write_section. */
4080
4081static void
8029a119
NC		 4082put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4083 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4084{
4085 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4086 bfd_putl16 (val, ptr);
4087 else
4088 bfd_putb16 (val, ptr);
4089}
4090
0855e32b
NS		 4091/* If it's possible to change R_TYPE to a more efficient access
4092 model, return the new reloc type. */
4093
4094static unsigned
b38cadfb 4095elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4096 struct elf_link_hash_entry *h)
4097{
4098 int is_local = (h == NULL);
4099
4100 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4101 return r_type;
4102
b38cadfb 4103 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4104 switch (r_type)
4105 {
4106 case R_ARM_TLS_GOTDESC:
4107 case R_ARM_TLS_CALL:
4108 case R_ARM_THM_TLS_CALL:
4109 case R_ARM_TLS_DESCSEQ:
4110 case R_ARM_THM_TLS_DESCSEQ:
4111 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4112 }
4113
4114 return r_type;
4115}
4116
48229727
JB		 4117static bfd_reloc_status_type elf32_arm_final_link_relocate
4118 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4119 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4120 const char *, unsigned char, enum arm_st_branch_type,
4121 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4122
4563a860
JB		 4123static unsigned int
4124arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4125{
4126 switch (stub_type)
4127 {
4128 case arm_stub_a8_veneer_b_cond:
4129 case arm_stub_a8_veneer_b:
4130 case arm_stub_a8_veneer_bl:
4131 return 2;
4132
4133 case arm_stub_long_branch_any_any:
4134 case arm_stub_long_branch_v4t_arm_thumb:
4135 case arm_stub_long_branch_thumb_only:
4136 case arm_stub_long_branch_v4t_thumb_thumb:
4137 case arm_stub_long_branch_v4t_thumb_arm:
4138 case arm_stub_short_branch_v4t_thumb_arm:
4139 case arm_stub_long_branch_any_arm_pic:
4140 case arm_stub_long_branch_any_thumb_pic:
4141 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4142 case arm_stub_long_branch_v4t_arm_thumb_pic:
4143 case arm_stub_long_branch_v4t_thumb_arm_pic:
4144 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4145 case arm_stub_long_branch_any_tls_pic:
4146 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4147 case arm_stub_a8_veneer_blx:
4148 return 4;
b38cadfb 4149
7a89b94e
NC		 4150 case arm_stub_long_branch_arm_nacl:
4151 case arm_stub_long_branch_arm_nacl_pic:
4152 return 16;
4153
4563a860
JB		 4154 default:
4155 abort (); /* Should be unreachable. */
4156 }
4157}
4158
906e58ca
NC		 4159static bfd_boolean
4160arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4161 void * in_arg)
4162{
7a89b94e 4163#define MAXRELOCS 3
906e58ca 4164 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4165 struct elf32_arm_link_hash_table *globals;
906e58ca 4166 struct bfd_link_info *info;
906e58ca
NC		 4167 asection *stub_sec;
4168 bfd *stub_bfd;
906e58ca
NC		 4169 bfd_byte *loc;
4170 bfd_vma sym_value;
4171 int template_size;
4172 int size;
d3ce72d0 4173 const insn_sequence *template_sequence;
906e58ca 4174 int i;
48229727
JB		 4175 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4176 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4177 int nrelocs = 0;
906e58ca
NC		 4178
4179 /* Massage our args to the form they really have. */
4180 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4181 info = (struct bfd_link_info *) in_arg;
4182
4183 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4184 if (globals == NULL)
4185 return FALSE;
906e58ca 4186
906e58ca
NC		 4187 stub_sec = stub_entry->stub_sec;
4188
4dfe6ac6 4189 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4190 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4191 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4192 return TRUE;
fe33d2fa 4193
906e58ca
NC		 4194 /* Make a note of the offset within the stubs for this entry. */
4195 stub_entry->stub_offset = stub_sec->size;
4196 loc = stub_sec->contents + stub_entry->stub_offset;
4197
4198 stub_bfd = stub_sec->owner;
4199
906e58ca
NC		 4200 /* This is the address of the stub destination. */
4201 sym_value = (stub_entry->target_value
4202 + stub_entry->target_section->output_offset
4203 + stub_entry->target_section->output_section->vma);
4204
d3ce72d0 4205 template_sequence = stub_entry->stub_template;
461a49ca 4206 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4207
4208 size = 0;
461a49ca 4209 for (i = 0; i < template_size; i++)
906e58ca 4210 {
d3ce72d0 4211 switch (template_sequence[i].type)
461a49ca
DJ		 4212 {
4213 case THUMB16_TYPE:
48229727 4214 {
d3ce72d0
NC		 4215 bfd_vma data = (bfd_vma) template_sequence[i].data;
4216 if (template_sequence[i].reloc_addend != 0)
48229727 4217 {
99059e56
RM		 4218 /* We've borrowed the reloc_addend field to mean we should
4219 insert a condition code into this (Thumb-1 branch)
4220 instruction. See THUMB16_BCOND_INSN. */
4221 BFD_ASSERT ((data & 0xff00) == 0xd000);
4222 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
48229727 4223 }
fe33d2fa 4224 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4225 size += 2;
4226 }
461a49ca 4227 break;
906e58ca 4228
48229727 4229 case THUMB32_TYPE:
fe33d2fa
CL		 4230 bfd_put_16 (stub_bfd,
4231 (template_sequence[i].data >> 16) & 0xffff,
4232 loc + size);
4233 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4234 loc + size + 2);
99059e56
RM		 4235 if (template_sequence[i].r_type != R_ARM_NONE)
4236 {
4237 stub_reloc_idx[nrelocs] = i;
4238 stub_reloc_offset[nrelocs++] = size;
4239 }
4240 size += 4;
4241 break;
48229727 4242
461a49ca 4243 case ARM_TYPE:
fe33d2fa
CL		 4244 bfd_put_32 (stub_bfd, template_sequence[i].data,
4245 loc + size);
461a49ca
DJ		 4246 /* Handle cases where the target is encoded within the
4247 instruction. */
d3ce72d0 4248 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4249 {
48229727
JB		 4250 stub_reloc_idx[nrelocs] = i;
4251 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4252 }
4253 size += 4;
4254 break;
4255
4256 case DATA_TYPE:
d3ce72d0 4257 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4258 stub_reloc_idx[nrelocs] = i;
4259 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4260 size += 4;
4261 break;
4262
4263 default:
4264 BFD_FAIL ();
4265 return FALSE;
4266 }
906e58ca 4267 }
461a49ca 4268
906e58ca
NC		 4269 stub_sec->size += size;
4270
461a49ca
DJ		 4271 /* Stub size has already been computed in arm_size_one_stub. Check
4272 consistency. */
4273 BFD_ASSERT (size == stub_entry->stub_size);
4274
906e58ca 4275 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4276 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4277 sym_value |= 1;
4278
48229727
JB		 4279 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4280 in each stub. */
4281 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4282
48229727 4283 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4284 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4285 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4286 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4287 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4288 {
4289 Elf_Internal_Rela rel;
4290 bfd_boolean unresolved_reloc;
4291 char *error_message;
35fc36a8
RS		 4292 enum arm_st_branch_type branch_type
4293 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4294 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4295 bfd_vma points_to = sym_value + stub_entry->target_addend;
4296
4297 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0 4298 rel.r_info = ELF32_R_INFO (0,
99059e56 4299 template_sequence[stub_reloc_idx[i]].r_type);
d3ce72d0 4300 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4301
4302 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4303 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4304 template should refer back to the instruction after the original
4305 branch. */
4306 points_to = sym_value;
4307
33c6a8fc
JB		 4308 /* There may be unintended consequences if this is not true. */
4309 BFD_ASSERT (stub_entry->h == NULL);
4310
48229727
JB		 4311 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4312 properly. We should probably use this function unconditionally,
4313 rather than only for certain relocations listed in the enclosing
4314 conditional, for the sake of consistency. */
4315 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4316 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4317 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4318 points_to, info, stub_entry->target_section, "", STT_FUNC,
4319 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4320 &unresolved_reloc, &error_message);
48229727
JB		 4321 }
4322 else
4323 {
fe33d2fa
CL		 4324 Elf_Internal_Rela rel;
4325 bfd_boolean unresolved_reloc;
4326 char *error_message;
4327 bfd_vma points_to = sym_value + stub_entry->target_addend
4328 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4329
4330 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4331 rel.r_info = ELF32_R_INFO (0,
99059e56 4332 template_sequence[stub_reloc_idx[i]].r_type);
fe33d2fa
CL		 4333 rel.r_addend = 0;
4334
4335 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4336 (template_sequence[stub_reloc_idx[i]].r_type),
4337 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4338 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4339 stub_entry->branch_type,
fe33d2fa
CL		 4340 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4341 &error_message);
48229727 4342 }
906e58ca
NC		 4343
4344 return TRUE;
48229727 4345#undef MAXRELOCS
906e58ca
NC		 4346}
4347
48229727
JB		 4348/* Calculate the template, template size and instruction size for a stub.
4349 Return value is the instruction size. */
906e58ca 4350
48229727
JB		 4351static unsigned int
4352find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4353 const insn_sequence **stub_template,
4354 int *stub_template_size)
906e58ca 4355{
d3ce72d0 4356 const insn_sequence *template_sequence = NULL;
48229727
JB		 4357 int template_size = 0, i;
4358 unsigned int size;
906e58ca 4359
d3ce72d0 4360 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4361 if (stub_template)
4362 *stub_template = template_sequence;
4363
48229727 4364 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4365 if (stub_template_size)
4366 *stub_template_size = template_size;
906e58ca
NC		 4367
4368 size = 0;
461a49ca
DJ		 4369 for (i = 0; i < template_size; i++)
4370 {
d3ce72d0 4371 switch (template_sequence[i].type)
461a49ca
DJ		 4372 {
4373 case THUMB16_TYPE:
4374 size += 2;
4375 break;
4376
4377 case ARM_TYPE:
48229727 4378 case THUMB32_TYPE:
461a49ca
DJ		 4379 case DATA_TYPE:
4380 size += 4;
4381 break;
4382
4383 default:
4384 BFD_FAIL ();
2a229407 4385 return 0;
461a49ca
DJ		 4386 }
4387 }
4388
48229727
JB		 4389 return size;
4390}
4391
4392/* As above, but don't actually build the stub. Just bump offset so
4393 we know stub section sizes. */
4394
4395static bfd_boolean
4396arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4397 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4398{
4399 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4400 const insn_sequence *template_sequence;
48229727
JB		 4401 int template_size, size;
4402
4403 /* Massage our args to the form they really have. */
4404 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4405
4406 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4407 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4408
d3ce72d0 4409 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4410 &template_size);
4411
461a49ca 4412 stub_entry->stub_size = size;
d3ce72d0 4413 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4414 stub_entry->stub_template_size = template_size;
4415
906e58ca
NC		 4416 size = (size + 7) & ~7;
4417 stub_entry->stub_sec->size += size;
461a49ca 4418
906e58ca
NC		 4419 return TRUE;
4420}
4421
4422/* External entry points for sizing and building linker stubs. */
4423
4424/* Set up various things so that we can make a list of input sections
4425 for each output section included in the link. Returns -1 on error,
4426 0 when no stubs will be needed, and 1 on success. */
4427
4428int
4429elf32_arm_setup_section_lists (bfd *output_bfd,
4430 struct bfd_link_info *info)
4431{
4432 bfd *input_bfd;
4433 unsigned int bfd_count;
4434 int top_id, top_index;
4435 asection *section;
4436 asection **input_list, **list;
4437 bfd_size_type amt;
4438 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4439
4dfe6ac6
NC		 4440 if (htab == NULL)
4441 return 0;
906e58ca
NC		 4442 if (! is_elf_hash_table (htab))
4443 return 0;
4444
4445 /* Count the number of input BFDs and find the top input section id. */
4446 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4447 input_bfd != NULL;
c72f2fb2 4448 input_bfd = input_bfd->link.next)
906e58ca
NC		 4449 {
4450 bfd_count += 1;
4451 for (section = input_bfd->sections;
4452 section != NULL;
4453 section = section->next)
4454 {
4455 if (top_id < section->id)
4456 top_id = section->id;
4457 }
4458 }
4459 htab->bfd_count = bfd_count;
4460
4461 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4462 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4463 if (htab->stub_group == NULL)
4464 return -1;
fe33d2fa 4465 htab->top_id = top_id;
906e58ca
NC		 4466
4467 /* We can't use output_bfd->section_count here to find the top output
4468 section index as some sections may have been removed, and
4469 _bfd_strip_section_from_output doesn't renumber the indices. */
4470 for (section = output_bfd->sections, top_index = 0;
4471 section != NULL;
4472 section = section->next)
4473 {
4474 if (top_index < section->index)
4475 top_index = section->index;
4476 }
4477
4478 htab->top_index = top_index;
4479 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4480 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4481 htab->input_list = input_list;
4482 if (input_list == NULL)
4483 return -1;
4484
4485 /* For sections we aren't interested in, mark their entries with a
4486 value we can check later. */
4487 list = input_list + top_index;
4488 do
4489 *list = bfd_abs_section_ptr;
4490 while (list-- != input_list);
4491
4492 for (section = output_bfd->sections;
4493 section != NULL;
4494 section = section->next)
4495 {
4496 if ((section->flags & SEC_CODE) != 0)
4497 input_list[section->index] = NULL;
4498 }
4499
4500 return 1;
4501}
4502
4503/* The linker repeatedly calls this function for each input section,
4504 in the order that input sections are linked into output sections.
4505 Build lists of input sections to determine groupings between which
4506 we may insert linker stubs. */
4507
4508void
4509elf32_arm_next_input_section (struct bfd_link_info *info,
4510 asection *isec)
4511{
4512 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4513
4dfe6ac6
NC		 4514 if (htab == NULL)
4515 return;
4516
906e58ca
NC		 4517 if (isec->output_section->index <= htab->top_index)
4518 {
4519 asection **list = htab->input_list + isec->output_section->index;
4520
a7470592 4521 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4522 {
4523 /* Steal the link_sec pointer for our list. */
4524#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4525 /* This happens to make the list in reverse order,
07d72278 4526 which we reverse later. */
906e58ca
NC		 4527 PREV_SEC (isec) = *list;
4528 *list = isec;
4529 }
4530 }
4531}
4532
4533/* See whether we can group stub sections together. Grouping stub
4534 sections may result in fewer stubs. More importantly, we need to
07d72278 4535 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4536 .fini output sections respectively, because glibc splits the
4537 _init and _fini functions into multiple parts. Putting a stub in
4538 the middle of a function is not a good idea. */
4539
4540static void
4541group_sections (struct elf32_arm_link_hash_table *htab,
4542 bfd_size_type stub_group_size,
07d72278 4543 bfd_boolean stubs_always_after_branch)
906e58ca 4544{
07d72278 4545 asection **list = htab->input_list;
906e58ca
NC		 4546
4547 do
4548 {
4549 asection *tail = *list;
07d72278 4550 asection *head;
906e58ca
NC		 4551
4552 if (tail == bfd_abs_section_ptr)
4553 continue;
4554
07d72278
DJ		 4555 /* Reverse the list: we must avoid placing stubs at the
4556 beginning of the section because the beginning of the text
4557 section may be required for an interrupt vector in bare metal
4558 code. */
4559#define NEXT_SEC PREV_SEC
e780aef2
CL		 4560 head = NULL;
4561 while (tail != NULL)
99059e56
RM		 4562 {
4563 /* Pop from tail. */
4564 asection *item = tail;
4565 tail = PREV_SEC (item);
e780aef2 4566
99059e56
RM		 4567 /* Push on head. */
4568 NEXT_SEC (item) = head;
4569 head = item;
4570 }
07d72278
DJ		 4571
4572 while (head != NULL)
906e58ca
NC		 4573 {
4574 asection *curr;
07d72278 4575 asection *next;
e780aef2
CL		 4576 bfd_vma stub_group_start = head->output_offset;
4577 bfd_vma end_of_next;
906e58ca 4578
07d72278 4579 curr = head;
e780aef2 4580 while (NEXT_SEC (curr) != NULL)
8cd931b7 4581 {
e780aef2
CL		 4582 next = NEXT_SEC (curr);
4583 end_of_next = next->output_offset + next->size;
4584 if (end_of_next - stub_group_start >= stub_group_size)
4585 /* End of NEXT is too far from start, so stop. */
8cd931b7 4586 break;
e780aef2
CL		 4587 /* Add NEXT to the group. */
4588 curr = next;
8cd931b7 4589 }
906e58ca 4590
07d72278 4591 /* OK, the size from the start to the start of CURR is less
906e58ca 4592 than stub_group_size and thus can be handled by one stub
07d72278 4593 section. (Or the head section is itself larger than
906e58ca
NC		 4594 stub_group_size, in which case we may be toast.)
4595 We should really be keeping track of the total size of
4596 stubs added here, as stubs contribute to the final output
7fb9f789 4597 section size. */
906e58ca
NC		 4598 do
4599 {
07d72278 4600 next = NEXT_SEC (head);
906e58ca 4601 /* Set up this stub group. */
07d72278 4602 htab->stub_group[head->id].link_sec = curr;
906e58ca 4603 }
07d72278 4604 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4605
4606 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4607 bytes after the stub section can be handled by it too. */
4608 if (!stubs_always_after_branch)
906e58ca 4609 {
e780aef2
CL		 4610 stub_group_start = curr->output_offset + curr->size;
4611
8cd931b7 4612 while (next != NULL)
906e58ca 4613 {
e780aef2
CL		 4614 end_of_next = next->output_offset + next->size;
4615 if (end_of_next - stub_group_start >= stub_group_size)
4616 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4617 break;
e780aef2 4618 /* Add NEXT to the stub group. */
07d72278
DJ		 4619 head = next;
4620 next = NEXT_SEC (head);
4621 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4622 }
4623 }
07d72278 4624 head = next;
906e58ca
NC		 4625 }
4626 }
07d72278 4627 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4628
4629 free (htab->input_list);
4630#undef PREV_SEC
07d72278 4631#undef NEXT_SEC
906e58ca
NC		 4632}
4633
48229727
JB		 4634/* Comparison function for sorting/searching relocations relating to Cortex-A8
4635 erratum fix. */
4636
4637static int
4638a8_reloc_compare (const void *a, const void *b)
4639{
21d799b5
NC		 4640 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4641 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4642
4643 if (ra->from < rb->from)
4644 return -1;
4645 else if (ra->from > rb->from)
4646 return 1;
4647 else
4648 return 0;
4649}
4650
4651static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4652 const char *, char **);
4653
4654/* Helper function to scan code for sequences which might trigger the Cortex-A8
4655 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4656 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4657 otherwise. */
4658
81694485
NC		 4659static bfd_boolean
4660cortex_a8_erratum_scan (bfd *input_bfd,
4661 struct bfd_link_info *info,
48229727
JB		 4662 struct a8_erratum_fix **a8_fixes_p,
4663 unsigned int *num_a8_fixes_p,
4664 unsigned int *a8_fix_table_size_p,
4665 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4666 unsigned int num_a8_relocs,
4667 unsigned prev_num_a8_fixes,
4668 bfd_boolean *stub_changed_p)
48229727
JB		 4669{
4670 asection *section;
4671 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4672 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4673 unsigned int num_a8_fixes = *num_a8_fixes_p;
4674 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4675
4dfe6ac6
NC		 4676 if (htab == NULL)
4677 return FALSE;
4678
48229727
JB		 4679 for (section = input_bfd->sections;
4680 section != NULL;
4681 section = section->next)
4682 {
4683 bfd_byte *contents = NULL;
4684 struct _arm_elf_section_data *sec_data;
4685 unsigned int span;
4686 bfd_vma base_vma;
4687
4688 if (elf_section_type (section) != SHT_PROGBITS
99059e56
RM		 4689 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4690 || (section->flags & SEC_EXCLUDE) != 0
4691 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4692 || (section->output_section == bfd_abs_section_ptr))
4693 continue;
48229727
JB		 4694
4695 base_vma = section->output_section->vma + section->output_offset;
4696
4697 if (elf_section_data (section)->this_hdr.contents != NULL)
99059e56 4698 contents = elf_section_data (section)->this_hdr.contents;
48229727 4699 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
99059e56 4700 return TRUE;
48229727
JB		 4701
4702 sec_data = elf32_arm_section_data (section);
4703
4704 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 4705 {
4706 unsigned int span_start = sec_data->map[span].vma;
4707 unsigned int span_end = (span == sec_data->mapcount - 1)
4708 ? section->size : sec_data->map[span + 1].vma;
4709 unsigned int i;
4710 char span_type = sec_data->map[span].type;
4711 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4712
4713 if (span_type != 't')
4714 continue;
4715
4716 /* Span is entirely within a single 4KB region: skip scanning. */
4717 if (((base_vma + span_start) & ~0xfff)
48229727 4718 == ((base_vma + span_end) & ~0xfff))
99059e56
RM		 4719 continue;
4720
4721 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4722
4723 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4724 * The branch target is in the same 4KB region as the
4725 first half of the branch.
4726 * The instruction before the branch is a 32-bit
4727 length non-branch instruction. */
4728 for (i = span_start; i < span_end;)
4729 {
4730 unsigned int insn = bfd_getl16 (&contents[i]);
4731 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
48229727
JB		 4732 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4733
99059e56
RM		 4734 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4735 insn_32bit = TRUE;
48229727
JB		 4736
4737 if (insn_32bit)
99059e56
RM		 4738 {
4739 /* Load the rest of the insn (in manual-friendly order). */
4740 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4741
4742 /* Encoding T4: B<c>.W. */
4743 is_b = (insn & 0xf800d000) == 0xf0009000;
4744 /* Encoding T1: BL<c>.W. */
4745 is_bl = (insn & 0xf800d000) == 0xf000d000;
4746 /* Encoding T2: BLX<c>.W. */
4747 is_blx = (insn & 0xf800d000) == 0xf000c000;
48229727
JB		 4748 /* Encoding T3: B<c>.W (not permitted in IT block). */
4749 is_bcc = (insn & 0xf800d000) == 0xf0008000
4750 && (insn & 0x07f00000) != 0x03800000;
4751 }
4752
4753 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4754
99059e56 4755 if (((base_vma + i) & 0xfff) == 0xffe
81694485
NC		 4756 && insn_32bit
4757 && is_32bit_branch
4758 && last_was_32bit
4759 && ! last_was_branch)
99059e56
RM		 4760 {
4761 bfd_signed_vma offset = 0;
4762 bfd_boolean force_target_arm = FALSE;
48229727 4763 bfd_boolean force_target_thumb = FALSE;
99059e56
RM		 4764 bfd_vma target;
4765 enum elf32_arm_stub_type stub_type = arm_stub_none;
4766 struct a8_erratum_reloc key, *found;
4767 bfd_boolean use_plt = FALSE;
48229727 4768
99059e56
RM		 4769 key.from = base_vma + i;
4770 found = (struct a8_erratum_reloc *)
4771 bsearch (&key, a8_relocs, num_a8_relocs,
4772 sizeof (struct a8_erratum_reloc),
4773 &a8_reloc_compare);
48229727
JB		 4774
4775 if (found)
4776 {
4777 char *error_message = NULL;
4778 struct elf_link_hash_entry *entry;
4779
4780 /* We don't care about the error returned from this
99059e56 4781 function, only if there is glue or not. */
48229727
JB		 4782 entry = find_thumb_glue (info, found->sym_name,
4783 &error_message);
4784
4785 if (entry)
4786 found->non_a8_stub = TRUE;
4787
92750f34 4788 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4789 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4790 && found->hash->root.plt.offset != (bfd_vma) -1)
4791 use_plt = TRUE;
4792
4793 if (found->r_type == R_ARM_THM_CALL)
4794 {
35fc36a8
RS		 4795 if (found->branch_type == ST_BRANCH_TO_ARM
4796 || use_plt)
92750f34
DJ		 4797 force_target_arm = TRUE;
4798 else
4799 force_target_thumb = TRUE;
4800 }
48229727
JB		 4801 }
4802
99059e56 4803 /* Check if we have an offending branch instruction. */
48229727
JB		 4804
4805 if (found && found->non_a8_stub)
4806 /* We've already made a stub for this instruction, e.g.
4807 it's a long branch or a Thumb->ARM stub. Assume that
4808 stub will suffice to work around the A8 erratum (see
4809 setting of always_after_branch above). */
4810 ;
99059e56
RM		 4811 else if (is_bcc)
4812 {
4813 offset = (insn & 0x7ff) << 1;
4814 offset |= (insn & 0x3f0000) >> 4;
4815 offset |= (insn & 0x2000) ? 0x40000 : 0;
4816 offset |= (insn & 0x800) ? 0x80000 : 0;
4817 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4818 if (offset & 0x100000)
4819 offset |= ~ ((bfd_signed_vma) 0xfffff);
4820 stub_type = arm_stub_a8_veneer_b_cond;
4821 }
4822 else if (is_b || is_bl || is_blx)
4823 {
4824 int s = (insn & 0x4000000) != 0;
4825 int j1 = (insn & 0x2000) != 0;
4826 int j2 = (insn & 0x800) != 0;
4827 int i1 = !(j1 ^ s);
4828 int i2 = !(j2 ^ s);
4829
4830 offset = (insn & 0x7ff) << 1;
4831 offset |= (insn & 0x3ff0000) >> 4;
4832 offset |= i2 << 22;
4833 offset |= i1 << 23;
4834 offset |= s << 24;
4835 if (offset & 0x1000000)
4836 offset |= ~ ((bfd_signed_vma) 0xffffff);
4837
4838 if (is_blx)
4839 offset &= ~ ((bfd_signed_vma) 3);
4840
4841 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4842 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4843 }
4844
4845 if (stub_type != arm_stub_none)
4846 {
4847 bfd_vma pc_for_insn = base_vma + i + 4;
48229727
JB		 4848
4849 /* The original instruction is a BL, but the target is
99059e56 4850 an ARM instruction. If we were not making a stub,
48229727
JB		 4851 the BL would have been converted to a BLX. Use the
4852 BLX stub instead in that case. */
4853 if (htab->use_blx && force_target_arm
4854 && stub_type == arm_stub_a8_veneer_bl)
4855 {
4856 stub_type = arm_stub_a8_veneer_blx;
4857 is_blx = TRUE;
4858 is_bl = FALSE;
4859 }
4860 /* Conversely, if the original instruction was
4861 BLX but the target is Thumb mode, use the BL
4862 stub. */
4863 else if (force_target_thumb
4864 && stub_type == arm_stub_a8_veneer_blx)
4865 {
4866 stub_type = arm_stub_a8_veneer_bl;
4867 is_blx = FALSE;
4868 is_bl = TRUE;
4869 }
4870
99059e56
RM		 4871 if (is_blx)
4872 pc_for_insn &= ~ ((bfd_vma) 3);
48229727 4873
99059e56
RM		 4874 /* If we found a relocation, use the proper destination,
4875 not the offset in the (unrelocated) instruction.
48229727
JB		 4876 Note this is always done if we switched the stub type
4877 above. */
99059e56
RM		 4878 if (found)
4879 offset =
81694485 4880 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4881
99059e56
RM		 4882 /* If the stub will use a Thumb-mode branch to a
4883 PLT target, redirect it to the preceding Thumb
4884 entry point. */
4885 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4886 offset -= PLT_THUMB_STUB_SIZE;
7d24e6a6 4887
99059e56 4888 target = pc_for_insn + offset;
48229727 4889
99059e56
RM		 4890 /* The BLX stub is ARM-mode code. Adjust the offset to
4891 take the different PC value (+8 instead of +4) into
48229727 4892 account. */
99059e56
RM		 4893 if (stub_type == arm_stub_a8_veneer_blx)
4894 offset += 4;
4895
4896 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4897 {
4898 char *stub_name = NULL;
4899
4900 if (num_a8_fixes == a8_fix_table_size)
4901 {
4902 a8_fix_table_size *= 2;
4903 a8_fixes = (struct a8_erratum_fix *)
4904 bfd_realloc (a8_fixes,
4905 sizeof (struct a8_erratum_fix)
4906 * a8_fix_table_size);
4907 }
48229727 4908
eb7c4339
NS		 4909 if (num_a8_fixes < prev_num_a8_fixes)
4910 {
4911 /* If we're doing a subsequent scan,
4912 check if we've found the same fix as
4913 before, and try and reuse the stub
4914 name. */
4915 stub_name = a8_fixes[num_a8_fixes].stub_name;
4916 if ((a8_fixes[num_a8_fixes].section != section)
4917 || (a8_fixes[num_a8_fixes].offset != i))
4918 {
4919 free (stub_name);
4920 stub_name = NULL;
4921 *stub_changed_p = TRUE;
4922 }
4923 }
4924
4925 if (!stub_name)
4926 {
21d799b5 4927 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4928 if (stub_name != NULL)
4929 sprintf (stub_name, "%x:%x", section->id, i);
4930 }
48229727 4931
99059e56
RM		 4932 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4933 a8_fixes[num_a8_fixes].section = section;
4934 a8_fixes[num_a8_fixes].offset = i;
4935 a8_fixes[num_a8_fixes].addend = offset;
4936 a8_fixes[num_a8_fixes].orig_insn = insn;
4937 a8_fixes[num_a8_fixes].stub_name = stub_name;
4938 a8_fixes[num_a8_fixes].stub_type = stub_type;
4939 a8_fixes[num_a8_fixes].branch_type =
35fc36a8 4940 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727 4941
99059e56
RM		 4942 num_a8_fixes++;
4943 }
4944 }
4945 }
48229727 4946
99059e56
RM		 4947 i += insn_32bit ? 4 : 2;
4948 last_was_32bit = insn_32bit;
48229727 4949 last_was_branch = is_32bit_branch;
99059e56
RM		 4950 }
4951 }
48229727
JB		 4952
4953 if (elf_section_data (section)->this_hdr.contents == NULL)
99059e56 4954 free (contents);
48229727 4955 }
fe33d2fa 4956
48229727
JB		 4957 *a8_fixes_p = a8_fixes;
4958 *num_a8_fixes_p = num_a8_fixes;
4959 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4960
81694485 4961 return FALSE;
48229727
JB		 4962}
4963
906e58ca
NC		 4964/* Determine and set the size of the stub section for a final link.
4965
4966 The basic idea here is to examine all the relocations looking for
4967 PC-relative calls to a target that is unreachable with a "bl"
4968 instruction. */
4969
4970bfd_boolean
4971elf32_arm_size_stubs (bfd *output_bfd,
4972 bfd *stub_bfd,
4973 struct bfd_link_info *info,
4974 bfd_signed_vma group_size,
7a89b94e
NC		 4975 asection * (*add_stub_section) (const char *, asection *,
4976 unsigned int),
906e58ca
NC		 4977 void (*layout_sections_again) (void))
4978{
4979 bfd_size_type stub_group_size;
07d72278 4980 bfd_boolean stubs_always_after_branch;
906e58ca 4981 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4982 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4983 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4984 struct a8_erratum_reloc *a8_relocs = NULL;
4985 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4986
4dfe6ac6
NC		 4987 if (htab == NULL)
4988 return FALSE;
4989
48229727
JB		 4990 if (htab->fix_cortex_a8)
4991 {
21d799b5 4992 a8_fixes = (struct a8_erratum_fix *)
99059e56 4993 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
21d799b5 4994 a8_relocs = (struct a8_erratum_reloc *)
99059e56 4995 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4996 }
906e58ca
NC		 4997
4998 /* Propagate mach to stub bfd, because it may not have been
4999 finalized when we created stub_bfd. */
5000 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5001 bfd_get_mach (output_bfd));
5002
5003 /* Stash our params away. */
5004 htab->stub_bfd = stub_bfd;
5005 htab->add_stub_section = add_stub_section;
5006 htab->layout_sections_again = layout_sections_again;
07d72278 5007 stubs_always_after_branch = group_size < 0;
48229727
JB		 5008
5009 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5010 as the first half of a 32-bit branch straddling two 4K pages. This is a
5011 crude way of enforcing that. */
5012 if (htab->fix_cortex_a8)
5013 stubs_always_after_branch = 1;
5014
906e58ca
NC		 5015 if (group_size < 0)
5016 stub_group_size = -group_size;
5017 else
5018 stub_group_size = group_size;
5019
5020 if (stub_group_size == 1)
5021 {
5022 /* Default values. */
5023 /* Thumb branch range is +-4MB has to be used as the default
5024 maximum size (a given section can contain both ARM and Thumb
5025 code, so the worst case has to be taken into account).
5026
5027 This value is 24K less than that, which allows for 2025
5028 12-byte stubs. If we exceed that, then we will fail to link.
5029 The user will have to relink with an explicit group size
5030 option. */
5031 stub_group_size = 4170000;
5032 }
5033
07d72278 5034 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 5035
3ae046cc
NS		 5036 /* If we're applying the cortex A8 fix, we need to determine the
5037 program header size now, because we cannot change it later --
5038 that could alter section placements. Notice the A8 erratum fix
5039 ends up requiring the section addresses to remain unchanged
5040 modulo the page size. That's something we cannot represent
5041 inside BFD, and we don't want to force the section alignment to
5042 be the page size. */
5043 if (htab->fix_cortex_a8)
5044 (*htab->layout_sections_again) ();
5045
906e58ca
NC		 5046 while (1)
5047 {
5048 bfd *input_bfd;
5049 unsigned int bfd_indx;
5050 asection *stub_sec;
eb7c4339
NS		 5051 bfd_boolean stub_changed = FALSE;
5052 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 5053
48229727 5054 num_a8_fixes = 0;
906e58ca
NC		 5055 for (input_bfd = info->input_bfds, bfd_indx = 0;
5056 input_bfd != NULL;
c72f2fb2 5057 input_bfd = input_bfd->link.next, bfd_indx++)
906e58ca
NC		 5058 {
5059 Elf_Internal_Shdr *symtab_hdr;
5060 asection *section;
5061 Elf_Internal_Sym *local_syms = NULL;
5062
99059e56
RM		 5063 if (!is_arm_elf (input_bfd))
5064 continue;
adbcc655 5065
48229727
JB		 5066 num_a8_relocs = 0;
5067
906e58ca
NC		 5068 /* We'll need the symbol table in a second. */
5069 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5070 if (symtab_hdr->sh_info == 0)
5071 continue;
5072
5073 /* Walk over each section attached to the input bfd. */
5074 for (section = input_bfd->sections;
5075 section != NULL;
5076 section = section->next)
5077 {
5078 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5079
5080 /* If there aren't any relocs, then there's nothing more
5081 to do. */
5082 if ((section->flags & SEC_RELOC) == 0
5083 || section->reloc_count == 0
5084 || (section->flags & SEC_CODE) == 0)
5085 continue;
5086
5087 /* If this section is a link-once section that will be
5088 discarded, then don't create any stubs. */
5089 if (section->output_section == NULL
5090 || section->output_section->owner != output_bfd)
5091 continue;
5092
5093 /* Get the relocs. */
5094 internal_relocs
5095 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5096 NULL, info->keep_memory);
5097 if (internal_relocs == NULL)
5098 goto error_ret_free_local;
5099
5100 /* Now examine each relocation. */
5101 irela = internal_relocs;
5102 irelaend = irela + section->reloc_count;
5103 for (; irela < irelaend; irela++)
5104 {
5105 unsigned int r_type, r_indx;
5106 enum elf32_arm_stub_type stub_type;
5107 struct elf32_arm_stub_hash_entry *stub_entry;
5108 asection *sym_sec;
5109 bfd_vma sym_value;
5110 bfd_vma destination;
5111 struct elf32_arm_link_hash_entry *hash;
7413f23f 5112 const char *sym_name;
906e58ca
NC		 5113 char *stub_name;
5114 const asection *id_sec;
34e77a92 5115 unsigned char st_type;
35fc36a8 5116 enum arm_st_branch_type branch_type;
48229727 5117 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5118
5119 r_type = ELF32_R_TYPE (irela->r_info);
5120 r_indx = ELF32_R_SYM (irela->r_info);
5121
5122 if (r_type >= (unsigned int) R_ARM_max)
5123 {
5124 bfd_set_error (bfd_error_bad_value);
5125 error_ret_free_internal:
5126 if (elf_section_data (section)->relocs == NULL)
5127 free (internal_relocs);
5128 goto error_ret_free_local;
5129 }
b38cadfb 5130
0855e32b
NS		 5131 hash = NULL;
5132 if (r_indx >= symtab_hdr->sh_info)
5133 hash = elf32_arm_hash_entry
5134 (elf_sym_hashes (input_bfd)
5135 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5136
0855e32b
NS		 5137 /* Only look for stubs on branch instructions, or
5138 non-relaxed TLSCALL */
906e58ca 5139 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5140 && (r_type != (unsigned int) R_ARM_THM_CALL)
5141 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5142 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5143 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5144 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5145 && (r_type != (unsigned int) R_ARM_PLT32)
5146 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5147 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5148 && r_type == elf32_arm_tls_transition
5149 (info, r_type, &hash->root)
5150 && ((hash ? hash->tls_type
5151 : (elf32_arm_local_got_tls_type
5152 (input_bfd)[r_indx]))
5153 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5154 continue;
5155
5156 /* Now determine the call target, its name, value,
5157 section. */
5158 sym_sec = NULL;
5159 sym_value = 0;
5160 destination = 0;
7413f23f 5161 sym_name = NULL;
b38cadfb 5162
0855e32b
NS		 5163 if (r_type == (unsigned int) R_ARM_TLS_CALL
5164 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5165 {
5166 /* A non-relaxed TLS call. The target is the
5167 plt-resident trampoline and nothing to do
5168 with the symbol. */
5169 BFD_ASSERT (htab->tls_trampoline > 0);
5170 sym_sec = htab->root.splt;
5171 sym_value = htab->tls_trampoline;
5172 hash = 0;
34e77a92 5173 st_type = STT_FUNC;
35fc36a8 5174 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5175 }
5176 else if (!hash)
906e58ca
NC		 5177 {
5178 /* It's a local symbol. */
5179 Elf_Internal_Sym *sym;
906e58ca
NC		 5180
5181 if (local_syms == NULL)
5182 {
5183 local_syms
5184 = (Elf_Internal_Sym *) symtab_hdr->contents;
5185 if (local_syms == NULL)
5186 local_syms
5187 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5188 symtab_hdr->sh_info, 0,
5189 NULL, NULL, NULL);
5190 if (local_syms == NULL)
5191 goto error_ret_free_internal;
5192 }
5193
5194 sym = local_syms + r_indx;
f6d250ce
TS		 5195 if (sym->st_shndx == SHN_UNDEF)
5196 sym_sec = bfd_und_section_ptr;
5197 else if (sym->st_shndx == SHN_ABS)
5198 sym_sec = bfd_abs_section_ptr;
5199 else if (sym->st_shndx == SHN_COMMON)
5200 sym_sec = bfd_com_section_ptr;
5201 else
5202 sym_sec =
5203 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5204
ffcb4889
NS		 5205 if (!sym_sec)
5206 /* This is an undefined symbol. It can never
6a631e86 5207 be resolved. */
ffcb4889 5208 continue;
fe33d2fa 5209
906e58ca
NC		 5210 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5211 sym_value = sym->st_value;
5212 destination = (sym_value + irela->r_addend
5213 + sym_sec->output_offset
5214 + sym_sec->output_section->vma);
34e77a92 5215 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5216 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5217 sym_name
5218 = bfd_elf_string_from_elf_section (input_bfd,
5219 symtab_hdr->sh_link,
5220 sym->st_name);
906e58ca
NC		 5221 }
5222 else
5223 {
5224 /* It's an external symbol. */
906e58ca
NC		 5225 while (hash->root.root.type == bfd_link_hash_indirect
5226 || hash->root.root.type == bfd_link_hash_warning)
5227 hash = ((struct elf32_arm_link_hash_entry *)
5228 hash->root.root.u.i.link);
5229
5230 if (hash->root.root.type == bfd_link_hash_defined
5231 || hash->root.root.type == bfd_link_hash_defweak)
5232 {
5233 sym_sec = hash->root.root.u.def.section;
5234 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5235
5236 struct elf32_arm_link_hash_table *globals =
5237 elf32_arm_hash_table (info);
5238
5239 /* For a destination in a shared library,
5240 use the PLT stub as target address to
5241 decide whether a branch stub is
5242 needed. */
4dfe6ac6 5243 if (globals != NULL
362d30a1 5244 && globals->root.splt != NULL
4dfe6ac6 5245 && hash != NULL
022f8312
CL		 5246 && hash->root.plt.offset != (bfd_vma) -1)
5247 {
362d30a1 5248 sym_sec = globals->root.splt;
022f8312
CL		 5249 sym_value = hash->root.plt.offset;
5250 if (sym_sec->output_section != NULL)
5251 destination = (sym_value
5252 + sym_sec->output_offset
5253 + sym_sec->output_section->vma);
5254 }
5255 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5256 destination = (sym_value + irela->r_addend
5257 + sym_sec->output_offset
5258 + sym_sec->output_section->vma);
5259 }
69c5861e
CL		 5260 else if ((hash->root.root.type == bfd_link_hash_undefined)
5261 || (hash->root.root.type == bfd_link_hash_undefweak))
5262 {
5263 /* For a shared library, use the PLT stub as
5264 target address to decide whether a long
5265 branch stub is needed.
5266 For absolute code, they cannot be handled. */
5267 struct elf32_arm_link_hash_table *globals =
5268 elf32_arm_hash_table (info);
5269
4dfe6ac6 5270 if (globals != NULL
362d30a1 5271 && globals->root.splt != NULL
4dfe6ac6 5272 && hash != NULL
69c5861e
CL		 5273 && hash->root.plt.offset != (bfd_vma) -1)
5274 {
362d30a1 5275 sym_sec = globals->root.splt;
69c5861e
CL		 5276 sym_value = hash->root.plt.offset;
5277 if (sym_sec->output_section != NULL)
5278 destination = (sym_value
5279 + sym_sec->output_offset
5280 + sym_sec->output_section->vma);
5281 }
5282 else
5283 continue;
5284 }
906e58ca
NC		 5285 else
5286 {
5287 bfd_set_error (bfd_error_bad_value);
5288 goto error_ret_free_internal;
5289 }
34e77a92 5290 st_type = hash->root.type;
35fc36a8 5291 branch_type = hash->root.target_internal;
7413f23f 5292 sym_name = hash->root.root.root.string;
906e58ca
NC		 5293 }
5294
48229727 5295 do
7413f23f 5296 {
48229727
JB		 5297 /* Determine what (if any) linker stub is needed. */
5298 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5299 st_type, &branch_type,
5300 hash, destination, sym_sec,
48229727
JB		 5301 input_bfd, sym_name);
5302 if (stub_type == arm_stub_none)
5303 break;
5304
5305 /* Support for grouping stub sections. */
5306 id_sec = htab->stub_group[section->id].link_sec;
5307
5308 /* Get the name of this stub. */
5309 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5310 irela, stub_type);
48229727
JB		 5311 if (!stub_name)
5312 goto error_ret_free_internal;
5313
5314 /* We've either created a stub for this reloc already,
5315 or we are about to. */
5316 created_stub = TRUE;
5317
5318 stub_entry = arm_stub_hash_lookup
5319 (&htab->stub_hash_table, stub_name,
5320 FALSE, FALSE);
5321 if (stub_entry != NULL)
5322 {
5323 /* The proper stub has already been created. */
5324 free (stub_name);
eb7c4339 5325 stub_entry->target_value = sym_value;
48229727
JB		 5326 break;
5327 }
7413f23f 5328
48229727
JB		 5329 stub_entry = elf32_arm_add_stub (stub_name, section,
5330 htab);
5331 if (stub_entry == NULL)
5332 {
5333 free (stub_name);
5334 goto error_ret_free_internal;
5335 }
7413f23f 5336
99059e56
RM		 5337 stub_entry->target_value = sym_value;
5338 stub_entry->target_section = sym_sec;
5339 stub_entry->stub_type = stub_type;
5340 stub_entry->h = hash;
5341 stub_entry->branch_type = branch_type;
5342
5343 if (sym_name == NULL)
5344 sym_name = "unnamed";
5345 stub_entry->output_name = (char *)
5346 bfd_alloc (htab->stub_bfd,
5347 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5348 + strlen (sym_name));
5349 if (stub_entry->output_name == NULL)
5350 {
5351 free (stub_name);
5352 goto error_ret_free_internal;
5353 }
5354
5355 /* For historical reasons, use the existing names for
5356 ARM-to-Thumb and Thumb-to-ARM stubs. */
5357 if ((r_type == (unsigned int) R_ARM_THM_CALL
c5423981
TG		 5358 || r_type == (unsigned int) R_ARM_THM_JUMP24
5359 || r_type == (unsigned int) R_ARM_THM_JUMP19)
35fc36a8 5360 && branch_type == ST_BRANCH_TO_ARM)
99059e56
RM		 5361 sprintf (stub_entry->output_name,
5362 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5363 else if ((r_type == (unsigned int) R_ARM_CALL
35fc36a8
RS		 5364 || r_type == (unsigned int) R_ARM_JUMP24)
5365 && branch_type == ST_BRANCH_TO_THUMB)
99059e56
RM		 5366 sprintf (stub_entry->output_name,
5367 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5368 else
5369 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5370 sym_name);
5371
5372 stub_changed = TRUE;
5373 }
5374 while (0);
5375
5376 /* Look for relocations which might trigger Cortex-A8
5377 erratum. */
5378 if (htab->fix_cortex_a8
5379 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5380 || r_type == (unsigned int) R_ARM_THM_JUMP19
5381 || r_type == (unsigned int) R_ARM_THM_CALL
5382 || r_type == (unsigned int) R_ARM_THM_XPC22))
5383 {
5384 bfd_vma from = section->output_section->vma
5385 + section->output_offset
5386 + irela->r_offset;
5387
5388 if ((from & 0xfff) == 0xffe)
5389 {
5390 /* Found a candidate. Note we haven't checked the
5391 destination is within 4K here: if we do so (and
5392 don't create an entry in a8_relocs) we can't tell
5393 that a branch should have been relocated when
5394 scanning later. */
5395 if (num_a8_relocs == a8_reloc_table_size)
5396 {
5397 a8_reloc_table_size *= 2;
5398 a8_relocs = (struct a8_erratum_reloc *)
5399 bfd_realloc (a8_relocs,
5400 sizeof (struct a8_erratum_reloc)
5401 * a8_reloc_table_size);
5402 }
5403
5404 a8_relocs[num_a8_relocs].from = from;
5405 a8_relocs[num_a8_relocs].destination = destination;
5406 a8_relocs[num_a8_relocs].r_type = r_type;
5407 a8_relocs[num_a8_relocs].branch_type = branch_type;
5408 a8_relocs[num_a8_relocs].sym_name = sym_name;
5409 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5410 a8_relocs[num_a8_relocs].hash = hash;
5411
5412 num_a8_relocs++;
5413 }
5414 }
906e58ca
NC		 5415 }
5416
99059e56
RM		 5417 /* We're done with the internal relocs, free them. */
5418 if (elf_section_data (section)->relocs == NULL)
5419 free (internal_relocs);
5420 }
48229727 5421
99059e56 5422 if (htab->fix_cortex_a8)
48229727 5423 {
99059e56
RM		 5424 /* Sort relocs which might apply to Cortex-A8 erratum. */
5425 qsort (a8_relocs, num_a8_relocs,
eb7c4339 5426 sizeof (struct a8_erratum_reloc),
99059e56 5427 &a8_reloc_compare);
48229727 5428
99059e56
RM		 5429 /* Scan for branches which might trigger Cortex-A8 erratum. */
5430 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
48229727 5431 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5432 a8_relocs, num_a8_relocs,
5433 prev_num_a8_fixes, &stub_changed)
5434 != 0)
48229727 5435 goto error_ret_free_local;
5e681ec4 5436 }
5e681ec4
PB		 5437 }
5438
eb7c4339 5439 if (prev_num_a8_fixes != num_a8_fixes)
99059e56 5440 stub_changed = TRUE;
48229727 5441
906e58ca
NC		 5442 if (!stub_changed)
5443 break;
5e681ec4 5444
906e58ca
NC		 5445 /* OK, we've added some stubs. Find out the new size of the
5446 stub sections. */
5447 for (stub_sec = htab->stub_bfd->sections;
5448 stub_sec != NULL;
5449 stub_sec = stub_sec->next)
3e6b1042
DJ		 5450 {
5451 /* Ignore non-stub sections. */
5452 if (!strstr (stub_sec->name, STUB_SUFFIX))
5453 continue;
5454
5455 stub_sec->size = 0;
5456 }
b34b2d70 5457
906e58ca
NC		 5458 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5459
48229727
JB		 5460 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5461 if (htab->fix_cortex_a8)
99059e56
RM		 5462 for (i = 0; i < num_a8_fixes; i++)
5463 {
48229727
JB		 5464 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5465 a8_fixes[i].section, htab);
5466
5467 if (stub_sec == NULL)
5468 goto error_ret_free_local;
5469
99059e56
RM		 5470 stub_sec->size
5471 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5472 NULL);
5473 }
48229727
JB		 5474
5475
906e58ca
NC		 5476 /* Ask the linker to do its stuff. */
5477 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5478 }
5479
48229727
JB		 5480 /* Add stubs for Cortex-A8 erratum fixes now. */
5481 if (htab->fix_cortex_a8)
5482 {
5483 for (i = 0; i < num_a8_fixes; i++)
99059e56
RM		 5484 {
5485 struct elf32_arm_stub_hash_entry *stub_entry;
5486 char *stub_name = a8_fixes[i].stub_name;
5487 asection *section = a8_fixes[i].section;
5488 unsigned int section_id = a8_fixes[i].section->id;
5489 asection *link_sec = htab->stub_group[section_id].link_sec;
5490 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5491 const insn_sequence *template_sequence;
5492 int template_size, size = 0;
5493
5494 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5495 TRUE, FALSE);
5496 if (stub_entry == NULL)
5497 {
5498 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5499 section->owner,
5500 stub_name);
5501 return FALSE;
5502 }
5503
5504 stub_entry->stub_sec = stub_sec;
5505 stub_entry->stub_offset = 0;
5506 stub_entry->id_sec = link_sec;
5507 stub_entry->stub_type = a8_fixes[i].stub_type;
5508 stub_entry->target_section = a8_fixes[i].section;
5509 stub_entry->target_value = a8_fixes[i].offset;
5510 stub_entry->target_addend = a8_fixes[i].addend;
5511 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5512 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5513
99059e56
RM		 5514 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5515 &template_sequence,
5516 &template_size);
48229727 5517
99059e56
RM		 5518 stub_entry->stub_size = size;
5519 stub_entry->stub_template = template_sequence;
5520 stub_entry->stub_template_size = template_size;
5521 }
48229727
JB		 5522
5523 /* Stash the Cortex-A8 erratum fix array for use later in
99059e56 5524 elf32_arm_write_section(). */
48229727
JB		 5525 htab->a8_erratum_fixes = a8_fixes;
5526 htab->num_a8_erratum_fixes = num_a8_fixes;
5527 }
5528 else
5529 {
5530 htab->a8_erratum_fixes = NULL;
5531 htab->num_a8_erratum_fixes = 0;
5532 }
906e58ca
NC		 5533 return TRUE;
5534
5535 error_ret_free_local:
5536 return FALSE;
5e681ec4
PB		 5537}
5538
906e58ca
NC		 5539/* Build all the stubs associated with the current output file. The
5540 stubs are kept in a hash table attached to the main linker hash
5541 table. We also set up the .plt entries for statically linked PIC
5542 functions here. This function is called via arm_elf_finish in the
5543 linker. */
252b5132 5544
906e58ca
NC		 5545bfd_boolean
5546elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5547{
906e58ca
NC		 5548 asection *stub_sec;
5549 struct bfd_hash_table *table;
5550 struct elf32_arm_link_hash_table *htab;
252b5132 5551
906e58ca 5552 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5553 if (htab == NULL)
5554 return FALSE;
252b5132 5555
906e58ca
NC		 5556 for (stub_sec = htab->stub_bfd->sections;
5557 stub_sec != NULL;
5558 stub_sec = stub_sec->next)
252b5132 5559 {
906e58ca
NC		 5560 bfd_size_type size;
5561
8029a119 5562 /* Ignore non-stub sections. */
906e58ca
NC		 5563 if (!strstr (stub_sec->name, STUB_SUFFIX))
5564 continue;
5565
5566 /* Allocate memory to hold the linker stubs. */
5567 size = stub_sec->size;
21d799b5 5568 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5569 if (stub_sec->contents == NULL && size != 0)
5570 return FALSE;
5571 stub_sec->size = 0;
252b5132
RH		 5572 }
5573
906e58ca
NC		 5574 /* Build the stubs as directed by the stub hash table. */
5575 table = &htab->stub_hash_table;
5576 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5577 if (htab->fix_cortex_a8)
5578 {
5579 /* Place the cortex a8 stubs last. */
5580 htab->fix_cortex_a8 = -1;
5581 bfd_hash_traverse (table, arm_build_one_stub, info);
5582 }
252b5132 5583
906e58ca 5584 return TRUE;
252b5132
RH		 5585}
5586
9b485d32
NC		 5587/* Locate the Thumb encoded calling stub for NAME. */
5588
252b5132 5589static struct elf_link_hash_entry *
57e8b36a
NC		 5590find_thumb_glue (struct bfd_link_info *link_info,
5591 const char *name,
f2a9dd69 5592 char **error_message)
252b5132
RH		 5593{
5594 char *tmp_name;
5595 struct elf_link_hash_entry *hash;
5596 struct elf32_arm_link_hash_table *hash_table;
5597
5598 /* We need a pointer to the armelf specific hash table. */
5599 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5600 if (hash_table == NULL)
5601 return NULL;
252b5132 5602
21d799b5 5603 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5604 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5605
5606 BFD_ASSERT (tmp_name);
5607
5608 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5609
5610 hash = elf_link_hash_lookup
b34976b6 5611 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5612
b1657152
AM		 5613 if (hash == NULL
5614 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5615 tmp_name, name) == -1)
5616 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5617
5618 free (tmp_name);
5619
5620 return hash;
5621}
5622
9b485d32
NC		 5623/* Locate the ARM encoded calling stub for NAME. */
5624
252b5132 5625static struct elf_link_hash_entry *
57e8b36a
NC		 5626find_arm_glue (struct bfd_link_info *link_info,
5627 const char *name,
f2a9dd69 5628 char **error_message)
252b5132
RH		 5629{
5630 char *tmp_name;
5631 struct elf_link_hash_entry *myh;
5632 struct elf32_arm_link_hash_table *hash_table;
5633
5634 /* We need a pointer to the elfarm specific hash table. */
5635 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5636 if (hash_table == NULL)
5637 return NULL;
252b5132 5638
21d799b5 5639 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5640 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5641
5642 BFD_ASSERT (tmp_name);
5643
5644 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5645
5646 myh = elf_link_hash_lookup
b34976b6 5647 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5648
b1657152
AM		 5649 if (myh == NULL
5650 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5651 tmp_name, name) == -1)
5652 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5653
5654 free (tmp_name);
5655
5656 return myh;
5657}
5658
8f6277f5 5659/* ARM->Thumb glue (static images):
252b5132
RH		 5660
5661 .arm
5662 __func_from_arm:
5663 ldr r12, __func_addr
5664 bx r12
5665 __func_addr:
906e58ca 5666 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5667
26079076
PB		 5668 (v5t static images)
5669 .arm
5670 __func_from_arm:
5671 ldr pc, __func_addr
5672 __func_addr:
906e58ca 5673 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5674
8f6277f5
PB		 5675 (relocatable images)
5676 .arm
5677 __func_from_arm:
5678 ldr r12, __func_offset
5679 add r12, r12, pc
5680 bx r12
5681 __func_offset:
8029a119 5682 .word func - . */
8f6277f5
PB		 5683
5684#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5685static const insn32 a2t1_ldr_insn = 0xe59fc000;
5686static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5687static const insn32 a2t3_func_addr_insn = 0x00000001;
5688
26079076
PB		 5689#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5690static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5691static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5692
8f6277f5
PB		 5693#define ARM2THUMB_PIC_GLUE_SIZE 16
5694static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5695static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5696static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5697
9b485d32 5698/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5699
8029a119
NC		 5700 .thumb .thumb
5701 .align 2 .align 2
5702 __func_from_thumb: __func_from_thumb:
5703 bx pc push {r6, lr}
5704 nop ldr r6, __func_addr
5705 .arm mov lr, pc
5706 b func bx r6
99059e56
RM		 5707 .arm
5708 ;; back_to_thumb
5709 ldmia r13! {r6, lr}
5710 bx lr
5711 __func_addr:
5712 .word func */
252b5132
RH		 5713
5714#define THUMB2ARM_GLUE_SIZE 8
5715static const insn16 t2a1_bx_pc_insn = 0x4778;
5716static const insn16 t2a2_noop_insn = 0x46c0;
5717static const insn32 t2a3_b_insn = 0xea000000;
5718
c7b8f16e
JB		 5719#define VFP11_ERRATUM_VENEER_SIZE 8
5720
845b51d6
PB		 5721#define ARM_BX_VENEER_SIZE 12
5722static const insn32 armbx1_tst_insn = 0xe3100001;
5723static const insn32 armbx2_moveq_insn = 0x01a0f000;
5724static const insn32 armbx3_bx_insn = 0xe12fff10;
5725
7e392df6 5726#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5727static void
5728arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5729{
5730 asection * s;
8029a119 5731 bfd_byte * contents;
252b5132 5732
8029a119 5733 if (size == 0)
3e6b1042
DJ		 5734 {
5735 /* Do not include empty glue sections in the output. */
5736 if (abfd != NULL)
5737 {
3d4d4302 5738 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5739 if (s != NULL)
5740 s->flags |= SEC_EXCLUDE;
5741 }
5742 return;
5743 }
252b5132 5744
8029a119 5745 BFD_ASSERT (abfd != NULL);
252b5132 5746
3d4d4302 5747 s = bfd_get_linker_section (abfd, name);
8029a119 5748 BFD_ASSERT (s != NULL);
252b5132 5749
21d799b5 5750 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5751
8029a119
NC		 5752 BFD_ASSERT (s->size == size);
5753 s->contents = contents;
5754}
906e58ca 5755
8029a119
NC		 5756bfd_boolean
5757bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5758{
5759 struct elf32_arm_link_hash_table * globals;
906e58ca 5760
8029a119
NC		 5761 globals = elf32_arm_hash_table (info);
5762 BFD_ASSERT (globals != NULL);
906e58ca 5763
8029a119
NC		 5764 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5765 globals->arm_glue_size,
5766 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5767
8029a119
NC		 5768 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5769 globals->thumb_glue_size,
5770 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5771
8029a119
NC		 5772 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5773 globals->vfp11_erratum_glue_size,
5774 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5775
8029a119
NC		 5776 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5777 globals->bx_glue_size,
845b51d6
PB		 5778 ARM_BX_GLUE_SECTION_NAME);
5779
b34976b6 5780 return TRUE;
252b5132
RH		 5781}
5782
a4fd1a8e 5783/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5784 returns the symbol identifying the stub. */
5785
a4fd1a8e 5786static struct elf_link_hash_entry *
57e8b36a
NC		 5787record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5788 struct elf_link_hash_entry * h)
252b5132
RH		 5789{
5790 const char * name = h->root.root.string;
63b0f745 5791 asection * s;
252b5132
RH		 5792 char * tmp_name;
5793 struct elf_link_hash_entry * myh;
14a793b2 5794 struct bfd_link_hash_entry * bh;
252b5132 5795 struct elf32_arm_link_hash_table * globals;
dc810e39 5796 bfd_vma val;
2f475487 5797 bfd_size_type size;
252b5132
RH		 5798
5799 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5800 BFD_ASSERT (globals != NULL);
5801 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5802
3d4d4302 5803 s = bfd_get_linker_section
252b5132
RH		 5804 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5805
252b5132
RH		 5806 BFD_ASSERT (s != NULL);
5807
21d799b5 5808 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5809 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5810
5811 BFD_ASSERT (tmp_name);
5812
5813 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5814
5815 myh = elf_link_hash_lookup
b34976b6 5816 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5817
5818 if (myh != NULL)
5819 {
9b485d32 5820 /* We've already seen this guy. */
252b5132 5821 free (tmp_name);
a4fd1a8e 5822 return myh;
252b5132
RH		 5823 }
5824
57e8b36a
NC		 5825 /* The only trick here is using hash_table->arm_glue_size as the value.
5826 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5827 putting it. The +1 on the value marks that the stub has not been
5828 output yet - not that it is a Thumb function. */
14a793b2 5829 bh = NULL;
dc810e39
AM		 5830 val = globals->arm_glue_size + 1;
5831 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5832 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5833 NULL, TRUE, FALSE, &bh);
252b5132 5834
b7693d02
DJ		 5835 myh = (struct elf_link_hash_entry *) bh;
5836 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5837 myh->forced_local = 1;
5838
252b5132
RH		 5839 free (tmp_name);
5840
27e55c4d
PB		 5841 if (link_info->shared || globals->root.is_relocatable_executable
5842 || globals->pic_veneer)
2f475487 5843 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5844 else if (globals->use_blx)
5845 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5846 else
2f475487
AM		 5847 size = ARM2THUMB_STATIC_GLUE_SIZE;
5848
5849 s->size += size;
5850 globals->arm_glue_size += size;
252b5132 5851
a4fd1a8e 5852 return myh;
252b5132
RH		 5853}
5854
845b51d6
PB		 5855/* Allocate space for ARMv4 BX veneers. */
5856
5857static void
5858record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5859{
5860 asection * s;
5861 struct elf32_arm_link_hash_table *globals;
5862 char *tmp_name;
5863 struct elf_link_hash_entry *myh;
5864 struct bfd_link_hash_entry *bh;
5865 bfd_vma val;
5866
5867 /* BX PC does not need a veneer. */
5868 if (reg == 15)
5869 return;
5870
5871 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5872 BFD_ASSERT (globals != NULL);
5873 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5874
5875 /* Check if this veneer has already been allocated. */
5876 if (globals->bx_glue_offset[reg])
5877 return;
5878
3d4d4302 5879 s = bfd_get_linker_section
845b51d6
PB		 5880 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5881
5882 BFD_ASSERT (s != NULL);
5883
5884 /* Add symbol for veneer. */
21d799b5
NC		 5885 tmp_name = (char *)
5886 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5887
845b51d6 5888 BFD_ASSERT (tmp_name);
906e58ca 5889
845b51d6 5890 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5891
845b51d6
PB		 5892 myh = elf_link_hash_lookup
5893 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5894
845b51d6 5895 BFD_ASSERT (myh == NULL);
906e58ca 5896
845b51d6
PB		 5897 bh = NULL;
5898 val = globals->bx_glue_size;
5899 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
99059e56
RM		 5900 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5901 NULL, TRUE, FALSE, &bh);
845b51d6
PB		 5902
5903 myh = (struct elf_link_hash_entry *) bh;
5904 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5905 myh->forced_local = 1;
5906
5907 s->size += ARM_BX_VENEER_SIZE;
5908 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5909 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5910}
5911
5912
c7b8f16e
JB		 5913/* Add an entry to the code/data map for section SEC. */
5914
5915static void
5916elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5917{
5918 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5919 unsigned int newidx;
906e58ca 5920
c7b8f16e
JB		 5921 if (sec_data->map == NULL)
5922 {
21d799b5 5923 sec_data->map = (elf32_arm_section_map *)
99059e56 5924 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5925 sec_data->mapcount = 0;
5926 sec_data->mapsize = 1;
5927 }
906e58ca 5928
c7b8f16e 5929 newidx = sec_data->mapcount++;
906e58ca 5930
c7b8f16e
JB		 5931 if (sec_data->mapcount > sec_data->mapsize)
5932 {
5933 sec_data->mapsize *= 2;
21d799b5 5934 sec_data->map = (elf32_arm_section_map *)
99059e56
RM		 5935 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5936 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5937 }
5938
5939 if (sec_data->map)
5940 {
5941 sec_data->map[newidx].vma = vma;
5942 sec_data->map[newidx].type = type;
c7b8f16e 5943 }
c7b8f16e
JB		 5944}
5945
5946
5947/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5948 veneers are handled for now. */
5949
5950static bfd_vma
5951record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
99059e56
RM		 5952 elf32_vfp11_erratum_list *branch,
5953 bfd *branch_bfd,
5954 asection *branch_sec,
5955 unsigned int offset)
c7b8f16e
JB		 5956{
5957 asection *s;
5958 struct elf32_arm_link_hash_table *hash_table;
5959 char *tmp_name;
5960 struct elf_link_hash_entry *myh;
5961 struct bfd_link_hash_entry *bh;
5962 bfd_vma val;
5963 struct _arm_elf_section_data *sec_data;
c7b8f16e 5964 elf32_vfp11_erratum_list *newerr;
906e58ca 5965
c7b8f16e 5966 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5967 BFD_ASSERT (hash_table != NULL);
5968 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5969
3d4d4302 5970 s = bfd_get_linker_section
c7b8f16e 5971 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5972
c7b8f16e 5973 sec_data = elf32_arm_section_data (s);
906e58ca 5974
c7b8f16e 5975 BFD_ASSERT (s != NULL);
906e58ca 5976
21d799b5 5977 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 5978 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5979
c7b8f16e 5980 BFD_ASSERT (tmp_name);
906e58ca 5981
c7b8f16e
JB		 5982 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5983 hash_table->num_vfp11_fixes);
906e58ca 5984
c7b8f16e
JB		 5985 myh = elf_link_hash_lookup
5986 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5987
c7b8f16e 5988 BFD_ASSERT (myh == NULL);
906e58ca 5989
c7b8f16e
JB		 5990 bh = NULL;
5991 val = hash_table->vfp11_erratum_glue_size;
5992 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
99059e56
RM		 5993 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5994 NULL, TRUE, FALSE, &bh);
c7b8f16e
JB		 5995
5996 myh = (struct elf_link_hash_entry *) bh;
5997 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5998 myh->forced_local = 1;
5999
6000 /* Link veneer back to calling location. */
c7e2358a 6001 sec_data->erratumcount += 1;
21d799b5
NC		 6002 newerr = (elf32_vfp11_erratum_list *)
6003 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 6004
c7b8f16e
JB		 6005 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6006 newerr->vma = -1;
6007 newerr->u.v.branch = branch;
6008 newerr->u.v.id = hash_table->num_vfp11_fixes;
6009 branch->u.b.veneer = newerr;
6010
6011 newerr->next = sec_data->erratumlist;
6012 sec_data->erratumlist = newerr;
6013
6014 /* A symbol for the return from the veneer. */
6015 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6016 hash_table->num_vfp11_fixes);
6017
6018 myh = elf_link_hash_lookup
6019 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 6020
c7b8f16e
JB		 6021 if (myh != NULL)
6022 abort ();
6023
6024 bh = NULL;
6025 val = offset + 4;
6026 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6027 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 6028
c7b8f16e
JB		 6029 myh = (struct elf_link_hash_entry *) bh;
6030 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6031 myh->forced_local = 1;
6032
6033 free (tmp_name);
906e58ca 6034
c7b8f16e
JB		 6035 /* Generate a mapping symbol for the veneer section, and explicitly add an
6036 entry for that symbol to the code/data map for the section. */
6037 if (hash_table->vfp11_erratum_glue_size == 0)
6038 {
6039 bh = NULL;
6040 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
99059e56 6041 ever requires this erratum fix. */
c7b8f16e
JB		 6042 _bfd_generic_link_add_one_symbol (link_info,
6043 hash_table->bfd_of_glue_owner, "$a",
6044 BSF_LOCAL, s, 0, NULL,
99059e56 6045 TRUE, FALSE, &bh);
c7b8f16e
JB		 6046
6047 myh = (struct elf_link_hash_entry *) bh;
6048 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6049 myh->forced_local = 1;
906e58ca 6050
c7b8f16e 6051 /* The elf32_arm_init_maps function only cares about symbols from input
99059e56
RM		 6052 BFDs. We must make a note of this generated mapping symbol
6053 ourselves so that code byteswapping works properly in
6054 elf32_arm_write_section. */
c7b8f16e
JB		 6055 elf32_arm_section_map_add (s, 'a', 0);
6056 }
906e58ca 6057
c7b8f16e
JB		 6058 s->size += VFP11_ERRATUM_VENEER_SIZE;
6059 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6060 hash_table->num_vfp11_fixes++;
906e58ca 6061
c7b8f16e
JB		 6062 /* The offset of the veneer. */
6063 return val;
6064}
6065
8029a119 6066#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 6067 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6068 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 6069
6070/* Create a fake section for use by the ARM backend of the linker. */
6071
6072static bfd_boolean
6073arm_make_glue_section (bfd * abfd, const char * name)
6074{
6075 asection * sec;
6076
3d4d4302 6077 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6078 if (sec != NULL)
6079 /* Already made. */
6080 return TRUE;
6081
3d4d4302 6082 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6083
6084 if (sec == NULL
6085 || !bfd_set_section_alignment (abfd, sec, 2))
6086 return FALSE;
6087
6088 /* Set the gc mark to prevent the section from being removed by garbage
6089 collection, despite the fact that no relocs refer to this section. */
6090 sec->gc_mark = 1;
6091
6092 return TRUE;
6093}
6094
1db37fe6
YG		 6095/* Set size of .plt entries. This function is called from the
6096 linker scripts in ld/emultempl/{armelf}.em. */
6097
6098void
6099bfd_elf32_arm_use_long_plt (void)
6100{
6101 elf32_arm_use_long_plt_entry = TRUE;
6102}
6103
8afb0e02
NC		 6104/* Add the glue sections to ABFD. This function is called from the
6105 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6106
b34976b6 6107bfd_boolean
57e8b36a
NC		 6108bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6109 struct bfd_link_info *info)
252b5132 6110{
8afb0e02
NC		 6111 /* If we are only performing a partial
6112 link do not bother adding the glue. */
1049f94e 6113 if (info->relocatable)
b34976b6 6114 return TRUE;
252b5132 6115
8029a119
NC		 6116 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6117 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6118 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6119 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6120}
6121
6122/* Select a BFD to be used to hold the sections used by the glue code.
6123 This function is called from the linker scripts in ld/emultempl/
8029a119 6124 {armelf/pe}.em. */
8afb0e02 6125
b34976b6 6126bfd_boolean
57e8b36a 6127bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6128{
6129 struct elf32_arm_link_hash_table *globals;
6130
6131 /* If we are only performing a partial link
6132 do not bother getting a bfd to hold the glue. */
1049f94e 6133 if (info->relocatable)
b34976b6 6134 return TRUE;
8afb0e02 6135
b7693d02
DJ		 6136 /* Make sure we don't attach the glue sections to a dynamic object. */
6137 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6138
8afb0e02 6139 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6140 BFD_ASSERT (globals != NULL);
6141
6142 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6143 return TRUE;
8afb0e02 6144
252b5132
RH		 6145 /* Save the bfd for later use. */
6146 globals->bfd_of_glue_owner = abfd;
cedb70c5 6147
b34976b6 6148 return TRUE;
252b5132
RH		 6149}
6150
906e58ca
NC		 6151static void
6152check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6153{
2de70689
MGD		 6154 int cpu_arch;
6155
b38cadfb 6156 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6157 Tag_CPU_arch);
6158
6159 if (globals->fix_arm1176)
6160 {
6161 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6162 globals->use_blx = 1;
6163 }
6164 else
6165 {
6166 if (cpu_arch > TAG_CPU_ARCH_V4T)
6167 globals->use_blx = 1;
6168 }
39b41c9c
PB		 6169}
6170
b34976b6 6171bfd_boolean
57e8b36a 6172bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6173 struct bfd_link_info *link_info)
252b5132
RH		 6174{
6175 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6176 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6177 Elf_Internal_Rela *irel, *irelend;
6178 bfd_byte *contents = NULL;
252b5132
RH		 6179
6180 asection *sec;
6181 struct elf32_arm_link_hash_table *globals;
6182
6183 /* If we are only performing a partial link do not bother
6184 to construct any glue. */
1049f94e 6185 if (link_info->relocatable)
b34976b6 6186 return TRUE;
252b5132 6187
39ce1a6a
NC		 6188 /* Here we have a bfd that is to be included on the link. We have a
6189 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6190 globals = elf32_arm_hash_table (link_info);
252b5132 6191 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6192
6193 check_use_blx (globals);
252b5132 6194
d504ffc8 6195 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6196 {
d003868e
AM		 6197 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6198 abfd);
e489d0ae
PB		 6199 return FALSE;
6200 }
f21f3fe0 6201
39ce1a6a
NC		 6202 /* PR 5398: If we have not decided to include any loadable sections in
6203 the output then we will not have a glue owner bfd. This is OK, it
6204 just means that there is nothing else for us to do here. */
6205 if (globals->bfd_of_glue_owner == NULL)
6206 return TRUE;
6207
252b5132
RH		 6208 /* Rummage around all the relocs and map the glue vectors. */
6209 sec = abfd->sections;
6210
6211 if (sec == NULL)
b34976b6 6212 return TRUE;
252b5132
RH		 6213
6214 for (; sec != NULL; sec = sec->next)
6215 {
6216 if (sec->reloc_count == 0)
6217 continue;
6218
2f475487
AM		 6219 if ((sec->flags & SEC_EXCLUDE) != 0)
6220 continue;
6221
0ffa91dd 6222 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6223
9b485d32 6224 /* Load the relocs. */
6cdc0ccc 6225 internal_relocs
906e58ca 6226 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6227
6cdc0ccc
AM		 6228 if (internal_relocs == NULL)
6229 goto error_return;
252b5132 6230
6cdc0ccc
AM		 6231 irelend = internal_relocs + sec->reloc_count;
6232 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6233 {
6234 long r_type;
6235 unsigned long r_index;
252b5132
RH		 6236
6237 struct elf_link_hash_entry *h;
6238
6239 r_type = ELF32_R_TYPE (irel->r_info);
6240 r_index = ELF32_R_SYM (irel->r_info);
6241
9b485d32 6242 /* These are the only relocation types we care about. */
ba96a88f 6243 if ( r_type != R_ARM_PC24
845b51d6 6244 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6245 continue;
6246
6247 /* Get the section contents if we haven't done so already. */
6248 if (contents == NULL)
6249 {
6250 /* Get cached copy if it exists. */
6251 if (elf_section_data (sec)->this_hdr.contents != NULL)
6252 contents = elf_section_data (sec)->this_hdr.contents;
6253 else
6254 {
6255 /* Go get them off disk. */
57e8b36a 6256 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6257 goto error_return;
6258 }
6259 }
6260
845b51d6
PB		 6261 if (r_type == R_ARM_V4BX)
6262 {
6263 int reg;
6264
6265 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6266 record_arm_bx_glue (link_info, reg);
6267 continue;
6268 }
6269
a7c10850 6270 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6271 h = NULL;
6272
9b485d32 6273 /* We don't care about local symbols. */
252b5132
RH		 6274 if (r_index < symtab_hdr->sh_info)
6275 continue;
6276
9b485d32 6277 /* This is an external symbol. */
252b5132
RH		 6278 r_index -= symtab_hdr->sh_info;
6279 h = (struct elf_link_hash_entry *)
6280 elf_sym_hashes (abfd)[r_index];
6281
6282 /* If the relocation is against a static symbol it must be within
6283 the current section and so cannot be a cross ARM/Thumb relocation. */
6284 if (h == NULL)
6285 continue;
6286
d504ffc8
DJ		 6287 /* If the call will go through a PLT entry then we do not need
6288 glue. */
362d30a1 6289 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6290 continue;
6291
252b5132
RH		 6292 switch (r_type)
6293 {
6294 case R_ARM_PC24:
6295 /* This one is a call from arm code. We need to look up
99059e56
RM		 6296 the target of the call. If it is a thumb target, we
6297 insert glue. */
35fc36a8 6298 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6299 record_arm_to_thumb_glue (link_info, h);
6300 break;
6301
252b5132 6302 default:
c6596c5e 6303 abort ();
252b5132
RH		 6304 }
6305 }
6cdc0ccc
AM		 6306
6307 if (contents != NULL
6308 && elf_section_data (sec)->this_hdr.contents != contents)
6309 free (contents);
6310 contents = NULL;
6311
6312 if (internal_relocs != NULL
6313 && elf_section_data (sec)->relocs != internal_relocs)
6314 free (internal_relocs);
6315 internal_relocs = NULL;
252b5132
RH		 6316 }
6317
b34976b6 6318 return TRUE;
9a5aca8c 6319
252b5132 6320error_return:
6cdc0ccc
AM		 6321 if (contents != NULL
6322 && elf_section_data (sec)->this_hdr.contents != contents)
6323 free (contents);
6324 if (internal_relocs != NULL
6325 && elf_section_data (sec)->relocs != internal_relocs)
6326 free (internal_relocs);
9a5aca8c 6327
b34976b6 6328 return FALSE;
252b5132 6329}
7e392df6 6330#endif
252b5132 6331
eb043451 6332
c7b8f16e
JB		 6333/* Initialise maps of ARM/Thumb/data for input BFDs. */
6334
6335void
6336bfd_elf32_arm_init_maps (bfd *abfd)
6337{
6338 Elf_Internal_Sym *isymbuf;
6339 Elf_Internal_Shdr *hdr;
6340 unsigned int i, localsyms;
6341
af1f4419
NC		 6342 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6343 if (! is_arm_elf (abfd))
6344 return;
6345
c7b8f16e
JB		 6346 if ((abfd->flags & DYNAMIC) != 0)
6347 return;
6348
0ffa91dd 6349 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6350 localsyms = hdr->sh_info;
6351
6352 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6353 should contain the number of local symbols, which should come before any
6354 global symbols. Mapping symbols are always local. */
6355 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6356 NULL);
6357
6358 /* No internal symbols read? Skip this BFD. */
6359 if (isymbuf == NULL)
6360 return;
6361
6362 for (i = 0; i < localsyms; i++)
6363 {
6364 Elf_Internal_Sym *isym = &isymbuf[i];
6365 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6366 const char *name;
906e58ca 6367
c7b8f16e 6368 if (sec != NULL
99059e56
RM		 6369 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6370 {
6371 name = bfd_elf_string_from_elf_section (abfd,
6372 hdr->sh_link, isym->st_name);
906e58ca 6373
99059e56 6374 if (bfd_is_arm_special_symbol_name (name,
c7b8f16e 6375 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
99059e56
RM		 6376 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6377 }
c7b8f16e
JB		 6378 }
6379}
6380
6381
48229727
JB		 6382/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6383 say what they wanted. */
6384
6385void
6386bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6387{
6388 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6389 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6390
4dfe6ac6
NC		 6391 if (globals == NULL)
6392 return;
6393
48229727
JB		 6394 if (globals->fix_cortex_a8 == -1)
6395 {
6396 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6397 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6398 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6399 || out_attr[Tag_CPU_arch_profile].i == 0))
6400 globals->fix_cortex_a8 = 1;
6401 else
6402 globals->fix_cortex_a8 = 0;
6403 }
6404}
6405
6406
c7b8f16e
JB		 6407void
6408bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6409{
6410 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6411 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6412
4dfe6ac6
NC		 6413 if (globals == NULL)
6414 return;
c7b8f16e
JB		 6415 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6416 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6417 {
6418 switch (globals->vfp11_fix)
99059e56
RM		 6419 {
6420 case BFD_ARM_VFP11_FIX_DEFAULT:
6421 case BFD_ARM_VFP11_FIX_NONE:
6422 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6423 break;
6424
6425 default:
6426 /* Give a warning, but do as the user requests anyway. */
6427 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6428 "workaround is not necessary for target architecture"), obfd);
6429 }
c7b8f16e
JB		 6430 }
6431 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6432 /* For earlier architectures, we might need the workaround, but do not
6433 enable it by default. If users is running with broken hardware, they
6434 must enable the erratum fix explicitly. */
6435 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6436}
6437
6438
906e58ca
NC		 6439enum bfd_arm_vfp11_pipe
6440{
c7b8f16e
JB		 6441 VFP11_FMAC,
6442 VFP11_LS,
6443 VFP11_DS,
6444 VFP11_BAD
6445};
6446
6447/* Return a VFP register number. This is encoded as RX:X for single-precision
6448 registers, or X:RX for double-precision registers, where RX is the group of
6449 four bits in the instruction encoding and X is the single extension bit.
6450 RX and X fields are specified using their lowest (starting) bit. The return
6451 value is:
6452
6453 0...31: single-precision registers s0...s31
6454 32...63: double-precision registers d0...d31.
906e58ca 6455
c7b8f16e
JB		 6456 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6457 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6458
c7b8f16e
JB		 6459static unsigned int
6460bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
99059e56 6461 unsigned int x)
c7b8f16e
JB		 6462{
6463 if (is_double)
6464 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6465 else
6466 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6467}
6468
6469/* Set bits in *WMASK according to a register number REG as encoded by
6470 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6471
6472static void
6473bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6474{
6475 if (reg < 32)
6476 *wmask |= 1 << reg;
6477 else if (reg < 48)
6478 *wmask |= 3 << ((reg - 32) * 2);
6479}
6480
6481/* Return TRUE if WMASK overwrites anything in REGS. */
6482
6483static bfd_boolean
6484bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6485{
6486 int i;
906e58ca 6487
c7b8f16e
JB		 6488 for (i = 0; i < numregs; i++)
6489 {
6490 unsigned int reg = regs[i];
6491
6492 if (reg < 32 && (wmask & (1 << reg)) != 0)
99059e56 6493 return TRUE;
906e58ca 6494
c7b8f16e
JB		 6495 reg -= 32;
6496
6497 if (reg >= 16)
99059e56 6498 continue;
906e58ca 6499
c7b8f16e 6500 if ((wmask & (3 << (reg * 2))) != 0)
99059e56 6501 return TRUE;
c7b8f16e 6502 }
906e58ca 6503
c7b8f16e
JB		 6504 return FALSE;
6505}
6506
6507/* In this function, we're interested in two things: finding input registers
6508 for VFP data-processing instructions, and finding the set of registers which
6509 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6510 hold the written set, so FLDM etc. are easy to deal with (we're only
6511 interested in 32 SP registers or 16 dp registers, due to the VFP version
6512 implemented by the chip in question). DP registers are marked by setting
6513 both SP registers in the write mask). */
6514
6515static enum bfd_arm_vfp11_pipe
6516bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
99059e56 6517 int *numregs)
c7b8f16e 6518{
91d6fa6a 6519 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6520 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6521
6522 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6523 {
6524 unsigned int pqrs;
6525 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6526 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6527
6528 pqrs = ((insn & 0x00800000) >> 20)
99059e56
RM		 6529 | ((insn & 0x00300000) >> 19)
6530 | ((insn & 0x00000040) >> 6);
c7b8f16e
JB		 6531
6532 switch (pqrs)
99059e56
RM		 6533 {
6534 case 0: /* fmac[sd]. */
6535 case 1: /* fnmac[sd]. */
6536 case 2: /* fmsc[sd]. */
6537 case 3: /* fnmsc[sd]. */
6538 vpipe = VFP11_FMAC;
6539 bfd_arm_vfp11_write_mask (destmask, fd);
6540 regs[0] = fd;
6541 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6542 regs[2] = fm;
6543 *numregs = 3;
6544 break;
6545
6546 case 4: /* fmul[sd]. */
6547 case 5: /* fnmul[sd]. */
6548 case 6: /* fadd[sd]. */
6549 case 7: /* fsub[sd]. */
6550 vpipe = VFP11_FMAC;
6551 goto vfp_binop;
6552
6553 case 8: /* fdiv[sd]. */
6554 vpipe = VFP11_DS;
6555 vfp_binop:
6556 bfd_arm_vfp11_write_mask (destmask, fd);
6557 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6558 regs[1] = fm;
6559 *numregs = 2;
6560 break;
6561
6562 case 15: /* extended opcode. */
6563 {
6564 unsigned int extn = ((insn >> 15) & 0x1e)
6565 | ((insn >> 7) & 1);
6566
6567 switch (extn)
6568 {
6569 case 0: /* fcpy[sd]. */
6570 case 1: /* fabs[sd]. */
6571 case 2: /* fneg[sd]. */
6572 case 8: /* fcmp[sd]. */
6573 case 9: /* fcmpe[sd]. */
6574 case 10: /* fcmpz[sd]. */
6575 case 11: /* fcmpez[sd]. */
6576 case 16: /* fuito[sd]. */
6577 case 17: /* fsito[sd]. */
6578 case 24: /* ftoui[sd]. */
6579 case 25: /* ftouiz[sd]. */
6580 case 26: /* ftosi[sd]. */
6581 case 27: /* ftosiz[sd]. */
6582 /* These instructions will not bounce due to underflow. */
6583 *numregs = 0;
6584 vpipe = VFP11_FMAC;
6585 break;
6586
6587 case 3: /* fsqrt[sd]. */
6588 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6589 registers to cause the erratum in previous instructions. */
6590 bfd_arm_vfp11_write_mask (destmask, fd);
6591 vpipe = VFP11_DS;
6592 break;
6593
6594 case 15: /* fcvt{ds,sd}. */
6595 {
6596 int rnum = 0;
6597
6598 bfd_arm_vfp11_write_mask (destmask, fd);
c7b8f16e
JB		 6599
6600 /* Only FCVTSD can underflow. */
99059e56
RM		 6601 if ((insn & 0x100) != 0)
6602 regs[rnum++] = fm;
c7b8f16e 6603
99059e56 6604 *numregs = rnum;
c7b8f16e 6605
99059e56
RM		 6606 vpipe = VFP11_FMAC;
6607 }
6608 break;
c7b8f16e 6609
99059e56
RM		 6610 default:
6611 return VFP11_BAD;
6612 }
6613 }
6614 break;
c7b8f16e 6615
99059e56
RM		 6616 default:
6617 return VFP11_BAD;
6618 }
c7b8f16e
JB		 6619 }
6620 /* Two-register transfer. */
6621 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6622 {
6623 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6624
c7b8f16e
JB		 6625 if ((insn & 0x100000) == 0)
6626 {
99059e56
RM		 6627 if (is_double)
6628 bfd_arm_vfp11_write_mask (destmask, fm);
6629 else
6630 {
6631 bfd_arm_vfp11_write_mask (destmask, fm);
6632 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6633 }
c7b8f16e
JB		 6634 }
6635
91d6fa6a 6636 vpipe = VFP11_LS;
c7b8f16e
JB		 6637 }
6638 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6639 {
6640 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6641 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6642
c7b8f16e 6643 switch (puw)
99059e56
RM		 6644 {
6645 case 0: /* Two-reg transfer. We should catch these above. */
6646 abort ();
906e58ca 6647
99059e56
RM		 6648 case 2: /* fldm[sdx]. */
6649 case 3:
6650 case 5:
6651 {
6652 unsigned int i, offset = insn & 0xff;
c7b8f16e 6653
99059e56
RM		 6654 if (is_double)
6655 offset >>= 1;
c7b8f16e 6656
99059e56
RM		 6657 for (i = fd; i < fd + offset; i++)
6658 bfd_arm_vfp11_write_mask (destmask, i);
6659 }
6660 break;
906e58ca 6661
99059e56
RM		 6662 case 4: /* fld[sd]. */
6663 case 6:
6664 bfd_arm_vfp11_write_mask (destmask, fd);
6665 break;
906e58ca 6666
99059e56
RM		 6667 default:
6668 return VFP11_BAD;
6669 }
c7b8f16e 6670
91d6fa6a 6671 vpipe = VFP11_LS;
c7b8f16e
JB		 6672 }
6673 /* Single-register transfer. Note L==0. */
6674 else if ((insn & 0x0f100e10) == 0x0e000a10)
6675 {
6676 unsigned int opcode = (insn >> 21) & 7;
6677 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6678
6679 switch (opcode)
99059e56
RM		 6680 {
6681 case 0: /* fmsr/fmdlr. */
6682 case 1: /* fmdhr. */
6683 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6684 destination register. I don't know if this is exactly right,
6685 but it is the conservative choice. */
6686 bfd_arm_vfp11_write_mask (destmask, fn);
6687 break;
6688
6689 case 7: /* fmxr. */
6690 break;
6691 }
c7b8f16e 6692
91d6fa6a 6693 vpipe = VFP11_LS;
c7b8f16e
JB		 6694 }
6695
91d6fa6a 6696 return vpipe;
c7b8f16e
JB		 6697}
6698
6699
6700static int elf32_arm_compare_mapping (const void * a, const void * b);
6701
6702
6703/* Look for potentially-troublesome code sequences which might trigger the
6704 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6705 (available from ARM) for details of the erratum. A short version is
6706 described in ld.texinfo. */
6707
6708bfd_boolean
6709bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6710{
6711 asection *sec;
6712 bfd_byte *contents = NULL;
6713 int state = 0;
6714 int regs[3], numregs = 0;
6715 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6716 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6717
4dfe6ac6
NC		 6718 if (globals == NULL)
6719 return FALSE;
6720
c7b8f16e
JB		 6721 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6722 The states transition as follows:
906e58ca 6723
c7b8f16e 6724 0 -> 1 (vector) or 0 -> 2 (scalar)
99059e56
RM		 6725 A VFP FMAC-pipeline instruction has been seen. Fill
6726 regs[0]..regs[numregs-1] with its input operands. Remember this
6727 instruction in 'first_fmac'.
c7b8f16e
JB		 6728
6729 1 -> 2
99059e56
RM		 6730 Any instruction, except for a VFP instruction which overwrites
6731 regs[*].
906e58ca 6732
c7b8f16e
JB		 6733 1 -> 3 [ -> 0 ] or
6734 2 -> 3 [ -> 0 ]
99059e56
RM		 6735 A VFP instruction has been seen which overwrites any of regs[*].
6736 We must make a veneer! Reset state to 0 before examining next
6737 instruction.
906e58ca 6738
c7b8f16e 6739 2 -> 0
99059e56
RM		 6740 If we fail to match anything in state 2, reset to state 0 and reset
6741 the instruction pointer to the instruction after 'first_fmac'.
c7b8f16e
JB		 6742
6743 If the VFP11 vector mode is in use, there must be at least two unrelated
6744 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6745 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6746
6747 /* If we are only performing a partial link do not bother
6748 to construct any glue. */
6749 if (link_info->relocatable)
6750 return TRUE;
6751
0ffa91dd
NC		 6752 /* Skip if this bfd does not correspond to an ELF image. */
6753 if (! is_arm_elf (abfd))
6754 return TRUE;
906e58ca 6755
c7b8f16e
JB		 6756 /* We should have chosen a fix type by the time we get here. */
6757 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6758
6759 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6760 return TRUE;
2e6030b9 6761
33a7ffc2
JM		 6762 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6763 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6764 return TRUE;
6765
c7b8f16e
JB		 6766 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6767 {
6768 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6769 struct _arm_elf_section_data *sec_data;
6770
6771 /* If we don't have executable progbits, we're not interested in this
99059e56 6772 section. Also skip if section is to be excluded. */
c7b8f16e 6773 if (elf_section_type (sec) != SHT_PROGBITS
99059e56
RM		 6774 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6775 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6776 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6777 || sec->output_section == bfd_abs_section_ptr
99059e56
RM		 6778 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6779 continue;
c7b8f16e
JB		 6780
6781 sec_data = elf32_arm_section_data (sec);
906e58ca 6782
c7b8f16e 6783 if (sec_data->mapcount == 0)
99059e56 6784 continue;
906e58ca 6785
c7b8f16e
JB		 6786 if (elf_section_data (sec)->this_hdr.contents != NULL)
6787 contents = elf_section_data (sec)->this_hdr.contents;
6788 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6789 goto error_return;
6790
6791 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6792 elf32_arm_compare_mapping);
6793
6794 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 6795 {
6796 unsigned int span_start = sec_data->map[span].vma;
6797 unsigned int span_end = (span == sec_data->mapcount - 1)
c7b8f16e 6798 ? sec->size : sec_data->map[span + 1].vma;
99059e56
RM		 6799 char span_type = sec_data->map[span].type;
6800
6801 /* FIXME: Only ARM mode is supported at present. We may need to
6802 support Thumb-2 mode also at some point. */
6803 if (span_type != 'a')
6804 continue;
6805
6806 for (i = span_start; i < span_end;)
6807 {
6808 unsigned int next_i = i + 4;
6809 unsigned int insn = bfd_big_endian (abfd)
6810 ? (contents[i] << 24)
6811 | (contents[i + 1] << 16)
6812 | (contents[i + 2] << 8)
6813 | contents[i + 3]
6814 : (contents[i + 3] << 24)
6815 | (contents[i + 2] << 16)
6816 | (contents[i + 1] << 8)
6817 | contents[i];
6818 unsigned int writemask = 0;
6819 enum bfd_arm_vfp11_pipe vpipe;
6820
6821 switch (state)
6822 {
6823 case 0:
6824 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6825 &numregs);
6826 /* I'm assuming the VFP11 erratum can trigger with denorm
6827 operands on either the FMAC or the DS pipeline. This might
6828 lead to slightly overenthusiastic veneer insertion. */
6829 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6830 {
6831 state = use_vector ? 1 : 2;
6832 first_fmac = i;
6833 veneer_of_insn = insn;
6834 }
6835 break;
6836
6837 case 1:
6838 {
6839 int other_regs[3], other_numregs;
6840 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6841 other_regs,
99059e56
RM		 6842 &other_numregs);
6843 if (vpipe != VFP11_BAD
6844 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6845 numregs))
99059e56
RM		 6846 state = 3;
6847 else
6848 state = 2;
6849 }
6850 break;
6851
6852 case 2:
6853 {
6854 int other_regs[3], other_numregs;
6855 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6856 other_regs,
99059e56
RM		 6857 &other_numregs);
6858 if (vpipe != VFP11_BAD
6859 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6860 numregs))
99059e56
RM		 6861 state = 3;
6862 else
6863 {
6864 state = 0;
6865 next_i = first_fmac + 4;
6866 }
6867 }
6868 break;
6869
6870 case 3:
6871 abort (); /* Should be unreachable. */
6872 }
6873
6874 if (state == 3)
6875 {
6876 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6877 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6878
6879 elf32_arm_section_data (sec)->erratumcount += 1;
6880
6881 newerr->u.b.vfp_insn = veneer_of_insn;
6882
6883 switch (span_type)
6884 {
6885 case 'a':
6886 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6887 break;
6888
6889 default:
6890 abort ();
6891 }
6892
6893 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
c7b8f16e
JB		 6894 first_fmac);
6895
99059e56 6896 newerr->vma = -1;
c7b8f16e 6897
99059e56
RM		 6898 newerr->next = sec_data->erratumlist;
6899 sec_data->erratumlist = newerr;
c7b8f16e 6900
99059e56
RM		 6901 state = 0;
6902 }
c7b8f16e 6903
99059e56
RM		 6904 i = next_i;
6905 }
6906 }
906e58ca 6907
c7b8f16e 6908 if (contents != NULL
99059e56
RM		 6909 && elf_section_data (sec)->this_hdr.contents != contents)
6910 free (contents);
c7b8f16e
JB		 6911 contents = NULL;
6912 }
6913
6914 return TRUE;
6915
6916error_return:
6917 if (contents != NULL
6918 && elf_section_data (sec)->this_hdr.contents != contents)
6919 free (contents);
906e58ca 6920
c7b8f16e
JB		 6921 return FALSE;
6922}
6923
6924/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6925 after sections have been laid out, using specially-named symbols. */
6926
6927void
6928bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6929 struct bfd_link_info *link_info)
6930{
6931 asection *sec;
6932 struct elf32_arm_link_hash_table *globals;
6933 char *tmp_name;
906e58ca 6934
c7b8f16e
JB		 6935 if (link_info->relocatable)
6936 return;
2e6030b9
MS		 6937
6938 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6939 if (! is_arm_elf (abfd))
2e6030b9
MS		 6940 return;
6941
c7b8f16e 6942 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6943 if (globals == NULL)
6944 return;
906e58ca 6945
21d799b5 6946 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 6947 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6948
6949 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6950 {
6951 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6952 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6953
c7b8f16e 6954 for (; errnode != NULL; errnode = errnode->next)
99059e56
RM		 6955 {
6956 struct elf_link_hash_entry *myh;
6957 bfd_vma vma;
6958
6959 switch (errnode->type)
6960 {
6961 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6962 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6963 /* Find veneer symbol. */
6964 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
c7b8f16e
JB		 6965 errnode->u.b.veneer->u.v.id);
6966
99059e56
RM		 6967 myh = elf_link_hash_lookup
6968 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6969
99059e56
RM		 6970 if (myh == NULL)
6971 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6972 "`%s'"), abfd, tmp_name);
c7b8f16e 6973
99059e56
RM		 6974 vma = myh->root.u.def.section->output_section->vma
6975 + myh->root.u.def.section->output_offset
6976 + myh->root.u.def.value;
c7b8f16e 6977
99059e56
RM		 6978 errnode->u.b.veneer->vma = vma;
6979 break;
c7b8f16e
JB		 6980
6981 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 6982 case VFP11_ERRATUM_THUMB_VENEER:
6983 /* Find return location. */
6984 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6985 errnode->u.v.id);
c7b8f16e 6986
99059e56
RM		 6987 myh = elf_link_hash_lookup
6988 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6989
99059e56
RM		 6990 if (myh == NULL)
6991 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
c7b8f16e
JB		 6992 "`%s'"), abfd, tmp_name);
6993
99059e56
RM		 6994 vma = myh->root.u.def.section->output_section->vma
6995 + myh->root.u.def.section->output_offset
6996 + myh->root.u.def.value;
c7b8f16e 6997
99059e56
RM		 6998 errnode->u.v.branch->vma = vma;
6999 break;
906e58ca 7000
99059e56
RM		 7001 default:
7002 abort ();
7003 }
7004 }
c7b8f16e 7005 }
906e58ca 7006
c7b8f16e
JB		 7007 free (tmp_name);
7008}
7009
7010
eb043451
PB		 7011/* Set target relocation values needed during linking. */
7012
7013void
bf21ed78
MS		 7014bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7015 struct bfd_link_info *link_info,
eb043451 7016 int target1_is_rel,
319850b4 7017 char * target2_type,
99059e56 7018 int fix_v4bx,
c7b8f16e 7019 int use_blx,
99059e56 7020 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 7021 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 7022 int pic_veneer, int fix_cortex_a8,
7023 int fix_arm1176)
eb043451
PB		 7024{
7025 struct elf32_arm_link_hash_table *globals;
7026
7027 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7028 if (globals == NULL)
7029 return;
eb043451
PB		 7030
7031 globals->target1_is_rel = target1_is_rel;
7032 if (strcmp (target2_type, "rel") == 0)
7033 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 7034 else if (strcmp (target2_type, "abs") == 0)
7035 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 7036 else if (strcmp (target2_type, "got-rel") == 0)
7037 globals->target2_reloc = R_ARM_GOT_PREL;
7038 else
7039 {
7040 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7041 target2_type);
7042 }
319850b4 7043 globals->fix_v4bx = fix_v4bx;
33bfe774 7044 globals->use_blx |= use_blx;
c7b8f16e 7045 globals->vfp11_fix = vfp11_fix;
27e55c4d 7046 globals->pic_veneer = pic_veneer;
48229727 7047 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 7048 globals->fix_arm1176 = fix_arm1176;
bf21ed78 7049
0ffa91dd
NC		 7050 BFD_ASSERT (is_arm_elf (output_bfd));
7051 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 7052 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 7053}
eb043451 7054
12a0a0fd 7055/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 7056
12a0a0fd
PB		 7057static void
7058insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7059{
7060 bfd_vma upper;
7061 bfd_vma lower;
7062 int reloc_sign;
7063
7064 BFD_ASSERT ((offset & 1) == 0);
7065
7066 upper = bfd_get_16 (abfd, insn);
7067 lower = bfd_get_16 (abfd, insn + 2);
7068 reloc_sign = (offset < 0) ? 1 : 0;
7069 upper = (upper & ~(bfd_vma) 0x7ff)
7070 | ((offset >> 12) & 0x3ff)
7071 | (reloc_sign << 10);
906e58ca 7072 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 7073 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7074 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7075 | ((offset >> 1) & 0x7ff);
7076 bfd_put_16 (abfd, upper, insn);
7077 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 7078}
7079
9b485d32
NC		 7080/* Thumb code calling an ARM function. */
7081
252b5132 7082static int
57e8b36a
NC		 7083elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7084 const char * name,
7085 bfd * input_bfd,
7086 bfd * output_bfd,
7087 asection * input_section,
7088 bfd_byte * hit_data,
7089 asection * sym_sec,
7090 bfd_vma offset,
7091 bfd_signed_vma addend,
f2a9dd69
DJ		 7092 bfd_vma val,
7093 char **error_message)
252b5132 7094{
bcbdc74c 7095 asection * s = 0;
dc810e39 7096 bfd_vma my_offset;
252b5132 7097 long int ret_offset;
bcbdc74c
NC		 7098 struct elf_link_hash_entry * myh;
7099 struct elf32_arm_link_hash_table * globals;
252b5132 7100
f2a9dd69 7101 myh = find_thumb_glue (info, name, error_message);
252b5132 7102 if (myh == NULL)
b34976b6 7103 return FALSE;
252b5132
RH		 7104
7105 globals = elf32_arm_hash_table (info);
252b5132
RH		 7106 BFD_ASSERT (globals != NULL);
7107 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7108
7109 my_offset = myh->root.u.def.value;
7110
3d4d4302
AM		 7111 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7112 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7113
7114 BFD_ASSERT (s != NULL);
7115 BFD_ASSERT (s->contents != NULL);
7116 BFD_ASSERT (s->output_section != NULL);
7117
7118 if ((my_offset & 0x01) == 0x01)
7119 {
7120 if (sym_sec != NULL
7121 && sym_sec->owner != NULL
7122 && !INTERWORK_FLAG (sym_sec->owner))
7123 {
8f615d07 7124 (*_bfd_error_handler)
d003868e 7125 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7126 " first occurrence: %B: Thumb call to ARM"),
d003868e 7127 sym_sec->owner, input_bfd, name);
252b5132 7128
b34976b6 7129 return FALSE;
252b5132
RH		 7130 }
7131
7132 --my_offset;
7133 myh->root.u.def.value = my_offset;
7134
52ab56c2
PB		 7135 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7136 s->contents + my_offset);
252b5132 7137
52ab56c2
PB		 7138 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7139 s->contents + my_offset + 2);
252b5132
RH		 7140
7141 ret_offset =
9b485d32
NC		 7142 /* Address of destination of the stub. */
7143 ((bfd_signed_vma) val)
252b5132 7144 - ((bfd_signed_vma)
57e8b36a
NC		 7145 /* Offset from the start of the current section
7146 to the start of the stubs. */
9b485d32
NC		 7147 (s->output_offset
7148 /* Offset of the start of this stub from the start of the stubs. */
7149 + my_offset
7150 /* Address of the start of the current section. */
7151 + s->output_section->vma)
7152 /* The branch instruction is 4 bytes into the stub. */
7153 + 4
7154 /* ARM branches work from the pc of the instruction + 8. */
7155 + 8);
252b5132 7156
52ab56c2
PB		 7157 put_arm_insn (globals, output_bfd,
7158 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7159 s->contents + my_offset + 4);
252b5132
RH		 7160 }
7161
7162 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7163
427bfd90
NC		 7164 /* Now go back and fix up the original BL insn to point to here. */
7165 ret_offset =
7166 /* Address of where the stub is located. */
7167 (s->output_section->vma + s->output_offset + my_offset)
7168 /* Address of where the BL is located. */
57e8b36a
NC		 7169 - (input_section->output_section->vma + input_section->output_offset
7170 + offset)
427bfd90
NC		 7171 /* Addend in the relocation. */
7172 - addend
7173 /* Biassing for PC-relative addressing. */
7174 - 8;
252b5132 7175
12a0a0fd 7176 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7177
b34976b6 7178 return TRUE;
252b5132
RH		 7179}
7180
a4fd1a8e 7181/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7182
a4fd1a8e
PB		 7183static struct elf_link_hash_entry *
7184elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7185 const char * name,
7186 bfd * input_bfd,
7187 bfd * output_bfd,
7188 asection * sym_sec,
7189 bfd_vma val,
8029a119
NC		 7190 asection * s,
7191 char ** error_message)
252b5132 7192{
dc810e39 7193 bfd_vma my_offset;
252b5132 7194 long int ret_offset;
bcbdc74c
NC		 7195 struct elf_link_hash_entry * myh;
7196 struct elf32_arm_link_hash_table * globals;
252b5132 7197
f2a9dd69 7198 myh = find_arm_glue (info, name, error_message);
252b5132 7199 if (myh == NULL)
a4fd1a8e 7200 return NULL;
252b5132
RH		 7201
7202 globals = elf32_arm_hash_table (info);
252b5132
RH		 7203 BFD_ASSERT (globals != NULL);
7204 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7205
7206 my_offset = myh->root.u.def.value;
252b5132
RH		 7207
7208 if ((my_offset & 0x01) == 0x01)
7209 {
7210 if (sym_sec != NULL
7211 && sym_sec->owner != NULL
7212 && !INTERWORK_FLAG (sym_sec->owner))
7213 {
8f615d07 7214 (*_bfd_error_handler)
d003868e
AM		 7215 (_("%B(%s): warning: interworking not enabled.\n"
7216 " first occurrence: %B: arm call to thumb"),
7217 sym_sec->owner, input_bfd, name);
252b5132 7218 }
9b485d32 7219
252b5132
RH		 7220 --my_offset;
7221 myh->root.u.def.value = my_offset;
7222
27e55c4d
PB		 7223 if (info->shared || globals->root.is_relocatable_executable
7224 || globals->pic_veneer)
8f6277f5
PB		 7225 {
7226 /* For relocatable objects we can't use absolute addresses,
7227 so construct the address from a relative offset. */
7228 /* TODO: If the offset is small it's probably worth
7229 constructing the address with adds. */
52ab56c2
PB		 7230 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7231 s->contents + my_offset);
7232 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7233 s->contents + my_offset + 4);
7234 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7235 s->contents + my_offset + 8);
8f6277f5
PB		 7236 /* Adjust the offset by 4 for the position of the add,
7237 and 8 for the pipeline offset. */
7238 ret_offset = (val - (s->output_offset
7239 + s->output_section->vma
7240 + my_offset + 12))
7241 | 1;
7242 bfd_put_32 (output_bfd, ret_offset,
7243 s->contents + my_offset + 12);
7244 }
26079076
PB		 7245 else if (globals->use_blx)
7246 {
7247 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7248 s->contents + my_offset);
7249
7250 /* It's a thumb address. Add the low order bit. */
7251 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7252 s->contents + my_offset + 4);
7253 }
8f6277f5
PB		 7254 else
7255 {
52ab56c2
PB		 7256 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7257 s->contents + my_offset);
252b5132 7258
52ab56c2
PB		 7259 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7260 s->contents + my_offset + 4);
252b5132 7261
8f6277f5
PB		 7262 /* It's a thumb address. Add the low order bit. */
7263 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7264 s->contents + my_offset + 8);
8029a119
NC		 7265
7266 my_offset += 12;
8f6277f5 7267 }
252b5132
RH		 7268 }
7269
7270 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7271
a4fd1a8e
PB		 7272 return myh;
7273}
7274
7275/* Arm code calling a Thumb function. */
7276
7277static int
7278elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7279 const char * name,
7280 bfd * input_bfd,
7281 bfd * output_bfd,
7282 asection * input_section,
7283 bfd_byte * hit_data,
7284 asection * sym_sec,
7285 bfd_vma offset,
7286 bfd_signed_vma addend,
f2a9dd69
DJ		 7287 bfd_vma val,
7288 char **error_message)
a4fd1a8e
PB		 7289{
7290 unsigned long int tmp;
7291 bfd_vma my_offset;
7292 asection * s;
7293 long int ret_offset;
7294 struct elf_link_hash_entry * myh;
7295 struct elf32_arm_link_hash_table * globals;
7296
7297 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7298 BFD_ASSERT (globals != NULL);
7299 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7300
3d4d4302
AM		 7301 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7302 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7303 BFD_ASSERT (s != NULL);
7304 BFD_ASSERT (s->contents != NULL);
7305 BFD_ASSERT (s->output_section != NULL);
7306
7307 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7308 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7309 if (!myh)
7310 return FALSE;
7311
7312 my_offset = myh->root.u.def.value;
252b5132
RH		 7313 tmp = bfd_get_32 (input_bfd, hit_data);
7314 tmp = tmp & 0xFF000000;
7315
9b485d32 7316 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7317 ret_offset = (s->output_offset
7318 + my_offset
7319 + s->output_section->vma
7320 - (input_section->output_offset
7321 + input_section->output_section->vma
7322 + offset + addend)
7323 - 8);
9a5aca8c 7324
252b5132
RH		 7325 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7326
dc810e39 7327 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7328
b34976b6 7329 return TRUE;
252b5132
RH		 7330}
7331
a4fd1a8e
PB		 7332/* Populate Arm stub for an exported Thumb function. */
7333
7334static bfd_boolean
7335elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7336{
7337 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7338 asection * s;
7339 struct elf_link_hash_entry * myh;
7340 struct elf32_arm_link_hash_entry *eh;
7341 struct elf32_arm_link_hash_table * globals;
7342 asection *sec;
7343 bfd_vma val;
f2a9dd69 7344 char *error_message;
a4fd1a8e 7345
906e58ca 7346 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7347 /* Allocate stubs for exported Thumb functions on v4t. */
7348 if (eh->export_glue == NULL)
7349 return TRUE;
7350
7351 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7352 BFD_ASSERT (globals != NULL);
7353 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7354
3d4d4302
AM		 7355 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7356 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7357 BFD_ASSERT (s != NULL);
7358 BFD_ASSERT (s->contents != NULL);
7359 BFD_ASSERT (s->output_section != NULL);
7360
7361 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7362
7363 BFD_ASSERT (sec->output_section != NULL);
7364
a4fd1a8e
PB		 7365 val = eh->export_glue->root.u.def.value + sec->output_offset
7366 + sec->output_section->vma;
8029a119 7367
a4fd1a8e
PB		 7368 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7369 h->root.u.def.section->owner,
f2a9dd69
DJ		 7370 globals->obfd, sec, val, s,
7371 &error_message);
a4fd1a8e
PB		 7372 BFD_ASSERT (myh);
7373 return TRUE;
7374}
7375
845b51d6
PB		 7376/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7377
7378static bfd_vma
7379elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7380{
7381 bfd_byte *p;
7382 bfd_vma glue_addr;
7383 asection *s;
7384 struct elf32_arm_link_hash_table *globals;
7385
7386 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7387 BFD_ASSERT (globals != NULL);
7388 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7389
3d4d4302
AM		 7390 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7391 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7392 BFD_ASSERT (s != NULL);
7393 BFD_ASSERT (s->contents != NULL);
7394 BFD_ASSERT (s->output_section != NULL);
7395
7396 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7397
7398 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7399
7400 if ((globals->bx_glue_offset[reg] & 1) == 0)
7401 {
7402 p = s->contents + glue_addr;
7403 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7404 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7405 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7406 globals->bx_glue_offset[reg] |= 1;
7407 }
7408
7409 return glue_addr + s->output_section->vma + s->output_offset;
7410}
7411
a4fd1a8e
PB		 7412/* Generate Arm stubs for exported Thumb symbols. */
7413static void
906e58ca 7414elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7415 struct bfd_link_info *link_info)
7416{
7417 struct elf32_arm_link_hash_table * globals;
7418
8029a119
NC		 7419 if (link_info == NULL)
7420 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7421 return;
7422
7423 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7424 if (globals == NULL)
7425 return;
7426
84c08195
PB		 7427 /* If blx is available then exported Thumb symbols are OK and there is
7428 nothing to do. */
a4fd1a8e
PB		 7429 if (globals->use_blx)
7430 return;
7431
7432 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7433 link_info);
7434}
7435
47beaa6a
RS		 7436/* Reserve space for COUNT dynamic relocations in relocation selection
7437 SRELOC. */
7438
7439static void
7440elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7441 bfd_size_type count)
7442{
7443 struct elf32_arm_link_hash_table *htab;
7444
7445 htab = elf32_arm_hash_table (info);
7446 BFD_ASSERT (htab->root.dynamic_sections_created);
7447 if (sreloc == NULL)
7448 abort ();
7449 sreloc->size += RELOC_SIZE (htab) * count;
7450}
7451
34e77a92
RS		 7452/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7453 dynamic, the relocations should go in SRELOC, otherwise they should
7454 go in the special .rel.iplt section. */
7455
7456static void
7457elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7458 bfd_size_type count)
7459{
7460 struct elf32_arm_link_hash_table *htab;
7461
7462 htab = elf32_arm_hash_table (info);
7463 if (!htab->root.dynamic_sections_created)
7464 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7465 else
7466 {
7467 BFD_ASSERT (sreloc != NULL);
7468 sreloc->size += RELOC_SIZE (htab) * count;
7469 }
7470}
7471
47beaa6a
RS		 7472/* Add relocation REL to the end of relocation section SRELOC. */
7473
7474static void
7475elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7476 asection *sreloc, Elf_Internal_Rela *rel)
7477{
7478 bfd_byte *loc;
7479 struct elf32_arm_link_hash_table *htab;
7480
7481 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7482 if (!htab->root.dynamic_sections_created
7483 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7484 sreloc = htab->root.irelplt;
47beaa6a
RS		 7485 if (sreloc == NULL)
7486 abort ();
7487 loc = sreloc->contents;
7488 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7489 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7490 abort ();
7491 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7492}
7493
34e77a92
RS		 7494/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7495 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7496 to .plt. */
7497
7498static void
7499elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7500 bfd_boolean is_iplt_entry,
7501 union gotplt_union *root_plt,
7502 struct arm_plt_info *arm_plt)
7503{
7504 struct elf32_arm_link_hash_table *htab;
7505 asection *splt;
7506 asection *sgotplt;
7507
7508 htab = elf32_arm_hash_table (info);
7509
7510 if (is_iplt_entry)
7511 {
7512 splt = htab->root.iplt;
7513 sgotplt = htab->root.igotplt;
7514
99059e56
RM		 7515 /* NaCl uses a special first entry in .iplt too. */
7516 if (htab->nacl_p && splt->size == 0)
7517 splt->size += htab->plt_header_size;
7518
34e77a92
RS		 7519 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7520 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7521 }
7522 else
7523 {
7524 splt = htab->root.splt;
7525 sgotplt = htab->root.sgotplt;
7526
7527 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7528 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7529
7530 /* If this is the first .plt entry, make room for the special
7531 first entry. */
7532 if (splt->size == 0)
7533 splt->size += htab->plt_header_size;
9f19ab6d
WN		 7534
7535 htab->next_tls_desc_index++;
34e77a92
RS		 7536 }
7537
7538 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7539 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7540 splt->size += PLT_THUMB_STUB_SIZE;
7541 root_plt->offset = splt->size;
7542 splt->size += htab->plt_entry_size;
7543
7544 if (!htab->symbian_p)
7545 {
7546 /* We also need to make an entry in the .got.plt section, which
7547 will be placed in the .got section by the linker script. */
9f19ab6d
WN		 7548 if (is_iplt_entry)
7549 arm_plt->got_offset = sgotplt->size;
7550 else
7551 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
34e77a92
RS		 7552 sgotplt->size += 4;
7553 }
7554}
7555
b38cadfb
NC		 7556static bfd_vma
7557arm_movw_immediate (bfd_vma value)
7558{
7559 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7560}
7561
7562static bfd_vma
7563arm_movt_immediate (bfd_vma value)
7564{
7565 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7566}
7567
34e77a92
RS		 7568/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7569 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7570 Otherwise, DYNINDX is the index of the symbol in the dynamic
7571 symbol table and SYM_VALUE is undefined.
7572
7573 ROOT_PLT points to the offset of the PLT entry from the start of its
7574 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
57460bcf 7575 bookkeeping information.
34e77a92 7576
57460bcf
NC		 7577 Returns FALSE if there was a problem. */
7578
7579static bfd_boolean
34e77a92
RS		 7580elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7581 union gotplt_union *root_plt,
7582 struct arm_plt_info *arm_plt,
7583 int dynindx, bfd_vma sym_value)
7584{
7585 struct elf32_arm_link_hash_table *htab;
7586 asection *sgot;
7587 asection *splt;
7588 asection *srel;
7589 bfd_byte *loc;
7590 bfd_vma plt_index;
7591 Elf_Internal_Rela rel;
7592 bfd_vma plt_header_size;
7593 bfd_vma got_header_size;
7594
7595 htab = elf32_arm_hash_table (info);
7596
7597 /* Pick the appropriate sections and sizes. */
7598 if (dynindx == -1)
7599 {
7600 splt = htab->root.iplt;
7601 sgot = htab->root.igotplt;
7602 srel = htab->root.irelplt;
7603
7604 /* There are no reserved entries in .igot.plt, and no special
7605 first entry in .iplt. */
7606 got_header_size = 0;
7607 plt_header_size = 0;
7608 }
7609 else
7610 {
7611 splt = htab->root.splt;
7612 sgot = htab->root.sgotplt;
7613 srel = htab->root.srelplt;
7614
7615 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7616 plt_header_size = htab->plt_header_size;
7617 }
7618 BFD_ASSERT (splt != NULL && srel != NULL);
7619
7620 /* Fill in the entry in the procedure linkage table. */
7621 if (htab->symbian_p)
7622 {
7623 BFD_ASSERT (dynindx >= 0);
7624 put_arm_insn (htab, output_bfd,
7625 elf32_arm_symbian_plt_entry[0],
7626 splt->contents + root_plt->offset);
7627 bfd_put_32 (output_bfd,
7628 elf32_arm_symbian_plt_entry[1],
7629 splt->contents + root_plt->offset + 4);
7630
7631 /* Fill in the entry in the .rel.plt section. */
7632 rel.r_offset = (splt->output_section->vma
7633 + splt->output_offset
7634 + root_plt->offset + 4);
7635 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7636
7637 /* Get the index in the procedure linkage table which
7638 corresponds to this symbol. This is the index of this symbol
7639 in all the symbols for which we are making plt entries. The
7640 first entry in the procedure linkage table is reserved. */
7641 plt_index = ((root_plt->offset - plt_header_size)
7642 / htab->plt_entry_size);
7643 }
7644 else
7645 {
7646 bfd_vma got_offset, got_address, plt_address;
7647 bfd_vma got_displacement, initial_got_entry;
7648 bfd_byte * ptr;
7649
7650 BFD_ASSERT (sgot != NULL);
7651
7652 /* Get the offset into the .(i)got.plt table of the entry that
7653 corresponds to this function. */
7654 got_offset = (arm_plt->got_offset & -2);
7655
7656 /* Get the index in the procedure linkage table which
7657 corresponds to this symbol. This is the index of this symbol
7658 in all the symbols for which we are making plt entries.
7659 After the reserved .got.plt entries, all symbols appear in
7660 the same order as in .plt. */
7661 plt_index = (got_offset - got_header_size) / 4;
7662
7663 /* Calculate the address of the GOT entry. */
7664 got_address = (sgot->output_section->vma
7665 + sgot->output_offset
7666 + got_offset);
7667
7668 /* ...and the address of the PLT entry. */
7669 plt_address = (splt->output_section->vma
7670 + splt->output_offset
7671 + root_plt->offset);
7672
7673 ptr = splt->contents + root_plt->offset;
7674 if (htab->vxworks_p && info->shared)
7675 {
7676 unsigned int i;
7677 bfd_vma val;
7678
7679 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7680 {
7681 val = elf32_arm_vxworks_shared_plt_entry[i];
7682 if (i == 2)
7683 val |= got_address - sgot->output_section->vma;
7684 if (i == 5)
7685 val |= plt_index * RELOC_SIZE (htab);
7686 if (i == 2 || i == 5)
7687 bfd_put_32 (output_bfd, val, ptr);
7688 else
7689 put_arm_insn (htab, output_bfd, val, ptr);
7690 }
7691 }
7692 else if (htab->vxworks_p)
7693 {
7694 unsigned int i;
7695 bfd_vma val;
7696
7697 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7698 {
7699 val = elf32_arm_vxworks_exec_plt_entry[i];
7700 if (i == 2)
7701 val |= got_address;
7702 if (i == 4)
7703 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7704 if (i == 5)
7705 val |= plt_index * RELOC_SIZE (htab);
7706 if (i == 2 || i == 5)
7707 bfd_put_32 (output_bfd, val, ptr);
7708 else
7709 put_arm_insn (htab, output_bfd, val, ptr);
7710 }
7711
7712 loc = (htab->srelplt2->contents
7713 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7714
7715 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7716 referencing the GOT for this PLT entry. */
7717 rel.r_offset = plt_address + 8;
7718 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7719 rel.r_addend = got_offset;
7720 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7721 loc += RELOC_SIZE (htab);
7722
7723 /* Create the R_ARM_ABS32 relocation referencing the
7724 beginning of the PLT for this GOT entry. */
7725 rel.r_offset = got_address;
7726 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7727 rel.r_addend = 0;
7728 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7729 }
b38cadfb
NC		 7730 else if (htab->nacl_p)
7731 {
7732 /* Calculate the displacement between the PLT slot and the
7733 common tail that's part of the special initial PLT slot. */
6034aab8 7734 int32_t tail_displacement
b38cadfb
NC		 7735 = ((splt->output_section->vma + splt->output_offset
7736 + ARM_NACL_PLT_TAIL_OFFSET)
7737 - (plt_address + htab->plt_entry_size + 4));
7738 BFD_ASSERT ((tail_displacement & 3) == 0);
7739 tail_displacement >>= 2;
7740
7741 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7742 || (-tail_displacement & 0xff000000) == 0);
7743
7744 /* Calculate the displacement between the PLT slot and the entry
7745 in the GOT. The offset accounts for the value produced by
7746 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8 7747 got_displacement = (got_address
99059e56 7748 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7749
7750 /* NaCl does not support interworking at all. */
7751 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7752
7753 put_arm_insn (htab, output_bfd,
7754 elf32_arm_nacl_plt_entry[0]
7755 | arm_movw_immediate (got_displacement),
7756 ptr + 0);
7757 put_arm_insn (htab, output_bfd,
7758 elf32_arm_nacl_plt_entry[1]
7759 | arm_movt_immediate (got_displacement),
7760 ptr + 4);
7761 put_arm_insn (htab, output_bfd,
7762 elf32_arm_nacl_plt_entry[2],
7763 ptr + 8);
7764 put_arm_insn (htab, output_bfd,
7765 elf32_arm_nacl_plt_entry[3]
7766 | (tail_displacement & 0x00ffffff),
7767 ptr + 12);
7768 }
57460bcf
NC		 7769 else if (using_thumb_only (htab))
7770 {
eed94f8f 7771 /* PR ld/16017: Generate thumb only PLT entries. */
469a3493 7772 if (!using_thumb2 (htab))
eed94f8f
NC		 7773 {
7774 /* FIXME: We ought to be able to generate thumb-1 PLT
7775 instructions... */
7776 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
7777 output_bfd);
7778 return FALSE;
7779 }
57460bcf 7780
eed94f8f
NC		 7781 /* Calculate the displacement between the PLT slot and the entry in
7782 the GOT. The 12-byte offset accounts for the value produced by
7783 adding to pc in the 3rd instruction of the PLT stub. */
7784 got_displacement = got_address - (plt_address + 12);
7785
7786 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
7787 instead of 'put_thumb_insn'. */
7788 put_arm_insn (htab, output_bfd,
7789 elf32_thumb2_plt_entry[0]
7790 | ((got_displacement & 0x000000ff) << 16)
7791 | ((got_displacement & 0x00000700) << 20)
7792 | ((got_displacement & 0x00000800) >> 1)
7793 | ((got_displacement & 0x0000f000) >> 12),
7794 ptr + 0);
7795 put_arm_insn (htab, output_bfd,
7796 elf32_thumb2_plt_entry[1]
7797 | ((got_displacement & 0x00ff0000) )
7798 | ((got_displacement & 0x07000000) << 4)
7799 | ((got_displacement & 0x08000000) >> 17)
7800 | ((got_displacement & 0xf0000000) >> 28),
7801 ptr + 4);
7802 put_arm_insn (htab, output_bfd,
7803 elf32_thumb2_plt_entry[2],
7804 ptr + 8);
7805 put_arm_insn (htab, output_bfd,
7806 elf32_thumb2_plt_entry[3],
7807 ptr + 12);
57460bcf 7808 }
34e77a92
RS		 7809 else
7810 {
7811 /* Calculate the displacement between the PLT slot and the
7812 entry in the GOT. The eight-byte offset accounts for the
7813 value produced by adding to pc in the first instruction
7814 of the PLT stub. */
7815 got_displacement = got_address - (plt_address + 8);
7816
34e77a92
RS		 7817 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7818 {
7819 put_thumb_insn (htab, output_bfd,
7820 elf32_arm_plt_thumb_stub[0], ptr - 4);
7821 put_thumb_insn (htab, output_bfd,
7822 elf32_arm_plt_thumb_stub[1], ptr - 2);
7823 }
7824
1db37fe6
YG		 7825 if (!elf32_arm_use_long_plt_entry)
7826 {
7827 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7828
7829 put_arm_insn (htab, output_bfd,
7830 elf32_arm_plt_entry_short[0]
7831 | ((got_displacement & 0x0ff00000) >> 20),
7832 ptr + 0);
7833 put_arm_insn (htab, output_bfd,
7834 elf32_arm_plt_entry_short[1]
7835 | ((got_displacement & 0x000ff000) >> 12),
7836 ptr+ 4);
7837 put_arm_insn (htab, output_bfd,
7838 elf32_arm_plt_entry_short[2]
7839 | (got_displacement & 0x00000fff),
7840 ptr + 8);
34e77a92 7841#ifdef FOUR_WORD_PLT
1db37fe6 7842 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
34e77a92 7843#endif
1db37fe6
YG		 7844 }
7845 else
7846 {
7847 put_arm_insn (htab, output_bfd,
7848 elf32_arm_plt_entry_long[0]
7849 | ((got_displacement & 0xf0000000) >> 28),
7850 ptr + 0);
7851 put_arm_insn (htab, output_bfd,
7852 elf32_arm_plt_entry_long[1]
7853 | ((got_displacement & 0x0ff00000) >> 20),
7854 ptr + 4);
7855 put_arm_insn (htab, output_bfd,
7856 elf32_arm_plt_entry_long[2]
7857 | ((got_displacement & 0x000ff000) >> 12),
7858 ptr+ 8);
7859 put_arm_insn (htab, output_bfd,
7860 elf32_arm_plt_entry_long[3]
7861 | (got_displacement & 0x00000fff),
7862 ptr + 12);
7863 }
34e77a92
RS		 7864 }
7865
7866 /* Fill in the entry in the .rel(a).(i)plt section. */
7867 rel.r_offset = got_address;
7868 rel.r_addend = 0;
7869 if (dynindx == -1)
7870 {
7871 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7872 The dynamic linker or static executable then calls SYM_VALUE
7873 to determine the correct run-time value of the .igot.plt entry. */
7874 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7875 initial_got_entry = sym_value;
7876 }
7877 else
7878 {
7879 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7880 initial_got_entry = (splt->output_section->vma
7881 + splt->output_offset);
7882 }
7883
7884 /* Fill in the entry in the global offset table. */
7885 bfd_put_32 (output_bfd, initial_got_entry,
7886 sgot->contents + got_offset);
7887 }
7888
aba8c3de
WN		 7889 if (dynindx == -1)
7890 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7891 else
7892 {
7893 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7894 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7895 }
57460bcf
NC		 7896
7897 return TRUE;
34e77a92
RS		 7898}
7899
eb043451
PB		 7900/* Some relocations map to different relocations depending on the
7901 target. Return the real relocation. */
8029a119 7902
eb043451
PB		 7903static int
7904arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7905 int r_type)
7906{
7907 switch (r_type)
7908 {
7909 case R_ARM_TARGET1:
7910 if (globals->target1_is_rel)
7911 return R_ARM_REL32;
7912 else
7913 return R_ARM_ABS32;
7914
7915 case R_ARM_TARGET2:
7916 return globals->target2_reloc;
7917
7918 default:
7919 return r_type;
7920 }
7921}
eb043451 7922
ba93b8ac
DJ		 7923/* Return the base VMA address which should be subtracted from real addresses
7924 when resolving @dtpoff relocation.
7925 This is PT_TLS segment p_vaddr. */
7926
7927static bfd_vma
7928dtpoff_base (struct bfd_link_info *info)
7929{
7930 /* If tls_sec is NULL, we should have signalled an error already. */
7931 if (elf_hash_table (info)->tls_sec == NULL)
7932 return 0;
7933 return elf_hash_table (info)->tls_sec->vma;
7934}
7935
7936/* Return the relocation value for @tpoff relocation
7937 if STT_TLS virtual address is ADDRESS. */
7938
7939static bfd_vma
7940tpoff (struct bfd_link_info *info, bfd_vma address)
7941{
7942 struct elf_link_hash_table *htab = elf_hash_table (info);
7943 bfd_vma base;
7944
7945 /* If tls_sec is NULL, we should have signalled an error already. */
7946 if (htab->tls_sec == NULL)
7947 return 0;
7948 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7949 return address - htab->tls_sec->vma + base;
7950}
7951
00a97672
RS		 7952/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7953 VALUE is the relocation value. */
7954
7955static bfd_reloc_status_type
7956elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7957{
7958 if (value > 0xfff)
7959 return bfd_reloc_overflow;
7960
7961 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7962 bfd_put_32 (abfd, value, data);
7963 return bfd_reloc_ok;
7964}
7965
0855e32b
NS		 7966/* Handle TLS relaxations. Relaxing is possible for symbols that use
7967 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7968 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7969
7970 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7971 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7972 case of error.
7973
7974 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7975 the pre-relaxed code. It would be nice if the relocs were updated
7976 to match the optimization. */
0855e32b 7977
b38cadfb 7978static bfd_reloc_status_type
0855e32b 7979elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7980 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7981 Elf_Internal_Rela *rel, unsigned long is_local)
7982{
7983 unsigned long insn;
b38cadfb 7984
0855e32b
NS		 7985 switch (ELF32_R_TYPE (rel->r_info))
7986 {
7987 default:
7988 return bfd_reloc_notsupported;
b38cadfb 7989
0855e32b
NS		 7990 case R_ARM_TLS_GOTDESC:
7991 if (is_local)
7992 insn = 0;
7993 else
7994 {
7995 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7996 if (insn & 1)
7997 insn -= 5; /* THUMB */
7998 else
7999 insn -= 8; /* ARM */
8000 }
8001 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8002 return bfd_reloc_continue;
8003
8004 case R_ARM_THM_TLS_DESCSEQ:
8005 /* Thumb insn. */
8006 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8007 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8008 {
8009 if (is_local)
8010 /* nop */
8011 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8012 }
8013 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8014 {
8015 if (is_local)
8016 /* nop */
8017 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8018 else
8019 /* ldr rx,[ry] */
8020 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8021 }
8022 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8023 {
8024 if (is_local)
8025 /* nop */
8026 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8027 else
8028 /* mov r0, rx */
8029 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8030 contents + rel->r_offset);
8031 }
8032 else
8033 {
8034 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8035 /* It's a 32 bit instruction, fetch the rest of it for
8036 error generation. */
8037 insn = (insn << 16)
8038 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8039 (*_bfd_error_handler)
8040 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8041 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8042 return bfd_reloc_notsupported;
8043 }
8044 break;
b38cadfb 8045
0855e32b
NS		 8046 case R_ARM_TLS_DESCSEQ:
8047 /* arm insn. */
8048 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8049 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8050 {
8051 if (is_local)
8052 /* mov rx, ry */
8053 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8054 contents + rel->r_offset);
8055 }
8056 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8057 {
8058 if (is_local)
8059 /* nop */
8060 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8061 else
8062 /* ldr rx,[ry] */
8063 bfd_put_32 (input_bfd, insn & 0xfffff000,
8064 contents + rel->r_offset);
8065 }
8066 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8067 {
8068 if (is_local)
8069 /* nop */
8070 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8071 else
8072 /* mov r0, rx */
8073 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8074 contents + rel->r_offset);
8075 }
8076 else
8077 {
8078 (*_bfd_error_handler)
8079 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8080 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8081 return bfd_reloc_notsupported;
8082 }
8083 break;
8084
8085 case R_ARM_TLS_CALL:
8086 /* GD->IE relaxation, turn the instruction into 'nop' or
8087 'ldr r0, [pc,r0]' */
8088 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8089 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8090 break;
b38cadfb 8091
0855e32b 8092 case R_ARM_THM_TLS_CALL:
6a631e86 8093 /* GD->IE relaxation. */
0855e32b
NS		 8094 if (!is_local)
8095 /* add r0,pc; ldr r0, [r0] */
8096 insn = 0x44786800;
8097 else if (arch_has_thumb2_nop (globals))
8098 /* nop.w */
8099 insn = 0xf3af8000;
8100 else
8101 /* nop; nop */
8102 insn = 0xbf00bf00;
b38cadfb 8103
0855e32b
NS		 8104 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8105 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8106 break;
8107 }
8108 return bfd_reloc_ok;
8109}
8110
4962c51a
MS		 8111/* For a given value of n, calculate the value of G_n as required to
8112 deal with group relocations. We return it in the form of an
8113 encoded constant-and-rotation, together with the final residual. If n is
8114 specified as less than zero, then final_residual is filled with the
8115 input value and no further action is performed. */
8116
8117static bfd_vma
8118calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8119{
8120 int current_n;
8121 bfd_vma g_n;
8122 bfd_vma encoded_g_n = 0;
8123 bfd_vma residual = value; /* Also known as Y_n. */
8124
8125 for (current_n = 0; current_n <= n; current_n++)
8126 {
8127 int shift;
8128
8129 /* Calculate which part of the value to mask. */
8130 if (residual == 0)
99059e56 8131 shift = 0;
4962c51a 8132 else
99059e56
RM		 8133 {
8134 int msb;
8135
8136 /* Determine the most significant bit in the residual and
8137 align the resulting value to a 2-bit boundary. */
8138 for (msb = 30; msb >= 0; msb -= 2)
8139 if (residual & (3 << msb))
8140 break;
8141
8142 /* The desired shift is now (msb - 6), or zero, whichever
8143 is the greater. */
8144 shift = msb - 6;
8145 if (shift < 0)
8146 shift = 0;
8147 }
4962c51a
MS		 8148
8149 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8150 g_n = residual & (0xff << shift);
8151 encoded_g_n = (g_n >> shift)
99059e56 8152 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4962c51a
MS		 8153
8154 /* Calculate the residual for the next time around. */
8155 residual &= ~g_n;
8156 }
8157
8158 *final_residual = residual;
8159
8160 return encoded_g_n;
8161}
8162
8163/* Given an ARM instruction, determine whether it is an ADD or a SUB.
8164 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 8165
4962c51a 8166static int
906e58ca 8167identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8168{
8169 int opcode = insn & 0x1e00000;
8170
8171 if (opcode == 1 << 23) /* ADD */
8172 return 1;
8173
8174 if (opcode == 1 << 22) /* SUB */
8175 return -1;
8176
8177 return 0;
8178}
8179
252b5132 8180/* Perform a relocation as part of a final link. */
9b485d32 8181
252b5132 8182static bfd_reloc_status_type
57e8b36a
NC		 8183elf32_arm_final_link_relocate (reloc_howto_type * howto,
8184 bfd * input_bfd,
8185 bfd * output_bfd,
8186 asection * input_section,
8187 bfd_byte * contents,
8188 Elf_Internal_Rela * rel,
8189 bfd_vma value,
8190 struct bfd_link_info * info,
8191 asection * sym_sec,
8192 const char * sym_name,
34e77a92
RS		 8193 unsigned char st_type,
8194 enum arm_st_branch_type branch_type,
0945cdfd 8195 struct elf_link_hash_entry * h,
f2a9dd69 8196 bfd_boolean * unresolved_reloc_p,
8029a119 8197 char ** error_message)
252b5132
RH		 8198{
8199 unsigned long r_type = howto->type;
8200 unsigned long r_symndx;
8201 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8202 bfd_vma * local_got_offsets;
0855e32b 8203 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8204 asection * sgot;
8205 asection * splt;
252b5132 8206 asection * sreloc = NULL;
362d30a1 8207 asection * srelgot;
252b5132 8208 bfd_vma addend;
ba96a88f 8209 bfd_signed_vma signed_addend;
34e77a92
RS		 8210 unsigned char dynreloc_st_type;
8211 bfd_vma dynreloc_value;
ba96a88f 8212 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8213 struct elf32_arm_link_hash_entry *eh;
8214 union gotplt_union *root_plt;
8215 struct arm_plt_info *arm_plt;
8216 bfd_vma plt_offset;
8217 bfd_vma gotplt_offset;
8218 bfd_boolean has_iplt_entry;
f21f3fe0 8219
9c504268 8220 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8221 if (globals == NULL)
8222 return bfd_reloc_notsupported;
9c504268 8223
0ffa91dd
NC		 8224 BFD_ASSERT (is_arm_elf (input_bfd));
8225
8226 /* Some relocation types map to different relocations depending on the
9c504268 8227 target. We pick the right one here. */
eb043451 8228 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8229
8230 /* It is possible to have linker relaxations on some TLS access
8231 models. Update our information here. */
8232 r_type = elf32_arm_tls_transition (info, r_type, h);
8233
eb043451
PB		 8234 if (r_type != howto->type)
8235 howto = elf32_arm_howto_from_type (r_type);
9c504268 8236
cac15327
NC		 8237 /* If the start address has been set, then set the EF_ARM_HASENTRY
8238 flag. Setting this more than once is redundant, but the cost is
8239 not too high, and it keeps the code simple.
99e4ae17 8240
cac15327
NC		 8241 The test is done here, rather than somewhere else, because the
8242 start address is only set just before the final link commences.
8243
8244 Note - if the user deliberately sets a start address of 0, the
8245 flag will not be set. */
8246 if (bfd_get_start_address (output_bfd) != 0)
8247 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8248
34e77a92 8249 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8250 sgot = globals->root.sgot;
252b5132 8251 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8252 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8253
34e77a92
RS		 8254 if (globals->root.dynamic_sections_created)
8255 srelgot = globals->root.srelgot;
8256 else
8257 srelgot = NULL;
8258
252b5132
RH		 8259 r_symndx = ELF32_R_SYM (rel->r_info);
8260
4e7fd91e 8261 if (globals->use_rel)
ba96a88f 8262 {
4e7fd91e
PB		 8263 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8264
8265 if (addend & ((howto->src_mask + 1) >> 1))
8266 {
8267 signed_addend = -1;
8268 signed_addend &= ~ howto->src_mask;
8269 signed_addend |= addend;
8270 }
8271 else
8272 signed_addend = addend;
ba96a88f
NC		 8273 }
8274 else
4e7fd91e 8275 addend = signed_addend = rel->r_addend;
f21f3fe0 8276
39f21624
NC		 8277 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8278 are resolving a function call relocation. */
8279 if (using_thumb_only (globals)
8280 && (r_type == R_ARM_THM_CALL
8281 || r_type == R_ARM_THM_JUMP24)
8282 && branch_type == ST_BRANCH_TO_ARM)
8283 branch_type = ST_BRANCH_TO_THUMB;
8284
34e77a92
RS		 8285 /* Record the symbol information that should be used in dynamic
8286 relocations. */
8287 dynreloc_st_type = st_type;
8288 dynreloc_value = value;
8289 if (branch_type == ST_BRANCH_TO_THUMB)
8290 dynreloc_value |= 1;
8291
8292 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8293 VALUE appropriately for relocations that we resolve at link time. */
8294 has_iplt_entry = FALSE;
8295 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8296 && root_plt->offset != (bfd_vma) -1)
8297 {
8298 plt_offset = root_plt->offset;
8299 gotplt_offset = arm_plt->got_offset;
8300
8301 if (h == NULL || eh->is_iplt)
8302 {
8303 has_iplt_entry = TRUE;
8304 splt = globals->root.iplt;
8305
8306 /* Populate .iplt entries here, because not all of them will
8307 be seen by finish_dynamic_symbol. The lower bit is set if
8308 we have already populated the entry. */
8309 if (plt_offset & 1)
8310 plt_offset--;
8311 else
8312 {
57460bcf
NC		 8313 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8314 -1, dynreloc_value))
8315 root_plt->offset |= 1;
8316 else
8317 return bfd_reloc_notsupported;
34e77a92
RS		 8318 }
8319
8320 /* Static relocations always resolve to the .iplt entry. */
8321 st_type = STT_FUNC;
8322 value = (splt->output_section->vma
8323 + splt->output_offset
8324 + plt_offset);
8325 branch_type = ST_BRANCH_TO_ARM;
8326
8327 /* If there are non-call relocations that resolve to the .iplt
8328 entry, then all dynamic ones must too. */
8329 if (arm_plt->noncall_refcount != 0)
8330 {
8331 dynreloc_st_type = st_type;
8332 dynreloc_value = value;
8333 }
8334 }
8335 else
8336 /* We populate the .plt entry in finish_dynamic_symbol. */
8337 splt = globals->root.splt;
8338 }
8339 else
8340 {
8341 splt = NULL;
8342 plt_offset = (bfd_vma) -1;
8343 gotplt_offset = (bfd_vma) -1;
8344 }
8345
252b5132
RH		 8346 switch (r_type)
8347 {
8348 case R_ARM_NONE:
28a094c2
DJ		 8349 /* We don't need to find a value for this symbol. It's just a
8350 marker. */
8351 *unresolved_reloc_p = FALSE;
252b5132
RH		 8352 return bfd_reloc_ok;
8353
00a97672
RS		 8354 case R_ARM_ABS12:
8355 if (!globals->vxworks_p)
8356 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8357
252b5132
RH		 8358 case R_ARM_PC24:
8359 case R_ARM_ABS32:
bb224fc3 8360 case R_ARM_ABS32_NOI:
252b5132 8361 case R_ARM_REL32:
bb224fc3 8362 case R_ARM_REL32_NOI:
5b5bb741
PB		 8363 case R_ARM_CALL:
8364 case R_ARM_JUMP24:
dfc5f959 8365 case R_ARM_XPC25:
eb043451 8366 case R_ARM_PREL31:
7359ea65 8367 case R_ARM_PLT32:
7359ea65
DJ		 8368 /* Handle relocations which should use the PLT entry. ABS32/REL32
8369 will use the symbol's value, which may point to a PLT entry, but we
8370 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8371 branches in this object should go to it, except if the PLT is too
8372 far away, in which case a long branch stub should be inserted. */
bb224fc3 8373 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
99059e56 8374 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8375 && r_type != R_ARM_CALL
8376 && r_type != R_ARM_JUMP24
8377 && r_type != R_ARM_PLT32)
34e77a92 8378 && plt_offset != (bfd_vma) -1)
7359ea65 8379 {
34e77a92
RS		 8380 /* If we've created a .plt section, and assigned a PLT entry
8381 to this function, it must either be a STT_GNU_IFUNC reference
8382 or not be known to bind locally. In other cases, we should
8383 have cleared the PLT entry by now. */
8384 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8385
8386 value = (splt->output_section->vma
8387 + splt->output_offset
34e77a92 8388 + plt_offset);
0945cdfd 8389 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8390 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8391 contents, rel->r_offset, value,
00a97672 8392 rel->r_addend);
7359ea65
DJ		 8393 }
8394
67687978
PB		 8395 /* When generating a shared object or relocatable executable, these
8396 relocations are copied into the output file to be resolved at
8397 run time. */
8398 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8399 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8400 && !(globals->vxworks_p
3348747a
NS		 8401 && strcmp (input_section->output_section->name,
8402 ".tls_vars") == 0)
bb224fc3 8403 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8404 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8405 && !(input_bfd == globals->stub_bfd
8406 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8407 && (h == NULL
8408 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8409 || h->root.type != bfd_link_hash_undefweak)
8410 && r_type != R_ARM_PC24
5b5bb741
PB		 8411 && r_type != R_ARM_CALL
8412 && r_type != R_ARM_JUMP24
ee06dc07 8413 && r_type != R_ARM_PREL31
7359ea65 8414 && r_type != R_ARM_PLT32)
252b5132 8415 {
947216bf 8416 Elf_Internal_Rela outrel;
b34976b6 8417 bfd_boolean skip, relocate;
f21f3fe0 8418
0945cdfd
DJ		 8419 *unresolved_reloc_p = FALSE;
8420
34e77a92 8421 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8422 {
83bac4b0
NC		 8423 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8424 ! globals->use_rel);
f21f3fe0 8425
83bac4b0 8426 if (sreloc == NULL)
252b5132 8427 return bfd_reloc_notsupported;
252b5132 8428 }
f21f3fe0 8429
b34976b6
AM		 8430 skip = FALSE;
8431 relocate = FALSE;
f21f3fe0 8432
00a97672 8433 outrel.r_addend = addend;
c629eae0
JJ		 8434 outrel.r_offset =
8435 _bfd_elf_section_offset (output_bfd, info, input_section,
8436 rel->r_offset);
8437 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8438 skip = TRUE;
0bb2d96a 8439 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8440 skip = TRUE, relocate = TRUE;
252b5132
RH		 8441 outrel.r_offset += (input_section->output_section->vma
8442 + input_section->output_offset);
f21f3fe0 8443
252b5132 8444 if (skip)
0bb2d96a 8445 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8446 else if (h != NULL
8447 && h->dynindx != -1
7359ea65 8448 && (!info->shared
5e681ec4 8449 || !info->symbolic
f5385ebf 8450 || !h->def_regular))
5e681ec4 8451 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8452 else
8453 {
a16385dc
MM		 8454 int symbol;
8455
5e681ec4 8456 /* This symbol is local, or marked to become local. */
34e77a92 8457 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8458 if (globals->symbian_p)
6366ff1e 8459 {
74541ad4
AM		 8460 asection *osec;
8461
6366ff1e
MM		 8462 /* On Symbian OS, the data segment and text segement
8463 can be relocated independently. Therefore, we
8464 must indicate the segment to which this
8465 relocation is relative. The BPABI allows us to
8466 use any symbol in the right segment; we just use
8467 the section symbol as it is convenient. (We
8468 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8469 will not appear in the dynamic symbol table.)
8470
8471 Note that the dynamic linker ignores the section
8472 symbol value, so we don't subtract osec->vma
8473 from the emitted reloc addend. */
10dbd1f3 8474 if (sym_sec)
74541ad4 8475 osec = sym_sec->output_section;
10dbd1f3 8476 else
74541ad4
AM		 8477 osec = input_section->output_section;
8478 symbol = elf_section_data (osec)->dynindx;
8479 if (symbol == 0)
8480 {
8481 struct elf_link_hash_table *htab = elf_hash_table (info);
8482
8483 if ((osec->flags & SEC_READONLY) == 0
8484 && htab->data_index_section != NULL)
8485 osec = htab->data_index_section;
8486 else
8487 osec = htab->text_index_section;
8488 symbol = elf_section_data (osec)->dynindx;
8489 }
6366ff1e
MM		 8490 BFD_ASSERT (symbol != 0);
8491 }
a16385dc
MM		 8492 else
8493 /* On SVR4-ish systems, the dynamic loader cannot
8494 relocate the text and data segments independently,
8495 so the symbol does not matter. */
8496 symbol = 0;
34e77a92
RS		 8497 if (dynreloc_st_type == STT_GNU_IFUNC)
8498 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8499 to the .iplt entry. Instead, every non-call reference
8500 must use an R_ARM_IRELATIVE relocation to obtain the
8501 correct run-time address. */
8502 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8503 else
8504 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8505 if (globals->use_rel)
8506 relocate = TRUE;
8507 else
34e77a92 8508 outrel.r_addend += dynreloc_value;
252b5132 8509 }
f21f3fe0 8510
47beaa6a 8511 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8512
f21f3fe0 8513 /* If this reloc is against an external symbol, we do not want to
252b5132 8514 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8515 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8516 if (! relocate)
8517 return bfd_reloc_ok;
9a5aca8c 8518
f21f3fe0 8519 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8520 contents, rel->r_offset,
8521 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8522 }
8523 else switch (r_type)
8524 {
00a97672
RS		 8525 case R_ARM_ABS12:
8526 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8527
dfc5f959 8528 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8529 case R_ARM_CALL:
8530 case R_ARM_JUMP24:
8029a119 8531 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8532 case R_ARM_PLT32:
906e58ca 8533 {
906e58ca
NC		 8534 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8535
dfc5f959 8536 if (r_type == R_ARM_XPC25)
252b5132 8537 {
dfc5f959
NC		 8538 /* Check for Arm calling Arm function. */
8539 /* FIXME: Should we translate the instruction into a BL
8540 instruction instead ? */
35fc36a8 8541 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8542 (*_bfd_error_handler)
8543 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8544 input_bfd,
8545 h ? h->root.root.string : "(local)");
dfc5f959 8546 }
155d87d7 8547 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8548 {
8549 /* Check for Arm calling Thumb function. */
35fc36a8 8550 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8551 {
f2a9dd69
DJ		 8552 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8553 output_bfd, input_section,
8554 hit_data, sym_sec, rel->r_offset,
8555 signed_addend, value,
8556 error_message))
8557 return bfd_reloc_ok;
8558 else
8559 return bfd_reloc_dangerous;
dfc5f959 8560 }
252b5132 8561 }
ba96a88f 8562
906e58ca 8563 /* Check if a stub has to be inserted because the
8029a119 8564 destination is too far or we are changing mode. */
155d87d7
CL		 8565 if ( r_type == R_ARM_CALL
8566 || r_type == R_ARM_JUMP24
8567 || r_type == R_ARM_PLT32)
906e58ca 8568 {
fe33d2fa
CL		 8569 enum elf32_arm_stub_type stub_type = arm_stub_none;
8570 struct elf32_arm_link_hash_entry *hash;
8571
8572 hash = (struct elf32_arm_link_hash_entry *) h;
8573 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8574 st_type, &branch_type,
8575 hash, value, sym_sec,
fe33d2fa 8576 input_bfd, sym_name);
5fa9e92f 8577
fe33d2fa 8578 if (stub_type != arm_stub_none)
906e58ca
NC		 8579 {
8580 /* The target is out of reach, so redirect the
8581 branch to the local stub for this function. */
906e58ca
NC		 8582 stub_entry = elf32_arm_get_stub_entry (input_section,
8583 sym_sec, h,
fe33d2fa
CL		 8584 rel, globals,
8585 stub_type);
9cd3e4e5
NC		 8586 {
8587 if (stub_entry != NULL)
8588 value = (stub_entry->stub_offset
8589 + stub_entry->stub_sec->output_offset
8590 + stub_entry->stub_sec->output_section->vma);
8591
8592 if (plt_offset != (bfd_vma) -1)
8593 *unresolved_reloc_p = FALSE;
8594 }
906e58ca 8595 }
fe33d2fa
CL		 8596 else
8597 {
8598 /* If the call goes through a PLT entry, make sure to
8599 check distance to the right destination address. */
34e77a92 8600 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8601 {
8602 value = (splt->output_section->vma
8603 + splt->output_offset
34e77a92 8604 + plt_offset);
fe33d2fa
CL		 8605 *unresolved_reloc_p = FALSE;
8606 /* The PLT entry is in ARM mode, regardless of the
8607 target function. */
35fc36a8 8608 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8609 }
8610 }
906e58ca
NC		 8611 }
8612
dea514f5
PB		 8613 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8614 where:
8615 S is the address of the symbol in the relocation.
8616 P is address of the instruction being relocated.
8617 A is the addend (extracted from the instruction) in bytes.
8618
8619 S is held in 'value'.
8620 P is the base address of the section containing the
8621 instruction plus the offset of the reloc into that
8622 section, ie:
8623 (input_section->output_section->vma +
8624 input_section->output_offset +
8625 rel->r_offset).
8626 A is the addend, converted into bytes, ie:
8627 (signed_addend * 4)
8628
8629 Note: None of these operations have knowledge of the pipeline
8630 size of the processor, thus it is up to the assembler to
8631 encode this information into the addend. */
8632 value -= (input_section->output_section->vma
8633 + input_section->output_offset);
8634 value -= rel->r_offset;
4e7fd91e
PB		 8635 if (globals->use_rel)
8636 value += (signed_addend << howto->size);
8637 else
8638 /* RELA addends do not have to be adjusted by howto->size. */
8639 value += signed_addend;
23080146 8640
dcb5e6e6
NC		 8641 signed_addend = value;
8642 signed_addend >>= howto->rightshift;
9a5aca8c 8643
5ab79981 8644 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8645 the next instruction unless a PLT entry will be created.
77b4f08f 8646 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8647 The jump to the next instruction is optimized as a NOP depending
8648 on the architecture. */
ffcb4889 8649 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8650 && plt_offset == (bfd_vma) -1)
77b4f08f 8651 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8652 {
cd1dac3d
DG		 8653 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8654
8655 if (arch_has_arm_nop (globals))
8656 value |= 0x0320f000;
8657 else
8658 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8659 }
8660 else
59f2c4e7 8661 {
9b485d32 8662 /* Perform a signed range check. */
dcb5e6e6 8663 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8664 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8665 return bfd_reloc_overflow;
9a5aca8c 8666
5ab79981 8667 addend = (value & 2);
39b41c9c 8668
5ab79981
PB		 8669 value = (signed_addend & howto->dst_mask)
8670 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8671
5ab79981
PB		 8672 if (r_type == R_ARM_CALL)
8673 {
155d87d7 8674 /* Set the H bit in the BLX instruction. */
35fc36a8 8675 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8676 {
8677 if (addend)
8678 value |= (1 << 24);
8679 else
8680 value &= ~(bfd_vma)(1 << 24);
8681 }
8682
5ab79981 8683 /* Select the correct instruction (BL or BLX). */
906e58ca 8684 /* Only if we are not handling a BL to a stub. In this
8029a119 8685 case, mode switching is performed by the stub. */
35fc36a8 8686 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8687 value |= (1 << 28);
63e1a0fc 8688 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8689 {
8690 value &= ~(bfd_vma)(1 << 28);
8691 value |= (1 << 24);
8692 }
39b41c9c
PB		 8693 }
8694 }
906e58ca 8695 }
252b5132 8696 break;
f21f3fe0 8697
252b5132
RH		 8698 case R_ARM_ABS32:
8699 value += addend;
35fc36a8 8700 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8701 value |= 1;
8702 break;
f21f3fe0 8703
bb224fc3
MS		 8704 case R_ARM_ABS32_NOI:
8705 value += addend;
8706 break;
8707
252b5132 8708 case R_ARM_REL32:
a8bc6c78 8709 value += addend;
35fc36a8 8710 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8711 value |= 1;
252b5132 8712 value -= (input_section->output_section->vma
62efb346 8713 + input_section->output_offset + rel->r_offset);
252b5132 8714 break;
eb043451 8715
bb224fc3
MS		 8716 case R_ARM_REL32_NOI:
8717 value += addend;
8718 value -= (input_section->output_section->vma
8719 + input_section->output_offset + rel->r_offset);
8720 break;
8721
eb043451
PB		 8722 case R_ARM_PREL31:
8723 value -= (input_section->output_section->vma
8724 + input_section->output_offset + rel->r_offset);
8725 value += signed_addend;
8726 if (! h || h->root.type != bfd_link_hash_undefweak)
8727 {
8029a119 8728 /* Check for overflow. */
eb043451
PB		 8729 if ((value ^ (value >> 1)) & (1 << 30))
8730 return bfd_reloc_overflow;
8731 }
8732 value &= 0x7fffffff;
8733 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8734 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8735 value |= 1;
8736 break;
252b5132 8737 }
f21f3fe0 8738
252b5132
RH		 8739 bfd_put_32 (input_bfd, value, hit_data);
8740 return bfd_reloc_ok;
8741
8742 case R_ARM_ABS8:
fd0fd00c
MJ		 8743 /* PR 16202: Refectch the addend using the correct size. */
8744 if (globals->use_rel)
8745 addend = bfd_get_8 (input_bfd, hit_data);
252b5132 8746 value += addend;
4e67d4ca
DG		 8747
8748 /* There is no way to tell whether the user intended to use a signed or
8749 unsigned addend. When checking for overflow we accept either,
8750 as specified by the AAELF. */
8751 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8752 return bfd_reloc_overflow;
8753
8754 bfd_put_8 (input_bfd, value, hit_data);
8755 return bfd_reloc_ok;
8756
8757 case R_ARM_ABS16:
fd0fd00c
MJ		 8758 /* PR 16202: Refectch the addend using the correct size. */
8759 if (globals->use_rel)
8760 addend = bfd_get_16 (input_bfd, hit_data);
252b5132
RH		 8761 value += addend;
8762
4e67d4ca
DG		 8763 /* See comment for R_ARM_ABS8. */
8764 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8765 return bfd_reloc_overflow;
8766
8767 bfd_put_16 (input_bfd, value, hit_data);
8768 return bfd_reloc_ok;
8769
252b5132 8770 case R_ARM_THM_ABS5:
9b485d32 8771 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8772 if (globals->use_rel)
8773 {
8774 /* Need to refetch addend. */
8775 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8776 /* ??? Need to determine shift amount from operand size. */
8777 addend >>= howto->rightshift;
8778 }
252b5132
RH		 8779 value += addend;
8780
8781 /* ??? Isn't value unsigned? */
8782 if ((long) value > 0x1f || (long) value < -0x10)
8783 return bfd_reloc_overflow;
8784
8785 /* ??? Value needs to be properly shifted into place first. */
8786 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8787 bfd_put_16 (input_bfd, value, hit_data);
8788 return bfd_reloc_ok;
8789
2cab6cc3
MS		 8790 case R_ARM_THM_ALU_PREL_11_0:
8791 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8792 {
8793 bfd_vma insn;
8794 bfd_signed_vma relocation;
8795
8796 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8797 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8798
99059e56
RM		 8799 if (globals->use_rel)
8800 {
8801 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8802 | ((insn & (1 << 26)) >> 15);
8803 if (insn & 0xf00000)
8804 signed_addend = -signed_addend;
8805 }
2cab6cc3
MS		 8806
8807 relocation = value + signed_addend;
79f08007 8808 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8809 + input_section->output_offset
8810 + rel->r_offset);
2cab6cc3 8811
99059e56 8812 value = abs (relocation);
2cab6cc3 8813
99059e56
RM		 8814 if (value >= 0x1000)
8815 return bfd_reloc_overflow;
2cab6cc3
MS		 8816
8817 insn = (insn & 0xfb0f8f00) | (value & 0xff)
99059e56
RM		 8818 | ((value & 0x700) << 4)
8819 | ((value & 0x800) << 15);
8820 if (relocation < 0)
8821 insn |= 0xa00000;
2cab6cc3
MS		 8822
8823 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8824 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8825
99059e56 8826 return bfd_reloc_ok;
2cab6cc3
MS		 8827 }
8828
e1ec24c6
NC		 8829 case R_ARM_THM_PC8:
8830 /* PR 10073: This reloc is not generated by the GNU toolchain,
8831 but it is supported for compatibility with third party libraries
8832 generated by other compilers, specifically the ARM/IAR. */
8833 {
8834 bfd_vma insn;
8835 bfd_signed_vma relocation;
8836
8837 insn = bfd_get_16 (input_bfd, hit_data);
8838
99059e56 8839 if (globals->use_rel)
79f08007 8840 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8841
8842 relocation = value + addend;
79f08007 8843 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8844 + input_section->output_offset
8845 + rel->r_offset);
e1ec24c6 8846
99059e56 8847 value = abs (relocation);
e1ec24c6
NC		 8848
8849 /* We do not check for overflow of this reloc. Although strictly
8850 speaking this is incorrect, it appears to be necessary in order
8851 to work with IAR generated relocs. Since GCC and GAS do not
8852 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8853 a problem for them. */
8854 value &= 0x3fc;
8855
8856 insn = (insn & 0xff00) | (value >> 2);
8857
8858 bfd_put_16 (input_bfd, insn, hit_data);
8859
99059e56 8860 return bfd_reloc_ok;
e1ec24c6
NC		 8861 }
8862
2cab6cc3
MS		 8863 case R_ARM_THM_PC12:
8864 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8865 {
8866 bfd_vma insn;
8867 bfd_signed_vma relocation;
8868
8869 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8870 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8871
99059e56
RM		 8872 if (globals->use_rel)
8873 {
8874 signed_addend = insn & 0xfff;
8875 if (!(insn & (1 << 23)))
8876 signed_addend = -signed_addend;
8877 }
2cab6cc3
MS		 8878
8879 relocation = value + signed_addend;
79f08007 8880 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8881 + input_section->output_offset
8882 + rel->r_offset);
2cab6cc3 8883
99059e56 8884 value = abs (relocation);
2cab6cc3 8885
99059e56
RM		 8886 if (value >= 0x1000)
8887 return bfd_reloc_overflow;
2cab6cc3
MS		 8888
8889 insn = (insn & 0xff7ff000) | value;
99059e56
RM		 8890 if (relocation >= 0)
8891 insn |= (1 << 23);
2cab6cc3
MS		 8892
8893 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8894 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8895
99059e56 8896 return bfd_reloc_ok;
2cab6cc3
MS		 8897 }
8898
dfc5f959 8899 case R_ARM_THM_XPC22:
c19d1205 8900 case R_ARM_THM_CALL:
bd97cb95 8901 case R_ARM_THM_JUMP24:
dfc5f959 8902 /* Thumb BL (branch long instruction). */
252b5132 8903 {
b34976b6 8904 bfd_vma relocation;
99059e56 8905 bfd_vma reloc_sign;
b34976b6
AM		 8906 bfd_boolean overflow = FALSE;
8907 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8908 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8909 bfd_signed_vma reloc_signed_max;
8910 bfd_signed_vma reloc_signed_min;
b34976b6 8911 bfd_vma check;
252b5132 8912 bfd_signed_vma signed_check;
e95de063 8913 int bitsize;
cd1dac3d 8914 const int thumb2 = using_thumb2 (globals);
252b5132 8915
5ab79981 8916 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8917 the next instruction unless a PLT entry will be created.
8918 The jump to the next instruction is optimized as a NOP.W for
8919 Thumb-2 enabled architectures. */
19540007 8920 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8921 && plt_offset == (bfd_vma) -1)
5ab79981 8922 {
cd1dac3d
DG		 8923 if (arch_has_thumb2_nop (globals))
8924 {
8925 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8926 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8927 }
8928 else
8929 {
8930 bfd_put_16 (input_bfd, 0xe000, hit_data);
8931 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8932 }
5ab79981
PB		 8933 return bfd_reloc_ok;
8934 }
8935
e95de063 8936 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
99059e56 8937 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8938 if (globals->use_rel)
8939 {
99059e56
RM		 8940 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8941 bfd_vma upper = upper_insn & 0x3ff;
8942 bfd_vma lower = lower_insn & 0x7ff;
e95de063
MS		 8943 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8944 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
99059e56
RM		 8945 bfd_vma i1 = j1 ^ s ? 0 : 1;
8946 bfd_vma i2 = j2 ^ s ? 0 : 1;
e95de063 8947
99059e56
RM		 8948 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8949 /* Sign extend. */
8950 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
e95de063 8951
4e7fd91e
PB		 8952 signed_addend = addend;
8953 }
cb1afa5c 8954
dfc5f959
NC		 8955 if (r_type == R_ARM_THM_XPC22)
8956 {
8957 /* Check for Thumb to Thumb call. */
8958 /* FIXME: Should we translate the instruction into a BL
8959 instruction instead ? */
35fc36a8 8960 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8961 (*_bfd_error_handler)
8962 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8963 input_bfd,
8964 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8965 }
8966 else
252b5132 8967 {
dfc5f959
NC		 8968 /* If it is not a call to Thumb, assume call to Arm.
8969 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8970 function call at all, but rather a long jump. Calls through
8971 the PLT do not require stubs. */
34e77a92 8972 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8973 {
bd97cb95 8974 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8975 {
8976 /* Convert BL to BLX. */
8977 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8978 }
155d87d7
CL		 8979 else if (( r_type != R_ARM_THM_CALL)
8980 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8981 {
8982 if (elf32_thumb_to_arm_stub
8983 (info, sym_name, input_bfd, output_bfd, input_section,
8984 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8985 error_message))
8986 return bfd_reloc_ok;
8987 else
8988 return bfd_reloc_dangerous;
8989 }
da5938a2 8990 }
35fc36a8
RS		 8991 else if (branch_type == ST_BRANCH_TO_THUMB
8992 && globals->use_blx
bd97cb95 8993 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8994 {
8995 /* Make sure this is a BL. */
8996 lower_insn |= 0x1800;
8997 }
252b5132 8998 }
f21f3fe0 8999
fe33d2fa 9000 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 9001 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 9002 {
9003 /* Check if a stub has to be inserted because the destination
8029a119 9004 is too far. */
fe33d2fa
CL		 9005 struct elf32_arm_stub_hash_entry *stub_entry;
9006 struct elf32_arm_link_hash_entry *hash;
9007
9008 hash = (struct elf32_arm_link_hash_entry *) h;
9009
9010 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 9011 st_type, &branch_type,
9012 hash, value, sym_sec,
fe33d2fa
CL		 9013 input_bfd, sym_name);
9014
9015 if (stub_type != arm_stub_none)
906e58ca
NC		 9016 {
9017 /* The target is out of reach or we are changing modes, so
9018 redirect the branch to the local stub for this
9019 function. */
9020 stub_entry = elf32_arm_get_stub_entry (input_section,
9021 sym_sec, h,
fe33d2fa
CL		 9022 rel, globals,
9023 stub_type);
906e58ca 9024 if (stub_entry != NULL)
9cd3e4e5
NC		 9025 {
9026 value = (stub_entry->stub_offset
9027 + stub_entry->stub_sec->output_offset
9028 + stub_entry->stub_sec->output_section->vma);
9029
9030 if (plt_offset != (bfd_vma) -1)
9031 *unresolved_reloc_p = FALSE;
9032 }
906e58ca 9033
f4ac8484 9034 /* If this call becomes a call to Arm, force BLX. */
155d87d7 9035 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 9036 {
9037 if ((stub_entry
9038 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 9039 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 9040 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9041 }
906e58ca
NC		 9042 }
9043 }
9044
fe33d2fa 9045 /* Handle calls via the PLT. */
34e77a92 9046 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 9047 {
9048 value = (splt->output_section->vma
9049 + splt->output_offset
34e77a92 9050 + plt_offset);
fe33d2fa 9051
eed94f8f
NC		 9052 if (globals->use_blx
9053 && r_type == R_ARM_THM_CALL
9054 && ! using_thumb_only (globals))
fe33d2fa
CL		 9055 {
9056 /* If the Thumb BLX instruction is available, convert
9057 the BL to a BLX instruction to call the ARM-mode
9058 PLT entry. */
9059 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 9060 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 9061 }
9062 else
9063 {
eed94f8f
NC		 9064 if (! using_thumb_only (globals))
9065 /* Target the Thumb stub before the ARM PLT entry. */
9066 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 9067 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 9068 }
9069 *unresolved_reloc_p = FALSE;
9070 }
9071
ba96a88f 9072 relocation = value + signed_addend;
f21f3fe0 9073
252b5132 9074 relocation -= (input_section->output_section->vma
ba96a88f
NC		 9075 + input_section->output_offset
9076 + rel->r_offset);
9a5aca8c 9077
252b5132
RH		 9078 check = relocation >> howto->rightshift;
9079
9080 /* If this is a signed value, the rightshift just dropped
9081 leading 1 bits (assuming twos complement). */
9082 if ((bfd_signed_vma) relocation >= 0)
9083 signed_check = check;
9084 else
9085 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9086
e95de063
MS		 9087 /* Calculate the permissable maximum and minimum values for
9088 this relocation according to whether we're relocating for
9089 Thumb-2 or not. */
9090 bitsize = howto->bitsize;
9091 if (!thumb2)
9092 bitsize -= 2;
f6ebfac0 9093 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 9094 reloc_signed_min = ~reloc_signed_max;
9095
252b5132 9096 /* Assumes two's complement. */
ba96a88f 9097 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 9098 overflow = TRUE;
252b5132 9099
bd97cb95 9100 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 9101 /* For a BLX instruction, make sure that the relocation is rounded up
9102 to a word boundary. This follows the semantics of the instruction
9103 which specifies that bit 1 of the target address will come from bit
9104 1 of the base address. */
9105 relocation = (relocation + 2) & ~ 3;
cb1afa5c 9106
e95de063
MS		 9107 /* Put RELOCATION back into the insn. Assumes two's complement.
9108 We use the Thumb-2 encoding, which is safe even if dealing with
9109 a Thumb-1 instruction by virtue of our overflow check above. */
99059e56 9110 reloc_sign = (signed_check < 0) ? 1 : 0;
e95de063 9111 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
99059e56
RM		 9112 | ((relocation >> 12) & 0x3ff)
9113 | (reloc_sign << 10);
906e58ca 9114 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
99059e56
RM		 9115 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9116 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9117 | ((relocation >> 1) & 0x7ff);
c62e1cc3 9118
252b5132
RH		 9119 /* Put the relocated value back in the object file: */
9120 bfd_put_16 (input_bfd, upper_insn, hit_data);
9121 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9122
9123 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9124 }
9125 break;
9126
c19d1205
ZW		 9127 case R_ARM_THM_JUMP19:
9128 /* Thumb32 conditional branch instruction. */
9129 {
9130 bfd_vma relocation;
9131 bfd_boolean overflow = FALSE;
9132 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9133 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 9134 bfd_signed_vma reloc_signed_max = 0xffffe;
9135 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205 9136 bfd_signed_vma signed_check;
c5423981
TG		 9137 enum elf32_arm_stub_type stub_type = arm_stub_none;
9138 struct elf32_arm_stub_hash_entry *stub_entry;
9139 struct elf32_arm_link_hash_entry *hash;
c19d1205
ZW		 9140
9141 /* Need to refetch the addend, reconstruct the top three bits,
9142 and squish the two 11 bit pieces together. */
9143 if (globals->use_rel)
9144 {
9145 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 9146 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 9147 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9148 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9149 bfd_vma lower = (lower_insn & 0x07ff);
9150
a00a1f35
MS		 9151 upper |= J1 << 6;
9152 upper |= J2 << 7;
9153 upper |= (!S) << 8;
c19d1205
ZW		 9154 upper -= 0x0100; /* Sign extend. */
9155
9156 addend = (upper << 12) | (lower << 1);
9157 signed_addend = addend;
9158 }
9159
bd97cb95 9160 /* Handle calls via the PLT. */
34e77a92 9161 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 9162 {
9163 value = (splt->output_section->vma
9164 + splt->output_offset
34e77a92 9165 + plt_offset);
bd97cb95
DJ		 9166 /* Target the Thumb stub before the ARM PLT entry. */
9167 value -= PLT_THUMB_STUB_SIZE;
9168 *unresolved_reloc_p = FALSE;
9169 }
9170
c5423981
TG		 9171 hash = (struct elf32_arm_link_hash_entry *)h;
9172
9173 stub_type = arm_type_of_stub (info, input_section, rel,
9174 st_type, &branch_type,
9175 hash, value, sym_sec,
9176 input_bfd, sym_name);
9177 if (stub_type != arm_stub_none)
9178 {
9179 stub_entry = elf32_arm_get_stub_entry (input_section,
9180 sym_sec, h,
9181 rel, globals,
9182 stub_type);
9183 if (stub_entry != NULL)
9184 {
9185 value = (stub_entry->stub_offset
9186 + stub_entry->stub_sec->output_offset
9187 + stub_entry->stub_sec->output_section->vma);
9188 }
9189 }
c19d1205 9190
99059e56 9191 relocation = value + signed_addend;
c19d1205
ZW		 9192 relocation -= (input_section->output_section->vma
9193 + input_section->output_offset
9194 + rel->r_offset);
a00a1f35 9195 signed_check = (bfd_signed_vma) relocation;
c19d1205 9196
c19d1205
ZW		 9197 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9198 overflow = TRUE;
9199
9200 /* Put RELOCATION back into the insn. */
9201 {
9202 bfd_vma S = (relocation & 0x00100000) >> 20;
9203 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9204 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9205 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9206 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9207
a00a1f35 9208 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9209 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9210 }
9211
9212 /* Put the relocated value back in the object file: */
9213 bfd_put_16 (input_bfd, upper_insn, hit_data);
9214 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9215
9216 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9217 }
9218
9219 case R_ARM_THM_JUMP11:
9220 case R_ARM_THM_JUMP8:
9221 case R_ARM_THM_JUMP6:
51c5503b
NC		 9222 /* Thumb B (branch) instruction). */
9223 {
6cf9e9fe 9224 bfd_signed_vma relocation;
51c5503b
NC		 9225 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9226 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9227 bfd_signed_vma signed_check;
9228
c19d1205
ZW		 9229 /* CZB cannot jump backward. */
9230 if (r_type == R_ARM_THM_JUMP6)
9231 reloc_signed_min = 0;
9232
4e7fd91e 9233 if (globals->use_rel)
6cf9e9fe 9234 {
4e7fd91e
PB		 9235 /* Need to refetch addend. */
9236 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9237 if (addend & ((howto->src_mask + 1) >> 1))
9238 {
9239 signed_addend = -1;
9240 signed_addend &= ~ howto->src_mask;
9241 signed_addend |= addend;
9242 }
9243 else
9244 signed_addend = addend;
9245 /* The value in the insn has been right shifted. We need to
9246 undo this, so that we can perform the address calculation
9247 in terms of bytes. */
9248 signed_addend <<= howto->rightshift;
6cf9e9fe 9249 }
6cf9e9fe 9250 relocation = value + signed_addend;
51c5503b
NC		 9251
9252 relocation -= (input_section->output_section->vma
9253 + input_section->output_offset
9254 + rel->r_offset);
9255
6cf9e9fe
NC		 9256 relocation >>= howto->rightshift;
9257 signed_check = relocation;
c19d1205
ZW		 9258
9259 if (r_type == R_ARM_THM_JUMP6)
9260 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9261 else
9262 relocation &= howto->dst_mask;
51c5503b 9263 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9264
51c5503b
NC		 9265 bfd_put_16 (input_bfd, relocation, hit_data);
9266
9267 /* Assumes two's complement. */
9268 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9269 return bfd_reloc_overflow;
9270
9271 return bfd_reloc_ok;
9272 }
cedb70c5 9273
8375c36b
PB		 9274 case R_ARM_ALU_PCREL7_0:
9275 case R_ARM_ALU_PCREL15_8:
9276 case R_ARM_ALU_PCREL23_15:
9277 {
9278 bfd_vma insn;
9279 bfd_vma relocation;
9280
9281 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9282 if (globals->use_rel)
9283 {
9284 /* Extract the addend. */
9285 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9286 signed_addend = addend;
9287 }
8375c36b
PB		 9288 relocation = value + signed_addend;
9289
9290 relocation -= (input_section->output_section->vma
9291 + input_section->output_offset
9292 + rel->r_offset);
9293 insn = (insn & ~0xfff)
9294 | ((howto->bitpos << 7) & 0xf00)
9295 | ((relocation >> howto->bitpos) & 0xff);
9296 bfd_put_32 (input_bfd, value, hit_data);
9297 }
9298 return bfd_reloc_ok;
9299
252b5132
RH		 9300 case R_ARM_GNU_VTINHERIT:
9301 case R_ARM_GNU_VTENTRY:
9302 return bfd_reloc_ok;
9303
c19d1205 9304 case R_ARM_GOTOFF32:
252b5132 9305 /* Relocation is relative to the start of the
99059e56 9306 global offset table. */
252b5132
RH		 9307
9308 BFD_ASSERT (sgot != NULL);
9309 if (sgot == NULL)
99059e56 9310 return bfd_reloc_notsupported;
9a5aca8c 9311
cedb70c5 9312 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9313 address by one, so that attempts to call the function pointer will
9314 correctly interpret it as Thumb code. */
35fc36a8 9315 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9316 value += 1;
9317
252b5132 9318 /* Note that sgot->output_offset is not involved in this
99059e56
RM		 9319 calculation. We always want the start of .got. If we
9320 define _GLOBAL_OFFSET_TABLE in a different way, as is
9321 permitted by the ABI, we might have to change this
9322 calculation. */
252b5132 9323 value -= sgot->output_section->vma;
f21f3fe0 9324 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9325 contents, rel->r_offset, value,
00a97672 9326 rel->r_addend);
252b5132
RH		 9327
9328 case R_ARM_GOTPC:
a7c10850 9329 /* Use global offset table as symbol value. */
252b5132 9330 BFD_ASSERT (sgot != NULL);
f21f3fe0 9331
252b5132 9332 if (sgot == NULL)
99059e56 9333 return bfd_reloc_notsupported;
252b5132 9334
0945cdfd 9335 *unresolved_reloc_p = FALSE;
252b5132 9336 value = sgot->output_section->vma;
f21f3fe0 9337 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9338 contents, rel->r_offset, value,
00a97672 9339 rel->r_addend);
f21f3fe0 9340
252b5132 9341 case R_ARM_GOT32:
eb043451 9342 case R_ARM_GOT_PREL:
252b5132 9343 /* Relocation is to the entry for this symbol in the
99059e56 9344 global offset table. */
252b5132
RH		 9345 if (sgot == NULL)
9346 return bfd_reloc_notsupported;
f21f3fe0 9347
34e77a92
RS		 9348 if (dynreloc_st_type == STT_GNU_IFUNC
9349 && plt_offset != (bfd_vma) -1
9350 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9351 {
9352 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9353 symbol, and the relocation resolves directly to the runtime
9354 target rather than to the .iplt entry. This means that any
9355 .got entry would be the same value as the .igot.plt entry,
9356 so there's no point creating both. */
9357 sgot = globals->root.igotplt;
9358 value = sgot->output_offset + gotplt_offset;
9359 }
9360 else if (h != NULL)
252b5132
RH		 9361 {
9362 bfd_vma off;
f21f3fe0 9363
252b5132
RH		 9364 off = h->got.offset;
9365 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9366 if ((off & 1) != 0)
252b5132 9367 {
b436d854
RS		 9368 /* We have already processsed one GOT relocation against
9369 this symbol. */
9370 off &= ~1;
9371 if (globals->root.dynamic_sections_created
9372 && !SYMBOL_REFERENCES_LOCAL (info, h))
9373 *unresolved_reloc_p = FALSE;
9374 }
9375 else
9376 {
9377 Elf_Internal_Rela outrel;
9378
6f820c85 9379 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 9380 {
9381 /* If the symbol doesn't resolve locally in a static
9382 object, we have an undefined reference. If the
9383 symbol doesn't resolve locally in a dynamic object,
9384 it should be resolved by the dynamic linker. */
9385 if (globals->root.dynamic_sections_created)
9386 {
9387 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9388 *unresolved_reloc_p = FALSE;
9389 }
9390 else
9391 outrel.r_info = 0;
9392 outrel.r_addend = 0;
9393 }
252b5132
RH		 9394 else
9395 {
34e77a92 9396 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9397 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
31943882
WN		 9398 else if (info->shared &&
9399 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9400 || h->root.type != bfd_link_hash_undefweak))
99059e56
RM		 9401 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9402 else
9403 outrel.r_info = 0;
34e77a92 9404 outrel.r_addend = dynreloc_value;
b436d854 9405 }
ee29b9fb 9406
b436d854
RS		 9407 /* The GOT entry is initialized to zero by default.
9408 See if we should install a different value. */
9409 if (outrel.r_addend != 0
9410 && (outrel.r_info == 0 || globals->use_rel))
9411 {
9412 bfd_put_32 (output_bfd, outrel.r_addend,
9413 sgot->contents + off);
9414 outrel.r_addend = 0;
252b5132 9415 }
f21f3fe0 9416
b436d854
RS		 9417 if (outrel.r_info != 0)
9418 {
9419 outrel.r_offset = (sgot->output_section->vma
9420 + sgot->output_offset
9421 + off);
9422 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9423 }
9424 h->got.offset |= 1;
9425 }
252b5132
RH		 9426 value = sgot->output_offset + off;
9427 }
9428 else
9429 {
9430 bfd_vma off;
f21f3fe0 9431
252b5132
RH		 9432 BFD_ASSERT (local_got_offsets != NULL &&
9433 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9434
252b5132 9435 off = local_got_offsets[r_symndx];
f21f3fe0 9436
252b5132
RH		 9437 /* The offset must always be a multiple of 4. We use the
9438 least significant bit to record whether we have already
9b485d32 9439 generated the necessary reloc. */
252b5132
RH		 9440 if ((off & 1) != 0)
9441 off &= ~1;
9442 else
9443 {
00a97672 9444 if (globals->use_rel)
34e77a92 9445 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9446
34e77a92 9447 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9448 {
947216bf 9449 Elf_Internal_Rela outrel;
f21f3fe0 9450
34e77a92 9451 outrel.r_addend = addend + dynreloc_value;
252b5132 9452 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9453 + sgot->output_offset
252b5132 9454 + off);
34e77a92 9455 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9456 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
34e77a92
RS		 9457 else
9458 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9459 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9460 }
f21f3fe0 9461
252b5132
RH		 9462 local_got_offsets[r_symndx] |= 1;
9463 }
f21f3fe0 9464
252b5132
RH		 9465 value = sgot->output_offset + off;
9466 }
eb043451
PB		 9467 if (r_type != R_ARM_GOT32)
9468 value += sgot->output_section->vma;
9a5aca8c 9469
f21f3fe0 9470 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9471 contents, rel->r_offset, value,
00a97672 9472 rel->r_addend);
f21f3fe0 9473
ba93b8ac
DJ		 9474 case R_ARM_TLS_LDO32:
9475 value = value - dtpoff_base (info);
9476
9477 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9478 contents, rel->r_offset, value,
9479 rel->r_addend);
ba93b8ac
DJ		 9480
9481 case R_ARM_TLS_LDM32:
9482 {
9483 bfd_vma off;
9484
362d30a1 9485 if (sgot == NULL)
ba93b8ac
DJ		 9486 abort ();
9487
9488 off = globals->tls_ldm_got.offset;
9489
9490 if ((off & 1) != 0)
9491 off &= ~1;
9492 else
9493 {
9494 /* If we don't know the module number, create a relocation
9495 for it. */
9496 if (info->shared)
9497 {
9498 Elf_Internal_Rela outrel;
ba93b8ac 9499
362d30a1 9500 if (srelgot == NULL)
ba93b8ac
DJ		 9501 abort ();
9502
00a97672 9503 outrel.r_addend = 0;
362d30a1
RS		 9504 outrel.r_offset = (sgot->output_section->vma
9505 + sgot->output_offset + off);
ba93b8ac
DJ		 9506 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9507
00a97672
RS		 9508 if (globals->use_rel)
9509 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9510 sgot->contents + off);
ba93b8ac 9511
47beaa6a 9512 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9513 }
9514 else
362d30a1 9515 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9516
9517 globals->tls_ldm_got.offset |= 1;
9518 }
9519
362d30a1 9520 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9521 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9522
9523 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9524 contents, rel->r_offset, value,
00a97672 9525 rel->r_addend);
ba93b8ac
DJ		 9526 }
9527
0855e32b
NS		 9528 case R_ARM_TLS_CALL:
9529 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9530 case R_ARM_TLS_GD32:
9531 case R_ARM_TLS_IE32:
0855e32b
NS		 9532 case R_ARM_TLS_GOTDESC:
9533 case R_ARM_TLS_DESCSEQ:
9534 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9535 {
0855e32b
NS		 9536 bfd_vma off, offplt;
9537 int indx = 0;
ba93b8ac
DJ		 9538 char tls_type;
9539
0855e32b 9540 BFD_ASSERT (sgot != NULL);
ba93b8ac 9541
ba93b8ac
DJ		 9542 if (h != NULL)
9543 {
9544 bfd_boolean dyn;
9545 dyn = globals->root.dynamic_sections_created;
9546 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9547 && (!info->shared
9548 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9549 {
9550 *unresolved_reloc_p = FALSE;
9551 indx = h->dynindx;
9552 }
9553 off = h->got.offset;
0855e32b 9554 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9555 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9556 }
9557 else
9558 {
0855e32b 9559 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9560 off = local_got_offsets[r_symndx];
0855e32b 9561 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9562 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9563 }
9564
0855e32b 9565 /* Linker relaxations happens from one of the
b38cadfb 9566 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9567 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9568 tls_type = GOT_TLS_IE;
0855e32b
NS		 9569
9570 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9571
9572 if ((off & 1) != 0)
9573 off &= ~1;
9574 else
9575 {
9576 bfd_boolean need_relocs = FALSE;
9577 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9578 int cur_off = off;
9579
9580 /* The GOT entries have not been initialized yet. Do it
9581 now, and emit any relocations. If both an IE GOT and a
9582 GD GOT are necessary, we emit the GD first. */
9583
9584 if ((info->shared || indx != 0)
9585 && (h == NULL
9586 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9587 || h->root.type != bfd_link_hash_undefweak))
9588 {
9589 need_relocs = TRUE;
0855e32b 9590 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9591 }
9592
0855e32b
NS		 9593 if (tls_type & GOT_TLS_GDESC)
9594 {
47beaa6a
RS		 9595 bfd_byte *loc;
9596
0855e32b
NS		 9597 /* We should have relaxed, unless this is an undefined
9598 weak symbol. */
9599 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9600 || info->shared);
9601 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
99059e56 9602 <= globals->root.sgotplt->size);
0855e32b
NS		 9603
9604 outrel.r_addend = 0;
9605 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9606 + globals->root.sgotplt->output_offset
9607 + offplt
9608 + globals->sgotplt_jump_table_size);
b38cadfb 9609
0855e32b
NS		 9610 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9611 sreloc = globals->root.srelplt;
9612 loc = sreloc->contents;
9613 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9614 BFD_ASSERT (loc + RELOC_SIZE (globals)
99059e56 9615 <= sreloc->contents + sreloc->size);
0855e32b
NS		 9616
9617 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9618
9619 /* For globals, the first word in the relocation gets
9620 the relocation index and the top bit set, or zero,
9621 if we're binding now. For locals, it gets the
9622 symbol's offset in the tls section. */
99059e56 9623 bfd_put_32 (output_bfd,
0855e32b
NS		 9624 !h ? value - elf_hash_table (info)->tls_sec->vma
9625 : info->flags & DF_BIND_NOW ? 0
9626 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9627 globals->root.sgotplt->contents + offplt
9628 + globals->sgotplt_jump_table_size);
9629
0855e32b 9630 /* Second word in the relocation is always zero. */
99059e56 9631 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9632 globals->root.sgotplt->contents + offplt
9633 + globals->sgotplt_jump_table_size + 4);
0855e32b 9634 }
ba93b8ac
DJ		 9635 if (tls_type & GOT_TLS_GD)
9636 {
9637 if (need_relocs)
9638 {
00a97672 9639 outrel.r_addend = 0;
362d30a1
RS		 9640 outrel.r_offset = (sgot->output_section->vma
9641 + sgot->output_offset
00a97672 9642 + cur_off);
ba93b8ac 9643 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9644
00a97672
RS		 9645 if (globals->use_rel)
9646 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9647 sgot->contents + cur_off);
00a97672 9648
47beaa6a 9649 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9650
9651 if (indx == 0)
9652 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9653 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9654 else
9655 {
00a97672 9656 outrel.r_addend = 0;
ba93b8ac
DJ		 9657 outrel.r_info = ELF32_R_INFO (indx,
9658 R_ARM_TLS_DTPOFF32);
9659 outrel.r_offset += 4;
00a97672
RS		 9660
9661 if (globals->use_rel)
9662 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9663 sgot->contents + cur_off + 4);
00a97672 9664
47beaa6a
RS		 9665 elf32_arm_add_dynreloc (output_bfd, info,
9666 srelgot, &outrel);
ba93b8ac
DJ		 9667 }
9668 }
9669 else
9670 {
9671 /* If we are not emitting relocations for a
9672 general dynamic reference, then we must be in a
9673 static link or an executable link with the
9674 symbol binding locally. Mark it as belonging
9675 to module 1, the executable. */
9676 bfd_put_32 (output_bfd, 1,
362d30a1 9677 sgot->contents + cur_off);
ba93b8ac 9678 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9679 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9680 }
9681
9682 cur_off += 8;
9683 }
9684
9685 if (tls_type & GOT_TLS_IE)
9686 {
9687 if (need_relocs)
9688 {
00a97672
RS		 9689 if (indx == 0)
9690 outrel.r_addend = value - dtpoff_base (info);
9691 else
9692 outrel.r_addend = 0;
362d30a1
RS		 9693 outrel.r_offset = (sgot->output_section->vma
9694 + sgot->output_offset
ba93b8ac
DJ		 9695 + cur_off);
9696 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9697
00a97672
RS		 9698 if (globals->use_rel)
9699 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9700 sgot->contents + cur_off);
ba93b8ac 9701
47beaa6a 9702 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9703 }
9704 else
9705 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9706 sgot->contents + cur_off);
ba93b8ac
DJ		 9707 cur_off += 4;
9708 }
9709
9710 if (h != NULL)
9711 h->got.offset |= 1;
9712 else
9713 local_got_offsets[r_symndx] |= 1;
9714 }
9715
9716 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9717 off += 8;
0855e32b
NS		 9718 else if (tls_type & GOT_TLS_GDESC)
9719 off = offplt;
9720
9721 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9722 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9723 {
9724 bfd_signed_vma offset;
12352d3f
PB		 9725 /* TLS stubs are arm mode. The original symbol is a
9726 data object, so branch_type is bogus. */
9727 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9728 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9729 = arm_type_of_stub (info, input_section, rel,
9730 st_type, &branch_type,
0855e32b
NS		 9731 (struct elf32_arm_link_hash_entry *)h,
9732 globals->tls_trampoline, globals->root.splt,
9733 input_bfd, sym_name);
9734
9735 if (stub_type != arm_stub_none)
9736 {
9737 struct elf32_arm_stub_hash_entry *stub_entry
9738 = elf32_arm_get_stub_entry
9739 (input_section, globals->root.splt, 0, rel,
9740 globals, stub_type);
9741 offset = (stub_entry->stub_offset
9742 + stub_entry->stub_sec->output_offset
9743 + stub_entry->stub_sec->output_section->vma);
9744 }
9745 else
9746 offset = (globals->root.splt->output_section->vma
9747 + globals->root.splt->output_offset
9748 + globals->tls_trampoline);
9749
9750 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9751 {
9752 unsigned long inst;
b38cadfb
NC		 9753
9754 offset -= (input_section->output_section->vma
9755 + input_section->output_offset
9756 + rel->r_offset + 8);
0855e32b
NS		 9757
9758 inst = offset >> 2;
9759 inst &= 0x00ffffff;
9760 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9761 }
9762 else
9763 {
9764 /* Thumb blx encodes the offset in a complicated
9765 fashion. */
9766 unsigned upper_insn, lower_insn;
9767 unsigned neg;
9768
b38cadfb
NC		 9769 offset -= (input_section->output_section->vma
9770 + input_section->output_offset
0855e32b 9771 + rel->r_offset + 4);
b38cadfb 9772
12352d3f
PB		 9773 if (stub_type != arm_stub_none
9774 && arm_stub_is_thumb (stub_type))
9775 {
9776 lower_insn = 0xd000;
9777 }
9778 else
9779 {
9780 lower_insn = 0xc000;
6a631e86 9781 /* Round up the offset to a word boundary. */
12352d3f
PB		 9782 offset = (offset + 2) & ~2;
9783 }
9784
0855e32b
NS		 9785 neg = offset < 0;
9786 upper_insn = (0xf000
9787 | ((offset >> 12) & 0x3ff)
9788 | (neg << 10));
12352d3f 9789 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9790 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9791 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9792 bfd_put_16 (input_bfd, upper_insn, hit_data);
9793 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9794 return bfd_reloc_ok;
9795 }
9796 }
9797 /* These relocations needs special care, as besides the fact
9798 they point somewhere in .gotplt, the addend must be
9799 adjusted accordingly depending on the type of instruction
6a631e86 9800 we refer to. */
0855e32b
NS		 9801 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9802 {
9803 unsigned long data, insn;
9804 unsigned thumb;
b38cadfb 9805
0855e32b
NS		 9806 data = bfd_get_32 (input_bfd, hit_data);
9807 thumb = data & 1;
9808 data &= ~1u;
b38cadfb 9809
0855e32b
NS		 9810 if (thumb)
9811 {
9812 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9813 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9814 insn = (insn << 16)
9815 | bfd_get_16 (input_bfd,
9816 contents + rel->r_offset - data + 2);
9817 if ((insn & 0xf800c000) == 0xf000c000)
9818 /* bl/blx */
9819 value = -6;
9820 else if ((insn & 0xffffff00) == 0x4400)
9821 /* add */
9822 value = -5;
9823 else
9824 {
9825 (*_bfd_error_handler)
9826 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9827 input_bfd, input_section,
9828 (unsigned long)rel->r_offset, insn);
9829 return bfd_reloc_notsupported;
9830 }
9831 }
9832 else
9833 {
9834 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9835
9836 switch (insn >> 24)
9837 {
9838 case 0xeb: /* bl */
9839 case 0xfa: /* blx */
9840 value = -4;
9841 break;
9842
9843 case 0xe0: /* add */
9844 value = -8;
9845 break;
b38cadfb 9846
0855e32b
NS		 9847 default:
9848 (*_bfd_error_handler)
9849 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9850 input_bfd, input_section,
9851 (unsigned long)rel->r_offset, insn);
9852 return bfd_reloc_notsupported;
9853 }
9854 }
b38cadfb 9855
0855e32b
NS		 9856 value += ((globals->root.sgotplt->output_section->vma
9857 + globals->root.sgotplt->output_offset + off)
9858 - (input_section->output_section->vma
9859 + input_section->output_offset
9860 + rel->r_offset)
9861 + globals->sgotplt_jump_table_size);
9862 }
9863 else
9864 value = ((globals->root.sgot->output_section->vma
9865 + globals->root.sgot->output_offset + off)
9866 - (input_section->output_section->vma
9867 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9868
9869 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9870 contents, rel->r_offset, value,
00a97672 9871 rel->r_addend);
ba93b8ac
DJ		 9872 }
9873
9874 case R_ARM_TLS_LE32:
9ec0c936 9875 if (info->shared && !info->pie)
ba93b8ac
DJ		 9876 {
9877 (*_bfd_error_handler)
9878 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9879 input_bfd, input_section,
9880 (long) rel->r_offset, howto->name);
46691134 9881 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9882 }
9883 else
9884 value = tpoff (info, value);
906e58ca 9885
ba93b8ac 9886 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9887 contents, rel->r_offset, value,
9888 rel->r_addend);
ba93b8ac 9889
319850b4
JB		 9890 case R_ARM_V4BX:
9891 if (globals->fix_v4bx)
845b51d6
PB		 9892 {
9893 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9894
845b51d6
PB		 9895 /* Ensure that we have a BX instruction. */
9896 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9897
845b51d6
PB		 9898 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9899 {
9900 /* Branch to veneer. */
9901 bfd_vma glue_addr;
9902 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9903 glue_addr -= input_section->output_section->vma
9904 + input_section->output_offset
9905 + rel->r_offset + 8;
9906 insn = (insn & 0xf0000000) | 0x0a000000
9907 | ((glue_addr >> 2) & 0x00ffffff);
9908 }
9909 else
9910 {
9911 /* Preserve Rm (lowest four bits) and the condition code
9912 (highest four bits). Other bits encode MOV PC,Rm. */
9913 insn = (insn & 0xf000000f) | 0x01a0f000;
9914 }
319850b4 9915
845b51d6
PB		 9916 bfd_put_32 (input_bfd, insn, hit_data);
9917 }
319850b4
JB		 9918 return bfd_reloc_ok;
9919
b6895b4f
PB		 9920 case R_ARM_MOVW_ABS_NC:
9921 case R_ARM_MOVT_ABS:
9922 case R_ARM_MOVW_PREL_NC:
9923 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9924 /* Until we properly support segment-base-relative addressing then
9925 we assume the segment base to be zero, as for the group relocations.
9926 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9927 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9928 case R_ARM_MOVW_BREL_NC:
9929 case R_ARM_MOVW_BREL:
9930 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9931 {
9932 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9933
9934 if (globals->use_rel)
9935 {
9936 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9937 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9938 }
92f5d02b 9939
b6895b4f 9940 value += signed_addend;
b6895b4f
PB		 9941
9942 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9943 value -= (input_section->output_section->vma
9944 + input_section->output_offset + rel->r_offset);
9945
92f5d02b 9946 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
99059e56 9947 return bfd_reloc_overflow;
92f5d02b 9948
35fc36a8 9949 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9950 value |= 1;
9951
9952 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
99059e56 9953 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9954 value >>= 16;
9955
9956 insn &= 0xfff0f000;
9957 insn |= value & 0xfff;
9958 insn |= (value & 0xf000) << 4;
9959 bfd_put_32 (input_bfd, insn, hit_data);
9960 }
9961 return bfd_reloc_ok;
9962
9963 case R_ARM_THM_MOVW_ABS_NC:
9964 case R_ARM_THM_MOVT_ABS:
9965 case R_ARM_THM_MOVW_PREL_NC:
9966 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9967 /* Until we properly support segment-base-relative addressing then
9968 we assume the segment base to be zero, as for the above relocations.
9969 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9970 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9971 as R_ARM_THM_MOVT_ABS. */
9972 case R_ARM_THM_MOVW_BREL_NC:
9973 case R_ARM_THM_MOVW_BREL:
9974 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9975 {
9976 bfd_vma insn;
906e58ca 9977
b6895b4f
PB		 9978 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9979 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9980
9981 if (globals->use_rel)
9982 {
9983 addend = ((insn >> 4) & 0xf000)
9984 | ((insn >> 15) & 0x0800)
9985 | ((insn >> 4) & 0x0700)
9986 | (insn & 0x00ff);
39623e12 9987 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9988 }
92f5d02b 9989
b6895b4f 9990 value += signed_addend;
b6895b4f
PB		 9991
9992 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9993 value -= (input_section->output_section->vma
9994 + input_section->output_offset + rel->r_offset);
9995
92f5d02b 9996 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
99059e56 9997 return bfd_reloc_overflow;
92f5d02b 9998
35fc36a8 9999 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 10000 value |= 1;
10001
10002 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
99059e56 10003 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 10004 value >>= 16;
10005
10006 insn &= 0xfbf08f00;
10007 insn |= (value & 0xf000) << 4;
10008 insn |= (value & 0x0800) << 15;
10009 insn |= (value & 0x0700) << 4;
10010 insn |= (value & 0x00ff);
10011
10012 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10013 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10014 }
10015 return bfd_reloc_ok;
10016
4962c51a
MS		 10017 case R_ARM_ALU_PC_G0_NC:
10018 case R_ARM_ALU_PC_G1_NC:
10019 case R_ARM_ALU_PC_G0:
10020 case R_ARM_ALU_PC_G1:
10021 case R_ARM_ALU_PC_G2:
10022 case R_ARM_ALU_SB_G0_NC:
10023 case R_ARM_ALU_SB_G1_NC:
10024 case R_ARM_ALU_SB_G0:
10025 case R_ARM_ALU_SB_G1:
10026 case R_ARM_ALU_SB_G2:
10027 {
10028 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10029 bfd_vma pc = input_section->output_section->vma
4962c51a 10030 + input_section->output_offset + rel->r_offset;
31a91d61 10031 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10032 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56
RM		 10033 bfd_vma residual;
10034 bfd_vma g_n;
4962c51a 10035 bfd_signed_vma signed_value;
99059e56
RM		 10036 int group = 0;
10037
10038 /* Determine which group of bits to select. */
10039 switch (r_type)
10040 {
10041 case R_ARM_ALU_PC_G0_NC:
10042 case R_ARM_ALU_PC_G0:
10043 case R_ARM_ALU_SB_G0_NC:
10044 case R_ARM_ALU_SB_G0:
10045 group = 0;
10046 break;
10047
10048 case R_ARM_ALU_PC_G1_NC:
10049 case R_ARM_ALU_PC_G1:
10050 case R_ARM_ALU_SB_G1_NC:
10051 case R_ARM_ALU_SB_G1:
10052 group = 1;
10053 break;
10054
10055 case R_ARM_ALU_PC_G2:
10056 case R_ARM_ALU_SB_G2:
10057 group = 2;
10058 break;
10059
10060 default:
10061 abort ();
10062 }
10063
10064 /* If REL, extract the addend from the insn. If RELA, it will
10065 have already been fetched for us. */
4962c51a 10066 if (globals->use_rel)
99059e56
RM		 10067 {
10068 int negative;
10069 bfd_vma constant = insn & 0xff;
10070 bfd_vma rotation = (insn & 0xf00) >> 8;
10071
10072 if (rotation == 0)
10073 signed_addend = constant;
10074 else
10075 {
10076 /* Compensate for the fact that in the instruction, the
10077 rotation is stored in multiples of 2 bits. */
10078 rotation *= 2;
10079
10080 /* Rotate "constant" right by "rotation" bits. */
10081 signed_addend = (constant >> rotation) |
10082 (constant << (8 * sizeof (bfd_vma) - rotation));
10083 }
10084
10085 /* Determine if the instruction is an ADD or a SUB.
10086 (For REL, this determines the sign of the addend.) */
10087 negative = identify_add_or_sub (insn);
10088 if (negative == 0)
10089 {
10090 (*_bfd_error_handler)
10091 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10092 input_bfd, input_section,
10093 (long) rel->r_offset, howto->name);
10094 return bfd_reloc_overflow;
10095 }
10096
10097 signed_addend *= negative;
10098 }
4962c51a
MS		 10099
10100 /* Compute the value (X) to go in the place. */
99059e56
RM		 10101 if (r_type == R_ARM_ALU_PC_G0_NC
10102 || r_type == R_ARM_ALU_PC_G1_NC
10103 || r_type == R_ARM_ALU_PC_G0
10104 || r_type == R_ARM_ALU_PC_G1
10105 || r_type == R_ARM_ALU_PC_G2)
10106 /* PC relative. */
10107 signed_value = value - pc + signed_addend;
10108 else
10109 /* Section base relative. */
10110 signed_value = value - sb + signed_addend;
10111
10112 /* If the target symbol is a Thumb function, then set the
10113 Thumb bit in the address. */
35fc36a8 10114 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 10115 signed_value |= 1;
10116
99059e56
RM		 10117 /* Calculate the value of the relevant G_n, in encoded
10118 constant-with-rotation format. */
10119 g_n = calculate_group_reloc_mask (abs (signed_value), group,
10120 &residual);
10121
10122 /* Check for overflow if required. */
10123 if ((r_type == R_ARM_ALU_PC_G0
10124 || r_type == R_ARM_ALU_PC_G1
10125 || r_type == R_ARM_ALU_PC_G2
10126 || r_type == R_ARM_ALU_SB_G0
10127 || r_type == R_ARM_ALU_SB_G1
10128 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10129 {
10130 (*_bfd_error_handler)
10131 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10132 input_bfd, input_section,
10133 (long) rel->r_offset, abs (signed_value), howto->name);
10134 return bfd_reloc_overflow;
10135 }
10136
10137 /* Mask out the value and the ADD/SUB part of the opcode; take care
10138 not to destroy the S bit. */
10139 insn &= 0xff1ff000;
10140
10141 /* Set the opcode according to whether the value to go in the
10142 place is negative. */
10143 if (signed_value < 0)
10144 insn |= 1 << 22;
10145 else
10146 insn |= 1 << 23;
10147
10148 /* Encode the offset. */
10149 insn |= g_n;
4962c51a
MS		 10150
10151 bfd_put_32 (input_bfd, insn, hit_data);
10152 }
10153 return bfd_reloc_ok;
10154
10155 case R_ARM_LDR_PC_G0:
10156 case R_ARM_LDR_PC_G1:
10157 case R_ARM_LDR_PC_G2:
10158 case R_ARM_LDR_SB_G0:
10159 case R_ARM_LDR_SB_G1:
10160 case R_ARM_LDR_SB_G2:
10161 {
10162 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10163 bfd_vma pc = input_section->output_section->vma
4962c51a 10164 + input_section->output_offset + rel->r_offset;
31a91d61 10165 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10166 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10167 bfd_vma residual;
4962c51a 10168 bfd_signed_vma signed_value;
99059e56
RM		 10169 int group = 0;
10170
10171 /* Determine which groups of bits to calculate. */
10172 switch (r_type)
10173 {
10174 case R_ARM_LDR_PC_G0:
10175 case R_ARM_LDR_SB_G0:
10176 group = 0;
10177 break;
10178
10179 case R_ARM_LDR_PC_G1:
10180 case R_ARM_LDR_SB_G1:
10181 group = 1;
10182 break;
10183
10184 case R_ARM_LDR_PC_G2:
10185 case R_ARM_LDR_SB_G2:
10186 group = 2;
10187 break;
10188
10189 default:
10190 abort ();
10191 }
10192
10193 /* If REL, extract the addend from the insn. If RELA, it will
10194 have already been fetched for us. */
4962c51a 10195 if (globals->use_rel)
99059e56
RM		 10196 {
10197 int negative = (insn & (1 << 23)) ? 1 : -1;
10198 signed_addend = negative * (insn & 0xfff);
10199 }
4962c51a
MS		 10200
10201 /* Compute the value (X) to go in the place. */
99059e56
RM		 10202 if (r_type == R_ARM_LDR_PC_G0
10203 || r_type == R_ARM_LDR_PC_G1
10204 || r_type == R_ARM_LDR_PC_G2)
10205 /* PC relative. */
10206 signed_value = value - pc + signed_addend;
10207 else
10208 /* Section base relative. */
10209 signed_value = value - sb + signed_addend;
10210
10211 /* Calculate the value of the relevant G_{n-1} to obtain
10212 the residual at that stage. */
10213 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10214
10215 /* Check for overflow. */
10216 if (residual >= 0x1000)
10217 {
10218 (*_bfd_error_handler)
10219 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10220 input_bfd, input_section,
10221 (long) rel->r_offset, abs (signed_value), howto->name);
10222 return bfd_reloc_overflow;
10223 }
10224
10225 /* Mask out the value and U bit. */
10226 insn &= 0xff7ff000;
10227
10228 /* Set the U bit if the value to go in the place is non-negative. */
10229 if (signed_value >= 0)
10230 insn |= 1 << 23;
10231
10232 /* Encode the offset. */
10233 insn |= residual;
4962c51a
MS		 10234
10235 bfd_put_32 (input_bfd, insn, hit_data);
10236 }
10237 return bfd_reloc_ok;
10238
10239 case R_ARM_LDRS_PC_G0:
10240 case R_ARM_LDRS_PC_G1:
10241 case R_ARM_LDRS_PC_G2:
10242 case R_ARM_LDRS_SB_G0:
10243 case R_ARM_LDRS_SB_G1:
10244 case R_ARM_LDRS_SB_G2:
10245 {
10246 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10247 bfd_vma pc = input_section->output_section->vma
4962c51a 10248 + input_section->output_offset + rel->r_offset;
31a91d61 10249 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10250 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10251 bfd_vma residual;
4962c51a 10252 bfd_signed_vma signed_value;
99059e56
RM		 10253 int group = 0;
10254
10255 /* Determine which groups of bits to calculate. */
10256 switch (r_type)
10257 {
10258 case R_ARM_LDRS_PC_G0:
10259 case R_ARM_LDRS_SB_G0:
10260 group = 0;
10261 break;
10262
10263 case R_ARM_LDRS_PC_G1:
10264 case R_ARM_LDRS_SB_G1:
10265 group = 1;
10266 break;
10267
10268 case R_ARM_LDRS_PC_G2:
10269 case R_ARM_LDRS_SB_G2:
10270 group = 2;
10271 break;
10272
10273 default:
10274 abort ();
10275 }
10276
10277 /* If REL, extract the addend from the insn. If RELA, it will
10278 have already been fetched for us. */
4962c51a 10279 if (globals->use_rel)
99059e56
RM		 10280 {
10281 int negative = (insn & (1 << 23)) ? 1 : -1;
10282 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10283 }
4962c51a
MS		 10284
10285 /* Compute the value (X) to go in the place. */
99059e56
RM		 10286 if (r_type == R_ARM_LDRS_PC_G0
10287 || r_type == R_ARM_LDRS_PC_G1
10288 || r_type == R_ARM_LDRS_PC_G2)
10289 /* PC relative. */
10290 signed_value = value - pc + signed_addend;
10291 else
10292 /* Section base relative. */
10293 signed_value = value - sb + signed_addend;
10294
10295 /* Calculate the value of the relevant G_{n-1} to obtain
10296 the residual at that stage. */
10297 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10298
10299 /* Check for overflow. */
10300 if (residual >= 0x100)
10301 {
10302 (*_bfd_error_handler)
10303 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10304 input_bfd, input_section,
10305 (long) rel->r_offset, abs (signed_value), howto->name);
10306 return bfd_reloc_overflow;
10307 }
10308
10309 /* Mask out the value and U bit. */
10310 insn &= 0xff7ff0f0;
10311
10312 /* Set the U bit if the value to go in the place is non-negative. */
10313 if (signed_value >= 0)
10314 insn |= 1 << 23;
10315
10316 /* Encode the offset. */
10317 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
4962c51a
MS		 10318
10319 bfd_put_32 (input_bfd, insn, hit_data);
10320 }
10321 return bfd_reloc_ok;
10322
10323 case R_ARM_LDC_PC_G0:
10324 case R_ARM_LDC_PC_G1:
10325 case R_ARM_LDC_PC_G2:
10326 case R_ARM_LDC_SB_G0:
10327 case R_ARM_LDC_SB_G1:
10328 case R_ARM_LDC_SB_G2:
10329 {
10330 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10331 bfd_vma pc = input_section->output_section->vma
4962c51a 10332 + input_section->output_offset + rel->r_offset;
31a91d61 10333 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10334 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10335 bfd_vma residual;
4962c51a 10336 bfd_signed_vma signed_value;
99059e56
RM		 10337 int group = 0;
10338
10339 /* Determine which groups of bits to calculate. */
10340 switch (r_type)
10341 {
10342 case R_ARM_LDC_PC_G0:
10343 case R_ARM_LDC_SB_G0:
10344 group = 0;
10345 break;
10346
10347 case R_ARM_LDC_PC_G1:
10348 case R_ARM_LDC_SB_G1:
10349 group = 1;
10350 break;
10351
10352 case R_ARM_LDC_PC_G2:
10353 case R_ARM_LDC_SB_G2:
10354 group = 2;
10355 break;
10356
10357 default:
10358 abort ();
10359 }
10360
10361 /* If REL, extract the addend from the insn. If RELA, it will
10362 have already been fetched for us. */
4962c51a 10363 if (globals->use_rel)
99059e56
RM		 10364 {
10365 int negative = (insn & (1 << 23)) ? 1 : -1;
10366 signed_addend = negative * ((insn & 0xff) << 2);
10367 }
4962c51a
MS		 10368
10369 /* Compute the value (X) to go in the place. */
99059e56
RM		 10370 if (r_type == R_ARM_LDC_PC_G0
10371 || r_type == R_ARM_LDC_PC_G1
10372 || r_type == R_ARM_LDC_PC_G2)
10373 /* PC relative. */
10374 signed_value = value - pc + signed_addend;
10375 else
10376 /* Section base relative. */
10377 signed_value = value - sb + signed_addend;
10378
10379 /* Calculate the value of the relevant G_{n-1} to obtain
10380 the residual at that stage. */
10381 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10382
10383 /* Check for overflow. (The absolute value to go in the place must be
10384 divisible by four and, after having been divided by four, must
10385 fit in eight bits.) */
10386 if ((residual & 0x3) != 0 || residual >= 0x400)
10387 {
10388 (*_bfd_error_handler)
10389 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10390 input_bfd, input_section,
10391 (long) rel->r_offset, abs (signed_value), howto->name);
10392 return bfd_reloc_overflow;
10393 }
10394
10395 /* Mask out the value and U bit. */
10396 insn &= 0xff7fff00;
10397
10398 /* Set the U bit if the value to go in the place is non-negative. */
10399 if (signed_value >= 0)
10400 insn |= 1 << 23;
10401
10402 /* Encode the offset. */
10403 insn |= residual >> 2;
4962c51a
MS		 10404
10405 bfd_put_32 (input_bfd, insn, hit_data);
10406 }
10407 return bfd_reloc_ok;
10408
252b5132
RH		 10409 default:
10410 return bfd_reloc_notsupported;
10411 }
10412}
10413
98c1d4aa
NC		 10414/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10415static void
57e8b36a
NC		 10416arm_add_to_rel (bfd * abfd,
10417 bfd_byte * address,
10418 reloc_howto_type * howto,
10419 bfd_signed_vma increment)
98c1d4aa 10420{
98c1d4aa
NC		 10421 bfd_signed_vma addend;
10422
bd97cb95
DJ		 10423 if (howto->type == R_ARM_THM_CALL
10424 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10425 {
9a5aca8c
AM		 10426 int upper_insn, lower_insn;
10427 int upper, lower;
98c1d4aa 10428
9a5aca8c
AM		 10429 upper_insn = bfd_get_16 (abfd, address);
10430 lower_insn = bfd_get_16 (abfd, address + 2);
10431 upper = upper_insn & 0x7ff;
10432 lower = lower_insn & 0x7ff;
10433
10434 addend = (upper << 12) | (lower << 1);
ddda4409 10435 addend += increment;
9a5aca8c 10436 addend >>= 1;
98c1d4aa 10437
9a5aca8c
AM		 10438 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10439 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10440
dc810e39
AM		 10441 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10442 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10443 }
10444 else
10445 {
10446 bfd_vma contents;
10447
10448 contents = bfd_get_32 (abfd, address);
10449
10450 /* Get the (signed) value from the instruction. */
10451 addend = contents & howto->src_mask;
10452 if (addend & ((howto->src_mask + 1) >> 1))
10453 {
10454 bfd_signed_vma mask;
10455
10456 mask = -1;
10457 mask &= ~ howto->src_mask;
10458 addend |= mask;
10459 }
10460
10461 /* Add in the increment, (which is a byte value). */
10462 switch (howto->type)
10463 {
10464 default:
10465 addend += increment;
10466 break;
10467
10468 case R_ARM_PC24:
c6596c5e 10469 case R_ARM_PLT32:
5b5bb741
PB		 10470 case R_ARM_CALL:
10471 case R_ARM_JUMP24:
9a5aca8c 10472 addend <<= howto->size;
dc810e39 10473 addend += increment;
9a5aca8c
AM		 10474
10475 /* Should we check for overflow here ? */
10476
10477 /* Drop any undesired bits. */
10478 addend >>= howto->rightshift;
10479 break;
10480 }
10481
10482 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10483
10484 bfd_put_32 (abfd, contents, address);
ddda4409 10485 }
98c1d4aa 10486}
252b5132 10487
ba93b8ac
DJ		 10488#define IS_ARM_TLS_RELOC(R_TYPE) \
10489 ((R_TYPE) == R_ARM_TLS_GD32 \
10490 || (R_TYPE) == R_ARM_TLS_LDO32 \
10491 || (R_TYPE) == R_ARM_TLS_LDM32 \
10492 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10493 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10494 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10495 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10496 || (R_TYPE) == R_ARM_TLS_IE32 \
10497 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10498
10499/* Specific set of relocations for the gnu tls dialect. */
10500#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10501 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10502 || (R_TYPE) == R_ARM_TLS_CALL \
10503 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10504 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10505 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10506
252b5132 10507/* Relocate an ARM ELF section. */
906e58ca 10508
b34976b6 10509static bfd_boolean
57e8b36a
NC		 10510elf32_arm_relocate_section (bfd * output_bfd,
10511 struct bfd_link_info * info,
10512 bfd * input_bfd,
10513 asection * input_section,
10514 bfd_byte * contents,
10515 Elf_Internal_Rela * relocs,
10516 Elf_Internal_Sym * local_syms,
10517 asection ** local_sections)
252b5132 10518{
b34976b6
AM		 10519 Elf_Internal_Shdr *symtab_hdr;
10520 struct elf_link_hash_entry **sym_hashes;
10521 Elf_Internal_Rela *rel;
10522 Elf_Internal_Rela *relend;
10523 const char *name;
b32d3aa2 10524 struct elf32_arm_link_hash_table * globals;
252b5132 10525
4e7fd91e 10526 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10527 if (globals == NULL)
10528 return FALSE;
b491616a 10529
0ffa91dd 10530 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10531 sym_hashes = elf_sym_hashes (input_bfd);
10532
10533 rel = relocs;
10534 relend = relocs + input_section->reloc_count;
10535 for (; rel < relend; rel++)
10536 {
ba96a88f
NC		 10537 int r_type;
10538 reloc_howto_type * howto;
10539 unsigned long r_symndx;
10540 Elf_Internal_Sym * sym;
10541 asection * sec;
252b5132 10542 struct elf_link_hash_entry * h;
ba96a88f
NC		 10543 bfd_vma relocation;
10544 bfd_reloc_status_type r;
10545 arelent bfd_reloc;
ba93b8ac 10546 char sym_type;
0945cdfd 10547 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10548 char *error_message = NULL;
f21f3fe0 10549
252b5132 10550 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10551 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10552 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10553
ba96a88f 10554 if ( r_type == R_ARM_GNU_VTENTRY
99059e56
RM		 10555 || r_type == R_ARM_GNU_VTINHERIT)
10556 continue;
252b5132 10557
b32d3aa2 10558 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10559 howto = bfd_reloc.howto;
252b5132 10560
252b5132
RH		 10561 h = NULL;
10562 sym = NULL;
10563 sec = NULL;
9b485d32 10564
252b5132
RH		 10565 if (r_symndx < symtab_hdr->sh_info)
10566 {
10567 sym = local_syms + r_symndx;
ba93b8ac 10568 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10569 sec = local_sections[r_symndx];
ffcb4889
NS		 10570
10571 /* An object file might have a reference to a local
10572 undefined symbol. This is a daft object file, but we
10573 should at least do something about it. V4BX & NONE
10574 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10575 allowed to use the undefined symbol, so allow those.
10576 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10577 if (r_type != R_ARM_V4BX
10578 && r_type != R_ARM_NONE
77b4f08f 10579 && r_symndx != STN_UNDEF
ffcb4889
NS		 10580 && bfd_is_und_section (sec)
10581 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10582 {
10583 if (!info->callbacks->undefined_symbol
10584 (info, bfd_elf_string_from_elf_section
10585 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10586 input_bfd, input_section,
10587 rel->r_offset, TRUE))
10588 return FALSE;
10589 }
b38cadfb 10590
4e7fd91e 10591 if (globals->use_rel)
f8df10f4 10592 {
4e7fd91e
PB		 10593 relocation = (sec->output_section->vma
10594 + sec->output_offset
10595 + sym->st_value);
ab96bf03
AM		 10596 if (!info->relocatable
10597 && (sec->flags & SEC_MERGE)
10598 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10599 {
4e7fd91e
PB		 10600 asection *msec;
10601 bfd_vma addend, value;
10602
39623e12 10603 switch (r_type)
4e7fd91e 10604 {
39623e12
PB		 10605 case R_ARM_MOVW_ABS_NC:
10606 case R_ARM_MOVT_ABS:
10607 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10608 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10609 addend = (addend ^ 0x8000) - 0x8000;
10610 break;
f8df10f4 10611
39623e12
PB		 10612 case R_ARM_THM_MOVW_ABS_NC:
10613 case R_ARM_THM_MOVT_ABS:
10614 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10615 << 16;
10616 value |= bfd_get_16 (input_bfd,
10617 contents + rel->r_offset + 2);
10618 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10619 | ((value & 0x04000000) >> 15);
10620 addend = (addend ^ 0x8000) - 0x8000;
10621 break;
f8df10f4 10622
39623e12
PB		 10623 default:
10624 if (howto->rightshift
10625 || (howto->src_mask & (howto->src_mask + 1)))
10626 {
10627 (*_bfd_error_handler)
10628 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10629 input_bfd, input_section,
10630 (long) rel->r_offset, howto->name);
10631 return FALSE;
10632 }
10633
10634 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10635
10636 /* Get the (signed) value from the instruction. */
10637 addend = value & howto->src_mask;
10638 if (addend & ((howto->src_mask + 1) >> 1))
10639 {
10640 bfd_signed_vma mask;
10641
10642 mask = -1;
10643 mask &= ~ howto->src_mask;
10644 addend |= mask;
10645 }
10646 break;
4e7fd91e 10647 }
39623e12 10648
4e7fd91e
PB		 10649 msec = sec;
10650 addend =
10651 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10652 - relocation;
10653 addend += msec->output_section->vma + msec->output_offset;
39623e12 10654
cc643b88 10655 /* Cases here must match those in the preceding
39623e12
PB		 10656 switch statement. */
10657 switch (r_type)
10658 {
10659 case R_ARM_MOVW_ABS_NC:
10660 case R_ARM_MOVT_ABS:
10661 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10662 | (addend & 0xfff);
10663 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10664 break;
10665
10666 case R_ARM_THM_MOVW_ABS_NC:
10667 case R_ARM_THM_MOVT_ABS:
10668 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10669 | (addend & 0xff) | ((addend & 0x0800) << 15);
10670 bfd_put_16 (input_bfd, value >> 16,
10671 contents + rel->r_offset);
10672 bfd_put_16 (input_bfd, value,
10673 contents + rel->r_offset + 2);
10674 break;
10675
10676 default:
10677 value = (value & ~ howto->dst_mask)
10678 | (addend & howto->dst_mask);
10679 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10680 break;
10681 }
f8df10f4 10682 }
f8df10f4 10683 }
4e7fd91e
PB		 10684 else
10685 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10686 }
10687 else
10688 {
62d887d4 10689 bfd_boolean warned, ignored;
560e09e9 10690
b2a8e766
AM		 10691 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10692 r_symndx, symtab_hdr, sym_hashes,
10693 h, sec, relocation,
62d887d4 10694 unresolved_reloc, warned, ignored);
ba93b8ac
DJ		 10695
10696 sym_type = h->type;
252b5132
RH		 10697 }
10698
dbaa2011 10699 if (sec != NULL && discarded_section (sec))
e4067dbb 10700 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10701 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10702
10703 if (info->relocatable)
10704 {
10705 /* This is a relocatable link. We don't have to change
10706 anything, unless the reloc is against a section symbol,
10707 in which case we have to adjust according to where the
10708 section symbol winds up in the output section. */
10709 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10710 {
10711 if (globals->use_rel)
10712 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10713 howto, (bfd_signed_vma) sec->output_offset);
10714 else
10715 rel->r_addend += sec->output_offset;
10716 }
10717 continue;
10718 }
10719
252b5132
RH		 10720 if (h != NULL)
10721 name = h->root.root.string;
10722 else
10723 {
10724 name = (bfd_elf_string_from_elf_section
10725 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10726 if (name == NULL || *name == '\0')
10727 name = bfd_section_name (input_bfd, sec);
10728 }
f21f3fe0 10729
cf35638d 10730 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10731 && r_type != R_ARM_NONE
10732 && (h == NULL
10733 || h->root.type == bfd_link_hash_defined
10734 || h->root.type == bfd_link_hash_defweak)
10735 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10736 {
10737 (*_bfd_error_handler)
10738 ((sym_type == STT_TLS
10739 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10740 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10741 input_bfd,
10742 input_section,
10743 (long) rel->r_offset,
10744 howto->name,
10745 name);
10746 }
10747
0855e32b 10748 /* We call elf32_arm_final_link_relocate unless we're completely
99059e56
RM		 10749 done, i.e., the relaxation produced the final output we want,
10750 and we won't let anybody mess with it. Also, we have to do
10751 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
6a631e86 10752 both in relaxed and non-relaxed cases. */
0855e32b
NS		 10753 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10754 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10755 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10756 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10757 & GOT_TLS_GDESC)))
10758 {
10759 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10760 contents, rel, h == NULL);
10761 /* This may have been marked unresolved because it came from
10762 a shared library. But we've just dealt with that. */
10763 unresolved_reloc = 0;
10764 }
10765 else
10766 r = bfd_reloc_continue;
b38cadfb 10767
0855e32b
NS		 10768 if (r == bfd_reloc_continue)
10769 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10770 input_section, contents, rel,
34e77a92 10771 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10772 (h ? h->target_internal
10773 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10774 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10775
10776 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10777 because such sections are not SEC_ALLOC and thus ld.so will
10778 not process them. */
10779 if (unresolved_reloc
99059e56
RM		 10780 && !((input_section->flags & SEC_DEBUGGING) != 0
10781 && h->def_dynamic)
1d5316ab
AM		 10782 && _bfd_elf_section_offset (output_bfd, info, input_section,
10783 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10784 {
10785 (*_bfd_error_handler)
843fe662
L		 10786 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10787 input_bfd,
10788 input_section,
10789 (long) rel->r_offset,
10790 howto->name,
10791 h->root.root.string);
0945cdfd
DJ		 10792 return FALSE;
10793 }
252b5132
RH		 10794
10795 if (r != bfd_reloc_ok)
10796 {
252b5132
RH		 10797 switch (r)
10798 {
10799 case bfd_reloc_overflow:
cf919dfd
PB		 10800 /* If the overflowing reloc was to an undefined symbol,
10801 we have already printed one error message and there
10802 is no point complaining again. */
10803 if ((! h ||
10804 h->root.type != bfd_link_hash_undefined)
10805 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10806 (info, (h ? &h->root : NULL), name, howto->name,
10807 (bfd_vma) 0, input_bfd, input_section,
10808 rel->r_offset))))
b34976b6 10809 return FALSE;
252b5132
RH		 10810 break;
10811
10812 case bfd_reloc_undefined:
10813 if (!((*info->callbacks->undefined_symbol)
10814 (info, name, input_bfd, input_section,
b34976b6
AM		 10815 rel->r_offset, TRUE)))
10816 return FALSE;
252b5132
RH		 10817 break;
10818
10819 case bfd_reloc_outofrange:
f2a9dd69 10820 error_message = _("out of range");
252b5132
RH		 10821 goto common_error;
10822
10823 case bfd_reloc_notsupported:
f2a9dd69 10824 error_message = _("unsupported relocation");
252b5132
RH		 10825 goto common_error;
10826
10827 case bfd_reloc_dangerous:
f2a9dd69 10828 /* error_message should already be set. */
252b5132
RH		 10829 goto common_error;
10830
10831 default:
f2a9dd69 10832 error_message = _("unknown error");
8029a119 10833 /* Fall through. */
252b5132
RH		 10834
10835 common_error:
f2a9dd69
DJ		 10836 BFD_ASSERT (error_message != NULL);
10837 if (!((*info->callbacks->reloc_dangerous)
10838 (info, error_message, input_bfd, input_section,
252b5132 10839 rel->r_offset)))
b34976b6 10840 return FALSE;
252b5132
RH		 10841 break;
10842 }
10843 }
10844 }
10845
b34976b6 10846 return TRUE;
252b5132
RH		 10847}
10848
91d6fa6a 10849/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10850 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10851 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10852 maintaining that condition). */
10853
10854static void
10855add_unwind_table_edit (arm_unwind_table_edit **head,
10856 arm_unwind_table_edit **tail,
10857 arm_unwind_edit_type type,
10858 asection *linked_section,
91d6fa6a 10859 unsigned int tindex)
2468f9c9 10860{
21d799b5
NC		 10861 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10862 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10863
2468f9c9
PB		 10864 new_edit->type = type;
10865 new_edit->linked_section = linked_section;
91d6fa6a 10866 new_edit->index = tindex;
b38cadfb 10867
91d6fa6a 10868 if (tindex > 0)
2468f9c9
PB		 10869 {
10870 new_edit->next = NULL;
10871
10872 if (*tail)
10873 (*tail)->next = new_edit;
10874
10875 (*tail) = new_edit;
10876
10877 if (!*head)
10878 (*head) = new_edit;
10879 }
10880 else
10881 {
10882 new_edit->next = *head;
10883
10884 if (!*tail)
10885 *tail = new_edit;
10886
10887 *head = new_edit;
10888 }
10889}
10890
10891static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10892
10893/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10894static void
10895adjust_exidx_size(asection *exidx_sec, int adjust)
10896{
10897 asection *out_sec;
10898
10899 if (!exidx_sec->rawsize)
10900 exidx_sec->rawsize = exidx_sec->size;
10901
10902 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10903 out_sec = exidx_sec->output_section;
10904 /* Adjust size of output section. */
10905 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10906}
10907
10908/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10909static void
10910insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10911{
10912 struct _arm_elf_section_data *exidx_arm_data;
10913
10914 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10915 add_unwind_table_edit (
10916 &exidx_arm_data->u.exidx.unwind_edit_list,
10917 &exidx_arm_data->u.exidx.unwind_edit_tail,
10918 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10919
10920 adjust_exidx_size(exidx_sec, 8);
10921}
10922
10923/* Scan .ARM.exidx tables, and create a list describing edits which should be
10924 made to those tables, such that:
b38cadfb 10925
2468f9c9
PB		 10926 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10927 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
99059e56 10928 codes which have been inlined into the index).
2468f9c9 10929
85fdf906
AH		 10930 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10931
2468f9c9 10932 The edits are applied when the tables are written
b38cadfb 10933 (in elf32_arm_write_section). */
2468f9c9
PB		 10934
10935bfd_boolean
10936elf32_arm_fix_exidx_coverage (asection **text_section_order,
10937 unsigned int num_text_sections,
85fdf906
AH		 10938 struct bfd_link_info *info,
10939 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10940{
10941 bfd *inp;
10942 unsigned int last_second_word = 0, i;
10943 asection *last_exidx_sec = NULL;
10944 asection *last_text_sec = NULL;
10945 int last_unwind_type = -1;
10946
10947 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10948 text sections. */
c72f2fb2 10949 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
2468f9c9
PB		 10950 {
10951 asection *sec;
b38cadfb 10952
2468f9c9 10953 for (sec = inp->sections; sec != NULL; sec = sec->next)
99059e56 10954 {
2468f9c9
PB		 10955 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10956 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10957
dec9d5df 10958 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10959 continue;
b38cadfb 10960
2468f9c9
PB		 10961 if (elf_sec->linked_to)
10962 {
10963 Elf_Internal_Shdr *linked_hdr
99059e56 10964 = &elf_section_data (elf_sec->linked_to)->this_hdr;
2468f9c9 10965 struct _arm_elf_section_data *linked_sec_arm_data
99059e56 10966 = get_arm_elf_section_data (linked_hdr->bfd_section);
2468f9c9
PB		 10967
10968 if (linked_sec_arm_data == NULL)
99059e56 10969 continue;
2468f9c9
PB		 10970
10971 /* Link this .ARM.exidx section back from the text section it
99059e56 10972 describes. */
2468f9c9
PB		 10973 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10974 }
10975 }
10976 }
10977
10978 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10979 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10980 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10981
10982 for (i = 0; i < num_text_sections; i++)
10983 {
10984 asection *sec = text_section_order[i];
10985 asection *exidx_sec;
10986 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10987 struct _arm_elf_section_data *exidx_arm_data;
10988 bfd_byte *contents = NULL;
10989 int deleted_exidx_bytes = 0;
10990 bfd_vma j;
10991 arm_unwind_table_edit *unwind_edit_head = NULL;
10992 arm_unwind_table_edit *unwind_edit_tail = NULL;
10993 Elf_Internal_Shdr *hdr;
10994 bfd *ibfd;
10995
10996 if (arm_data == NULL)
99059e56 10997 continue;
2468f9c9
PB		 10998
10999 exidx_sec = arm_data->u.text.arm_exidx_sec;
11000 if (exidx_sec == NULL)
11001 {
11002 /* Section has no unwind data. */
11003 if (last_unwind_type == 0 || !last_exidx_sec)
11004 continue;
11005
11006 /* Ignore zero sized sections. */
11007 if (sec->size == 0)
11008 continue;
11009
11010 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11011 last_unwind_type = 0;
11012 continue;
11013 }
11014
22a8f80e
PB		 11015 /* Skip /DISCARD/ sections. */
11016 if (bfd_is_abs_section (exidx_sec->output_section))
11017 continue;
11018
2468f9c9
PB		 11019 hdr = &elf_section_data (exidx_sec)->this_hdr;
11020 if (hdr->sh_type != SHT_ARM_EXIDX)
99059e56 11021 continue;
b38cadfb 11022
2468f9c9
PB		 11023 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11024 if (exidx_arm_data == NULL)
99059e56 11025 continue;
b38cadfb 11026
2468f9c9 11027 ibfd = exidx_sec->owner;
b38cadfb 11028
2468f9c9
PB		 11029 if (hdr->contents != NULL)
11030 contents = hdr->contents;
11031 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11032 /* An error? */
11033 continue;
11034
11035 for (j = 0; j < hdr->sh_size; j += 8)
11036 {
11037 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11038 int unwind_type;
11039 int elide = 0;
11040
11041 /* An EXIDX_CANTUNWIND entry. */
11042 if (second_word == 1)
11043 {
11044 if (last_unwind_type == 0)
11045 elide = 1;
11046 unwind_type = 0;
11047 }
11048 /* Inlined unwinding data. Merge if equal to previous. */
11049 else if ((second_word & 0x80000000) != 0)
11050 {
85fdf906
AH		 11051 if (merge_exidx_entries
11052 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 11053 elide = 1;
11054 unwind_type = 1;
11055 last_second_word = second_word;
11056 }
11057 /* Normal table entry. In theory we could merge these too,
11058 but duplicate entries are likely to be much less common. */
11059 else
11060 unwind_type = 2;
11061
11062 if (elide)
11063 {
11064 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11065 DELETE_EXIDX_ENTRY, NULL, j / 8);
11066
11067 deleted_exidx_bytes += 8;
11068 }
11069
11070 last_unwind_type = unwind_type;
11071 }
11072
11073 /* Free contents if we allocated it ourselves. */
11074 if (contents != hdr->contents)
99059e56 11075 free (contents);
2468f9c9
PB		 11076
11077 /* Record edits to be applied later (in elf32_arm_write_section). */
11078 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11079 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 11080
2468f9c9
PB		 11081 if (deleted_exidx_bytes > 0)
11082 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11083
11084 last_exidx_sec = exidx_sec;
11085 last_text_sec = sec;
11086 }
11087
11088 /* Add terminating CANTUNWIND entry. */
11089 if (last_exidx_sec && last_unwind_type != 0)
11090 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11091
11092 return TRUE;
11093}
11094
3e6b1042
DJ		 11095static bfd_boolean
11096elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11097 bfd *ibfd, const char *name)
11098{
11099 asection *sec, *osec;
11100
3d4d4302 11101 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 11102 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11103 return TRUE;
11104
11105 osec = sec->output_section;
11106 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11107 return TRUE;
11108
11109 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11110 sec->output_offset, sec->size))
11111 return FALSE;
11112
11113 return TRUE;
11114}
11115
11116static bfd_boolean
11117elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11118{
11119 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 11120 asection *sec, *osec;
3e6b1042 11121
4dfe6ac6
NC		 11122 if (globals == NULL)
11123 return FALSE;
11124
3e6b1042
DJ		 11125 /* Invoke the regular ELF backend linker to do all the work. */
11126 if (!bfd_elf_final_link (abfd, info))
11127 return FALSE;
11128
fe33d2fa
CL		 11129 /* Process stub sections (eg BE8 encoding, ...). */
11130 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11131 int i;
cdb21a0a
NS		 11132 for (i=0; i<htab->top_id; i++)
11133 {
11134 sec = htab->stub_group[i].stub_sec;
11135 /* Only process it once, in its link_sec slot. */
11136 if (sec && i == htab->stub_group[i].link_sec->id)
11137 {
11138 osec = sec->output_section;
11139 elf32_arm_write_section (abfd, info, sec, sec->contents);
11140 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11141 sec->output_offset, sec->size))
11142 return FALSE;
11143 }
fe33d2fa 11144 }
fe33d2fa 11145
3e6b1042
DJ		 11146 /* Write out any glue sections now that we have created all the
11147 stubs. */
11148 if (globals->bfd_of_glue_owner != NULL)
11149 {
11150 if (! elf32_arm_output_glue_section (info, abfd,
11151 globals->bfd_of_glue_owner,
11152 ARM2THUMB_GLUE_SECTION_NAME))
11153 return FALSE;
11154
11155 if (! elf32_arm_output_glue_section (info, abfd,
11156 globals->bfd_of_glue_owner,
11157 THUMB2ARM_GLUE_SECTION_NAME))
11158 return FALSE;
11159
11160 if (! elf32_arm_output_glue_section (info, abfd,
11161 globals->bfd_of_glue_owner,
11162 VFP11_ERRATUM_VENEER_SECTION_NAME))
11163 return FALSE;
11164
11165 if (! elf32_arm_output_glue_section (info, abfd,
11166 globals->bfd_of_glue_owner,
11167 ARM_BX_GLUE_SECTION_NAME))
11168 return FALSE;
11169 }
11170
11171 return TRUE;
11172}
11173
5968a7b8
NC		 11174/* Return a best guess for the machine number based on the attributes. */
11175
11176static unsigned int
11177bfd_arm_get_mach_from_attributes (bfd * abfd)
11178{
11179 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11180
11181 switch (arch)
11182 {
11183 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11184 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11185 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11186
11187 case TAG_CPU_ARCH_V5TE:
11188 {
11189 char * name;
11190
11191 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11192 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11193
11194 if (name)
11195 {
11196 if (strcmp (name, "IWMMXT2") == 0)
11197 return bfd_mach_arm_iWMMXt2;
11198
11199 if (strcmp (name, "IWMMXT") == 0)
6034aab8 11200 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 11201
11202 if (strcmp (name, "XSCALE") == 0)
11203 {
11204 int wmmx;
11205
11206 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11207 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11208 switch (wmmx)
11209 {
11210 case 1: return bfd_mach_arm_iWMMXt;
11211 case 2: return bfd_mach_arm_iWMMXt2;
11212 default: return bfd_mach_arm_XScale;
11213 }
11214 }
5968a7b8
NC		 11215 }
11216
11217 return bfd_mach_arm_5TE;
11218 }
11219
11220 default:
11221 return bfd_mach_arm_unknown;
11222 }
11223}
11224
c178919b
NC		 11225/* Set the right machine number. */
11226
11227static bfd_boolean
57e8b36a 11228elf32_arm_object_p (bfd *abfd)
c178919b 11229{
5a6c6817 11230 unsigned int mach;
57e8b36a 11231
5a6c6817 11232 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11233
5968a7b8
NC		 11234 if (mach == bfd_mach_arm_unknown)
11235 {
11236 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11237 mach = bfd_mach_arm_ep9312;
11238 else
11239 mach = bfd_arm_get_mach_from_attributes (abfd);
11240 }
c178919b 11241
5968a7b8 11242 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11243 return TRUE;
11244}
11245
fc830a83 11246/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11247
b34976b6 11248static bfd_boolean
57e8b36a 11249elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11250{
11251 if (elf_flags_init (abfd)
11252 && elf_elfheader (abfd)->e_flags != flags)
11253 {
fc830a83
NC		 11254 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11255 {
fd2ec330 11256 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11257 (*_bfd_error_handler)
11258 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11259 abfd);
fc830a83 11260 else
d003868e
AM		 11261 _bfd_error_handler
11262 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11263 abfd);
fc830a83 11264 }
252b5132
RH		 11265 }
11266 else
11267 {
11268 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11269 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11270 }
11271
b34976b6 11272 return TRUE;
252b5132
RH		 11273}
11274
fc830a83 11275/* Copy backend specific data from one object module to another. */
9b485d32 11276
b34976b6 11277static bfd_boolean
57e8b36a 11278elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11279{
11280 flagword in_flags;
11281 flagword out_flags;
11282
0ffa91dd 11283 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11284 return TRUE;
252b5132 11285
fc830a83 11286 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11287 out_flags = elf_elfheader (obfd)->e_flags;
11288
fc830a83
NC		 11289 if (elf_flags_init (obfd)
11290 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11291 && in_flags != out_flags)
252b5132 11292 {
252b5132 11293 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11294 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11295 return FALSE;
252b5132
RH		 11296
11297 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11298 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11299 return FALSE;
252b5132
RH		 11300
11301 /* If the src and dest have different interworking flags
99059e56 11302 then turn off the interworking bit. */
fd2ec330 11303 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11304 {
fd2ec330 11305 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11306 _bfd_error_handler
11307 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11308 obfd, ibfd);
252b5132 11309
fd2ec330 11310 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11311 }
1006ba19
PB		 11312
11313 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11314 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11315 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11316 }
11317
11318 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11319 elf_flags_init (obfd) = TRUE;
252b5132 11320
e2349352 11321 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
ee065d83
PB		 11322}
11323
11324/* Values for Tag_ABI_PCS_R9_use. */
11325enum
11326{
11327 AEABI_R9_V6,
11328 AEABI_R9_SB,
11329 AEABI_R9_TLS,
11330 AEABI_R9_unused
11331};
11332
11333/* Values for Tag_ABI_PCS_RW_data. */
11334enum
11335{
11336 AEABI_PCS_RW_data_absolute,
11337 AEABI_PCS_RW_data_PCrel,
11338 AEABI_PCS_RW_data_SBrel,
11339 AEABI_PCS_RW_data_unused
11340};
11341
11342/* Values for Tag_ABI_enum_size. */
11343enum
11344{
11345 AEABI_enum_unused,
11346 AEABI_enum_short,
11347 AEABI_enum_wide,
11348 AEABI_enum_forced_wide
11349};
11350
104d59d1
JM		 11351/* Determine whether an object attribute tag takes an integer, a
11352 string or both. */
906e58ca 11353
104d59d1
JM		 11354static int
11355elf32_arm_obj_attrs_arg_type (int tag)
11356{
11357 if (tag == Tag_compatibility)
3483fe2e 11358 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11359 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11360 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11361 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11362 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11363 else if (tag < 32)
3483fe2e 11364 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11365 else
3483fe2e 11366 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11367}
11368
5aa6ff7c
AS		 11369/* The ABI defines that Tag_conformance should be emitted first, and that
11370 Tag_nodefaults should be second (if either is defined). This sets those
11371 two positions, and bumps up the position of all the remaining tags to
11372 compensate. */
11373static int
11374elf32_arm_obj_attrs_order (int num)
11375{
3de4a297 11376 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11377 return Tag_conformance;
3de4a297 11378 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11379 return Tag_nodefaults;
11380 if ((num - 2) < Tag_nodefaults)
11381 return num - 2;
11382 if ((num - 1) < Tag_conformance)
11383 return num - 1;
11384 return num;
11385}
11386
e8b36cd1
JM		 11387/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11388static bfd_boolean
11389elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11390{
11391 if ((tag & 127) < 64)
11392 {
11393 _bfd_error_handler
11394 (_("%B: Unknown mandatory EABI object attribute %d"),
11395 abfd, tag);
11396 bfd_set_error (bfd_error_bad_value);
11397 return FALSE;
11398 }
11399 else
11400 {
11401 _bfd_error_handler
11402 (_("Warning: %B: Unknown EABI object attribute %d"),
11403 abfd, tag);
11404 return TRUE;
11405 }
11406}
11407
91e22acd
AS		 11408/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11409 Returns -1 if no architecture could be read. */
11410
11411static int
11412get_secondary_compatible_arch (bfd *abfd)
11413{
11414 obj_attribute *attr =
11415 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11416
11417 /* Note: the tag and its argument below are uleb128 values, though
11418 currently-defined values fit in one byte for each. */
11419 if (attr->s
11420 && attr->s[0] == Tag_CPU_arch
11421 && (attr->s[1] & 128) != 128
11422 && attr->s[2] == 0)
11423 return attr->s[1];
11424
11425 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11426 return -1;
11427}
11428
11429/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11430 The tag is removed if ARCH is -1. */
11431
8e79c3df 11432static void
91e22acd 11433set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11434{
91e22acd
AS		 11435 obj_attribute *attr =
11436 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11437
91e22acd
AS		 11438 if (arch == -1)
11439 {
11440 attr->s = NULL;
11441 return;
8e79c3df 11442 }
91e22acd
AS		 11443
11444 /* Note: the tag and its argument below are uleb128 values, though
11445 currently-defined values fit in one byte for each. */
11446 if (!attr->s)
21d799b5 11447 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11448 attr->s[0] = Tag_CPU_arch;
11449 attr->s[1] = arch;
11450 attr->s[2] = '\0';
8e79c3df
CM		 11451}
11452
91e22acd
AS		 11453/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11454 into account. */
11455
11456static int
11457tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11458 int newtag, int secondary_compat)
8e79c3df 11459{
91e22acd
AS		 11460#define T(X) TAG_CPU_ARCH_##X
11461 int tagl, tagh, result;
11462 const int v6t2[] =
11463 {
11464 T(V6T2), /* PRE_V4. */
11465 T(V6T2), /* V4. */
11466 T(V6T2), /* V4T. */
11467 T(V6T2), /* V5T. */
11468 T(V6T2), /* V5TE. */
11469 T(V6T2), /* V5TEJ. */
11470 T(V6T2), /* V6. */
11471 T(V7), /* V6KZ. */
11472 T(V6T2) /* V6T2. */
11473 };
11474 const int v6k[] =
11475 {
11476 T(V6K), /* PRE_V4. */
11477 T(V6K), /* V4. */
11478 T(V6K), /* V4T. */
11479 T(V6K), /* V5T. */
11480 T(V6K), /* V5TE. */
11481 T(V6K), /* V5TEJ. */
11482 T(V6K), /* V6. */
11483 T(V6KZ), /* V6KZ. */
11484 T(V7), /* V6T2. */
11485 T(V6K) /* V6K. */
11486 };
11487 const int v7[] =
11488 {
11489 T(V7), /* PRE_V4. */
11490 T(V7), /* V4. */
11491 T(V7), /* V4T. */
11492 T(V7), /* V5T. */
11493 T(V7), /* V5TE. */
11494 T(V7), /* V5TEJ. */
11495 T(V7), /* V6. */
11496 T(V7), /* V6KZ. */
11497 T(V7), /* V6T2. */
11498 T(V7), /* V6K. */
11499 T(V7) /* V7. */
11500 };
11501 const int v6_m[] =
11502 {
11503 -1, /* PRE_V4. */
11504 -1, /* V4. */
11505 T(V6K), /* V4T. */
11506 T(V6K), /* V5T. */
11507 T(V6K), /* V5TE. */
11508 T(V6K), /* V5TEJ. */
11509 T(V6K), /* V6. */
11510 T(V6KZ), /* V6KZ. */
11511 T(V7), /* V6T2. */
11512 T(V6K), /* V6K. */
11513 T(V7), /* V7. */
11514 T(V6_M) /* V6_M. */
11515 };
11516 const int v6s_m[] =
11517 {
11518 -1, /* PRE_V4. */
11519 -1, /* V4. */
11520 T(V6K), /* V4T. */
11521 T(V6K), /* V5T. */
11522 T(V6K), /* V5TE. */
11523 T(V6K), /* V5TEJ. */
11524 T(V6K), /* V6. */
11525 T(V6KZ), /* V6KZ. */
11526 T(V7), /* V6T2. */
11527 T(V6K), /* V6K. */
11528 T(V7), /* V7. */
11529 T(V6S_M), /* V6_M. */
11530 T(V6S_M) /* V6S_M. */
11531 };
9e3c6df6
PB		 11532 const int v7e_m[] =
11533 {
11534 -1, /* PRE_V4. */
11535 -1, /* V4. */
11536 T(V7E_M), /* V4T. */
11537 T(V7E_M), /* V5T. */
11538 T(V7E_M), /* V5TE. */
11539 T(V7E_M), /* V5TEJ. */
11540 T(V7E_M), /* V6. */
11541 T(V7E_M), /* V6KZ. */
11542 T(V7E_M), /* V6T2. */
11543 T(V7E_M), /* V6K. */
11544 T(V7E_M), /* V7. */
11545 T(V7E_M), /* V6_M. */
11546 T(V7E_M), /* V6S_M. */
11547 T(V7E_M) /* V7E_M. */
11548 };
bca38921
MGD		 11549 const int v8[] =
11550 {
11551 T(V8), /* PRE_V4. */
11552 T(V8), /* V4. */
11553 T(V8), /* V4T. */
11554 T(V8), /* V5T. */
11555 T(V8), /* V5TE. */
11556 T(V8), /* V5TEJ. */
11557 T(V8), /* V6. */
11558 T(V8), /* V6KZ. */
11559 T(V8), /* V6T2. */
11560 T(V8), /* V6K. */
11561 T(V8), /* V7. */
11562 T(V8), /* V6_M. */
11563 T(V8), /* V6S_M. */
11564 T(V8), /* V7E_M. */
11565 T(V8) /* V8. */
11566 };
91e22acd
AS		 11567 const int v4t_plus_v6_m[] =
11568 {
11569 -1, /* PRE_V4. */
11570 -1, /* V4. */
11571 T(V4T), /* V4T. */
11572 T(V5T), /* V5T. */
11573 T(V5TE), /* V5TE. */
11574 T(V5TEJ), /* V5TEJ. */
11575 T(V6), /* V6. */
11576 T(V6KZ), /* V6KZ. */
11577 T(V6T2), /* V6T2. */
11578 T(V6K), /* V6K. */
11579 T(V7), /* V7. */
11580 T(V6_M), /* V6_M. */
11581 T(V6S_M), /* V6S_M. */
9e3c6df6 11582 T(V7E_M), /* V7E_M. */
bca38921 11583 T(V8), /* V8. */
91e22acd
AS		 11584 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11585 };
11586 const int *comb[] =
11587 {
11588 v6t2,
11589 v6k,
11590 v7,
11591 v6_m,
11592 v6s_m,
9e3c6df6 11593 v7e_m,
bca38921 11594 v8,
91e22acd
AS		 11595 /* Pseudo-architecture. */
11596 v4t_plus_v6_m
11597 };
11598
11599 /* Check we've not got a higher architecture than we know about. */
11600
9e3c6df6 11601 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11602 {
3895f852 11603 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11604 return -1;
11605 }
11606
11607 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11608
11609 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11610 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11611 oldtag = T(V4T_PLUS_V6_M);
11612
11613 /* And override the new tag if we have a Tag_also_compatible_with on the
11614 input. */
11615
11616 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11617 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11618 newtag = T(V4T_PLUS_V6_M);
11619
11620 tagl = (oldtag < newtag) ? oldtag : newtag;
11621 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11622
11623 /* Architectures before V6KZ add features monotonically. */
11624 if (tagh <= TAG_CPU_ARCH_V6KZ)
11625 return result;
11626
11627 result = comb[tagh - T(V6T2)][tagl];
11628
11629 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11630 as the canonical version. */
11631 if (result == T(V4T_PLUS_V6_M))
11632 {
11633 result = T(V4T);
11634 *secondary_compat_out = T(V6_M);
11635 }
11636 else
11637 *secondary_compat_out = -1;
11638
11639 if (result == -1)
11640 {
3895f852 11641 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11642 ibfd, oldtag, newtag);
11643 return -1;
11644 }
11645
11646 return result;
11647#undef T
8e79c3df
CM		 11648}
11649
ac56ee8f
MGD		 11650/* Query attributes object to see if integer divide instructions may be
11651 present in an object. */
11652static bfd_boolean
11653elf32_arm_attributes_accept_div (const obj_attribute *attr)
11654{
11655 int arch = attr[Tag_CPU_arch].i;
11656 int profile = attr[Tag_CPU_arch_profile].i;
11657
11658 switch (attr[Tag_DIV_use].i)
11659 {
11660 case 0:
11661 /* Integer divide allowed if instruction contained in archetecture. */
11662 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11663 return TRUE;
11664 else if (arch >= TAG_CPU_ARCH_V7E_M)
11665 return TRUE;
11666 else
11667 return FALSE;
11668
11669 case 1:
11670 /* Integer divide explicitly prohibited. */
11671 return FALSE;
11672
11673 default:
11674 /* Unrecognised case - treat as allowing divide everywhere. */
11675 case 2:
11676 /* Integer divide allowed in ARM state. */
11677 return TRUE;
11678 }
11679}
11680
11681/* Query attributes object to see if integer divide instructions are
11682 forbidden to be in the object. This is not the inverse of
11683 elf32_arm_attributes_accept_div. */
11684static bfd_boolean
11685elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11686{
11687 return attr[Tag_DIV_use].i == 1;
11688}
11689
ee065d83
PB		 11690/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11691 are conflicting attributes. */
906e58ca 11692
ee065d83
PB		 11693static bfd_boolean
11694elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11695{
104d59d1
JM		 11696 obj_attribute *in_attr;
11697 obj_attribute *out_attr;
ee065d83
PB		 11698 /* Some tags have 0 = don't care, 1 = strong requirement,
11699 2 = weak requirement. */
91e22acd 11700 static const int order_021[3] = {0, 2, 1};
ee065d83 11701 int i;
91e22acd 11702 bfd_boolean result = TRUE;
9274e9de 11703 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
ee065d83 11704
3e6b1042
DJ		 11705 /* Skip the linker stubs file. This preserves previous behavior
11706 of accepting unknown attributes in the first input file - but
11707 is that a bug? */
11708 if (ibfd->flags & BFD_LINKER_CREATED)
11709 return TRUE;
11710
9274e9de
TG		 11711 /* Skip any input that hasn't attribute section.
11712 This enables to link object files without attribute section with
11713 any others. */
11714 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
11715 return TRUE;
11716
104d59d1 11717 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11718 {
11719 /* This is the first object. Copy the attributes. */
104d59d1 11720 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11721
cd21e546
MGD		 11722 out_attr = elf_known_obj_attributes_proc (obfd);
11723
004ae526
PB		 11724 /* Use the Tag_null value to indicate the attributes have been
11725 initialized. */
cd21e546 11726 out_attr[0].i = 1;
004ae526 11727
cd21e546
MGD		 11728 /* We do not output objects with Tag_MPextension_use_legacy - we move
11729 the attribute's value to Tag_MPextension_use. */
11730 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11731 {
11732 if (out_attr[Tag_MPextension_use].i != 0
11733 && out_attr[Tag_MPextension_use_legacy].i
99059e56 11734 != out_attr[Tag_MPextension_use].i)
cd21e546
MGD		 11735 {
11736 _bfd_error_handler
11737 (_("Error: %B has both the current and legacy "
11738 "Tag_MPextension_use attributes"), ibfd);
11739 result = FALSE;
11740 }
11741
11742 out_attr[Tag_MPextension_use] =
11743 out_attr[Tag_MPextension_use_legacy];
11744 out_attr[Tag_MPextension_use_legacy].type = 0;
11745 out_attr[Tag_MPextension_use_legacy].i = 0;
11746 }
11747
11748 return result;
ee065d83
PB		 11749 }
11750
104d59d1
JM		 11751 in_attr = elf_known_obj_attributes_proc (ibfd);
11752 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11753 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11754 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11755 {
8e79c3df 11756 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11757 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11758 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11759 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11760 {
11761 _bfd_error_handler
3895f852 11762 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11763 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11764 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11765 result = FALSE;
ee065d83
PB		 11766 }
11767 }
11768
3de4a297 11769 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11770 {
11771 /* Merge this attribute with existing attributes. */
11772 switch (i)
11773 {
11774 case Tag_CPU_raw_name:
11775 case Tag_CPU_name:
6a631e86 11776 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11777 break;
11778
11779 case Tag_ABI_optimization_goals:
11780 case Tag_ABI_FP_optimization_goals:
11781 /* Use the first value seen. */
11782 break;
11783
11784 case Tag_CPU_arch:
91e22acd
AS		 11785 {
11786 int secondary_compat = -1, secondary_compat_out = -1;
11787 unsigned int saved_out_attr = out_attr[i].i;
70e99720
TG		 11788 int arch_attr;
11789 static const char *name_table[] =
11790 {
91e22acd
AS		 11791 /* These aren't real CPU names, but we can't guess
11792 that from the architecture version alone. */
11793 "Pre v4",
11794 "ARM v4",
11795 "ARM v4T",
11796 "ARM v5T",
11797 "ARM v5TE",
11798 "ARM v5TEJ",
11799 "ARM v6",
11800 "ARM v6KZ",
11801 "ARM v6T2",
11802 "ARM v6K",
11803 "ARM v7",
11804 "ARM v6-M",
bca38921
MGD		 11805 "ARM v6S-M",
11806 "ARM v8"
91e22acd
AS		 11807 };
11808
11809 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11810 secondary_compat = get_secondary_compatible_arch (ibfd);
11811 secondary_compat_out = get_secondary_compatible_arch (obfd);
70e99720
TG		 11812 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11813 &secondary_compat_out,
11814 in_attr[i].i,
11815 secondary_compat);
11816
11817 /* Return with error if failed to merge. */
11818 if (arch_attr == -1)
11819 return FALSE;
11820
11821 out_attr[i].i = arch_attr;
11822
91e22acd
AS		 11823 set_secondary_compatible_arch (obfd, secondary_compat_out);
11824
11825 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11826 if (out_attr[i].i == saved_out_attr)
11827 ; /* Leave the names alone. */
11828 else if (out_attr[i].i == in_attr[i].i)
11829 {
11830 /* The output architecture has been changed to match the
11831 input architecture. Use the input names. */
11832 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11833 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11834 : NULL;
11835 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11836 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11837 : NULL;
11838 }
11839 else
11840 {
11841 out_attr[Tag_CPU_name].s = NULL;
11842 out_attr[Tag_CPU_raw_name].s = NULL;
11843 }
11844
11845 /* If we still don't have a value for Tag_CPU_name,
11846 make one up now. Tag_CPU_raw_name remains blank. */
11847 if (out_attr[Tag_CPU_name].s == NULL
11848 && out_attr[i].i < ARRAY_SIZE (name_table))
11849 out_attr[Tag_CPU_name].s =
11850 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11851 }
11852 break;
11853
ee065d83
PB		 11854 case Tag_ARM_ISA_use:
11855 case Tag_THUMB_ISA_use:
ee065d83 11856 case Tag_WMMX_arch:
91e22acd
AS		 11857 case Tag_Advanced_SIMD_arch:
11858 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11859 case Tag_ABI_FP_rounding:
ee065d83
PB		 11860 case Tag_ABI_FP_exceptions:
11861 case Tag_ABI_FP_user_exceptions:
11862 case Tag_ABI_FP_number_model:
75375b3e 11863 case Tag_FP_HP_extension:
91e22acd
AS		 11864 case Tag_CPU_unaligned_access:
11865 case Tag_T2EE_use:
91e22acd 11866 case Tag_MPextension_use:
ee065d83
PB		 11867 /* Use the largest value specified. */
11868 if (in_attr[i].i > out_attr[i].i)
11869 out_attr[i].i = in_attr[i].i;
11870 break;
11871
75375b3e 11872 case Tag_ABI_align_preserved:
91e22acd
AS		 11873 case Tag_ABI_PCS_RO_data:
11874 /* Use the smallest value specified. */
11875 if (in_attr[i].i < out_attr[i].i)
11876 out_attr[i].i = in_attr[i].i;
11877 break;
11878
75375b3e 11879 case Tag_ABI_align_needed:
91e22acd 11880 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11881 && (in_attr[Tag_ABI_align_preserved].i == 0
11882 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11883 {
91e22acd
AS		 11884 /* This error message should be enabled once all non-conformant
11885 binaries in the toolchain have had the attributes set
11886 properly.
ee065d83 11887 _bfd_error_handler
3895f852 11888 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11889 obfd, ibfd);
11890 result = FALSE; */
ee065d83 11891 }
91e22acd
AS		 11892 /* Fall through. */
11893 case Tag_ABI_FP_denormal:
11894 case Tag_ABI_PCS_GOT_use:
11895 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11896 value if greater than 2 (for future-proofing). */
11897 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11898 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11899 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11900 out_attr[i].i = in_attr[i].i;
11901 break;
91e22acd 11902
75375b3e
MGD		 11903 case Tag_Virtualization_use:
11904 /* The virtualization tag effectively stores two bits of
11905 information: the intended use of TrustZone (in bit 0), and the
11906 intended use of Virtualization (in bit 1). */
11907 if (out_attr[i].i == 0)
11908 out_attr[i].i = in_attr[i].i;
11909 else if (in_attr[i].i != 0
11910 && in_attr[i].i != out_attr[i].i)
11911 {
11912 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11913 out_attr[i].i = 3;
11914 else
11915 {
11916 _bfd_error_handler
11917 (_("error: %B: unable to merge virtualization attributes "
11918 "with %B"),
11919 obfd, ibfd);
11920 result = FALSE;
11921 }
11922 }
11923 break;
91e22acd
AS		 11924
11925 case Tag_CPU_arch_profile:
11926 if (out_attr[i].i != in_attr[i].i)
11927 {
11928 /* 0 will merge with anything.
11929 'A' and 'S' merge to 'A'.
11930 'R' and 'S' merge to 'R'.
99059e56 11931 'M' and 'A|R|S' is an error. */
91e22acd
AS		 11932 if (out_attr[i].i == 0
11933 || (out_attr[i].i == 'S'
11934 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11935 out_attr[i].i = in_attr[i].i;
11936 else if (in_attr[i].i == 0
11937 || (in_attr[i].i == 'S'
11938 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
6a631e86 11939 ; /* Do nothing. */
91e22acd
AS		 11940 else
11941 {
11942 _bfd_error_handler
3895f852 11943 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11944 ibfd,
11945 in_attr[i].i ? in_attr[i].i : '0',
11946 out_attr[i].i ? out_attr[i].i : '0');
11947 result = FALSE;
11948 }
11949 }
11950 break;
75375b3e 11951 case Tag_FP_arch:
62f3b8c8 11952 {
4547cb56
NC		 11953 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11954 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11955 when it's 0. It might mean absence of FP hardware if
11956 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11957
a715796b 11958#define VFP_VERSION_COUNT 9
62f3b8c8
PB		 11959 static const struct
11960 {
11961 int ver;
11962 int regs;
bca38921 11963 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11964 {
11965 {0, 0},
11966 {1, 16},
11967 {2, 16},
11968 {3, 32},
11969 {3, 16},
11970 {4, 32},
bca38921 11971 {4, 16},
a715796b
TG		 11972 {8, 32},
11973 {8, 16}
62f3b8c8
PB		 11974 };
11975 int ver;
11976 int regs;
11977 int newval;
11978
4547cb56
NC		 11979 /* If the output has no requirement about FP hardware,
11980 follow the requirement of the input. */
11981 if (out_attr[i].i == 0)
11982 {
11983 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11984 out_attr[i].i = in_attr[i].i;
11985 out_attr[Tag_ABI_HardFP_use].i
11986 = in_attr[Tag_ABI_HardFP_use].i;
11987 break;
11988 }
11989 /* If the input has no requirement about FP hardware, do
11990 nothing. */
11991 else if (in_attr[i].i == 0)
11992 {
11993 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11994 break;
11995 }
11996
11997 /* Both the input and the output have nonzero Tag_FP_arch.
11998 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11999
12000 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12001 do nothing. */
12002 if (in_attr[Tag_ABI_HardFP_use].i == 0
12003 && out_attr[Tag_ABI_HardFP_use].i == 0)
12004 ;
12005 /* If the input and the output have different Tag_ABI_HardFP_use,
12006 the combination of them is 3 (SP & DP). */
12007 else if (in_attr[Tag_ABI_HardFP_use].i
12008 != out_attr[Tag_ABI_HardFP_use].i)
12009 out_attr[Tag_ABI_HardFP_use].i = 3;
12010
12011 /* Now we can handle Tag_FP_arch. */
12012
bca38921
MGD		 12013 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12014 pick the biggest. */
12015 if (in_attr[i].i >= VFP_VERSION_COUNT
12016 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 12017 {
12018 out_attr[i] = in_attr[i];
12019 break;
12020 }
12021 /* The output uses the superset of input features
12022 (ISA version) and registers. */
12023 ver = vfp_versions[in_attr[i].i].ver;
12024 if (ver < vfp_versions[out_attr[i].i].ver)
12025 ver = vfp_versions[out_attr[i].i].ver;
12026 regs = vfp_versions[in_attr[i].i].regs;
12027 if (regs < vfp_versions[out_attr[i].i].regs)
12028 regs = vfp_versions[out_attr[i].i].regs;
12029 /* This assumes all possible supersets are also a valid
99059e56 12030 options. */
bca38921 12031 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 12032 {
12033 if (regs == vfp_versions[newval].regs
12034 && ver == vfp_versions[newval].ver)
12035 break;
12036 }
12037 out_attr[i].i = newval;
12038 }
b1cc4aeb 12039 break;
ee065d83
PB		 12040 case Tag_PCS_config:
12041 if (out_attr[i].i == 0)
12042 out_attr[i].i = in_attr[i].i;
b6009aca 12043 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 12044 {
12045 /* It's sometimes ok to mix different configs, so this is only
99059e56 12046 a warning. */
ee065d83
PB		 12047 _bfd_error_handler
12048 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12049 }
12050 break;
12051 case Tag_ABI_PCS_R9_use:
004ae526
PB		 12052 if (in_attr[i].i != out_attr[i].i
12053 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 12054 && in_attr[i].i != AEABI_R9_unused)
12055 {
12056 _bfd_error_handler
3895f852 12057 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 12058 result = FALSE;
ee065d83
PB		 12059 }
12060 if (out_attr[i].i == AEABI_R9_unused)
12061 out_attr[i].i = in_attr[i].i;
12062 break;
12063 case Tag_ABI_PCS_RW_data:
12064 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12065 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12066 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12067 {
12068 _bfd_error_handler
3895f852 12069 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 12070 ibfd);
91e22acd 12071 result = FALSE;
ee065d83
PB		 12072 }
12073 /* Use the smallest value specified. */
12074 if (in_attr[i].i < out_attr[i].i)
12075 out_attr[i].i = in_attr[i].i;
12076 break;
ee065d83 12077 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 12078 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12079 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 12080 {
12081 _bfd_error_handler
a9dc9481
JM		 12082 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12083 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 12084 }
a9dc9481 12085 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 12086 out_attr[i].i = in_attr[i].i;
12087 break;
ee065d83
PB		 12088 case Tag_ABI_enum_size:
12089 if (in_attr[i].i != AEABI_enum_unused)
12090 {
12091 if (out_attr[i].i == AEABI_enum_unused
12092 || out_attr[i].i == AEABI_enum_forced_wide)
12093 {
12094 /* The existing object is compatible with anything.
12095 Use whatever requirements the new object has. */
12096 out_attr[i].i = in_attr[i].i;
12097 }
12098 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 12099 && out_attr[i].i != in_attr[i].i
0ffa91dd 12100 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 12101 {
91e22acd 12102 static const char *aeabi_enum_names[] =
bf21ed78 12103 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 12104 const char *in_name =
12105 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12106 ? aeabi_enum_names[in_attr[i].i]
12107 : "<unknown>";
12108 const char *out_name =
12109 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12110 ? aeabi_enum_names[out_attr[i].i]
12111 : "<unknown>";
ee065d83 12112 _bfd_error_handler
bf21ed78 12113 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 12114 ibfd, in_name, out_name);
ee065d83
PB		 12115 }
12116 }
12117 break;
12118 case Tag_ABI_VFP_args:
12119 /* Aready done. */
12120 break;
12121 case Tag_ABI_WMMX_args:
12122 if (in_attr[i].i != out_attr[i].i)
12123 {
12124 _bfd_error_handler
3895f852 12125 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 12126 ibfd, obfd);
91e22acd 12127 result = FALSE;
ee065d83
PB		 12128 }
12129 break;
7b86a9fa
AS		 12130 case Tag_compatibility:
12131 /* Merged in target-independent code. */
12132 break;
91e22acd 12133 case Tag_ABI_HardFP_use:
4547cb56 12134 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 12135 break;
12136 case Tag_ABI_FP_16bit_format:
12137 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12138 {
12139 if (in_attr[i].i != out_attr[i].i)
12140 {
12141 _bfd_error_handler
3895f852 12142 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 12143 ibfd, obfd);
12144 result = FALSE;
12145 }
12146 }
12147 if (in_attr[i].i != 0)
12148 out_attr[i].i = in_attr[i].i;
12149 break;
7b86a9fa 12150
cd21e546 12151 case Tag_DIV_use:
ac56ee8f
MGD		 12152 /* A value of zero on input means that the divide instruction may
12153 be used if available in the base architecture as specified via
12154 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12155 the user did not want divide instructions. A value of 2
12156 explicitly means that divide instructions were allowed in ARM
12157 and Thumb state. */
12158 if (in_attr[i].i == out_attr[i].i)
12159 /* Do nothing. */ ;
12160 else if (elf32_arm_attributes_forbid_div (in_attr)
12161 && !elf32_arm_attributes_accept_div (out_attr))
12162 out_attr[i].i = 1;
12163 else if (elf32_arm_attributes_forbid_div (out_attr)
12164 && elf32_arm_attributes_accept_div (in_attr))
12165 out_attr[i].i = in_attr[i].i;
12166 else if (in_attr[i].i == 2)
12167 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 12168 break;
12169
12170 case Tag_MPextension_use_legacy:
12171 /* We don't output objects with Tag_MPextension_use_legacy - we
12172 move the value to Tag_MPextension_use. */
12173 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12174 {
12175 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12176 {
12177 _bfd_error_handler
12178 (_("%B has has both the current and legacy "
b38cadfb 12179 "Tag_MPextension_use attributes"),
cd21e546
MGD		 12180 ibfd);
12181 result = FALSE;
12182 }
12183 }
12184
12185 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12186 out_attr[Tag_MPextension_use] = in_attr[i];
12187
12188 break;
12189
91e22acd 12190 case Tag_nodefaults:
2d0bb761
AS		 12191 /* This tag is set if it exists, but the value is unused (and is
12192 typically zero). We don't actually need to do anything here -
12193 the merge happens automatically when the type flags are merged
12194 below. */
91e22acd
AS		 12195 break;
12196 case Tag_also_compatible_with:
12197 /* Already done in Tag_CPU_arch. */
12198 break;
12199 case Tag_conformance:
12200 /* Keep the attribute if it matches. Throw it away otherwise.
12201 No attribute means no claim to conform. */
12202 if (!in_attr[i].s || !out_attr[i].s
12203 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12204 out_attr[i].s = NULL;
12205 break;
3cfad14c 12206
91e22acd 12207 default:
e8b36cd1
JM		 12208 result
12209 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 12210 }
12211
12212 /* If out_attr was copied from in_attr then it won't have a type yet. */
12213 if (in_attr[i].type && !out_attr[i].type)
12214 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 12215 }
12216
104d59d1 12217 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 12218 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12219 return FALSE;
ee065d83 12220
104d59d1 12221 /* Check for any attributes not known on ARM. */
e8b36cd1 12222 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 12223
91e22acd 12224 return result;
252b5132
RH		 12225}
12226
3a4a14e9
PB		 12227
12228/* Return TRUE if the two EABI versions are incompatible. */
12229
12230static bfd_boolean
12231elf32_arm_versions_compatible (unsigned iver, unsigned over)
12232{
12233 /* v4 and v5 are the same spec before and after it was released,
12234 so allow mixing them. */
12235 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12236 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12237 return TRUE;
12238
12239 return (iver == over);
12240}
12241
252b5132
RH		 12242/* Merge backend specific data from an object file to the output
12243 object file when linking. */
9b485d32 12244
b34976b6 12245static bfd_boolean
21d799b5 12246elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12247
9b485d32
NC		 12248/* Display the flags field. */
12249
b34976b6 12250static bfd_boolean
57e8b36a 12251elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12252{
fc830a83
NC		 12253 FILE * file = (FILE *) ptr;
12254 unsigned long flags;
252b5132
RH		 12255
12256 BFD_ASSERT (abfd != NULL && ptr != NULL);
12257
12258 /* Print normal ELF private data. */
12259 _bfd_elf_print_private_bfd_data (abfd, ptr);
12260
fc830a83 12261 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12262 /* Ignore init flag - it may not be set, despite the flags field
12263 containing valid data. */
252b5132
RH		 12264
12265 /* xgettext:c-format */
9b485d32 12266 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12267
fc830a83
NC		 12268 switch (EF_ARM_EABI_VERSION (flags))
12269 {
12270 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12271 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12272 official ARM ELF extended ABI. Hence they are only decoded if
12273 the EABI version is not set. */
fd2ec330 12274 if (flags & EF_ARM_INTERWORK)
9b485d32 12275 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12276
fd2ec330 12277 if (flags & EF_ARM_APCS_26)
6c571f00 12278 fprintf (file, " [APCS-26]");
fc830a83 12279 else
6c571f00 12280 fprintf (file, " [APCS-32]");
9a5aca8c 12281
96a846ea
RE		 12282 if (flags & EF_ARM_VFP_FLOAT)
12283 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12284 else if (flags & EF_ARM_MAVERICK_FLOAT)
12285 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12286 else
12287 fprintf (file, _(" [FPA float format]"));
12288
fd2ec330 12289 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12290 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12291
fd2ec330 12292 if (flags & EF_ARM_PIC)
9b485d32 12293 fprintf (file, _(" [position independent]"));
fc830a83 12294
fd2ec330 12295 if (flags & EF_ARM_NEW_ABI)
9b485d32 12296 fprintf (file, _(" [new ABI]"));
9a5aca8c 12297
fd2ec330 12298 if (flags & EF_ARM_OLD_ABI)
9b485d32 12299 fprintf (file, _(" [old ABI]"));
9a5aca8c 12300
fd2ec330 12301 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12302 fprintf (file, _(" [software FP]"));
9a5aca8c 12303
96a846ea
RE		 12304 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12305 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12306 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12307 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12308 break;
9a5aca8c 12309
fc830a83 12310 case EF_ARM_EABI_VER1:
9b485d32 12311 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12312
fc830a83 12313 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12314 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12315 else
9b485d32 12316 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12317
fc830a83
NC		 12318 flags &= ~ EF_ARM_SYMSARESORTED;
12319 break;
9a5aca8c 12320
fd2ec330
PB		 12321 case EF_ARM_EABI_VER2:
12322 fprintf (file, _(" [Version2 EABI]"));
12323
12324 if (flags & EF_ARM_SYMSARESORTED)
12325 fprintf (file, _(" [sorted symbol table]"));
12326 else
12327 fprintf (file, _(" [unsorted symbol table]"));
12328
12329 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12330 fprintf (file, _(" [dynamic symbols use segment index]"));
12331
12332 if (flags & EF_ARM_MAPSYMSFIRST)
12333 fprintf (file, _(" [mapping symbols precede others]"));
12334
99e4ae17 12335 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12336 | EF_ARM_MAPSYMSFIRST);
12337 break;
12338
d507cf36
PB		 12339 case EF_ARM_EABI_VER3:
12340 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12341 break;
12342
12343 case EF_ARM_EABI_VER4:
12344 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12345 goto eabi;
d507cf36 12346
3a4a14e9
PB		 12347 case EF_ARM_EABI_VER5:
12348 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12349
12350 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12351 fprintf (file, _(" [soft-float ABI]"));
12352
12353 if (flags & EF_ARM_ABI_FLOAT_HARD)
12354 fprintf (file, _(" [hard-float ABI]"));
12355
12356 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12357
3a4a14e9 12358 eabi:
d507cf36
PB		 12359 if (flags & EF_ARM_BE8)
12360 fprintf (file, _(" [BE8]"));
12361
12362 if (flags & EF_ARM_LE8)
12363 fprintf (file, _(" [LE8]"));
12364
12365 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12366 break;
12367
fc830a83 12368 default:
9b485d32 12369 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12370 break;
12371 }
252b5132 12372
fc830a83 12373 flags &= ~ EF_ARM_EABIMASK;
252b5132 12374
fc830a83 12375 if (flags & EF_ARM_RELEXEC)
9b485d32 12376 fprintf (file, _(" [relocatable executable]"));
252b5132 12377
fc830a83 12378 if (flags & EF_ARM_HASENTRY)
9b485d32 12379 fprintf (file, _(" [has entry point]"));
252b5132 12380
fc830a83
NC		 12381 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12382
12383 if (flags)
9b485d32 12384 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12385
252b5132
RH		 12386 fputc ('\n', file);
12387
b34976b6 12388 return TRUE;
252b5132
RH		 12389}
12390
12391static int
57e8b36a 12392elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12393{
2f0ca46a
NC		 12394 switch (ELF_ST_TYPE (elf_sym->st_info))
12395 {
12396 case STT_ARM_TFUNC:
12397 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12398
2f0ca46a
NC		 12399 case STT_ARM_16BIT:
12400 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12401 This allows us to distinguish between data used by Thumb instructions
12402 and non-data (which is probably code) inside Thumb regions of an
12403 executable. */
1a0eb693 12404 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12405 return ELF_ST_TYPE (elf_sym->st_info);
12406 break;
9a5aca8c 12407
ce855c42
NC		 12408 default:
12409 break;
2f0ca46a
NC		 12410 }
12411
12412 return type;
252b5132 12413}
f21f3fe0 12414
252b5132 12415static asection *
07adf181
AM		 12416elf32_arm_gc_mark_hook (asection *sec,
12417 struct bfd_link_info *info,
12418 Elf_Internal_Rela *rel,
12419 struct elf_link_hash_entry *h,
12420 Elf_Internal_Sym *sym)
252b5132
RH		 12421{
12422 if (h != NULL)
07adf181 12423 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12424 {
12425 case R_ARM_GNU_VTINHERIT:
12426 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12427 return NULL;
12428 }
9ad5cbcf 12429
07adf181 12430 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12431}
12432
780a67af
NC		 12433/* Update the got entry reference counts for the section being removed. */
12434
b34976b6 12435static bfd_boolean
ba93b8ac
DJ		 12436elf32_arm_gc_sweep_hook (bfd * abfd,
12437 struct bfd_link_info * info,
12438 asection * sec,
12439 const Elf_Internal_Rela * relocs)
252b5132 12440{
5e681ec4
PB		 12441 Elf_Internal_Shdr *symtab_hdr;
12442 struct elf_link_hash_entry **sym_hashes;
12443 bfd_signed_vma *local_got_refcounts;
12444 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12445 struct elf32_arm_link_hash_table * globals;
12446
7dda2462
TG		 12447 if (info->relocatable)
12448 return TRUE;
12449
eb043451 12450 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12451 if (globals == NULL)
12452 return FALSE;
5e681ec4
PB		 12453
12454 elf_section_data (sec)->local_dynrel = NULL;
12455
0ffa91dd 12456 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12457 sym_hashes = elf_sym_hashes (abfd);
12458 local_got_refcounts = elf_local_got_refcounts (abfd);
12459
906e58ca 12460 check_use_blx (globals);
bd97cb95 12461
5e681ec4
PB		 12462 relend = relocs + sec->reloc_count;
12463 for (rel = relocs; rel < relend; rel++)
eb043451 12464 {
3eb128b2
AM		 12465 unsigned long r_symndx;
12466 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12467 struct elf32_arm_link_hash_entry *eh;
eb043451 12468 int r_type;
34e77a92 12469 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12470 bfd_boolean may_become_dynamic_p;
12471 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12472 union gotplt_union *root_plt;
12473 struct arm_plt_info *arm_plt;
5e681ec4 12474
3eb128b2
AM		 12475 r_symndx = ELF32_R_SYM (rel->r_info);
12476 if (r_symndx >= symtab_hdr->sh_info)
12477 {
12478 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12479 while (h->root.type == bfd_link_hash_indirect
12480 || h->root.type == bfd_link_hash_warning)
12481 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12482 }
f6e32f6d
RS		 12483 eh = (struct elf32_arm_link_hash_entry *) h;
12484
34e77a92 12485 call_reloc_p = FALSE;
f6e32f6d
RS		 12486 may_become_dynamic_p = FALSE;
12487 may_need_local_target_p = FALSE;
3eb128b2 12488
eb043451 12489 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12490 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12491 switch (r_type)
12492 {
12493 case R_ARM_GOT32:
eb043451 12494 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12495 case R_ARM_TLS_GD32:
12496 case R_ARM_TLS_IE32:
3eb128b2 12497 if (h != NULL)
eb043451 12498 {
eb043451
PB		 12499 if (h->got.refcount > 0)
12500 h->got.refcount -= 1;
12501 }
12502 else if (local_got_refcounts != NULL)
12503 {
12504 if (local_got_refcounts[r_symndx] > 0)
12505 local_got_refcounts[r_symndx] -= 1;
12506 }
12507 break;
12508
ba93b8ac 12509 case R_ARM_TLS_LDM32:
4dfe6ac6 12510 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12511 break;
12512
eb043451
PB		 12513 case R_ARM_PC24:
12514 case R_ARM_PLT32:
5b5bb741
PB		 12515 case R_ARM_CALL:
12516 case R_ARM_JUMP24:
eb043451 12517 case R_ARM_PREL31:
c19d1205 12518 case R_ARM_THM_CALL:
bd97cb95
DJ		 12519 case R_ARM_THM_JUMP24:
12520 case R_ARM_THM_JUMP19:
34e77a92 12521 call_reloc_p = TRUE;
f6e32f6d
RS		 12522 may_need_local_target_p = TRUE;
12523 break;
12524
12525 case R_ARM_ABS12:
12526 if (!globals->vxworks_p)
12527 {
12528 may_need_local_target_p = TRUE;
12529 break;
12530 }
12531 /* Fall through. */
12532 case R_ARM_ABS32:
12533 case R_ARM_ABS32_NOI:
12534 case R_ARM_REL32:
12535 case R_ARM_REL32_NOI:
b6895b4f
PB		 12536 case R_ARM_MOVW_ABS_NC:
12537 case R_ARM_MOVT_ABS:
12538 case R_ARM_MOVW_PREL_NC:
12539 case R_ARM_MOVT_PREL:
12540 case R_ARM_THM_MOVW_ABS_NC:
12541 case R_ARM_THM_MOVT_ABS:
12542 case R_ARM_THM_MOVW_PREL_NC:
12543 case R_ARM_THM_MOVT_PREL:
b7693d02 12544 /* Should the interworking branches be here also? */
f6e32f6d 12545 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12546 && (sec->flags & SEC_ALLOC) != 0)
12547 {
12548 if (h == NULL
469a3493 12549 && elf32_arm_howto_from_type (r_type)->pc_relative)
34e77a92
RS		 12550 {
12551 call_reloc_p = TRUE;
12552 may_need_local_target_p = TRUE;
12553 }
12554 else
12555 may_become_dynamic_p = TRUE;
12556 }
f6e32f6d
RS		 12557 else
12558 may_need_local_target_p = TRUE;
12559 break;
b7693d02 12560
f6e32f6d
RS		 12561 default:
12562 break;
12563 }
5e681ec4 12564
34e77a92
RS		 12565 if (may_need_local_target_p
12566 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12567 {
27586251
HPN		 12568 /* If PLT refcount book-keeping is wrong and too low, we'll
12569 see a zero value (going to -1) for the root PLT reference
12570 count. */
12571 if (root_plt->refcount >= 0)
12572 {
12573 BFD_ASSERT (root_plt->refcount != 0);
12574 root_plt->refcount -= 1;
12575 }
12576 else
12577 /* A value of -1 means the symbol has become local, forced
12578 or seeing a hidden definition. Any other negative value
12579 is an error. */
12580 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12581
12582 if (!call_reloc_p)
12583 arm_plt->noncall_refcount--;
5e681ec4 12584
f6e32f6d 12585 if (r_type == R_ARM_THM_CALL)
34e77a92 12586 arm_plt->maybe_thumb_refcount--;
bd97cb95 12587
f6e32f6d
RS		 12588 if (r_type == R_ARM_THM_JUMP24
12589 || r_type == R_ARM_THM_JUMP19)
34e77a92 12590 arm_plt->thumb_refcount--;
f6e32f6d 12591 }
5e681ec4 12592
34e77a92 12593 if (may_become_dynamic_p)
f6e32f6d
RS		 12594 {
12595 struct elf_dyn_relocs **pp;
12596 struct elf_dyn_relocs *p;
5e681ec4 12597
34e77a92 12598 if (h != NULL)
9c489990 12599 pp = &(eh->dyn_relocs);
34e77a92
RS		 12600 else
12601 {
12602 Elf_Internal_Sym *isym;
12603
12604 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12605 abfd, r_symndx);
12606 if (isym == NULL)
12607 return FALSE;
12608 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12609 if (pp == NULL)
12610 return FALSE;
12611 }
9c489990 12612 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12613 if (p->sec == sec)
12614 {
12615 /* Everything must go for SEC. */
12616 *pp = p->next;
12617 break;
12618 }
eb043451
PB		 12619 }
12620 }
5e681ec4 12621
b34976b6 12622 return TRUE;
252b5132
RH		 12623}
12624
780a67af
NC		 12625/* Look through the relocs for a section during the first phase. */
12626
b34976b6 12627static bfd_boolean
57e8b36a
NC		 12628elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12629 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12630{
b34976b6
AM		 12631 Elf_Internal_Shdr *symtab_hdr;
12632 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12633 const Elf_Internal_Rela *rel;
12634 const Elf_Internal_Rela *rel_end;
12635 bfd *dynobj;
5e681ec4 12636 asection *sreloc;
5e681ec4 12637 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12638 bfd_boolean call_reloc_p;
12639 bfd_boolean may_become_dynamic_p;
12640 bfd_boolean may_need_local_target_p;
ce98a316 12641 unsigned long nsyms;
9a5aca8c 12642
1049f94e 12643 if (info->relocatable)
b34976b6 12644 return TRUE;
9a5aca8c 12645
0ffa91dd
NC		 12646 BFD_ASSERT (is_arm_elf (abfd));
12647
5e681ec4 12648 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12649 if (htab == NULL)
12650 return FALSE;
12651
5e681ec4 12652 sreloc = NULL;
9a5aca8c 12653
67687978
PB		 12654 /* Create dynamic sections for relocatable executables so that we can
12655 copy relocations. */
12656 if (htab->root.is_relocatable_executable
12657 && ! htab->root.dynamic_sections_created)
12658 {
12659 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12660 return FALSE;
12661 }
12662
cbc704f3
RS		 12663 if (htab->root.dynobj == NULL)
12664 htab->root.dynobj = abfd;
34e77a92
RS		 12665 if (!create_ifunc_sections (info))
12666 return FALSE;
cbc704f3
RS		 12667
12668 dynobj = htab->root.dynobj;
12669
0ffa91dd 12670 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12671 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12672 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12673
252b5132
RH		 12674 rel_end = relocs + sec->reloc_count;
12675 for (rel = relocs; rel < rel_end; rel++)
12676 {
34e77a92 12677 Elf_Internal_Sym *isym;
252b5132 12678 struct elf_link_hash_entry *h;
b7693d02 12679 struct elf32_arm_link_hash_entry *eh;
252b5132 12680 unsigned long r_symndx;
eb043451 12681 int r_type;
9a5aca8c 12682
252b5132 12683 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12684 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12685 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12686
ce98a316
NC		 12687 if (r_symndx >= nsyms
12688 /* PR 9934: It is possible to have relocations that do not
12689 refer to symbols, thus it is also possible to have an
12690 object file containing relocations but no symbol table. */
cf35638d 12691 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12692 {
12693 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12694 r_symndx);
ba93b8ac
DJ		 12695 return FALSE;
12696 }
12697
34e77a92
RS		 12698 h = NULL;
12699 isym = NULL;
12700 if (nsyms > 0)
973a3492 12701 {
34e77a92
RS		 12702 if (r_symndx < symtab_hdr->sh_info)
12703 {
12704 /* A local symbol. */
12705 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12706 abfd, r_symndx);
12707 if (isym == NULL)
12708 return FALSE;
12709 }
12710 else
12711 {
12712 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12713 while (h->root.type == bfd_link_hash_indirect
12714 || h->root.type == bfd_link_hash_warning)
12715 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 12716
12717 /* PR15323, ref flags aren't set for references in the
12718 same object. */
12719 h->root.non_ir_ref = 1;
34e77a92 12720 }
973a3492 12721 }
9a5aca8c 12722
b7693d02
DJ		 12723 eh = (struct elf32_arm_link_hash_entry *) h;
12724
f6e32f6d
RS		 12725 call_reloc_p = FALSE;
12726 may_become_dynamic_p = FALSE;
12727 may_need_local_target_p = FALSE;
12728
0855e32b
NS		 12729 /* Could be done earlier, if h were already available. */
12730 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12731 switch (r_type)
99059e56 12732 {
5e681ec4 12733 case R_ARM_GOT32:
eb043451 12734 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12735 case R_ARM_TLS_GD32:
12736 case R_ARM_TLS_IE32:
0855e32b
NS		 12737 case R_ARM_TLS_GOTDESC:
12738 case R_ARM_TLS_DESCSEQ:
12739 case R_ARM_THM_TLS_DESCSEQ:
12740 case R_ARM_TLS_CALL:
12741 case R_ARM_THM_TLS_CALL:
5e681ec4 12742 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12743 {
12744 int tls_type, old_tls_type;
5e681ec4 12745
ba93b8ac
DJ		 12746 switch (r_type)
12747 {
12748 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12749
ba93b8ac 12750 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12751
0855e32b
NS		 12752 case R_ARM_TLS_GOTDESC:
12753 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12754 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12755 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12756
ba93b8ac
DJ		 12757 default: tls_type = GOT_NORMAL; break;
12758 }
252b5132 12759
eea6dad2
KM		 12760 if (!info->executable && (tls_type & GOT_TLS_IE))
12761 info->flags |= DF_STATIC_TLS;
12762
ba93b8ac
DJ		 12763 if (h != NULL)
12764 {
12765 h->got.refcount++;
12766 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12767 }
12768 else
12769 {
ba93b8ac 12770 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12771 if (!elf32_arm_allocate_local_sym_info (abfd))
12772 return FALSE;
12773 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12774 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12775 }
12776
0855e32b 12777 /* If a variable is accessed with both tls methods, two
99059e56 12778 slots may be created. */
0855e32b
NS		 12779 if (GOT_TLS_GD_ANY_P (old_tls_type)
12780 && GOT_TLS_GD_ANY_P (tls_type))
12781 tls_type |= old_tls_type;
12782
12783 /* We will already have issued an error message if there
12784 is a TLS/non-TLS mismatch, based on the symbol
12785 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12786 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12787 && tls_type != GOT_NORMAL)
12788 tls_type |= old_tls_type;
12789
0855e32b 12790 /* If the symbol is accessed in both IE and GDESC
99059e56
RM		 12791 method, we're able to relax. Turn off the GDESC flag,
12792 without messing up with any other kind of tls types
6a631e86 12793 that may be involved. */
0855e32b
NS		 12794 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12795 tls_type &= ~GOT_TLS_GDESC;
12796
ba93b8ac
DJ		 12797 if (old_tls_type != tls_type)
12798 {
12799 if (h != NULL)
12800 elf32_arm_hash_entry (h)->tls_type = tls_type;
12801 else
12802 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12803 }
12804 }
8029a119 12805 /* Fall through. */
ba93b8ac
DJ		 12806
12807 case R_ARM_TLS_LDM32:
12808 if (r_type == R_ARM_TLS_LDM32)
12809 htab->tls_ldm_got.refcount++;
8029a119 12810 /* Fall through. */
252b5132 12811
c19d1205 12812 case R_ARM_GOTOFF32:
5e681ec4 12813 case R_ARM_GOTPC:
cbc704f3
RS		 12814 if (htab->root.sgot == NULL
12815 && !create_got_section (htab->root.dynobj, info))
12816 return FALSE;
252b5132
RH		 12817 break;
12818
252b5132 12819 case R_ARM_PC24:
7359ea65 12820 case R_ARM_PLT32:
5b5bb741
PB		 12821 case R_ARM_CALL:
12822 case R_ARM_JUMP24:
eb043451 12823 case R_ARM_PREL31:
c19d1205 12824 case R_ARM_THM_CALL:
bd97cb95
DJ		 12825 case R_ARM_THM_JUMP24:
12826 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12827 call_reloc_p = TRUE;
12828 may_need_local_target_p = TRUE;
12829 break;
12830
12831 case R_ARM_ABS12:
12832 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12833 ldr __GOTT_INDEX__ offsets. */
12834 if (!htab->vxworks_p)
12835 {
12836 may_need_local_target_p = TRUE;
12837 break;
12838 }
12839 /* Fall through. */
39623e12 12840
96c23d59
JM		 12841 case R_ARM_MOVW_ABS_NC:
12842 case R_ARM_MOVT_ABS:
12843 case R_ARM_THM_MOVW_ABS_NC:
12844 case R_ARM_THM_MOVT_ABS:
12845 if (info->shared)
12846 {
12847 (*_bfd_error_handler)
12848 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12849 abfd, elf32_arm_howto_table_1[r_type].name,
12850 (h) ? h->root.root.string : "a local symbol");
12851 bfd_set_error (bfd_error_bad_value);
12852 return FALSE;
12853 }
12854
12855 /* Fall through. */
39623e12
PB		 12856 case R_ARM_ABS32:
12857 case R_ARM_ABS32_NOI:
97323ad1
WN		 12858 if (h != NULL && info->executable)
12859 {
12860 h->pointer_equality_needed = 1;
12861 }
12862 /* Fall through. */
39623e12
PB		 12863 case R_ARM_REL32:
12864 case R_ARM_REL32_NOI:
b6895b4f
PB		 12865 case R_ARM_MOVW_PREL_NC:
12866 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12867 case R_ARM_THM_MOVW_PREL_NC:
12868 case R_ARM_THM_MOVT_PREL:
39623e12 12869
b7693d02 12870 /* Should the interworking branches be listed here? */
67687978 12871 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12872 && (sec->flags & SEC_ALLOC) != 0)
12873 {
12874 if (h == NULL
469a3493 12875 && elf32_arm_howto_from_type (r_type)->pc_relative)
34e77a92
RS		 12876 {
12877 /* In shared libraries and relocatable executables,
12878 we treat local relative references as calls;
12879 see the related SYMBOL_CALLS_LOCAL code in
12880 allocate_dynrelocs. */
12881 call_reloc_p = TRUE;
12882 may_need_local_target_p = TRUE;
12883 }
12884 else
12885 /* We are creating a shared library or relocatable
12886 executable, and this is a reloc against a global symbol,
12887 or a non-PC-relative reloc against a local symbol.
12888 We may need to copy the reloc into the output. */
12889 may_become_dynamic_p = TRUE;
12890 }
f6e32f6d
RS		 12891 else
12892 may_need_local_target_p = TRUE;
252b5132
RH		 12893 break;
12894
99059e56
RM		 12895 /* This relocation describes the C++ object vtable hierarchy.
12896 Reconstruct it for later use during GC. */
12897 case R_ARM_GNU_VTINHERIT:
12898 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12899 return FALSE;
12900 break;
12901
12902 /* This relocation describes which C++ vtable entries are actually
12903 used. Record for later use during GC. */
12904 case R_ARM_GNU_VTENTRY:
12905 BFD_ASSERT (h != NULL);
12906 if (h != NULL
12907 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12908 return FALSE;
12909 break;
12910 }
f6e32f6d
RS		 12911
12912 if (h != NULL)
12913 {
12914 if (call_reloc_p)
12915 /* We may need a .plt entry if the function this reloc
12916 refers to is in a different object, regardless of the
12917 symbol's type. We can't tell for sure yet, because
12918 something later might force the symbol local. */
12919 h->needs_plt = 1;
12920 else if (may_need_local_target_p)
12921 /* If this reloc is in a read-only section, we might
12922 need a copy reloc. We can't check reliably at this
12923 stage whether the section is read-only, as input
12924 sections have not yet been mapped to output sections.
12925 Tentatively set the flag for now, and correct in
12926 adjust_dynamic_symbol. */
12927 h->non_got_ref = 1;
12928 }
12929
34e77a92
RS		 12930 if (may_need_local_target_p
12931 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12932 {
34e77a92
RS		 12933 union gotplt_union *root_plt;
12934 struct arm_plt_info *arm_plt;
12935 struct arm_local_iplt_info *local_iplt;
12936
12937 if (h != NULL)
12938 {
12939 root_plt = &h->plt;
12940 arm_plt = &eh->plt;
12941 }
12942 else
12943 {
12944 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12945 if (local_iplt == NULL)
12946 return FALSE;
12947 root_plt = &local_iplt->root;
12948 arm_plt = &local_iplt->arm;
12949 }
12950
f6e32f6d
RS		 12951 /* If the symbol is a function that doesn't bind locally,
12952 this relocation will need a PLT entry. */
a8c887dd
NC		 12953 if (root_plt->refcount != -1)
12954 root_plt->refcount += 1;
34e77a92
RS		 12955
12956 if (!call_reloc_p)
12957 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12958
12959 /* It's too early to use htab->use_blx here, so we have to
12960 record possible blx references separately from
12961 relocs that definitely need a thumb stub. */
12962
12963 if (r_type == R_ARM_THM_CALL)
34e77a92 12964 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12965
12966 if (r_type == R_ARM_THM_JUMP24
12967 || r_type == R_ARM_THM_JUMP19)
34e77a92 12968 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12969 }
12970
12971 if (may_become_dynamic_p)
12972 {
12973 struct elf_dyn_relocs *p, **head;
12974
12975 /* Create a reloc section in dynobj. */
12976 if (sreloc == NULL)
12977 {
12978 sreloc = _bfd_elf_make_dynamic_reloc_section
12979 (sec, dynobj, 2, abfd, ! htab->use_rel);
12980
12981 if (sreloc == NULL)
12982 return FALSE;
12983
12984 /* BPABI objects never have dynamic relocations mapped. */
12985 if (htab->symbian_p)
12986 {
12987 flagword flags;
12988
12989 flags = bfd_get_section_flags (dynobj, sreloc);
12990 flags &= ~(SEC_LOAD | SEC_ALLOC);
12991 bfd_set_section_flags (dynobj, sreloc, flags);
12992 }
12993 }
12994
12995 /* If this is a global symbol, count the number of
12996 relocations we need for this symbol. */
12997 if (h != NULL)
12998 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12999 else
13000 {
34e77a92
RS		 13001 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13002 if (head == NULL)
f6e32f6d 13003 return FALSE;
f6e32f6d
RS		 13004 }
13005
13006 p = *head;
13007 if (p == NULL || p->sec != sec)
13008 {
13009 bfd_size_type amt = sizeof *p;
13010
13011 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13012 if (p == NULL)
13013 return FALSE;
13014 p->next = *head;
13015 *head = p;
13016 p->sec = sec;
13017 p->count = 0;
13018 p->pc_count = 0;
13019 }
13020
469a3493 13021 if (elf32_arm_howto_from_type (r_type)->pc_relative)
f6e32f6d
RS		 13022 p->pc_count += 1;
13023 p->count += 1;
13024 }
252b5132 13025 }
f21f3fe0 13026
b34976b6 13027 return TRUE;
252b5132
RH		 13028}
13029
6a5bb875
PB		 13030/* Unwinding tables are not referenced directly. This pass marks them as
13031 required if the corresponding code section is marked. */
13032
13033static bfd_boolean
906e58ca
NC		 13034elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13035 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 13036{
13037 bfd *sub;
13038 Elf_Internal_Shdr **elf_shdrp;
13039 bfd_boolean again;
13040
7f6ab9f8
AM		 13041 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13042
6a5bb875
PB		 13043 /* Marking EH data may cause additional code sections to be marked,
13044 requiring multiple passes. */
13045 again = TRUE;
13046 while (again)
13047 {
13048 again = FALSE;
c72f2fb2 13049 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
6a5bb875
PB		 13050 {
13051 asection *o;
13052
0ffa91dd 13053 if (! is_arm_elf (sub))
6a5bb875
PB		 13054 continue;
13055
13056 elf_shdrp = elf_elfsections (sub);
13057 for (o = sub->sections; o != NULL; o = o->next)
13058 {
13059 Elf_Internal_Shdr *hdr;
0ffa91dd 13060
6a5bb875 13061 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 13062 if (hdr->sh_type == SHT_ARM_EXIDX
13063 && hdr->sh_link
13064 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 13065 && !o->gc_mark
13066 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13067 {
13068 again = TRUE;
13069 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13070 return FALSE;
13071 }
13072 }
13073 }
13074 }
13075
13076 return TRUE;
13077}
13078
3c9458e9
NC		 13079/* Treat mapping symbols as special target symbols. */
13080
13081static bfd_boolean
13082elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13083{
b0796911
PB		 13084 return bfd_is_arm_special_symbol_name (sym->name,
13085 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 13086}
13087
0367ecfb
NC		 13088/* This is a copy of elf_find_function() from elf.c except that
13089 ARM mapping symbols are ignored when looking for function names
13090 and STT_ARM_TFUNC is considered to a function type. */
252b5132 13091
0367ecfb
NC		 13092static bfd_boolean
13093arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
0367ecfb 13094 asymbol ** symbols,
fb167eb2 13095 asection * section,
0367ecfb
NC		 13096 bfd_vma offset,
13097 const char ** filename_ptr,
13098 const char ** functionname_ptr)
13099{
13100 const char * filename = NULL;
13101 asymbol * func = NULL;
13102 bfd_vma low_func = 0;
13103 asymbol ** p;
252b5132
RH		 13104
13105 for (p = symbols; *p != NULL; p++)
13106 {
13107 elf_symbol_type *q;
13108
13109 q = (elf_symbol_type *) *p;
13110
252b5132
RH		 13111 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13112 {
13113 default:
13114 break;
13115 case STT_FILE:
13116 filename = bfd_asymbol_name (&q->symbol);
13117 break;
252b5132
RH		 13118 case STT_FUNC:
13119 case STT_ARM_TFUNC:
9d2da7ca 13120 case STT_NOTYPE:
b0796911 13121 /* Skip mapping symbols. */
0367ecfb 13122 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 13123 && bfd_is_arm_special_symbol_name (q->symbol.name,
13124 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 13125 continue;
13126 /* Fall through. */
6b40fcba 13127 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 13128 && q->symbol.value >= low_func
13129 && q->symbol.value <= offset)
13130 {
13131 func = (asymbol *) q;
13132 low_func = q->symbol.value;
13133 }
13134 break;
13135 }
13136 }
13137
13138 if (func == NULL)
b34976b6 13139 return FALSE;
252b5132 13140
0367ecfb
NC		 13141 if (filename_ptr)
13142 *filename_ptr = filename;
13143 if (functionname_ptr)
13144 *functionname_ptr = bfd_asymbol_name (func);
13145
13146 return TRUE;
906e58ca 13147}
0367ecfb
NC		 13148
13149
13150/* Find the nearest line to a particular section and offset, for error
13151 reporting. This code is a duplicate of the code in elf.c, except
13152 that it uses arm_elf_find_function. */
13153
13154static bfd_boolean
13155elf32_arm_find_nearest_line (bfd * abfd,
0367ecfb 13156 asymbol ** symbols,
fb167eb2 13157 asection * section,
0367ecfb
NC		 13158 bfd_vma offset,
13159 const char ** filename_ptr,
13160 const char ** functionname_ptr,
fb167eb2
AM		 13161 unsigned int * line_ptr,
13162 unsigned int * discriminator_ptr)
0367ecfb
NC		 13163{
13164 bfd_boolean found = FALSE;
13165
fb167eb2 13166 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
0367ecfb 13167 filename_ptr, functionname_ptr,
fb167eb2
AM		 13168 line_ptr, discriminator_ptr,
13169 dwarf_debug_sections, 0,
0367ecfb
NC		 13170 & elf_tdata (abfd)->dwarf2_find_line_info))
13171 {
13172 if (!*functionname_ptr)
fb167eb2 13173 arm_elf_find_function (abfd, symbols, section, offset,
0367ecfb
NC		 13174 *filename_ptr ? NULL : filename_ptr,
13175 functionname_ptr);
f21f3fe0 13176
0367ecfb
NC		 13177 return TRUE;
13178 }
13179
fb167eb2
AM		 13180 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
13181 uses DWARF1. */
13182
0367ecfb
NC		 13183 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13184 & found, filename_ptr,
13185 functionname_ptr, line_ptr,
13186 & elf_tdata (abfd)->line_info))
13187 return FALSE;
13188
13189 if (found && (*functionname_ptr || *line_ptr))
13190 return TRUE;
13191
13192 if (symbols == NULL)
13193 return FALSE;
13194
fb167eb2 13195 if (! arm_elf_find_function (abfd, symbols, section, offset,
0367ecfb
NC		 13196 filename_ptr, functionname_ptr))
13197 return FALSE;
13198
13199 *line_ptr = 0;
b34976b6 13200 return TRUE;
252b5132
RH		 13201}
13202
4ab527b0
FF		 13203static bfd_boolean
13204elf32_arm_find_inliner_info (bfd * abfd,
13205 const char ** filename_ptr,
13206 const char ** functionname_ptr,
13207 unsigned int * line_ptr)
13208{
13209 bfd_boolean found;
13210 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13211 functionname_ptr, line_ptr,
13212 & elf_tdata (abfd)->dwarf2_find_line_info);
13213 return found;
13214}
13215
252b5132
RH		 13216/* Adjust a symbol defined by a dynamic object and referenced by a
13217 regular object. The current definition is in some section of the
13218 dynamic object, but we're not including those sections. We have to
13219 change the definition to something the rest of the link can
13220 understand. */
13221
b34976b6 13222static bfd_boolean
57e8b36a
NC		 13223elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13224 struct elf_link_hash_entry * h)
252b5132
RH		 13225{
13226 bfd * dynobj;
13227 asection * s;
b7693d02 13228 struct elf32_arm_link_hash_entry * eh;
67687978 13229 struct elf32_arm_link_hash_table *globals;
252b5132 13230
67687978 13231 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13232 if (globals == NULL)
13233 return FALSE;
13234
252b5132
RH		 13235 dynobj = elf_hash_table (info)->dynobj;
13236
13237 /* Make sure we know what is going on here. */
13238 BFD_ASSERT (dynobj != NULL
f5385ebf 13239 && (h->needs_plt
34e77a92 13240 || h->type == STT_GNU_IFUNC
f6e332e6 13241 || h->u.weakdef != NULL
f5385ebf
AM		 13242 || (h->def_dynamic
13243 && h->ref_regular
13244 && !h->def_regular)));
252b5132 13245
b7693d02
DJ		 13246 eh = (struct elf32_arm_link_hash_entry *) h;
13247
252b5132
RH		 13248 /* If this is a function, put it in the procedure linkage table. We
13249 will fill in the contents of the procedure linkage table later,
13250 when we know the address of the .got section. */
34e77a92 13251 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13252 {
34e77a92
RS		 13253 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13254 symbol binds locally. */
5e681ec4 13255 if (h->plt.refcount <= 0
34e77a92
RS		 13256 || (h->type != STT_GNU_IFUNC
13257 && (SYMBOL_CALLS_LOCAL (info, h)
13258 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13259 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13260 {
13261 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13262 file, but the symbol was never referred to by a dynamic
13263 object, or if all references were garbage collected. In
13264 such a case, we don't actually need to build a procedure
13265 linkage table, and we can just do a PC24 reloc instead. */
13266 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13267 eh->plt.thumb_refcount = 0;
13268 eh->plt.maybe_thumb_refcount = 0;
13269 eh->plt.noncall_refcount = 0;
f5385ebf 13270 h->needs_plt = 0;
252b5132
RH		 13271 }
13272
b34976b6 13273 return TRUE;
252b5132 13274 }
5e681ec4 13275 else
b7693d02
DJ		 13276 {
13277 /* It's possible that we incorrectly decided a .plt reloc was
13278 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13279 in check_relocs. We can't decide accurately between function
13280 and non-function syms in check-relocs; Objects loaded later in
13281 the link may change h->type. So fix it now. */
13282 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13283 eh->plt.thumb_refcount = 0;
13284 eh->plt.maybe_thumb_refcount = 0;
13285 eh->plt.noncall_refcount = 0;
b7693d02 13286 }
252b5132
RH		 13287
13288 /* If this is a weak symbol, and there is a real definition, the
13289 processor independent code will have arranged for us to see the
13290 real definition first, and we can just use the same value. */
f6e332e6 13291 if (h->u.weakdef != NULL)
252b5132 13292 {
f6e332e6
AM		 13293 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13294 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13295 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13296 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13297 return TRUE;
252b5132
RH		 13298 }
13299
ba93b8ac
DJ		 13300 /* If there are no non-GOT references, we do not need a copy
13301 relocation. */
13302 if (!h->non_got_ref)
13303 return TRUE;
13304
252b5132
RH		 13305 /* This is a reference to a symbol defined by a dynamic object which
13306 is not a function. */
13307
13308 /* If we are creating a shared library, we must presume that the
13309 only references to the symbol are via the global offset table.
13310 For such cases we need not do anything here; the relocations will
67687978
PB		 13311 be handled correctly by relocate_section. Relocatable executables
13312 can reference data in shared objects directly, so we don't need to
13313 do anything here. */
13314 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13315 return TRUE;
252b5132
RH		 13316
13317 /* We must allocate the symbol in our .dynbss section, which will
13318 become part of the .bss section of the executable. There will be
13319 an entry for this symbol in the .dynsym section. The dynamic
13320 object will contain position independent code, so all references
13321 from the dynamic object to this symbol will go through the global
13322 offset table. The dynamic linker will use the .dynsym entry to
13323 determine the address it must put in the global offset table, so
13324 both the dynamic object and the regular object will refer to the
13325 same memory location for the variable. */
3d4d4302 13326 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13327 BFD_ASSERT (s != NULL);
13328
13329 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13330 copy the initial value out of the dynamic object and into the
13331 runtime process image. We need to remember the offset into the
00a97672 13332 .rel(a).bss section we are going to use. */
1d7e9d18 13333 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13334 {
13335 asection *srel;
13336
3d4d4302 13337 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13338 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13339 h->needs_copy = 1;
252b5132
RH		 13340 }
13341
027297b7 13342 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13343}
13344
5e681ec4
PB		 13345/* Allocate space in .plt, .got and associated reloc sections for
13346 dynamic relocs. */
13347
13348static bfd_boolean
47beaa6a 13349allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13350{
13351 struct bfd_link_info *info;
13352 struct elf32_arm_link_hash_table *htab;
13353 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13354 struct elf_dyn_relocs *p;
5e681ec4
PB		 13355
13356 if (h->root.type == bfd_link_hash_indirect)
13357 return TRUE;
13358
e6a6bb22
AM		 13359 eh = (struct elf32_arm_link_hash_entry *) h;
13360
5e681ec4
PB		 13361 info = (struct bfd_link_info *) inf;
13362 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13363 if (htab == NULL)
13364 return FALSE;
5e681ec4 13365
34e77a92 13366 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13367 && h->plt.refcount > 0)
13368 {
13369 /* Make sure this symbol is output as a dynamic symbol.
13370 Undefined weak syms won't yet be marked as dynamic. */
13371 if (h->dynindx == -1
f5385ebf 13372 && !h->forced_local)
5e681ec4 13373 {
c152c796 13374 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13375 return FALSE;
13376 }
13377
34e77a92
RS		 13378 /* If the call in the PLT entry binds locally, the associated
13379 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13380 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13381 than the .plt section. */
13382 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13383 {
13384 eh->is_iplt = 1;
13385 if (eh->plt.noncall_refcount == 0
13386 && SYMBOL_REFERENCES_LOCAL (info, h))
13387 /* All non-call references can be resolved directly.
13388 This means that they can (and in some cases, must)
13389 resolve directly to the run-time target, rather than
13390 to the PLT. That in turns means that any .got entry
13391 would be equal to the .igot.plt entry, so there's
13392 no point having both. */
13393 h->got.refcount = 0;
13394 }
13395
5e681ec4 13396 if (info->shared
34e77a92 13397 || eh->is_iplt
7359ea65 13398 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13399 {
34e77a92 13400 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13401
5e681ec4
PB		 13402 /* If this symbol is not defined in a regular file, and we are
13403 not generating a shared library, then set the symbol to this
13404 location in the .plt. This is required to make function
13405 pointers compare as equal between the normal executable and
13406 the shared library. */
13407 if (! info->shared
f5385ebf 13408 && !h->def_regular)
5e681ec4 13409 {
34e77a92 13410 h->root.u.def.section = htab->root.splt;
5e681ec4 13411 h->root.u.def.value = h->plt.offset;
5e681ec4 13412
67d74e43
DJ		 13413 /* Make sure the function is not marked as Thumb, in case
13414 it is the target of an ABS32 relocation, which will
13415 point to the PLT entry. */
35fc36a8 13416 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13417 }
022f8312 13418
00a97672
RS		 13419 /* VxWorks executables have a second set of relocations for
13420 each PLT entry. They go in a separate relocation section,
13421 which is processed by the kernel loader. */
13422 if (htab->vxworks_p && !info->shared)
13423 {
13424 /* There is a relocation for the initial PLT entry:
13425 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13426 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13427 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13428
13429 /* There are two extra relocations for each subsequent
13430 PLT entry: an R_ARM_32 relocation for the GOT entry,
13431 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13432 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13433 }
5e681ec4
PB		 13434 }
13435 else
13436 {
13437 h->plt.offset = (bfd_vma) -1;
f5385ebf 13438 h->needs_plt = 0;
5e681ec4
PB		 13439 }
13440 }
13441 else
13442 {
13443 h->plt.offset = (bfd_vma) -1;
f5385ebf 13444 h->needs_plt = 0;
5e681ec4
PB		 13445 }
13446
0855e32b
NS		 13447 eh = (struct elf32_arm_link_hash_entry *) h;
13448 eh->tlsdesc_got = (bfd_vma) -1;
13449
5e681ec4
PB		 13450 if (h->got.refcount > 0)
13451 {
13452 asection *s;
13453 bfd_boolean dyn;
ba93b8ac
DJ		 13454 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13455 int indx;
5e681ec4
PB		 13456
13457 /* Make sure this symbol is output as a dynamic symbol.
13458 Undefined weak syms won't yet be marked as dynamic. */
13459 if (h->dynindx == -1
f5385ebf 13460 && !h->forced_local)
5e681ec4 13461 {
c152c796 13462 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13463 return FALSE;
13464 }
13465
e5a52504
MM		 13466 if (!htab->symbian_p)
13467 {
362d30a1 13468 s = htab->root.sgot;
e5a52504 13469 h->got.offset = s->size;
ba93b8ac
DJ		 13470
13471 if (tls_type == GOT_UNKNOWN)
13472 abort ();
13473
13474 if (tls_type == GOT_NORMAL)
13475 /* Non-TLS symbols need one GOT slot. */
13476 s->size += 4;
13477 else
13478 {
99059e56
RM		 13479 if (tls_type & GOT_TLS_GDESC)
13480 {
0855e32b 13481 /* R_ARM_TLS_DESC needs 2 GOT slots. */
99059e56 13482 eh->tlsdesc_got
0855e32b
NS		 13483 = (htab->root.sgotplt->size
13484 - elf32_arm_compute_jump_table_size (htab));
99059e56
RM		 13485 htab->root.sgotplt->size += 8;
13486 h->got.offset = (bfd_vma) -2;
34e77a92 13487 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13488 reloc in the middle of .got.plt. */
99059e56
RM		 13489 htab->num_tls_desc++;
13490 }
0855e32b 13491
ba93b8ac 13492 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13493 {
13494 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13495 the symbol is both GD and GDESC, got.offset may
13496 have been overwritten. */
13497 h->got.offset = s->size;
13498 s->size += 8;
13499 }
13500
ba93b8ac
DJ		 13501 if (tls_type & GOT_TLS_IE)
13502 /* R_ARM_TLS_IE32 needs one GOT slot. */
13503 s->size += 4;
13504 }
13505
e5a52504 13506 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13507
13508 indx = 0;
13509 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13510 && (!info->shared
13511 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13512 indx = h->dynindx;
13513
13514 if (tls_type != GOT_NORMAL
13515 && (info->shared || indx != 0)
13516 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13517 || h->root.type != bfd_link_hash_undefweak))
13518 {
13519 if (tls_type & GOT_TLS_IE)
47beaa6a 13520 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13521
13522 if (tls_type & GOT_TLS_GD)
47beaa6a 13523 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13524
b38cadfb 13525 if (tls_type & GOT_TLS_GDESC)
0855e32b 13526 {
47beaa6a 13527 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13528 /* GDESC needs a trampoline to jump to. */
13529 htab->tls_trampoline = -1;
13530 }
13531
13532 /* Only GD needs it. GDESC just emits one relocation per
13533 2 entries. */
b38cadfb 13534 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13535 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13536 }
6f820c85 13537 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 13538 {
13539 if (htab->root.dynamic_sections_created)
13540 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13541 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13542 }
34e77a92
RS		 13543 else if (h->type == STT_GNU_IFUNC
13544 && eh->plt.noncall_refcount == 0)
13545 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13546 they all resolve dynamically instead. Reserve room for the
13547 GOT entry's R_ARM_IRELATIVE relocation. */
13548 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
31943882
WN		 13549 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13550 || h->root.type != bfd_link_hash_undefweak))
b436d854 13551 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13552 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13553 }
5e681ec4
PB		 13554 }
13555 else
13556 h->got.offset = (bfd_vma) -1;
13557
a4fd1a8e
PB		 13558 /* Allocate stubs for exported Thumb functions on v4t. */
13559 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13560 && h->def_regular
35fc36a8 13561 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13562 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13563 {
13564 struct elf_link_hash_entry * th;
13565 struct bfd_link_hash_entry * bh;
13566 struct elf_link_hash_entry * myh;
13567 char name[1024];
13568 asection *s;
13569 bh = NULL;
13570 /* Create a new symbol to regist the real location of the function. */
13571 s = h->root.u.def.section;
906e58ca 13572 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13573 _bfd_generic_link_add_one_symbol (info, s->owner,
13574 name, BSF_GLOBAL, s,
13575 h->root.u.def.value,
13576 NULL, TRUE, FALSE, &bh);
13577
13578 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13579 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13580 myh->forced_local = 1;
35fc36a8 13581 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13582 eh->export_glue = myh;
13583 th = record_arm_to_thumb_glue (info, h);
13584 /* Point the symbol at the stub. */
13585 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13586 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13587 h->root.u.def.section = th->root.u.def.section;
13588 h->root.u.def.value = th->root.u.def.value & ~1;
13589 }
13590
0bdcacaf 13591 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13592 return TRUE;
13593
13594 /* In the shared -Bsymbolic case, discard space allocated for
13595 dynamic pc-relative relocs against symbols which turn out to be
13596 defined in regular objects. For the normal shared case, discard
13597 space for pc-relative relocs that have become local due to symbol
13598 visibility changes. */
13599
67687978 13600 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13601 {
469a3493
RM		 13602 /* Relocs that use pc_count are PC-relative forms, which will appear
13603 on something like ".long foo - ." or "movw REG, foo - .". We want
13604 calls to protected symbols to resolve directly to the function
13605 rather than going via the plt. If people want function pointer
13606 comparisons to work as expected then they should avoid writing
13607 assembly like ".long foo - .". */
ba93b8ac
DJ		 13608 if (SYMBOL_CALLS_LOCAL (info, h))
13609 {
0bdcacaf 13610 struct elf_dyn_relocs **pp;
ba93b8ac 13611
0bdcacaf 13612 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13613 {
13614 p->count -= p->pc_count;
13615 p->pc_count = 0;
13616 if (p->count == 0)
13617 *pp = p->next;
13618 else
13619 pp = &p->next;
13620 }
13621 }
13622
4dfe6ac6 13623 if (htab->vxworks_p)
3348747a 13624 {
0bdcacaf 13625 struct elf_dyn_relocs **pp;
3348747a 13626
0bdcacaf 13627 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13628 {
0bdcacaf 13629 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13630 *pp = p->next;
13631 else
13632 pp = &p->next;
13633 }
13634 }
13635
ba93b8ac 13636 /* Also discard relocs on undefined weak syms with non-default
99059e56 13637 visibility. */
0bdcacaf 13638 if (eh->dyn_relocs != NULL
5e681ec4 13639 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13640 {
13641 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13642 eh->dyn_relocs = NULL;
22d606e9
AM		 13643
13644 /* Make sure undefined weak symbols are output as a dynamic
13645 symbol in PIEs. */
13646 else if (h->dynindx == -1
13647 && !h->forced_local)
13648 {
13649 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13650 return FALSE;
13651 }
13652 }
13653
67687978
PB		 13654 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13655 && h->root.type == bfd_link_hash_new)
13656 {
13657 /* Output absolute symbols so that we can create relocations
13658 against them. For normal symbols we output a relocation
13659 against the section that contains them. */
13660 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13661 return FALSE;
13662 }
13663
5e681ec4
PB		 13664 }
13665 else
13666 {
13667 /* For the non-shared case, discard space for relocs against
13668 symbols which turn out to need copy relocs or are not
13669 dynamic. */
13670
f5385ebf
AM		 13671 if (!h->non_got_ref
13672 && ((h->def_dynamic
13673 && !h->def_regular)
5e681ec4
PB		 13674 || (htab->root.dynamic_sections_created
13675 && (h->root.type == bfd_link_hash_undefweak
13676 || h->root.type == bfd_link_hash_undefined))))
13677 {
13678 /* Make sure this symbol is output as a dynamic symbol.
13679 Undefined weak syms won't yet be marked as dynamic. */
13680 if (h->dynindx == -1
f5385ebf 13681 && !h->forced_local)
5e681ec4 13682 {
c152c796 13683 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13684 return FALSE;
13685 }
13686
13687 /* If that succeeded, we know we'll be keeping all the
13688 relocs. */
13689 if (h->dynindx != -1)
13690 goto keep;
13691 }
13692
0bdcacaf 13693 eh->dyn_relocs = NULL;
5e681ec4
PB		 13694
13695 keep: ;
13696 }
13697
13698 /* Finally, allocate space. */
0bdcacaf 13699 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13700 {
0bdcacaf 13701 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13702 if (h->type == STT_GNU_IFUNC
13703 && eh->plt.noncall_refcount == 0
13704 && SYMBOL_REFERENCES_LOCAL (info, h))
13705 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13706 else
13707 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13708 }
13709
13710 return TRUE;
13711}
13712
08d1f311
DJ		 13713/* Find any dynamic relocs that apply to read-only sections. */
13714
13715static bfd_boolean
8029a119 13716elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13717{
8029a119 13718 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13719 struct elf_dyn_relocs * p;
08d1f311 13720
08d1f311 13721 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13722 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13723 {
0bdcacaf 13724 asection *s = p->sec;
08d1f311
DJ		 13725
13726 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13727 {
13728 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13729
13730 info->flags |= DF_TEXTREL;
13731
13732 /* Not an error, just cut short the traversal. */
13733 return FALSE;
13734 }
13735 }
13736 return TRUE;
13737}
13738
d504ffc8
DJ		 13739void
13740bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13741 int byteswap_code)
13742{
13743 struct elf32_arm_link_hash_table *globals;
13744
13745 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13746 if (globals == NULL)
13747 return;
13748
d504ffc8
DJ		 13749 globals->byteswap_code = byteswap_code;
13750}
13751
252b5132
RH		 13752/* Set the sizes of the dynamic sections. */
13753
b34976b6 13754static bfd_boolean
57e8b36a
NC		 13755elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13756 struct bfd_link_info * info)
252b5132
RH		 13757{
13758 bfd * dynobj;
13759 asection * s;
b34976b6
AM		 13760 bfd_boolean plt;
13761 bfd_boolean relocs;
5e681ec4
PB		 13762 bfd *ibfd;
13763 struct elf32_arm_link_hash_table *htab;
252b5132 13764
5e681ec4 13765 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13766 if (htab == NULL)
13767 return FALSE;
13768
252b5132
RH		 13769 dynobj = elf_hash_table (info)->dynobj;
13770 BFD_ASSERT (dynobj != NULL);
39b41c9c 13771 check_use_blx (htab);
252b5132
RH		 13772
13773 if (elf_hash_table (info)->dynamic_sections_created)
13774 {
13775 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13776 if (info->executable)
252b5132 13777 {
3d4d4302 13778 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13779 BFD_ASSERT (s != NULL);
eea6121a 13780 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13781 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13782 }
13783 }
5e681ec4
PB		 13784
13785 /* Set up .got offsets for local syms, and space for local dynamic
13786 relocs. */
c72f2fb2 13787 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
252b5132 13788 {
5e681ec4
PB		 13789 bfd_signed_vma *local_got;
13790 bfd_signed_vma *end_local_got;
34e77a92 13791 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13792 char *local_tls_type;
0855e32b 13793 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13794 bfd_size_type locsymcount;
13795 Elf_Internal_Shdr *symtab_hdr;
13796 asection *srel;
4dfe6ac6 13797 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13798 unsigned int symndx;
5e681ec4 13799
0ffa91dd 13800 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13801 continue;
13802
13803 for (s = ibfd->sections; s != NULL; s = s->next)
13804 {
0bdcacaf 13805 struct elf_dyn_relocs *p;
5e681ec4 13806
0bdcacaf 13807 for (p = (struct elf_dyn_relocs *)
99059e56 13808 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13809 {
0bdcacaf
RS		 13810 if (!bfd_is_abs_section (p->sec)
13811 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13812 {
13813 /* Input section has been discarded, either because
13814 it is a copy of a linkonce section or due to
13815 linker script /DISCARD/, so we'll be discarding
13816 the relocs too. */
13817 }
3348747a 13818 else if (is_vxworks
0bdcacaf 13819 && strcmp (p->sec->output_section->name,
3348747a
NS		 13820 ".tls_vars") == 0)
13821 {
13822 /* Relocations in vxworks .tls_vars sections are
13823 handled specially by the loader. */
13824 }
5e681ec4
PB		 13825 else if (p->count != 0)
13826 {
0bdcacaf 13827 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13828 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13829 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13830 info->flags |= DF_TEXTREL;
13831 }
13832 }
13833 }
13834
13835 local_got = elf_local_got_refcounts (ibfd);
13836 if (!local_got)
13837 continue;
13838
0ffa91dd 13839 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13840 locsymcount = symtab_hdr->sh_info;
13841 end_local_got = local_got + locsymcount;
34e77a92 13842 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13843 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13844 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13845 symndx = 0;
362d30a1
RS		 13846 s = htab->root.sgot;
13847 srel = htab->root.srelgot;
0855e32b 13848 for (; local_got < end_local_got;
34e77a92
RS		 13849 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13850 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13851 {
0855e32b 13852 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13853 local_iplt = *local_iplt_ptr;
13854 if (local_iplt != NULL)
13855 {
13856 struct elf_dyn_relocs *p;
13857
13858 if (local_iplt->root.refcount > 0)
13859 {
13860 elf32_arm_allocate_plt_entry (info, TRUE,
13861 &local_iplt->root,
13862 &local_iplt->arm);
13863 if (local_iplt->arm.noncall_refcount == 0)
13864 /* All references to the PLT are calls, so all
13865 non-call references can resolve directly to the
13866 run-time target. This means that the .got entry
13867 would be the same as the .igot.plt entry, so there's
13868 no point creating both. */
13869 *local_got = 0;
13870 }
13871 else
13872 {
13873 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13874 local_iplt->root.offset = (bfd_vma) -1;
13875 }
13876
13877 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13878 {
13879 asection *psrel;
13880
13881 psrel = elf_section_data (p->sec)->sreloc;
13882 if (local_iplt->arm.noncall_refcount == 0)
13883 elf32_arm_allocate_irelocs (info, psrel, p->count);
13884 else
13885 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13886 }
13887 }
5e681ec4
PB		 13888 if (*local_got > 0)
13889 {
34e77a92
RS		 13890 Elf_Internal_Sym *isym;
13891
eea6121a 13892 *local_got = s->size;
ba93b8ac
DJ		 13893 if (*local_tls_type & GOT_TLS_GD)
13894 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13895 s->size += 8;
0855e32b
NS		 13896 if (*local_tls_type & GOT_TLS_GDESC)
13897 {
13898 *local_tlsdesc_gotent = htab->root.sgotplt->size
13899 - elf32_arm_compute_jump_table_size (htab);
13900 htab->root.sgotplt->size += 8;
13901 *local_got = (bfd_vma) -2;
34e77a92 13902 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13903 reloc in the middle of .got.plt. */
99059e56 13904 htab->num_tls_desc++;
0855e32b 13905 }
ba93b8ac
DJ		 13906 if (*local_tls_type & GOT_TLS_IE)
13907 s->size += 4;
ba93b8ac 13908
0855e32b
NS		 13909 if (*local_tls_type & GOT_NORMAL)
13910 {
13911 /* If the symbol is both GD and GDESC, *local_got
13912 may have been overwritten. */
13913 *local_got = s->size;
13914 s->size += 4;
13915 }
13916
34e77a92
RS		 13917 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13918 if (isym == NULL)
13919 return FALSE;
13920
13921 /* If all references to an STT_GNU_IFUNC PLT are calls,
13922 then all non-call references, including this GOT entry,
13923 resolve directly to the run-time target. */
13924 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13925 && (local_iplt == NULL
13926 || local_iplt->arm.noncall_refcount == 0))
13927 elf32_arm_allocate_irelocs (info, srel, 1);
3064e1ff 13928 else if (info->shared || output_bfd->flags & DYNAMIC)
0855e32b 13929 {
3064e1ff
JB		 13930 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13931 || *local_tls_type & GOT_TLS_GD)
13932 elf32_arm_allocate_dynrelocs (info, srel, 1);
99059e56 13933
3064e1ff
JB		 13934 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13935 {
13936 elf32_arm_allocate_dynrelocs (info,
13937 htab->root.srelplt, 1);
13938 htab->tls_trampoline = -1;
13939 }
0855e32b 13940 }
5e681ec4
PB		 13941 }
13942 else
13943 *local_got = (bfd_vma) -1;
13944 }
252b5132
RH		 13945 }
13946
ba93b8ac
DJ		 13947 if (htab->tls_ldm_got.refcount > 0)
13948 {
13949 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13950 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13951 htab->tls_ldm_got.offset = htab->root.sgot->size;
13952 htab->root.sgot->size += 8;
ba93b8ac 13953 if (info->shared)
47beaa6a 13954 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13955 }
13956 else
13957 htab->tls_ldm_got.offset = -1;
13958
5e681ec4
PB		 13959 /* Allocate global sym .plt and .got entries, and space for global
13960 sym dynamic relocs. */
47beaa6a 13961 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13962
d504ffc8 13963 /* Here we rummage through the found bfds to collect glue information. */
c72f2fb2 13964 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
c7b8f16e 13965 {
0ffa91dd 13966 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13967 continue;
13968
c7b8f16e
JB		 13969 /* Initialise mapping tables for code/data. */
13970 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13971
c7b8f16e
JB		 13972 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13973 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
99059e56
RM		 13974 /* xgettext:c-format */
13975 _bfd_error_handler (_("Errors encountered processing file %s"),
c7b8f16e
JB		 13976 ibfd->filename);
13977 }
d504ffc8 13978
3e6b1042
DJ		 13979 /* Allocate space for the glue sections now that we've sized them. */
13980 bfd_elf32_arm_allocate_interworking_sections (info);
13981
0855e32b
NS		 13982 /* For every jump slot reserved in the sgotplt, reloc_count is
13983 incremented. However, when we reserve space for TLS descriptors,
13984 it's not incremented, so in order to compute the space reserved
13985 for them, it suffices to multiply the reloc count by the jump
13986 slot size. */
13987 if (htab->root.srelplt)
13988 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13989
13990 if (htab->tls_trampoline)
13991 {
13992 if (htab->root.splt->size == 0)
13993 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13994
0855e32b
NS		 13995 htab->tls_trampoline = htab->root.splt->size;
13996 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13997
0855e32b 13998 /* If we're not using lazy TLS relocations, don't generate the
99059e56 13999 PLT and GOT entries they require. */
0855e32b
NS		 14000 if (!(info->flags & DF_BIND_NOW))
14001 {
14002 htab->dt_tlsdesc_got = htab->root.sgot->size;
14003 htab->root.sgot->size += 4;
14004
14005 htab->dt_tlsdesc_plt = htab->root.splt->size;
14006 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14007 }
14008 }
14009
252b5132
RH		 14010 /* The check_relocs and adjust_dynamic_symbol entry points have
14011 determined the sizes of the various dynamic sections. Allocate
14012 memory for them. */
b34976b6
AM		 14013 plt = FALSE;
14014 relocs = FALSE;
252b5132
RH		 14015 for (s = dynobj->sections; s != NULL; s = s->next)
14016 {
14017 const char * name;
252b5132
RH		 14018
14019 if ((s->flags & SEC_LINKER_CREATED) == 0)
14020 continue;
14021
14022 /* It's OK to base decisions on the section name, because none
14023 of the dynobj section names depend upon the input files. */
14024 name = bfd_get_section_name (dynobj, s);
14025
34e77a92 14026 if (s == htab->root.splt)
252b5132 14027 {
c456f082
AM		 14028 /* Remember whether there is a PLT. */
14029 plt = s->size != 0;
252b5132 14030 }
0112cd26 14031 else if (CONST_STRNEQ (name, ".rel"))
252b5132 14032 {
c456f082 14033 if (s->size != 0)
252b5132 14034 {
252b5132 14035 /* Remember whether there are any reloc sections other
00a97672 14036 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 14037 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 14038 relocs = TRUE;
252b5132
RH		 14039
14040 /* We use the reloc_count field as a counter if we need
14041 to copy relocs into the output file. */
14042 s->reloc_count = 0;
14043 }
14044 }
34e77a92
RS		 14045 else if (s != htab->root.sgot
14046 && s != htab->root.sgotplt
14047 && s != htab->root.iplt
14048 && s != htab->root.igotplt
14049 && s != htab->sdynbss)
252b5132
RH		 14050 {
14051 /* It's not one of our sections, so don't allocate space. */
14052 continue;
14053 }
14054
c456f082 14055 if (s->size == 0)
252b5132 14056 {
c456f082 14057 /* If we don't need this section, strip it from the
00a97672
RS		 14058 output file. This is mostly to handle .rel(a).bss and
14059 .rel(a).plt. We must create both sections in
c456f082
AM		 14060 create_dynamic_sections, because they must be created
14061 before the linker maps input sections to output
14062 sections. The linker does that before
14063 adjust_dynamic_symbol is called, and it is that
14064 function which decides whether anything needs to go
14065 into these sections. */
8423293d 14066 s->flags |= SEC_EXCLUDE;
252b5132
RH		 14067 continue;
14068 }
14069
c456f082
AM		 14070 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14071 continue;
14072
252b5132 14073 /* Allocate memory for the section contents. */
21d799b5 14074 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 14075 if (s->contents == NULL)
b34976b6 14076 return FALSE;
252b5132
RH		 14077 }
14078
14079 if (elf_hash_table (info)->dynamic_sections_created)
14080 {
14081 /* Add some entries to the .dynamic section. We fill in the
14082 values later, in elf32_arm_finish_dynamic_sections, but we
14083 must add the entries now so that we get the correct size for
14084 the .dynamic section. The DT_DEBUG entry is filled in by the
14085 dynamic linker and used by the debugger. */
dc810e39 14086#define add_dynamic_entry(TAG, VAL) \
5a580b3a 14087 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 14088
8532796c 14089 if (info->executable)
252b5132 14090 {
dc810e39 14091 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 14092 return FALSE;
252b5132
RH		 14093 }
14094
14095 if (plt)
14096 {
dc810e39
AM		 14097 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14098 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 14099 || !add_dynamic_entry (DT_PLTREL,
14100 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 14101 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 14102 return FALSE;
0855e32b
NS		 14103
14104 if (htab->dt_tlsdesc_plt &&
b38cadfb 14105 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 14106 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 14107 return FALSE;
252b5132
RH		 14108 }
14109
14110 if (relocs)
14111 {
00a97672
RS		 14112 if (htab->use_rel)
14113 {
14114 if (!add_dynamic_entry (DT_REL, 0)
14115 || !add_dynamic_entry (DT_RELSZ, 0)
14116 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14117 return FALSE;
14118 }
14119 else
14120 {
14121 if (!add_dynamic_entry (DT_RELA, 0)
14122 || !add_dynamic_entry (DT_RELASZ, 0)
14123 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14124 return FALSE;
14125 }
252b5132
RH		 14126 }
14127
08d1f311
DJ		 14128 /* If any dynamic relocs apply to a read-only section,
14129 then we need a DT_TEXTREL entry. */
14130 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 14131 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14132 info);
08d1f311 14133
99e4ae17 14134 if ((info->flags & DF_TEXTREL) != 0)
252b5132 14135 {
dc810e39 14136 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 14137 return FALSE;
252b5132 14138 }
7a2b07ff
NS		 14139 if (htab->vxworks_p
14140 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14141 return FALSE;
252b5132 14142 }
8532796c 14143#undef add_dynamic_entry
252b5132 14144
b34976b6 14145 return TRUE;
252b5132
RH		 14146}
14147
0855e32b
NS		 14148/* Size sections even though they're not dynamic. We use it to setup
14149 _TLS_MODULE_BASE_, if needed. */
14150
14151static bfd_boolean
14152elf32_arm_always_size_sections (bfd *output_bfd,
99059e56 14153 struct bfd_link_info *info)
0855e32b
NS		 14154{
14155 asection *tls_sec;
14156
14157 if (info->relocatable)
14158 return TRUE;
14159
14160 tls_sec = elf_hash_table (info)->tls_sec;
14161
14162 if (tls_sec)
14163 {
14164 struct elf_link_hash_entry *tlsbase;
14165
14166 tlsbase = elf_link_hash_lookup
14167 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14168
14169 if (tlsbase)
99059e56
RM		 14170 {
14171 struct bfd_link_hash_entry *bh = NULL;
0855e32b 14172 const struct elf_backend_data *bed
99059e56 14173 = get_elf_backend_data (output_bfd);
0855e32b 14174
99059e56 14175 if (!(_bfd_generic_link_add_one_symbol
0855e32b
NS		 14176 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14177 tls_sec, 0, NULL, FALSE,
14178 bed->collect, &bh)))
14179 return FALSE;
b38cadfb 14180
99059e56
RM		 14181 tlsbase->type = STT_TLS;
14182 tlsbase = (struct elf_link_hash_entry *)bh;
14183 tlsbase->def_regular = 1;
14184 tlsbase->other = STV_HIDDEN;
14185 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
0855e32b
NS		 14186 }
14187 }
14188 return TRUE;
14189}
14190
252b5132
RH		 14191/* Finish up dynamic symbol handling. We set the contents of various
14192 dynamic sections here. */
14193
b34976b6 14194static bfd_boolean
906e58ca
NC		 14195elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14196 struct bfd_link_info * info,
14197 struct elf_link_hash_entry * h,
14198 Elf_Internal_Sym * sym)
252b5132 14199{
e5a52504 14200 struct elf32_arm_link_hash_table *htab;
b7693d02 14201 struct elf32_arm_link_hash_entry *eh;
252b5132 14202
e5a52504 14203 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14204 if (htab == NULL)
14205 return FALSE;
14206
b7693d02 14207 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 14208
14209 if (h->plt.offset != (bfd_vma) -1)
14210 {
34e77a92 14211 if (!eh->is_iplt)
e5a52504 14212 {
34e77a92 14213 BFD_ASSERT (h->dynindx != -1);
57460bcf
NC		 14214 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14215 h->dynindx, 0))
14216 return FALSE;
e5a52504 14217 }
57e8b36a 14218
f5385ebf 14219 if (!h->def_regular)
252b5132
RH		 14220 {
14221 /* Mark the symbol as undefined, rather than as defined in
14222 the .plt section. Leave the value alone. */
14223 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 14224 /* If the symbol is weak, we do need to clear the value.
14225 Otherwise, the PLT entry would provide a definition for
14226 the symbol even if the symbol wasn't defined anywhere,
14227 and so the symbol would never be NULL. */
97323ad1 14228 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
d982ba73 14229 sym->st_value = 0;
252b5132 14230 }
34e77a92
RS		 14231 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14232 {
14233 /* At least one non-call relocation references this .iplt entry,
14234 so the .iplt entry is the function's canonical address. */
14235 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14236 sym->st_target_internal = ST_BRANCH_TO_ARM;
14237 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14238 (output_bfd, htab->root.iplt->output_section));
14239 sym->st_value = (h->plt.offset
14240 + htab->root.iplt->output_section->vma
14241 + htab->root.iplt->output_offset);
14242 }
252b5132
RH		 14243 }
14244
f5385ebf 14245 if (h->needs_copy)
252b5132
RH		 14246 {
14247 asection * s;
947216bf 14248 Elf_Internal_Rela rel;
252b5132
RH		 14249
14250 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14251 BFD_ASSERT (h->dynindx != -1
14252 && (h->root.type == bfd_link_hash_defined
14253 || h->root.type == bfd_link_hash_defweak));
14254
362d30a1 14255 s = htab->srelbss;
252b5132
RH		 14256 BFD_ASSERT (s != NULL);
14257
00a97672 14258 rel.r_addend = 0;
252b5132
RH		 14259 rel.r_offset = (h->root.u.def.value
14260 + h->root.u.def.section->output_section->vma
14261 + h->root.u.def.section->output_offset);
14262 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14263 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14264 }
14265
00a97672
RS		 14266 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14267 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14268 to the ".got" section. */
9637f6ef 14269 if (h == htab->root.hdynamic
00a97672 14270 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14271 sym->st_shndx = SHN_ABS;
14272
b34976b6 14273 return TRUE;
252b5132
RH		 14274}
14275
0855e32b
NS		 14276static void
14277arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14278 void *contents,
14279 const unsigned long *template, unsigned count)
14280{
14281 unsigned ix;
b38cadfb 14282
0855e32b
NS		 14283 for (ix = 0; ix != count; ix++)
14284 {
14285 unsigned long insn = template[ix];
14286
14287 /* Emit mov pc,rx if bx is not permitted. */
14288 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14289 insn = (insn & 0xf000000f) | 0x01a0f000;
14290 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14291 }
14292}
14293
99059e56
RM		 14294/* Install the special first PLT entry for elf32-arm-nacl. Unlike
14295 other variants, NaCl needs this entry in a static executable's
14296 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14297 zero. For .iplt really only the last bundle is useful, and .iplt
14298 could have a shorter first entry, with each individual PLT entry's
14299 relative branch calculated differently so it targets the last
14300 bundle instead of the instruction before it (labelled .Lplt_tail
14301 above). But it's simpler to keep the size and layout of PLT0
14302 consistent with the dynamic case, at the cost of some dead code at
14303 the start of .iplt and the one dead store to the stack at the start
14304 of .Lplt_tail. */
14305static void
14306arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14307 asection *plt, bfd_vma got_displacement)
14308{
14309 unsigned int i;
14310
14311 put_arm_insn (htab, output_bfd,
14312 elf32_arm_nacl_plt0_entry[0]
14313 | arm_movw_immediate (got_displacement),
14314 plt->contents + 0);
14315 put_arm_insn (htab, output_bfd,
14316 elf32_arm_nacl_plt0_entry[1]
14317 | arm_movt_immediate (got_displacement),
14318 plt->contents + 4);
14319
14320 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14321 put_arm_insn (htab, output_bfd,
14322 elf32_arm_nacl_plt0_entry[i],
14323 plt->contents + (i * 4));
14324}
14325
252b5132
RH		 14326/* Finish up the dynamic sections. */
14327
b34976b6 14328static bfd_boolean
57e8b36a 14329elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14330{
14331 bfd * dynobj;
14332 asection * sgot;
14333 asection * sdyn;
4dfe6ac6
NC		 14334 struct elf32_arm_link_hash_table *htab;
14335
14336 htab = elf32_arm_hash_table (info);
14337 if (htab == NULL)
14338 return FALSE;
252b5132
RH		 14339
14340 dynobj = elf_hash_table (info)->dynobj;
14341
362d30a1 14342 sgot = htab->root.sgotplt;
894891db
NC		 14343 /* A broken linker script might have discarded the dynamic sections.
14344 Catch this here so that we do not seg-fault later on. */
14345 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14346 return FALSE;
3d4d4302 14347 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14348
14349 if (elf_hash_table (info)->dynamic_sections_created)
14350 {
14351 asection *splt;
14352 Elf32_External_Dyn *dyncon, *dynconend;
14353
362d30a1 14354 splt = htab->root.splt;
24a1ba0f 14355 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14356 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14357
14358 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14359 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14360
252b5132
RH		 14361 for (; dyncon < dynconend; dyncon++)
14362 {
14363 Elf_Internal_Dyn dyn;
14364 const char * name;
14365 asection * s;
14366
14367 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14368
14369 switch (dyn.d_tag)
14370 {
229fcec5
MM		 14371 unsigned int type;
14372
252b5132 14373 default:
7a2b07ff
NS		 14374 if (htab->vxworks_p
14375 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14376 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14377 break;
14378
229fcec5
MM		 14379 case DT_HASH:
14380 name = ".hash";
14381 goto get_vma_if_bpabi;
14382 case DT_STRTAB:
14383 name = ".dynstr";
14384 goto get_vma_if_bpabi;
14385 case DT_SYMTAB:
14386 name = ".dynsym";
14387 goto get_vma_if_bpabi;
c0042f5d
MM		 14388 case DT_VERSYM:
14389 name = ".gnu.version";
14390 goto get_vma_if_bpabi;
14391 case DT_VERDEF:
14392 name = ".gnu.version_d";
14393 goto get_vma_if_bpabi;
14394 case DT_VERNEED:
14395 name = ".gnu.version_r";
14396 goto get_vma_if_bpabi;
14397
252b5132
RH		 14398 case DT_PLTGOT:
14399 name = ".got";
14400 goto get_vma;
14401 case DT_JMPREL:
00a97672 14402 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14403 get_vma:
14404 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14405 if (s == NULL)
14406 {
14407 /* PR ld/14397: Issue an error message if a required section is missing. */
14408 (*_bfd_error_handler)
14409 (_("error: required section '%s' not found in the linker script"), name);
14410 bfd_set_error (bfd_error_invalid_operation);
14411 return FALSE;
14412 }
229fcec5
MM		 14413 if (!htab->symbian_p)
14414 dyn.d_un.d_ptr = s->vma;
14415 else
14416 /* In the BPABI, tags in the PT_DYNAMIC section point
14417 at the file offset, not the memory address, for the
14418 convenience of the post linker. */
14419 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14420 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14421 break;
14422
229fcec5
MM		 14423 get_vma_if_bpabi:
14424 if (htab->symbian_p)
14425 goto get_vma;
14426 break;
14427
252b5132 14428 case DT_PLTRELSZ:
362d30a1 14429 s = htab->root.srelplt;
252b5132 14430 BFD_ASSERT (s != NULL);
eea6121a 14431 dyn.d_un.d_val = s->size;
252b5132
RH		 14432 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14433 break;
906e58ca 14434
252b5132 14435 case DT_RELSZ:
00a97672 14436 case DT_RELASZ:
229fcec5
MM		 14437 if (!htab->symbian_p)
14438 {
14439 /* My reading of the SVR4 ABI indicates that the
14440 procedure linkage table relocs (DT_JMPREL) should be
14441 included in the overall relocs (DT_REL). This is
14442 what Solaris does. However, UnixWare can not handle
14443 that case. Therefore, we override the DT_RELSZ entry
14444 here to make it not include the JMPREL relocs. Since
00a97672 14445 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14446 other relocation sections, we don't have to worry
14447 about changing the DT_REL entry. */
362d30a1 14448 s = htab->root.srelplt;
229fcec5
MM		 14449 if (s != NULL)
14450 dyn.d_un.d_val -= s->size;
14451 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14452 break;
14453 }
8029a119 14454 /* Fall through. */
229fcec5
MM		 14455
14456 case DT_REL:
14457 case DT_RELA:
229fcec5
MM		 14458 /* In the BPABI, the DT_REL tag must point at the file
14459 offset, not the VMA, of the first relocation
14460 section. So, we use code similar to that in
14461 elflink.c, but do not check for SHF_ALLOC on the
14462 relcoation section, since relocations sections are
14463 never allocated under the BPABI. The comments above
14464 about Unixware notwithstanding, we include all of the
14465 relocations here. */
14466 if (htab->symbian_p)
14467 {
14468 unsigned int i;
14469 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14470 ? SHT_REL : SHT_RELA);
14471 dyn.d_un.d_val = 0;
14472 for (i = 1; i < elf_numsections (output_bfd); i++)
14473 {
906e58ca 14474 Elf_Internal_Shdr *hdr
229fcec5
MM		 14475 = elf_elfsections (output_bfd)[i];
14476 if (hdr->sh_type == type)
14477 {
906e58ca 14478 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14479 || dyn.d_tag == DT_RELASZ)
14480 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14481 else if ((ufile_ptr) hdr->sh_offset
14482 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14483 dyn.d_un.d_val = hdr->sh_offset;
14484 }
14485 }
14486 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14487 }
252b5132 14488 break;
88f7bcd5 14489
0855e32b 14490 case DT_TLSDESC_PLT:
99059e56 14491 s = htab->root.splt;
0855e32b
NS		 14492 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14493 + htab->dt_tlsdesc_plt);
14494 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14495 break;
14496
14497 case DT_TLSDESC_GOT:
99059e56 14498 s = htab->root.sgot;
0855e32b 14499 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
99059e56 14500 + htab->dt_tlsdesc_got);
0855e32b
NS		 14501 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14502 break;
14503
88f7bcd5
NC		 14504 /* Set the bottom bit of DT_INIT/FINI if the
14505 corresponding function is Thumb. */
14506 case DT_INIT:
14507 name = info->init_function;
14508 goto get_sym;
14509 case DT_FINI:
14510 name = info->fini_function;
14511 get_sym:
14512 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14513 then there is nothing to adjust. */
88f7bcd5
NC		 14514 if (dyn.d_un.d_val != 0)
14515 {
14516 struct elf_link_hash_entry * eh;
14517
14518 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14519 FALSE, FALSE, TRUE);
35fc36a8 14520 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14521 {
14522 dyn.d_un.d_val |= 1;
b34976b6 14523 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14524 }
14525 }
14526 break;
252b5132
RH		 14527 }
14528 }
14529
24a1ba0f 14530 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14531 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14532 {
00a97672
RS		 14533 const bfd_vma *plt0_entry;
14534 bfd_vma got_address, plt_address, got_displacement;
14535
14536 /* Calculate the addresses of the GOT and PLT. */
14537 got_address = sgot->output_section->vma + sgot->output_offset;
14538 plt_address = splt->output_section->vma + splt->output_offset;
14539
14540 if (htab->vxworks_p)
14541 {
14542 /* The VxWorks GOT is relocated by the dynamic linker.
14543 Therefore, we must emit relocations rather than simply
14544 computing the values now. */
14545 Elf_Internal_Rela rel;
14546
14547 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14548 put_arm_insn (htab, output_bfd, plt0_entry[0],
14549 splt->contents + 0);
14550 put_arm_insn (htab, output_bfd, plt0_entry[1],
14551 splt->contents + 4);
14552 put_arm_insn (htab, output_bfd, plt0_entry[2],
14553 splt->contents + 8);
00a97672
RS		 14554 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14555
8029a119 14556 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14557 rel.r_offset = plt_address + 12;
14558 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14559 rel.r_addend = 0;
14560 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14561 htab->srelplt2->contents);
14562 }
b38cadfb 14563 else if (htab->nacl_p)
99059e56
RM		 14564 arm_nacl_put_plt0 (htab, output_bfd, splt,
14565 got_address + 8 - (plt_address + 16));
eed94f8f
NC		 14566 else if (using_thumb_only (htab))
14567 {
14568 got_displacement = got_address - (plt_address + 12);
14569
14570 plt0_entry = elf32_thumb2_plt0_entry;
14571 put_arm_insn (htab, output_bfd, plt0_entry[0],
14572 splt->contents + 0);
14573 put_arm_insn (htab, output_bfd, plt0_entry[1],
14574 splt->contents + 4);
14575 put_arm_insn (htab, output_bfd, plt0_entry[2],
14576 splt->contents + 8);
14577
14578 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
14579 }
00a97672
RS		 14580 else
14581 {
14582 got_displacement = got_address - (plt_address + 16);
14583
14584 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14585 put_arm_insn (htab, output_bfd, plt0_entry[0],
14586 splt->contents + 0);
14587 put_arm_insn (htab, output_bfd, plt0_entry[1],
14588 splt->contents + 4);
14589 put_arm_insn (htab, output_bfd, plt0_entry[2],
14590 splt->contents + 8);
14591 put_arm_insn (htab, output_bfd, plt0_entry[3],
14592 splt->contents + 12);
5e681ec4 14593
5e681ec4 14594#ifdef FOUR_WORD_PLT
00a97672
RS		 14595 /* The displacement value goes in the otherwise-unused
14596 last word of the second entry. */
14597 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14598#else
00a97672 14599 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14600#endif
00a97672 14601 }
f7a74f8c 14602 }
252b5132
RH		 14603
14604 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14605 really seem like the right value. */
74541ad4
AM		 14606 if (splt->output_section->owner == output_bfd)
14607 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14608
0855e32b
NS		 14609 if (htab->dt_tlsdesc_plt)
14610 {
14611 bfd_vma got_address
14612 = sgot->output_section->vma + sgot->output_offset;
14613 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14614 + htab->root.sgot->output_offset);
14615 bfd_vma plt_address
14616 = splt->output_section->vma + splt->output_offset;
14617
b38cadfb 14618 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14619 splt->contents + htab->dt_tlsdesc_plt,
14620 dl_tlsdesc_lazy_trampoline, 6);
14621
14622 bfd_put_32 (output_bfd,
14623 gotplt_address + htab->dt_tlsdesc_got
14624 - (plt_address + htab->dt_tlsdesc_plt)
14625 - dl_tlsdesc_lazy_trampoline[6],
14626 splt->contents + htab->dt_tlsdesc_plt + 24);
14627 bfd_put_32 (output_bfd,
14628 got_address - (plt_address + htab->dt_tlsdesc_plt)
14629 - dl_tlsdesc_lazy_trampoline[7],
14630 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14631 }
14632
14633 if (htab->tls_trampoline)
14634 {
b38cadfb 14635 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14636 splt->contents + htab->tls_trampoline,
14637 tls_trampoline, 3);
14638#ifdef FOUR_WORD_PLT
14639 bfd_put_32 (output_bfd, 0x00000000,
14640 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14641#endif
0855e32b
NS		 14642 }
14643
362d30a1 14644 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14645 {
14646 /* Correct the .rel(a).plt.unloaded relocations. They will have
14647 incorrect symbol indexes. */
14648 int num_plts;
eed62c48 14649 unsigned char *p;
00a97672 14650
362d30a1 14651 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14652 / htab->plt_entry_size);
14653 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14654
14655 for (; num_plts; num_plts--)
14656 {
14657 Elf_Internal_Rela rel;
14658
14659 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14660 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14661 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14662 p += RELOC_SIZE (htab);
14663
14664 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14665 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14666 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14667 p += RELOC_SIZE (htab);
14668 }
14669 }
252b5132
RH		 14670 }
14671
99059e56
RM		 14672 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14673 /* NaCl uses a special first entry in .iplt too. */
14674 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14675
252b5132 14676 /* Fill in the first three entries in the global offset table. */
229fcec5 14677 if (sgot)
252b5132 14678 {
229fcec5
MM		 14679 if (sgot->size > 0)
14680 {
14681 if (sdyn == NULL)
14682 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14683 else
14684 bfd_put_32 (output_bfd,
14685 sdyn->output_section->vma + sdyn->output_offset,
14686 sgot->contents);
14687 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14688 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14689 }
252b5132 14690
229fcec5
MM		 14691 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14692 }
252b5132 14693
b34976b6 14694 return TRUE;
252b5132
RH		 14695}
14696
ba96a88f 14697static void
57e8b36a 14698elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14699{
9b485d32 14700 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14701 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14702
14703 i_ehdrp = elf_elfheader (abfd);
14704
94a3258f
PB		 14705 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14706 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14707 else
7394f108 14708 _bfd_elf_post_process_headers (abfd, link_info);
ba96a88f 14709 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14710
93204d3a
PB		 14711 if (link_info)
14712 {
14713 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14714 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14715 i_ehdrp->e_flags |= EF_ARM_BE8;
14716 }
3bfcb652
NC		 14717
14718 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14719 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14720 {
14721 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14722 if (abi)
14723 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14724 else
14725 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14726 }
ba96a88f
NC		 14727}
14728
99e4ae17 14729static enum elf_reloc_type_class
7e612e98
AM		 14730elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14731 const asection *rel_sec ATTRIBUTE_UNUSED,
14732 const Elf_Internal_Rela *rela)
99e4ae17 14733{
f51e552e 14734 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14735 {
14736 case R_ARM_RELATIVE:
14737 return reloc_class_relative;
14738 case R_ARM_JUMP_SLOT:
14739 return reloc_class_plt;
14740 case R_ARM_COPY:
14741 return reloc_class_copy;
14742 default:
14743 return reloc_class_normal;
14744 }
14745}
14746
e489d0ae 14747static void
57e8b36a 14748elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14749{
5a6c6817 14750 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14751}
14752
40a18ebd
NC		 14753/* Return TRUE if this is an unwinding table entry. */
14754
14755static bfd_boolean
14756is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14757{
0112cd26
NC		 14758 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14759 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14760}
14761
14762
14763/* Set the type and flags for an ARM section. We do this by
14764 the section name, which is a hack, but ought to work. */
14765
14766static bfd_boolean
14767elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14768{
14769 const char * name;
14770
14771 name = bfd_get_section_name (abfd, sec);
14772
14773 if (is_arm_elf_unwind_section_name (abfd, name))
14774 {
14775 hdr->sh_type = SHT_ARM_EXIDX;
14776 hdr->sh_flags |= SHF_LINK_ORDER;
14777 }
14778 return TRUE;
14779}
14780
6dc132d9
L		 14781/* Handle an ARM specific section when reading an object file. This is
14782 called when bfd_section_from_shdr finds a section with an unknown
14783 type. */
40a18ebd
NC		 14784
14785static bfd_boolean
14786elf32_arm_section_from_shdr (bfd *abfd,
14787 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14788 const char *name,
14789 int shindex)
40a18ebd
NC		 14790{
14791 /* There ought to be a place to keep ELF backend specific flags, but
14792 at the moment there isn't one. We just keep track of the
14793 sections by their name, instead. Fortunately, the ABI gives
14794 names for all the ARM specific sections, so we will probably get
14795 away with this. */
14796 switch (hdr->sh_type)
14797 {
14798 case SHT_ARM_EXIDX:
0951f019
RE		 14799 case SHT_ARM_PREEMPTMAP:
14800 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14801 break;
14802
14803 default:
14804 return FALSE;
14805 }
14806
6dc132d9 14807 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14808 return FALSE;
14809
14810 return TRUE;
14811}
e489d0ae 14812
44444f50
NC		 14813static _arm_elf_section_data *
14814get_arm_elf_section_data (asection * sec)
14815{
47b2e99c
JZ		 14816 if (sec && sec->owner && is_arm_elf (sec->owner))
14817 return elf32_arm_section_data (sec);
44444f50
NC		 14818 else
14819 return NULL;
8e3de13a
NC		 14820}
14821
4e617b1e
PB		 14822typedef struct
14823{
57402f1e 14824 void *flaginfo;
4e617b1e 14825 struct bfd_link_info *info;
91a5743d
PB		 14826 asection *sec;
14827 int sec_shndx;
6e0b88f1
AM		 14828 int (*func) (void *, const char *, Elf_Internal_Sym *,
14829 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14830} output_arch_syminfo;
14831
14832enum map_symbol_type
14833{
14834 ARM_MAP_ARM,
14835 ARM_MAP_THUMB,
14836 ARM_MAP_DATA
14837};
14838
14839
7413f23f 14840/* Output a single mapping symbol. */
4e617b1e
PB		 14841
14842static bfd_boolean
7413f23f
DJ		 14843elf32_arm_output_map_sym (output_arch_syminfo *osi,
14844 enum map_symbol_type type,
14845 bfd_vma offset)
4e617b1e
PB		 14846{
14847 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14848 Elf_Internal_Sym sym;
14849
91a5743d
PB		 14850 sym.st_value = osi->sec->output_section->vma
14851 + osi->sec->output_offset
14852 + offset;
4e617b1e
PB		 14853 sym.st_size = 0;
14854 sym.st_other = 0;
14855 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14856 sym.st_shndx = osi->sec_shndx;
35fc36a8 14857 sym.st_target_internal = 0;
fe33d2fa 14858 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14859 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14860}
14861
34e77a92
RS		 14862/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14863 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14864
14865static bfd_boolean
34e77a92
RS		 14866elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14867 bfd_boolean is_iplt_entry_p,
14868 union gotplt_union *root_plt,
14869 struct arm_plt_info *arm_plt)
4e617b1e 14870{
4e617b1e 14871 struct elf32_arm_link_hash_table *htab;
34e77a92 14872 bfd_vma addr, plt_header_size;
4e617b1e 14873
34e77a92 14874 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14875 return TRUE;
14876
4dfe6ac6
NC		 14877 htab = elf32_arm_hash_table (osi->info);
14878 if (htab == NULL)
14879 return FALSE;
14880
34e77a92
RS		 14881 if (is_iplt_entry_p)
14882 {
14883 osi->sec = htab->root.iplt;
14884 plt_header_size = 0;
14885 }
14886 else
14887 {
14888 osi->sec = htab->root.splt;
14889 plt_header_size = htab->plt_header_size;
14890 }
14891 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14892 (osi->info->output_bfd, osi->sec->output_section));
14893
14894 addr = root_plt->offset & -2;
4e617b1e
PB		 14895 if (htab->symbian_p)
14896 {
7413f23f 14897 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14898 return FALSE;
7413f23f 14899 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14900 return FALSE;
14901 }
14902 else if (htab->vxworks_p)
14903 {
7413f23f 14904 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14905 return FALSE;
7413f23f 14906 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14907 return FALSE;
7413f23f 14908 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14909 return FALSE;
7413f23f 14910 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14911 return FALSE;
14912 }
b38cadfb
NC		 14913 else if (htab->nacl_p)
14914 {
14915 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14916 return FALSE;
14917 }
eed94f8f
NC		 14918 else if (using_thumb_only (htab))
14919 {
14920 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
14921 return FALSE;
6a631e86 14922 }
4e617b1e
PB		 14923 else
14924 {
34e77a92 14925 bfd_boolean thumb_stub_p;
bd97cb95 14926
34e77a92
RS		 14927 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14928 if (thumb_stub_p)
4e617b1e 14929 {
7413f23f 14930 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14931 return FALSE;
14932 }
14933#ifdef FOUR_WORD_PLT
7413f23f 14934 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14935 return FALSE;
7413f23f 14936 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14937 return FALSE;
14938#else
906e58ca 14939 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14940 so only need to output a mapping symbol for the first PLT entry and
14941 entries with thumb thunks. */
34e77a92 14942 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14943 {
7413f23f 14944 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14945 return FALSE;
14946 }
14947#endif
14948 }
14949
14950 return TRUE;
14951}
14952
34e77a92
RS		 14953/* Output mapping symbols for PLT entries associated with H. */
14954
14955static bfd_boolean
14956elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14957{
14958 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14959 struct elf32_arm_link_hash_entry *eh;
14960
14961 if (h->root.type == bfd_link_hash_indirect)
14962 return TRUE;
14963
14964 if (h->root.type == bfd_link_hash_warning)
14965 /* When warning symbols are created, they **replace** the "real"
14966 entry in the hash table, thus we never get to see the real
14967 symbol in a hash traversal. So look at it now. */
14968 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14969
14970 eh = (struct elf32_arm_link_hash_entry *) h;
14971 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14972 &h->plt, &eh->plt);
14973}
14974
7413f23f
DJ		 14975/* Output a single local symbol for a generated stub. */
14976
14977static bfd_boolean
14978elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14979 bfd_vma offset, bfd_vma size)
14980{
7413f23f
DJ		 14981 Elf_Internal_Sym sym;
14982
7413f23f
DJ		 14983 sym.st_value = osi->sec->output_section->vma
14984 + osi->sec->output_offset
14985 + offset;
14986 sym.st_size = size;
14987 sym.st_other = 0;
14988 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14989 sym.st_shndx = osi->sec_shndx;
35fc36a8 14990 sym.st_target_internal = 0;
57402f1e 14991 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14992}
4e617b1e 14993
da5938a2 14994static bfd_boolean
8029a119
NC		 14995arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14996 void * in_arg)
da5938a2
NC		 14997{
14998 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14999 asection *stub_sec;
15000 bfd_vma addr;
7413f23f 15001 char *stub_name;
9a008db3 15002 output_arch_syminfo *osi;
d3ce72d0 15003 const insn_sequence *template_sequence;
461a49ca
DJ		 15004 enum stub_insn_type prev_type;
15005 int size;
15006 int i;
15007 enum map_symbol_type sym_type;
da5938a2
NC		 15008
15009 /* Massage our args to the form they really have. */
15010 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 15011 osi = (output_arch_syminfo *) in_arg;
da5938a2 15012
da5938a2
NC		 15013 stub_sec = stub_entry->stub_sec;
15014
15015 /* Ensure this stub is attached to the current section being
7413f23f 15016 processed. */
da5938a2
NC		 15017 if (stub_sec != osi->sec)
15018 return TRUE;
15019
7413f23f
DJ		 15020 addr = (bfd_vma) stub_entry->stub_offset;
15021 stub_name = stub_entry->output_name;
da5938a2 15022
d3ce72d0
NC		 15023 template_sequence = stub_entry->stub_template;
15024 switch (template_sequence[0].type)
7413f23f 15025 {
461a49ca
DJ		 15026 case ARM_TYPE:
15027 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 15028 return FALSE;
15029 break;
461a49ca 15030 case THUMB16_TYPE:
48229727 15031 case THUMB32_TYPE:
461a49ca
DJ		 15032 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15033 stub_entry->stub_size))
da5938a2
NC		 15034 return FALSE;
15035 break;
15036 default:
15037 BFD_FAIL ();
48229727 15038 return 0;
7413f23f 15039 }
da5938a2 15040
461a49ca
DJ		 15041 prev_type = DATA_TYPE;
15042 size = 0;
15043 for (i = 0; i < stub_entry->stub_template_size; i++)
15044 {
d3ce72d0 15045 switch (template_sequence[i].type)
461a49ca
DJ		 15046 {
15047 case ARM_TYPE:
15048 sym_type = ARM_MAP_ARM;
15049 break;
15050
15051 case THUMB16_TYPE:
48229727 15052 case THUMB32_TYPE:
461a49ca
DJ		 15053 sym_type = ARM_MAP_THUMB;
15054 break;
15055
15056 case DATA_TYPE:
15057 sym_type = ARM_MAP_DATA;
15058 break;
15059
15060 default:
15061 BFD_FAIL ();
4e31c731 15062 return FALSE;
461a49ca
DJ		 15063 }
15064
d3ce72d0 15065 if (template_sequence[i].type != prev_type)
461a49ca 15066 {
d3ce72d0 15067 prev_type = template_sequence[i].type;
461a49ca
DJ		 15068 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15069 return FALSE;
15070 }
15071
d3ce72d0 15072 switch (template_sequence[i].type)
461a49ca
DJ		 15073 {
15074 case ARM_TYPE:
48229727 15075 case THUMB32_TYPE:
461a49ca
DJ		 15076 size += 4;
15077 break;
15078
15079 case THUMB16_TYPE:
15080 size += 2;
15081 break;
15082
15083 case DATA_TYPE:
15084 size += 4;
15085 break;
15086
15087 default:
15088 BFD_FAIL ();
4e31c731 15089 return FALSE;
461a49ca
DJ		 15090 }
15091 }
15092
da5938a2
NC		 15093 return TRUE;
15094}
15095
33811162
DG		 15096/* Output mapping symbols for linker generated sections,
15097 and for those data-only sections that do not have a
15098 $d. */
4e617b1e
PB		 15099
15100static bfd_boolean
15101elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 15102 struct bfd_link_info *info,
57402f1e 15103 void *flaginfo,
6e0b88f1
AM		 15104 int (*func) (void *, const char *,
15105 Elf_Internal_Sym *,
15106 asection *,
15107 struct elf_link_hash_entry *))
4e617b1e
PB		 15108{
15109 output_arch_syminfo osi;
15110 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 15111 bfd_vma offset;
15112 bfd_size_type size;
33811162 15113 bfd *input_bfd;
4e617b1e
PB		 15114
15115 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 15116 if (htab == NULL)
15117 return FALSE;
15118
906e58ca 15119 check_use_blx (htab);
91a5743d 15120
57402f1e 15121 osi.flaginfo = flaginfo;
4e617b1e
PB		 15122 osi.info = info;
15123 osi.func = func;
906e58ca 15124
33811162
DG		 15125 /* Add a $d mapping symbol to data-only sections that
15126 don't have any mapping symbol. This may result in (harmless) redundant
15127 mapping symbols. */
15128 for (input_bfd = info->input_bfds;
15129 input_bfd != NULL;
c72f2fb2 15130 input_bfd = input_bfd->link.next)
33811162
DG		 15131 {
15132 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15133 for (osi.sec = input_bfd->sections;
15134 osi.sec != NULL;
15135 osi.sec = osi.sec->next)
15136 {
15137 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 15138 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15139 != 0)
33811162
DG		 15140 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15141 == SEC_HAS_CONTENTS
15142 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 15143 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 15144 && osi.sec->size > 0
15145 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 15146 {
15147 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15148 (output_bfd, osi.sec->output_section);
15149 if (osi.sec_shndx != (int)SHN_BAD)
15150 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15151 }
15152 }
15153 }
15154
91a5743d
PB		 15155 /* ARM->Thumb glue. */
15156 if (htab->arm_glue_size > 0)
15157 {
3d4d4302
AM		 15158 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15159 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 15160
15161 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15162 (output_bfd, osi.sec->output_section);
15163 if (info->shared || htab->root.is_relocatable_executable
15164 || htab->pic_veneer)
15165 size = ARM2THUMB_PIC_GLUE_SIZE;
15166 else if (htab->use_blx)
15167 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15168 else
15169 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 15170
91a5743d
PB		 15171 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15172 {
7413f23f
DJ		 15173 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15174 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 15175 }
15176 }
15177
15178 /* Thumb->ARM glue. */
15179 if (htab->thumb_glue_size > 0)
15180 {
3d4d4302
AM		 15181 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15182 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 15183
15184 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15185 (output_bfd, osi.sec->output_section);
15186 size = THUMB2ARM_GLUE_SIZE;
15187
15188 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15189 {
7413f23f
DJ		 15190 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15191 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 15192 }
15193 }
15194
845b51d6
PB		 15195 /* ARMv4 BX veneers. */
15196 if (htab->bx_glue_size > 0)
15197 {
3d4d4302
AM		 15198 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15199 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 15200
15201 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15202 (output_bfd, osi.sec->output_section);
15203
7413f23f 15204 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 15205 }
15206
8029a119
NC		 15207 /* Long calls stubs. */
15208 if (htab->stub_bfd && htab->stub_bfd->sections)
15209 {
da5938a2 15210 asection* stub_sec;
8029a119 15211
da5938a2
NC		 15212 for (stub_sec = htab->stub_bfd->sections;
15213 stub_sec != NULL;
8029a119
NC		 15214 stub_sec = stub_sec->next)
15215 {
15216 /* Ignore non-stub sections. */
15217 if (!strstr (stub_sec->name, STUB_SUFFIX))
15218 continue;
da5938a2 15219
8029a119 15220 osi.sec = stub_sec;
da5938a2 15221
8029a119
NC		 15222 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15223 (output_bfd, osi.sec->output_section);
da5938a2 15224
8029a119
NC		 15225 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15226 }
15227 }
da5938a2 15228
91a5743d 15229 /* Finally, output mapping symbols for the PLT. */
34e77a92 15230 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 15231 {
34e77a92
RS		 15232 osi.sec = htab->root.splt;
15233 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15234 (output_bfd, osi.sec->output_section));
15235
15236 /* Output mapping symbols for the plt header. SymbianOS does not have a
15237 plt header. */
15238 if (htab->vxworks_p)
15239 {
15240 /* VxWorks shared libraries have no PLT header. */
15241 if (!info->shared)
15242 {
15243 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15244 return FALSE;
15245 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15246 return FALSE;
15247 }
15248 }
b38cadfb
NC		 15249 else if (htab->nacl_p)
15250 {
15251 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15252 return FALSE;
15253 }
eed94f8f
NC		 15254 else if (using_thumb_only (htab))
15255 {
15256 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
15257 return FALSE;
15258 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15259 return FALSE;
15260 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
15261 return FALSE;
15262 }
34e77a92 15263 else if (!htab->symbian_p)
4e617b1e 15264 {
7413f23f 15265 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 15266 return FALSE;
34e77a92
RS		 15267#ifndef FOUR_WORD_PLT
15268 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 15269 return FALSE;
34e77a92 15270#endif
4e617b1e
PB		 15271 }
15272 }
99059e56
RM		 15273 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15274 {
15275 /* NaCl uses a special first entry in .iplt too. */
15276 osi.sec = htab->root.iplt;
15277 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15278 (output_bfd, osi.sec->output_section));
15279 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15280 return FALSE;
15281 }
34e77a92
RS		 15282 if ((htab->root.splt && htab->root.splt->size > 0)
15283 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 15284 {
34e77a92
RS		 15285 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15286 for (input_bfd = info->input_bfds;
15287 input_bfd != NULL;
c72f2fb2 15288 input_bfd = input_bfd->link.next)
34e77a92
RS		 15289 {
15290 struct arm_local_iplt_info **local_iplt;
15291 unsigned int i, num_syms;
4e617b1e 15292
34e77a92
RS		 15293 local_iplt = elf32_arm_local_iplt (input_bfd);
15294 if (local_iplt != NULL)
15295 {
15296 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15297 for (i = 0; i < num_syms; i++)
15298 if (local_iplt[i] != NULL
15299 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15300 &local_iplt[i]->root,
15301 &local_iplt[i]->arm))
15302 return FALSE;
15303 }
15304 }
15305 }
0855e32b
NS		 15306 if (htab->dt_tlsdesc_plt != 0)
15307 {
15308 /* Mapping symbols for the lazy tls trampoline. */
15309 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15310 return FALSE;
b38cadfb 15311
0855e32b
NS		 15312 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15313 htab->dt_tlsdesc_plt + 24))
15314 return FALSE;
15315 }
15316 if (htab->tls_trampoline != 0)
15317 {
15318 /* Mapping symbols for the tls trampoline. */
15319 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15320 return FALSE;
15321#ifdef FOUR_WORD_PLT
15322 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15323 htab->tls_trampoline + 12))
15324 return FALSE;
b38cadfb 15325#endif
0855e32b 15326 }
b38cadfb 15327
4e617b1e
PB		 15328 return TRUE;
15329}
15330
e489d0ae
PB		 15331/* Allocate target specific section data. */
15332
15333static bfd_boolean
15334elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15335{
f592407e
AM		 15336 if (!sec->used_by_bfd)
15337 {
15338 _arm_elf_section_data *sdata;
15339 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15340
21d799b5 15341 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15342 if (sdata == NULL)
15343 return FALSE;
15344 sec->used_by_bfd = sdata;
15345 }
e489d0ae
PB		 15346
15347 return _bfd_elf_new_section_hook (abfd, sec);
15348}
15349
15350
15351/* Used to order a list of mapping symbols by address. */
15352
15353static int
15354elf32_arm_compare_mapping (const void * a, const void * b)
15355{
7f6a71ff
JM		 15356 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15357 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15358
15359 if (amap->vma > bmap->vma)
15360 return 1;
15361 else if (amap->vma < bmap->vma)
15362 return -1;
15363 else if (amap->type > bmap->type)
15364 /* Ensure results do not depend on the host qsort for objects with
15365 multiple mapping symbols at the same address by sorting on type
15366 after vma. */
15367 return 1;
15368 else if (amap->type < bmap->type)
15369 return -1;
15370 else
15371 return 0;
e489d0ae
PB		 15372}
15373
2468f9c9
PB		 15374/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15375
15376static unsigned long
15377offset_prel31 (unsigned long addr, bfd_vma offset)
15378{
15379 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15380}
15381
15382/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15383 relocations. */
15384
15385static void
15386copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15387{
15388 unsigned long first_word = bfd_get_32 (output_bfd, from);
15389 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15390
2468f9c9
PB		 15391 /* High bit of first word is supposed to be zero. */
15392 if ((first_word & 0x80000000ul) == 0)
15393 first_word = offset_prel31 (first_word, offset);
b38cadfb 15394
2468f9c9
PB		 15395 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15396 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15397 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15398 second_word = offset_prel31 (second_word, offset);
b38cadfb 15399
2468f9c9
PB		 15400 bfd_put_32 (output_bfd, first_word, to);
15401 bfd_put_32 (output_bfd, second_word, to + 4);
15402}
e489d0ae 15403
48229727
JB		 15404/* Data for make_branch_to_a8_stub(). */
15405
b38cadfb
NC		 15406struct a8_branch_to_stub_data
15407{
48229727
JB		 15408 asection *writing_section;
15409 bfd_byte *contents;
15410};
15411
15412
15413/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15414 places for a particular section. */
15415
15416static bfd_boolean
15417make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
99059e56 15418 void *in_arg)
48229727
JB		 15419{
15420 struct elf32_arm_stub_hash_entry *stub_entry;
15421 struct a8_branch_to_stub_data *data;
15422 bfd_byte *contents;
15423 unsigned long branch_insn;
15424 bfd_vma veneered_insn_loc, veneer_entry_loc;
15425 bfd_signed_vma branch_offset;
15426 bfd *abfd;
91d6fa6a 15427 unsigned int target;
48229727
JB		 15428
15429 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15430 data = (struct a8_branch_to_stub_data *) in_arg;
15431
15432 if (stub_entry->target_section != data->writing_section
4563a860 15433 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15434 return TRUE;
15435
15436 contents = data->contents;
15437
15438 veneered_insn_loc = stub_entry->target_section->output_section->vma
15439 + stub_entry->target_section->output_offset
15440 + stub_entry->target_value;
15441
15442 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15443 + stub_entry->stub_sec->output_offset
15444 + stub_entry->stub_offset;
15445
15446 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15447 veneered_insn_loc &= ~3u;
15448
15449 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15450
15451 abfd = stub_entry->target_section->owner;
91d6fa6a 15452 target = stub_entry->target_value;
48229727
JB		 15453
15454 /* We attempt to avoid this condition by setting stubs_always_after_branch
15455 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15456 This check is just to be on the safe side... */
15457 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15458 {
15459 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15460 "allocated in unsafe location"), abfd);
15461 return FALSE;
15462 }
15463
15464 switch (stub_entry->stub_type)
15465 {
15466 case arm_stub_a8_veneer_b:
15467 case arm_stub_a8_veneer_b_cond:
15468 branch_insn = 0xf0009000;
15469 goto jump24;
15470
15471 case arm_stub_a8_veneer_blx:
15472 branch_insn = 0xf000e800;
15473 goto jump24;
15474
15475 case arm_stub_a8_veneer_bl:
15476 {
15477 unsigned int i1, j1, i2, j2, s;
15478
15479 branch_insn = 0xf000d000;
15480
15481 jump24:
15482 if (branch_offset < -16777216 || branch_offset > 16777214)
15483 {
15484 /* There's not much we can do apart from complain if this
15485 happens. */
15486 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15487 "of range (input file too large)"), abfd);
15488 return FALSE;
15489 }
15490
15491 /* i1 = not(j1 eor s), so:
15492 not i1 = j1 eor s
15493 j1 = (not i1) eor s. */
15494
15495 branch_insn |= (branch_offset >> 1) & 0x7ff;
15496 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15497 i2 = (branch_offset >> 22) & 1;
15498 i1 = (branch_offset >> 23) & 1;
15499 s = (branch_offset >> 24) & 1;
15500 j1 = (!i1) ^ s;
15501 j2 = (!i2) ^ s;
15502 branch_insn |= j2 << 11;
15503 branch_insn |= j1 << 13;
15504 branch_insn |= s << 26;
15505 }
15506 break;
15507
15508 default:
15509 BFD_FAIL ();
15510 return FALSE;
15511 }
15512
91d6fa6a
NC		 15513 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15514 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15515
15516 return TRUE;
15517}
15518
e489d0ae
PB		 15519/* Do code byteswapping. Return FALSE afterwards so that the section is
15520 written out as normal. */
15521
15522static bfd_boolean
c7b8f16e 15523elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15524 struct bfd_link_info *link_info,
15525 asection *sec,
e489d0ae
PB		 15526 bfd_byte *contents)
15527{
48229727 15528 unsigned int mapcount, errcount;
8e3de13a 15529 _arm_elf_section_data *arm_data;
c7b8f16e 15530 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15531 elf32_arm_section_map *map;
c7b8f16e 15532 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15533 bfd_vma ptr;
15534 bfd_vma end;
c7b8f16e 15535 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15536 bfd_byte tmp;
48229727 15537 unsigned int i;
57e8b36a 15538
4dfe6ac6
NC		 15539 if (globals == NULL)
15540 return FALSE;
15541
8e3de13a
NC		 15542 /* If this section has not been allocated an _arm_elf_section_data
15543 structure then we cannot record anything. */
15544 arm_data = get_arm_elf_section_data (sec);
15545 if (arm_data == NULL)
15546 return FALSE;
15547
15548 mapcount = arm_data->mapcount;
15549 map = arm_data->map;
c7b8f16e
JB		 15550 errcount = arm_data->erratumcount;
15551
15552 if (errcount != 0)
15553 {
15554 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15555
15556 for (errnode = arm_data->erratumlist; errnode != 0;
99059e56
RM		 15557 errnode = errnode->next)
15558 {
15559 bfd_vma target = errnode->vma - offset;
15560
15561 switch (errnode->type)
15562 {
15563 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15564 {
15565 bfd_vma branch_to_veneer;
15566 /* Original condition code of instruction, plus bit mask for
15567 ARM B instruction. */
15568 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15569 | 0x0a000000;
c7b8f16e
JB		 15570
15571 /* The instruction is before the label. */
91d6fa6a 15572 target -= 4;
c7b8f16e
JB		 15573
15574 /* Above offset included in -4 below. */
15575 branch_to_veneer = errnode->u.b.veneer->vma
99059e56 15576 - errnode->vma - 4;
c7b8f16e
JB		 15577
15578 if ((signed) branch_to_veneer < -(1 << 25)
15579 || (signed) branch_to_veneer >= (1 << 25))
15580 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15581 "range"), output_bfd);
15582
99059e56
RM		 15583 insn |= (branch_to_veneer >> 2) & 0xffffff;
15584 contents[endianflip ^ target] = insn & 0xff;
15585 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15586 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15587 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15588 }
15589 break;
c7b8f16e
JB		 15590
15591 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 15592 {
15593 bfd_vma branch_from_veneer;
15594 unsigned int insn;
c7b8f16e 15595
99059e56
RM		 15596 /* Take size of veneer into account. */
15597 branch_from_veneer = errnode->u.v.branch->vma
15598 - errnode->vma - 12;
c7b8f16e
JB		 15599
15600 if ((signed) branch_from_veneer < -(1 << 25)
15601 || (signed) branch_from_veneer >= (1 << 25))
15602 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15603 "range"), output_bfd);
15604
99059e56
RM		 15605 /* Original instruction. */
15606 insn = errnode->u.v.branch->u.b.vfp_insn;
15607 contents[endianflip ^ target] = insn & 0xff;
15608 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15609 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15610 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15611
15612 /* Branch back to insn after original insn. */
15613 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15614 contents[endianflip ^ (target + 4)] = insn & 0xff;
15615 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15616 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15617 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15618 }
15619 break;
c7b8f16e 15620
99059e56
RM		 15621 default:
15622 abort ();
15623 }
15624 }
c7b8f16e 15625 }
e489d0ae 15626
2468f9c9
PB		 15627 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15628 {
15629 arm_unwind_table_edit *edit_node
99059e56 15630 = arm_data->u.exidx.unwind_edit_list;
2468f9c9 15631 /* Now, sec->size is the size of the section we will write. The original
99059e56 15632 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
2468f9c9
PB		 15633 markers) was sec->rawsize. (This isn't the case if we perform no
15634 edits, then rawsize will be zero and we should use size). */
21d799b5 15635 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15636 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15637 unsigned int in_index, out_index;
15638 bfd_vma add_to_offsets = 0;
15639
15640 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
99059e56 15641 {
2468f9c9
PB		 15642 if (edit_node)
15643 {
15644 unsigned int edit_index = edit_node->index;
b38cadfb 15645
2468f9c9 15646 if (in_index < edit_index && in_index * 8 < input_size)
99059e56 15647 {
2468f9c9
PB		 15648 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15649 contents + in_index * 8, add_to_offsets);
15650 out_index++;
15651 in_index++;
15652 }
15653 else if (in_index == edit_index
15654 || (in_index * 8 >= input_size
15655 && edit_index == UINT_MAX))
99059e56 15656 {
2468f9c9
PB		 15657 switch (edit_node->type)
15658 {
15659 case DELETE_EXIDX_ENTRY:
15660 in_index++;
15661 add_to_offsets += 8;
15662 break;
b38cadfb 15663
2468f9c9
PB		 15664 case INSERT_EXIDX_CANTUNWIND_AT_END:
15665 {
99059e56 15666 asection *text_sec = edit_node->linked_section;
2468f9c9
PB		 15667 bfd_vma text_offset = text_sec->output_section->vma
15668 + text_sec->output_offset
15669 + text_sec->size;
15670 bfd_vma exidx_offset = offset + out_index * 8;
99059e56 15671 unsigned long prel31_offset;
2468f9c9
PB		 15672
15673 /* Note: this is meant to be equivalent to an
15674 R_ARM_PREL31 relocation. These synthetic
15675 EXIDX_CANTUNWIND markers are not relocated by the
15676 usual BFD method. */
15677 prel31_offset = (text_offset - exidx_offset)
15678 & 0x7ffffffful;
15679
15680 /* First address we can't unwind. */
15681 bfd_put_32 (output_bfd, prel31_offset,
15682 &edited_contents[out_index * 8]);
15683
15684 /* Code for EXIDX_CANTUNWIND. */
15685 bfd_put_32 (output_bfd, 0x1,
15686 &edited_contents[out_index * 8 + 4]);
15687
15688 out_index++;
15689 add_to_offsets -= 8;
15690 }
15691 break;
15692 }
b38cadfb 15693
2468f9c9
PB		 15694 edit_node = edit_node->next;
15695 }
15696 }
15697 else
15698 {
15699 /* No more edits, copy remaining entries verbatim. */
15700 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15701 contents + in_index * 8, add_to_offsets);
15702 out_index++;
15703 in_index++;
15704 }
15705 }
15706
15707 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15708 bfd_set_section_contents (output_bfd, sec->output_section,
15709 edited_contents,
15710 (file_ptr) sec->output_offset, sec->size);
15711
15712 return TRUE;
15713 }
15714
48229727
JB		 15715 /* Fix code to point to Cortex-A8 erratum stubs. */
15716 if (globals->fix_cortex_a8)
15717 {
15718 struct a8_branch_to_stub_data data;
15719
15720 data.writing_section = sec;
15721 data.contents = contents;
15722
15723 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15724 &data);
15725 }
15726
e489d0ae
PB		 15727 if (mapcount == 0)
15728 return FALSE;
15729
c7b8f16e 15730 if (globals->byteswap_code)
e489d0ae 15731 {
c7b8f16e 15732 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15733
c7b8f16e
JB		 15734 ptr = map[0].vma;
15735 for (i = 0; i < mapcount; i++)
99059e56
RM		 15736 {
15737 if (i == mapcount - 1)
c7b8f16e 15738 end = sec->size;
99059e56
RM		 15739 else
15740 end = map[i + 1].vma;
e489d0ae 15741
99059e56 15742 switch (map[i].type)
e489d0ae 15743 {
c7b8f16e
JB		 15744 case 'a':
15745 /* Byte swap code words. */
15746 while (ptr + 3 < end)
99059e56
RM		 15747 {
15748 tmp = contents[ptr];
15749 contents[ptr] = contents[ptr + 3];
15750 contents[ptr + 3] = tmp;
15751 tmp = contents[ptr + 1];
15752 contents[ptr + 1] = contents[ptr + 2];
15753 contents[ptr + 2] = tmp;
15754 ptr += 4;
15755 }
c7b8f16e 15756 break;
e489d0ae 15757
c7b8f16e
JB		 15758 case 't':
15759 /* Byte swap code halfwords. */
15760 while (ptr + 1 < end)
99059e56
RM		 15761 {
15762 tmp = contents[ptr];
15763 contents[ptr] = contents[ptr + 1];
15764 contents[ptr + 1] = tmp;
15765 ptr += 2;
15766 }
c7b8f16e
JB		 15767 break;
15768
15769 case 'd':
15770 /* Leave data alone. */
15771 break;
15772 }
99059e56
RM		 15773 ptr = end;
15774 }
e489d0ae 15775 }
8e3de13a 15776
93204d3a 15777 free (map);
47b2e99c 15778 arm_data->mapcount = -1;
c7b8f16e 15779 arm_data->mapsize = 0;
8e3de13a 15780 arm_data->map = NULL;
8e3de13a 15781
e489d0ae
PB		 15782 return FALSE;
15783}
15784
0beaef2b
PB		 15785/* Mangle thumb function symbols as we read them in. */
15786
8384fb8f 15787static bfd_boolean
0beaef2b
PB		 15788elf32_arm_swap_symbol_in (bfd * abfd,
15789 const void *psrc,
15790 const void *pshn,
15791 Elf_Internal_Sym *dst)
15792{
8384fb8f
AM		 15793 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15794 return FALSE;
0beaef2b
PB		 15795
15796 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15797 the address. */
63e1a0fc
PB		 15798 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15799 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15800 {
63e1a0fc
PB		 15801 if (dst->st_value & 1)
15802 {
15803 dst->st_value &= ~(bfd_vma) 1;
15804 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15805 }
15806 else
15807 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15808 }
15809 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15810 {
15811 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15812 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15813 }
35fc36a8
RS		 15814 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15815 dst->st_target_internal = ST_BRANCH_LONG;
15816 else
63e1a0fc 15817 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15818
8384fb8f 15819 return TRUE;
0beaef2b
PB		 15820}
15821
15822
15823/* Mangle thumb function symbols as we write them out. */
15824
15825static void
15826elf32_arm_swap_symbol_out (bfd *abfd,
15827 const Elf_Internal_Sym *src,
15828 void *cdst,
15829 void *shndx)
15830{
15831 Elf_Internal_Sym newsym;
15832
15833 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15834 of the address set, as per the new EABI. We do this unconditionally
15835 because objcopy does not set the elf header flags until after
15836 it writes out the symbol table. */
35fc36a8 15837 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15838 {
15839 newsym = *src;
34e77a92
RS		 15840 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15841 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad 15842 if (newsym.st_shndx != SHN_UNDEF)
99059e56
RM		 15843 {
15844 /* Do this only for defined symbols. At link type, the static
15845 linker will simulate the work of dynamic linker of resolving
15846 symbols and will carry over the thumbness of found symbols to
15847 the output symbol table. It's not clear how it happens, but
15848 the thumbness of undefined symbols can well be different at
15849 runtime, and writing '1' for them will be confusing for users
15850 and possibly for dynamic linker itself.
15851 */
15852 newsym.st_value |= 1;
15853 }
906e58ca 15854
0beaef2b
PB		 15855 src = &newsym;
15856 }
15857 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15858}
15859
b294bdf8
MM		 15860/* Add the PT_ARM_EXIDX program header. */
15861
15862static bfd_boolean
906e58ca 15863elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15864 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15865{
15866 struct elf_segment_map *m;
15867 asection *sec;
15868
15869 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15870 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15871 {
15872 /* If there is already a PT_ARM_EXIDX header, then we do not
15873 want to add another one. This situation arises when running
15874 "strip"; the input binary already has the header. */
12bd6957 15875 m = elf_seg_map (abfd);
b294bdf8
MM		 15876 while (m && m->p_type != PT_ARM_EXIDX)
15877 m = m->next;
15878 if (!m)
15879 {
21d799b5 15880 m = (struct elf_segment_map *)
99059e56 15881 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15882 if (m == NULL)
15883 return FALSE;
15884 m->p_type = PT_ARM_EXIDX;
15885 m->count = 1;
15886 m->sections[0] = sec;
15887
12bd6957
AM		 15888 m->next = elf_seg_map (abfd);
15889 elf_seg_map (abfd) = m;
b294bdf8
MM		 15890 }
15891 }
15892
15893 return TRUE;
15894}
15895
15896/* We may add a PT_ARM_EXIDX program header. */
15897
15898static int
a6b96beb
AM		 15899elf32_arm_additional_program_headers (bfd *abfd,
15900 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15901{
15902 asection *sec;
15903
15904 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15905 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15906 return 1;
15907 else
15908 return 0;
15909}
15910
34e77a92
RS		 15911/* Hook called by the linker routine which adds symbols from an object
15912 file. */
15913
15914static bfd_boolean
15915elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15916 Elf_Internal_Sym *sym, const char **namep,
15917 flagword *flagsp, asection **secp, bfd_vma *valp)
15918{
f1885d1e
AM		 15919 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15920 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
15921 && (abfd->flags & DYNAMIC) == 0
15922 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
f64b2e8d 15923 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92 15924
c792917c
NC		 15925 if (elf32_arm_hash_table (info) == NULL)
15926 return FALSE;
15927
34e77a92
RS		 15928 if (elf32_arm_hash_table (info)->vxworks_p
15929 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15930 flagsp, secp, valp))
15931 return FALSE;
15932
15933 return TRUE;
15934}
15935
0beaef2b 15936/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15937const struct elf_size_info elf32_arm_size_info =
15938{
0beaef2b
PB		 15939 sizeof (Elf32_External_Ehdr),
15940 sizeof (Elf32_External_Phdr),
15941 sizeof (Elf32_External_Shdr),
15942 sizeof (Elf32_External_Rel),
15943 sizeof (Elf32_External_Rela),
15944 sizeof (Elf32_External_Sym),
15945 sizeof (Elf32_External_Dyn),
15946 sizeof (Elf_External_Note),
15947 4,
15948 1,
15949 32, 2,
15950 ELFCLASS32, EV_CURRENT,
15951 bfd_elf32_write_out_phdrs,
15952 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15953 bfd_elf32_checksum_contents,
0beaef2b
PB		 15954 bfd_elf32_write_relocs,
15955 elf32_arm_swap_symbol_in,
15956 elf32_arm_swap_symbol_out,
15957 bfd_elf32_slurp_reloc_table,
15958 bfd_elf32_slurp_symbol_table,
15959 bfd_elf32_swap_dyn_in,
15960 bfd_elf32_swap_dyn_out,
15961 bfd_elf32_swap_reloc_in,
15962 bfd_elf32_swap_reloc_out,
15963 bfd_elf32_swap_reloca_in,
15964 bfd_elf32_swap_reloca_out
15965};
15966
685e70ae
VK		 15967static bfd_vma
15968read_code32 (const bfd *abfd, const bfd_byte *addr)
15969{
15970 /* V7 BE8 code is always little endian. */
15971 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
15972 return bfd_getl32 (addr);
15973
15974 return bfd_get_32 (abfd, addr);
15975}
15976
15977static bfd_vma
15978read_code16 (const bfd *abfd, const bfd_byte *addr)
15979{
15980 /* V7 BE8 code is always little endian. */
15981 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
15982 return bfd_getl16 (addr);
15983
15984 return bfd_get_16 (abfd, addr);
15985}
15986
6a631e86
YG		 15987/* Return size of plt0 entry starting at ADDR
15988 or (bfd_vma) -1 if size can not be determined. */
15989
15990static bfd_vma
15991elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
15992{
15993 bfd_vma first_word;
15994 bfd_vma plt0_size;
15995
685e70ae 15996 first_word = read_code32 (abfd, addr);
6a631e86
YG		 15997
15998 if (first_word == elf32_arm_plt0_entry[0])
15999 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
16000 else if (first_word == elf32_thumb2_plt0_entry[0])
16001 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
16002 else
16003 /* We don't yet handle this PLT format. */
16004 return (bfd_vma) -1;
16005
16006 return plt0_size;
16007}
16008
16009/* Return size of plt entry starting at offset OFFSET
16010 of plt section located at address START
16011 or (bfd_vma) -1 if size can not be determined. */
16012
16013static bfd_vma
16014elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
16015{
16016 bfd_vma first_insn;
16017 bfd_vma plt_size = 0;
16018 const bfd_byte *addr = start + offset;
16019
16020 /* PLT entry size if fixed on Thumb-only platforms. */
685e70ae 16021 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
6a631e86
YG		 16022 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
16023
16024 /* Respect Thumb stub if necessary. */
685e70ae 16025 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
6a631e86
YG		 16026 {
16027 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
16028 }
16029
16030 /* Strip immediate from first add. */
685e70ae 16031 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
6a631e86
YG		 16032
16033#ifdef FOUR_WORD_PLT
16034 if (first_insn == elf32_arm_plt_entry[0])
16035 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
16036#else
16037 if (first_insn == elf32_arm_plt_entry_long[0])
16038 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
16039 else if (first_insn == elf32_arm_plt_entry_short[0])
16040 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
16041#endif
16042 else
16043 /* We don't yet handle this PLT format. */
16044 return (bfd_vma) -1;
16045
16046 return plt_size;
16047}
16048
16049/* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
16050
16051static long
16052elf32_arm_get_synthetic_symtab (bfd *abfd,
16053 long symcount ATTRIBUTE_UNUSED,
16054 asymbol **syms ATTRIBUTE_UNUSED,
16055 long dynsymcount,
16056 asymbol **dynsyms,
16057 asymbol **ret)
16058{
16059 asection *relplt;
16060 asymbol *s;
16061 arelent *p;
16062 long count, i, n;
16063 size_t size;
16064 Elf_Internal_Shdr *hdr;
16065 char *names;
16066 asection *plt;
16067 bfd_vma offset;
16068 bfd_byte *data;
16069
16070 *ret = NULL;
16071
16072 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
16073 return 0;
16074
16075 if (dynsymcount <= 0)
16076 return 0;
16077
16078 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
16079 if (relplt == NULL)
16080 return 0;
16081
16082 hdr = &elf_section_data (relplt)->this_hdr;
16083 if (hdr->sh_link != elf_dynsymtab (abfd)
16084 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
16085 return 0;
16086
16087 plt = bfd_get_section_by_name (abfd, ".plt");
16088 if (plt == NULL)
16089 return 0;
16090
16091 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
16092 return -1;
16093
16094 data = plt->contents;
16095 if (data == NULL)
16096 {
16097 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
16098 return -1;
16099 bfd_cache_section_contents((asection *) plt, data);
16100 }
16101
16102 count = relplt->size / hdr->sh_entsize;
16103 size = count * sizeof (asymbol);
16104 p = relplt->relocation;
16105 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16106 {
16107 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
16108 if (p->addend != 0)
16109 size += sizeof ("+0x") - 1 + 8;
16110 }
16111
16112 s = *ret = (asymbol *) bfd_malloc (size);
16113 if (s == NULL)
16114 return -1;
16115
16116 offset = elf32_arm_plt0_size (abfd, data);
16117 if (offset == (bfd_vma) -1)
16118 return -1;
16119
16120 names = (char *) (s + count);
16121 p = relplt->relocation;
16122 n = 0;
16123 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16124 {
16125 size_t len;
16126
16127 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
16128 if (plt_size == (bfd_vma) -1)
16129 break;
16130
16131 *s = **p->sym_ptr_ptr;
16132 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
16133 we are defining a symbol, ensure one of them is set. */
16134 if ((s->flags & BSF_LOCAL) == 0)
16135 s->flags |= BSF_GLOBAL;
16136 s->flags |= BSF_SYNTHETIC;
16137 s->section = plt;
16138 s->value = offset;
16139 s->name = names;
16140 s->udata.p = NULL;
16141 len = strlen ((*p->sym_ptr_ptr)->name);
16142 memcpy (names, (*p->sym_ptr_ptr)->name, len);
16143 names += len;
16144 if (p->addend != 0)
16145 {
16146 char buf[30], *a;
16147
16148 memcpy (names, "+0x", sizeof ("+0x") - 1);
16149 names += sizeof ("+0x") - 1;
16150 bfd_sprintf_vma (abfd, buf, p->addend);
16151 for (a = buf; *a == '0'; ++a)
16152 ;
16153 len = strlen (a);
16154 memcpy (names, a, len);
16155 names += len;
16156 }
16157 memcpy (names, "@plt", sizeof ("@plt"));
16158 names += sizeof ("@plt");
16159 ++s, ++n;
16160 offset += plt_size;
16161 }
16162
16163 return n;
16164}
16165
252b5132 16166#define ELF_ARCH bfd_arch_arm
ae95ffa6 16167#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 16168#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 16169#ifdef __QNXTARGET__
16170#define ELF_MAXPAGESIZE 0x1000
16171#else
7572ca89 16172#define ELF_MAXPAGESIZE 0x10000
d0facd1b 16173#endif
b1342370 16174#define ELF_MINPAGESIZE 0x1000
24718e3b 16175#define ELF_COMMONPAGESIZE 0x1000
252b5132 16176
ba93b8ac
DJ		 16177#define bfd_elf32_mkobject elf32_arm_mkobject
16178
99e4ae17
AJ		 16179#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
16180#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 16181#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
16182#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
16183#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 16184#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 16185#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 16186#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 16187#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 16188#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 16189#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 16190#define bfd_elf32_bfd_final_link elf32_arm_final_link
6a631e86 16191#define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
252b5132
RH		 16192
16193#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
16194#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 16195#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 16196#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
16197#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 16198#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 16199#define elf_backend_write_section elf32_arm_write_section
252b5132 16200#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 16201#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 16202#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
16203#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
16204#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 16205#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 16206#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 16207#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 16208#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 16209#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 16210#define elf_backend_fake_sections elf32_arm_fake_sections
16211#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 16212#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 16213#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 16214#define elf_backend_size_info elf32_arm_size_info
b294bdf8 16215#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 16216#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
16217#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
16218#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 16219#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 16220
16221#define elf_backend_can_refcount 1
16222#define elf_backend_can_gc_sections 1
16223#define elf_backend_plt_readonly 1
16224#define elf_backend_want_got_plt 1
16225#define elf_backend_want_plt_sym 0
16226#define elf_backend_may_use_rel_p 1
16227#define elf_backend_may_use_rela_p 0
4e7fd91e 16228#define elf_backend_default_use_rela_p 0
252b5132 16229
04f7c78d 16230#define elf_backend_got_header_size 12
04f7c78d 16231
906e58ca
NC		 16232#undef elf_backend_obj_attrs_vendor
16233#define elf_backend_obj_attrs_vendor "aeabi"
16234#undef elf_backend_obj_attrs_section
16235#define elf_backend_obj_attrs_section ".ARM.attributes"
16236#undef elf_backend_obj_attrs_arg_type
16237#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
16238#undef elf_backend_obj_attrs_section_type
104d59d1 16239#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 16240#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
16241#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 16242
252b5132 16243#include "elf32-target.h"
7f266840 16244
b38cadfb
NC		 16245/* Native Client targets. */
16246
16247#undef TARGET_LITTLE_SYM
6d00b590 16248#define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
b38cadfb
NC		 16249#undef TARGET_LITTLE_NAME
16250#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
16251#undef TARGET_BIG_SYM
6d00b590 16252#define TARGET_BIG_SYM arm_elf32_nacl_be_vec
b38cadfb
NC		 16253#undef TARGET_BIG_NAME
16254#define TARGET_BIG_NAME "elf32-bigarm-nacl"
16255
16256/* Like elf32_arm_link_hash_table_create -- but overrides
16257 appropriately for NaCl. */
16258
16259static struct bfd_link_hash_table *
16260elf32_arm_nacl_link_hash_table_create (bfd *abfd)
16261{
16262 struct bfd_link_hash_table *ret;
16263
16264 ret = elf32_arm_link_hash_table_create (abfd);
16265 if (ret)
16266 {
16267 struct elf32_arm_link_hash_table *htab
16268 = (struct elf32_arm_link_hash_table *) ret;
16269
16270 htab->nacl_p = 1;
16271
16272 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
16273 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
16274 }
16275 return ret;
16276}
16277
16278/* Since NaCl doesn't use the ARM-specific unwind format, we don't
16279 really need to use elf32_arm_modify_segment_map. But we do it
16280 anyway just to reduce gratuitous differences with the stock ARM backend. */
16281
16282static bfd_boolean
16283elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
16284{
16285 return (elf32_arm_modify_segment_map (abfd, info)
16286 && nacl_modify_segment_map (abfd, info));
16287}
16288
887badb3
RM		 16289static void
16290elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
16291{
16292 elf32_arm_final_write_processing (abfd, linker);
16293 nacl_final_write_processing (abfd, linker);
16294}
16295
6a631e86
YG		 16296static bfd_vma
16297elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
16298 const arelent *rel ATTRIBUTE_UNUSED)
16299{
16300 return plt->vma
16301 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
16302 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
16303}
887badb3 16304
b38cadfb 16305#undef elf32_bed
6a631e86 16306#define elf32_bed elf32_arm_nacl_bed
b38cadfb
NC		 16307#undef bfd_elf32_bfd_link_hash_table_create
16308#define bfd_elf32_bfd_link_hash_table_create \
16309 elf32_arm_nacl_link_hash_table_create
16310#undef elf_backend_plt_alignment
6a631e86 16311#define elf_backend_plt_alignment 4
b38cadfb
NC		 16312#undef elf_backend_modify_segment_map
16313#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
16314#undef elf_backend_modify_program_headers
16315#define elf_backend_modify_program_headers nacl_modify_program_headers
887badb3
RM		 16316#undef elf_backend_final_write_processing
16317#define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
6a631e86
YG		 16318#undef bfd_elf32_get_synthetic_symtab
16319#undef elf_backend_plt_sym_val
16320#define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
b38cadfb 16321
887badb3
RM		 16322#undef ELF_MINPAGESIZE
16323#undef ELF_COMMONPAGESIZE
16324
b38cadfb
NC		 16325
16326#include "elf32-target.h"
16327
16328/* Reset to defaults. */
16329#undef elf_backend_plt_alignment
16330#undef elf_backend_modify_segment_map
16331#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16332#undef elf_backend_modify_program_headers
887badb3
RM		 16333#undef elf_backend_final_write_processing
16334#define elf_backend_final_write_processing elf32_arm_final_write_processing
16335#undef ELF_MINPAGESIZE
16336#define ELF_MINPAGESIZE 0x1000
16337#undef ELF_COMMONPAGESIZE
16338#define ELF_COMMONPAGESIZE 0x1000
16339
b38cadfb 16340
906e58ca 16341/* VxWorks Targets. */
4e7fd91e 16342
906e58ca 16343#undef TARGET_LITTLE_SYM
6d00b590 16344#define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
906e58ca 16345#undef TARGET_LITTLE_NAME
4e7fd91e 16346#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 16347#undef TARGET_BIG_SYM
6d00b590 16348#define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
906e58ca 16349#undef TARGET_BIG_NAME
4e7fd91e
PB		 16350#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
16351
16352/* Like elf32_arm_link_hash_table_create -- but overrides
16353 appropriately for VxWorks. */
906e58ca 16354
4e7fd91e
PB		 16355static struct bfd_link_hash_table *
16356elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
16357{
16358 struct bfd_link_hash_table *ret;
16359
16360 ret = elf32_arm_link_hash_table_create (abfd);
16361 if (ret)
16362 {
16363 struct elf32_arm_link_hash_table *htab
00a97672 16364 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 16365 htab->use_rel = 0;
00a97672 16366 htab->vxworks_p = 1;
4e7fd91e
PB		 16367 }
16368 return ret;
906e58ca 16369}
4e7fd91e 16370
00a97672
RS		 16371static void
16372elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
16373{
16374 elf32_arm_final_write_processing (abfd, linker);
16375 elf_vxworks_final_write_processing (abfd, linker);
16376}
16377
906e58ca 16378#undef elf32_bed
4e7fd91e
PB		 16379#define elf32_bed elf32_arm_vxworks_bed
16380
906e58ca
NC		 16381#undef bfd_elf32_bfd_link_hash_table_create
16382#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 16383#undef elf_backend_final_write_processing
16384#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
16385#undef elf_backend_emit_relocs
16386#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 16387
906e58ca 16388#undef elf_backend_may_use_rel_p
00a97672 16389#define elf_backend_may_use_rel_p 0
906e58ca 16390#undef elf_backend_may_use_rela_p
00a97672 16391#define elf_backend_may_use_rela_p 1
906e58ca 16392#undef elf_backend_default_use_rela_p
00a97672 16393#define elf_backend_default_use_rela_p 1
906e58ca 16394#undef elf_backend_want_plt_sym
00a97672 16395#define elf_backend_want_plt_sym 1
906e58ca 16396#undef ELF_MAXPAGESIZE
00a97672 16397#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 16398
16399#include "elf32-target.h"
16400
16401
21d799b5
NC		 16402/* Merge backend specific data from an object file to the output
16403 object file when linking. */
16404
16405static bfd_boolean
16406elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
16407{
16408 flagword out_flags;
16409 flagword in_flags;
16410 bfd_boolean flags_compatible = TRUE;
16411 asection *sec;
16412
cc643b88 16413 /* Check if we have the same endianness. */
21d799b5
NC		 16414 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
16415 return FALSE;
16416
16417 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16418 return TRUE;
16419
16420 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16421 return FALSE;
16422
16423 /* The input BFD must have had its flags initialised. */
16424 /* The following seems bogus to me -- The flags are initialized in
16425 the assembler but I don't think an elf_flags_init field is
16426 written into the object. */
16427 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16428
16429 in_flags = elf_elfheader (ibfd)->e_flags;
16430 out_flags = elf_elfheader (obfd)->e_flags;
16431
16432 /* In theory there is no reason why we couldn't handle this. However
16433 in practice it isn't even close to working and there is no real
16434 reason to want it. */
16435 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16436 && !(ibfd->flags & DYNAMIC)
16437 && (in_flags & EF_ARM_BE8))
16438 {
16439 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16440 ibfd);
16441 return FALSE;
16442 }
16443
16444 if (!elf_flags_init (obfd))
16445 {
16446 /* If the input is the default architecture and had the default
16447 flags then do not bother setting the flags for the output
16448 architecture, instead allow future merges to do this. If no
16449 future merges ever set these flags then they will retain their
99059e56
RM		 16450 uninitialised values, which surprise surprise, correspond
16451 to the default values. */
21d799b5
NC		 16452 if (bfd_get_arch_info (ibfd)->the_default
16453 && elf_elfheader (ibfd)->e_flags == 0)
16454 return TRUE;
16455
16456 elf_flags_init (obfd) = TRUE;
16457 elf_elfheader (obfd)->e_flags = in_flags;
16458
16459 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16460 && bfd_get_arch_info (obfd)->the_default)
16461 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16462
16463 return TRUE;
16464 }
16465
16466 /* Determine what should happen if the input ARM architecture
16467 does not match the output ARM architecture. */
16468 if (! bfd_arm_merge_machines (ibfd, obfd))
16469 return FALSE;
16470
16471 /* Identical flags must be compatible. */
16472 if (in_flags == out_flags)
16473 return TRUE;
16474
16475 /* Check to see if the input BFD actually contains any sections. If
16476 not, its flags may not have been initialised either, but it
16477 cannot actually cause any incompatiblity. Do not short-circuit
16478 dynamic objects; their section list may be emptied by
16479 elf_link_add_object_symbols.
16480
16481 Also check to see if there are no code sections in the input.
16482 In this case there is no need to check for code specific flags.
16483 XXX - do we need to worry about floating-point format compatability
16484 in data sections ? */
16485 if (!(ibfd->flags & DYNAMIC))
16486 {
16487 bfd_boolean null_input_bfd = TRUE;
16488 bfd_boolean only_data_sections = TRUE;
16489
16490 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16491 {
16492 /* Ignore synthetic glue sections. */
16493 if (strcmp (sec->name, ".glue_7")
16494 && strcmp (sec->name, ".glue_7t"))
16495 {
16496 if ((bfd_get_section_flags (ibfd, sec)
16497 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16498 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
99059e56 16499 only_data_sections = FALSE;
21d799b5
NC		 16500
16501 null_input_bfd = FALSE;
16502 break;
16503 }
16504 }
16505
16506 if (null_input_bfd || only_data_sections)
16507 return TRUE;
16508 }
16509
16510 /* Complain about various flag mismatches. */
16511 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16512 EF_ARM_EABI_VERSION (out_flags)))
16513 {
16514 _bfd_error_handler
16515 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16516 ibfd, obfd,
16517 (in_flags & EF_ARM_EABIMASK) >> 24,
16518 (out_flags & EF_ARM_EABIMASK) >> 24);
16519 return FALSE;
16520 }
16521
16522 /* Not sure what needs to be checked for EABI versions >= 1. */
16523 /* VxWorks libraries do not use these flags. */
16524 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16525 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16526 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16527 {
16528 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16529 {
16530 _bfd_error_handler
16531 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16532 ibfd, obfd,
16533 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16534 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16535 flags_compatible = FALSE;
16536 }
16537
16538 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16539 {
16540 if (in_flags & EF_ARM_APCS_FLOAT)
16541 _bfd_error_handler
16542 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16543 ibfd, obfd);
16544 else
16545 _bfd_error_handler
16546 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16547 ibfd, obfd);
16548
16549 flags_compatible = FALSE;
16550 }
16551
16552 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16553 {
16554 if (in_flags & EF_ARM_VFP_FLOAT)
16555 _bfd_error_handler
16556 (_("error: %B uses VFP instructions, whereas %B does not"),
16557 ibfd, obfd);
16558 else
16559 _bfd_error_handler
16560 (_("error: %B uses FPA instructions, whereas %B does not"),
16561 ibfd, obfd);
16562
16563 flags_compatible = FALSE;
16564 }
16565
16566 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16567 {
16568 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16569 _bfd_error_handler
16570 (_("error: %B uses Maverick instructions, whereas %B does not"),
16571 ibfd, obfd);
16572 else
16573 _bfd_error_handler
16574 (_("error: %B does not use Maverick instructions, whereas %B does"),
16575 ibfd, obfd);
16576
16577 flags_compatible = FALSE;
16578 }
16579
16580#ifdef EF_ARM_SOFT_FLOAT
16581 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16582 {
16583 /* We can allow interworking between code that is VFP format
16584 layout, and uses either soft float or integer regs for
16585 passing floating point arguments and results. We already
16586 know that the APCS_FLOAT flags match; similarly for VFP
16587 flags. */
16588 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16589 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16590 {
16591 if (in_flags & EF_ARM_SOFT_FLOAT)
16592 _bfd_error_handler
16593 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16594 ibfd, obfd);
16595 else
16596 _bfd_error_handler
16597 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16598 ibfd, obfd);
16599
16600 flags_compatible = FALSE;
16601 }
16602 }
16603#endif
16604
16605 /* Interworking mismatch is only a warning. */
16606 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16607 {
16608 if (in_flags & EF_ARM_INTERWORK)
16609 {
16610 _bfd_error_handler
16611 (_("Warning: %B supports interworking, whereas %B does not"),
16612 ibfd, obfd);
16613 }
16614 else
16615 {
16616 _bfd_error_handler
16617 (_("Warning: %B does not support interworking, whereas %B does"),
16618 ibfd, obfd);
16619 }
16620 }
16621 }
16622
16623 return flags_compatible;
16624}
16625
16626
906e58ca 16627/* Symbian OS Targets. */
7f266840 16628
906e58ca 16629#undef TARGET_LITTLE_SYM
6d00b590 16630#define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
906e58ca 16631#undef TARGET_LITTLE_NAME
7f266840 16632#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16633#undef TARGET_BIG_SYM
6d00b590 16634#define TARGET_BIG_SYM arm_elf32_symbian_be_vec
906e58ca 16635#undef TARGET_BIG_NAME
7f266840
DJ		 16636#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16637
16638/* Like elf32_arm_link_hash_table_create -- but overrides
16639 appropriately for Symbian OS. */
906e58ca 16640
7f266840
DJ		 16641static struct bfd_link_hash_table *
16642elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16643{
16644 struct bfd_link_hash_table *ret;
16645
16646 ret = elf32_arm_link_hash_table_create (abfd);
16647 if (ret)
16648 {
16649 struct elf32_arm_link_hash_table *htab
16650 = (struct elf32_arm_link_hash_table *)ret;
16651 /* There is no PLT header for Symbian OS. */
16652 htab->plt_header_size = 0;
95720a86
DJ		 16653 /* The PLT entries are each one instruction and one word. */
16654 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16655 htab->symbian_p = 1;
33bfe774
JB		 16656 /* Symbian uses armv5t or above, so use_blx is always true. */
16657 htab->use_blx = 1;
67687978 16658 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16659 }
16660 return ret;
906e58ca 16661}
7f266840 16662
b35d266b 16663static const struct bfd_elf_special_section
551b43fd 16664elf32_arm_symbian_special_sections[] =
7f266840 16665{
5cd3778d
MM		 16666 /* In a BPABI executable, the dynamic linking sections do not go in
16667 the loadable read-only segment. The post-linker may wish to
16668 refer to these sections, but they are not part of the final
16669 program image. */
0112cd26
NC		 16670 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16671 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16672 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16673 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16674 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16675 /* These sections do not need to be writable as the SymbianOS
16676 postlinker will arrange things so that no dynamic relocation is
16677 required. */
0112cd26
NC		 16678 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16679 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16680 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16681 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16682};
16683
c3c76620 16684static void
906e58ca 16685elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16686 struct bfd_link_info *link_info)
c3c76620
MM		 16687{
16688 /* BPABI objects are never loaded directly by an OS kernel; they are
16689 processed by a postlinker first, into an OS-specific format. If
16690 the D_PAGED bit is set on the file, BFD will align segments on
16691 page boundaries, so that an OS can directly map the file. With
16692 BPABI objects, that just results in wasted space. In addition,
16693 because we clear the D_PAGED bit, map_sections_to_segments will
16694 recognize that the program headers should not be mapped into any
16695 loadable segment. */
16696 abfd->flags &= ~D_PAGED;
906e58ca 16697 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16698}
7f266840
DJ		 16699
16700static bfd_boolean
906e58ca 16701elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16702 struct bfd_link_info *info)
7f266840
DJ		 16703{
16704 struct elf_segment_map *m;
16705 asection *dynsec;
16706
7f266840
DJ		 16707 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16708 segment. However, because the .dynamic section is not marked
16709 with SEC_LOAD, the generic ELF code will not create such a
16710 segment. */
16711 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16712 if (dynsec)
16713 {
12bd6957 16714 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16715 if (m->p_type == PT_DYNAMIC)
16716 break;
16717
16718 if (m == NULL)
16719 {
16720 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16721 m->next = elf_seg_map (abfd);
16722 elf_seg_map (abfd) = m;
8ded5a0f 16723 }
7f266840
DJ		 16724 }
16725
b294bdf8
MM		 16726 /* Also call the generic arm routine. */
16727 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16728}
16729
95720a86
DJ		 16730/* Return address for Ith PLT stub in section PLT, for relocation REL
16731 or (bfd_vma) -1 if it should not be included. */
16732
16733static bfd_vma
16734elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16735 const arelent *rel ATTRIBUTE_UNUSED)
16736{
16737 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16738}
16739
16740
8029a119 16741#undef elf32_bed
7f266840
DJ		 16742#define elf32_bed elf32_arm_symbian_bed
16743
16744/* The dynamic sections are not allocated on SymbianOS; the postlinker
16745 will process them and then discard them. */
906e58ca 16746#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16747#define ELF_DYNAMIC_SEC_FLAGS \
16748 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16749
00a97672 16750#undef elf_backend_emit_relocs
c3c76620 16751
906e58ca
NC		 16752#undef bfd_elf32_bfd_link_hash_table_create
16753#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16754#undef elf_backend_special_sections
16755#define elf_backend_special_sections elf32_arm_symbian_special_sections
16756#undef elf_backend_begin_write_processing
16757#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16758#undef elf_backend_final_write_processing
16759#define elf_backend_final_write_processing elf32_arm_final_write_processing
16760
16761#undef elf_backend_modify_segment_map
7f266840
DJ		 16762#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16763
16764/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16765#undef elf_backend_got_header_size
7f266840
DJ		 16766#define elf_backend_got_header_size 0
16767
16768/* Similarly, there is no .got.plt section. */
906e58ca 16769#undef elf_backend_want_got_plt
7f266840
DJ		 16770#define elf_backend_want_got_plt 0
16771
906e58ca 16772#undef elf_backend_plt_sym_val
95720a86
DJ		 16773#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16774
906e58ca 16775#undef elf_backend_may_use_rel_p
00a97672 16776#define elf_backend_may_use_rel_p 1
906e58ca 16777#undef elf_backend_may_use_rela_p
00a97672 16778#define elf_backend_may_use_rela_p 0
906e58ca 16779#undef elf_backend_default_use_rela_p
00a97672 16780#define elf_backend_default_use_rela_p 0
906e58ca 16781#undef elf_backend_want_plt_sym
00a97672 16782#define elf_backend_want_plt_sym 0
906e58ca 16783#undef ELF_MAXPAGESIZE
00a97672 16784#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16785
7f266840 16786#include "elf32-target.h"
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