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bfd_section_* macros
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CommitLineData
c2dcd04e 1/* BFD back-end for Renesas H8/300 ELF binaries.
82704155 2 Copyright (C) 1993-2019 Free Software Foundation, Inc.
e01b0e69 3
e514ac71 4 This file is part of BFD, the Binary File Descriptor library.
e01b0e69 5
e514ac71
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
e514ac71 9 (at your option) any later version.
e01b0e69 10
e514ac71
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
e01b0e69 15
e514ac71
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
e01b0e69 20
e01b0e69 21#include "sysdep.h"
3db64b00 22#include "bfd.h"
e01b0e69
JR
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/h8.h"
26
27static reloc_howto_type *elf32_h8_reloc_type_lookup
c6baf75e 28 (bfd *abfd, bfd_reloc_code_real_type code);
f3185997 29static bfd_boolean elf32_h8_info_to_howto
c6baf75e 30 (bfd *, arelent *, Elf_Internal_Rela *);
f3185997 31static bfd_boolean elf32_h8_info_to_howto_rel
c6baf75e 32 (bfd *, arelent *, Elf_Internal_Rela *);
96ef1419 33static unsigned long elf32_h8_mach (flagword);
96ef1419 34static bfd_boolean elf32_h8_object_p (bfd *);
50e03d47
AM
35static bfd_boolean elf32_h8_merge_private_bfd_data
36 (bfd *, struct bfd_link_info *);
b34976b6 37static bfd_boolean elf32_h8_relax_section
c6baf75e 38 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
b34976b6 39static bfd_boolean elf32_h8_relax_delete_bytes
c6baf75e 40 (bfd *, asection *, bfd_vma, int);
96ef1419 41static bfd_boolean elf32_h8_symbol_address_p (bfd *, asection *, bfd_vma);
dc810e39 42static bfd_byte *elf32_h8_get_relocated_section_contents
c6baf75e
RS
43 (bfd *, struct bfd_link_info *, struct bfd_link_order *,
44 bfd_byte *, bfd_boolean, asymbol **);
5e47149d 45static bfd_reloc_status_type elf32_h8_final_link_relocate
c6baf75e
RS
46 (unsigned long, bfd *, bfd *, asection *,
47 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
48 struct bfd_link_info *, asection *, int);
b34976b6 49static bfd_boolean elf32_h8_relocate_section
c6baf75e
RS
50 (bfd *, struct bfd_link_info *, bfd *, asection *,
51 bfd_byte *, Elf_Internal_Rela *,
52 Elf_Internal_Sym *, asection **);
dc810e39 53static bfd_reloc_status_type special
2c3fc389 54 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
e01b0e69
JR
55
56/* This does not include any relocation information, but should be
57 good enough for GDB or objdump to read the file. */
58
2c3fc389
NC
59static reloc_howto_type h8_elf_howto_table[] =
60{
e01b0e69
JR
61#define R_H8_NONE_X 0
62 HOWTO (R_H8_NONE, /* type */
63 0, /* rightshift */
6346d5ca 64 3, /* size (0 = byte, 1 = short, 2 = long) */
e01b0e69 65 0, /* bitsize */
b34976b6 66 FALSE, /* pc_relative */
e01b0e69 67 0, /* bitpos */
9d29900b
NC
68 complain_overflow_dont,/* complain_on_overflow */
69 special, /* special_function */
e01b0e69 70 "R_H8_NONE", /* name */
b34976b6 71 FALSE, /* partial_inplace */
e01b0e69
JR
72 0, /* src_mask */
73 0, /* dst_mask */
b34976b6 74 FALSE), /* pcrel_offset */
e01b0e69
JR
75#define R_H8_DIR32_X (R_H8_NONE_X + 1)
76 HOWTO (R_H8_DIR32, /* type */
77 0, /* rightshift */
78 2, /* size (0 = byte, 1 = short, 2 = long) */
79 32, /* bitsize */
b34976b6 80 FALSE, /* pc_relative */
e01b0e69 81 0, /* bitpos */
9d29900b
NC
82 complain_overflow_dont,/* complain_on_overflow */
83 special, /* special_function */
e01b0e69 84 "R_H8_DIR32", /* name */
b34976b6 85 FALSE, /* partial_inplace */
e01b0e69
JR
86 0, /* src_mask */
87 0xffffffff, /* dst_mask */
b34976b6 88 FALSE), /* pcrel_offset */
e01b0e69
JR
89#define R_H8_DIR16_X (R_H8_DIR32_X + 1)
90 HOWTO (R_H8_DIR16, /* type */
91 0, /* rightshift */
92 1, /* size (0 = byte, 1 = short, 2 = long) */
93 16, /* bitsize */
b34976b6 94 FALSE, /* pc_relative */
e01b0e69 95 0, /* bitpos */
9d29900b
NC
96 complain_overflow_dont,/* complain_on_overflow */
97 special, /* special_function */
e01b0e69 98 "R_H8_DIR16", /* name */
b34976b6 99 FALSE, /* partial_inplace */
e01b0e69
JR
100 0, /* src_mask */
101 0x0000ffff, /* dst_mask */
b34976b6 102 FALSE), /* pcrel_offset */
e01b0e69
JR
103#define R_H8_DIR8_X (R_H8_DIR16_X + 1)
104 HOWTO (R_H8_DIR8, /* type */
105 0, /* rightshift */
106 0, /* size (0 = byte, 1 = short, 2 = long) */
107 8, /* bitsize */
b34976b6 108 FALSE, /* pc_relative */
e01b0e69 109 0, /* bitpos */
9d29900b
NC
110 complain_overflow_dont,/* complain_on_overflow */
111 special, /* special_function */
112 "R_H8_DIR8", /* name */
b34976b6 113 FALSE, /* partial_inplace */
e01b0e69
JR
114 0, /* src_mask */
115 0x000000ff, /* dst_mask */
b34976b6 116 FALSE), /* pcrel_offset */
e01b0e69
JR
117#define R_H8_DIR16A8_X (R_H8_DIR8_X + 1)
118 HOWTO (R_H8_DIR16A8, /* type */
119 0, /* rightshift */
120 1, /* size (0 = byte, 1 = short, 2 = long) */
121 16, /* bitsize */
b34976b6 122 FALSE, /* pc_relative */
e01b0e69
JR
123 0, /* bitpos */
124 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 125 special, /* special_function */
e01b0e69 126 "R_H8_DIR16A8", /* name */
b34976b6 127 FALSE, /* partial_inplace */
e01b0e69
JR
128 0, /* src_mask */
129 0x0000ffff, /* dst_mask */
b34976b6 130 FALSE), /* pcrel_offset */
e01b0e69
JR
131#define R_H8_DIR16R8_X (R_H8_DIR16A8_X + 1)
132 HOWTO (R_H8_DIR16R8, /* type */
133 0, /* rightshift */
134 1, /* size (0 = byte, 1 = short, 2 = long) */
135 16, /* bitsize */
b34976b6 136 FALSE, /* pc_relative */
e01b0e69
JR
137 0, /* bitpos */
138 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 139 special, /* special_function */
e01b0e69 140 "R_H8_DIR16R8", /* name */
b34976b6 141 FALSE, /* partial_inplace */
e01b0e69
JR
142 0, /* src_mask */
143 0x0000ffff, /* dst_mask */
b34976b6 144 FALSE), /* pcrel_offset */
e01b0e69
JR
145#define R_H8_DIR24A8_X (R_H8_DIR16R8_X + 1)
146 HOWTO (R_H8_DIR24A8, /* type */
147 0, /* rightshift */
148 2, /* size (0 = byte, 1 = short, 2 = long) */
149 24, /* bitsize */
b34976b6 150 FALSE, /* pc_relative */
e01b0e69
JR
151 0, /* bitpos */
152 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 153 special, /* special_function */
e01b0e69 154 "R_H8_DIR24A8", /* name */
b34976b6 155 TRUE, /* partial_inplace */
e01b0e69
JR
156 0xff000000, /* src_mask */
157 0x00ffffff, /* dst_mask */
b34976b6 158 FALSE), /* pcrel_offset */
e01b0e69
JR
159#define R_H8_DIR24R8_X (R_H8_DIR24A8_X + 1)
160 HOWTO (R_H8_DIR24R8, /* type */
161 0, /* rightshift */
162 2, /* size (0 = byte, 1 = short, 2 = long) */
163 24, /* bitsize */
b34976b6 164 FALSE, /* pc_relative */
e01b0e69
JR
165 0, /* bitpos */
166 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 167 special, /* special_function */
e01b0e69 168 "R_H8_DIR24R8", /* name */
b34976b6 169 TRUE, /* partial_inplace */
e01b0e69
JR
170 0xff000000, /* src_mask */
171 0x00ffffff, /* dst_mask */
b34976b6 172 FALSE), /* pcrel_offset */
e01b0e69
JR
173#define R_H8_DIR32A16_X (R_H8_DIR24R8_X + 1)
174 HOWTO (R_H8_DIR32A16, /* type */
175 0, /* rightshift */
176 2, /* size (0 = byte, 1 = short, 2 = long) */
177 32, /* bitsize */
b34976b6 178 FALSE, /* pc_relative */
e01b0e69 179 0, /* bitpos */
9d29900b
NC
180 complain_overflow_dont,/* complain_on_overflow */
181 special, /* special_function */
8c17da6e 182 "R_H8_DIR32A16", /* name */
b34976b6 183 FALSE, /* partial_inplace */
e01b0e69
JR
184 0, /* src_mask */
185 0xffffffff, /* dst_mask */
b34976b6 186 FALSE), /* pcrel_offset */
81f5558e
NC
187#define R_H8_DISP32A16_X (R_H8_DIR32A16_X + 1)
188 HOWTO (R_H8_DISP32A16, /* type */
189 0, /* rightshift */
190 2, /* size (0 = byte, 1 = short, 2 = long) */
191 32, /* bitsize */
192 FALSE, /* pc_relative */
193 0, /* bitpos */
194 complain_overflow_dont,/* complain_on_overflow */
195 special, /* special_function */
196 "R_H8_DISP32A16", /* name */
197 FALSE, /* partial_inplace */
198 0, /* src_mask */
199 0xffffffff, /* dst_mask */
200 FALSE), /* pcrel_offset */
201#define R_H8_PCREL16_X (R_H8_DISP32A16_X + 1)
f2352488
JL
202 HOWTO (R_H8_PCREL16, /* type */
203 0, /* rightshift */
204 1, /* size (0 = byte, 1 = short, 2 = long) */
205 16, /* bitsize */
b34976b6 206 TRUE, /* pc_relative */
f2352488 207 0, /* bitpos */
9d29900b
NC
208 complain_overflow_signed,/* complain_on_overflow */
209 special, /* special_function */
f2352488 210 "R_H8_PCREL16", /* name */
b34976b6 211 FALSE, /* partial_inplace */
f2352488
JL
212 0xffff, /* src_mask */
213 0xffff, /* dst_mask */
b34976b6 214 TRUE), /* pcrel_offset */
f2352488
JL
215#define R_H8_PCREL8_X (R_H8_PCREL16_X + 1)
216 HOWTO (R_H8_PCREL8, /* type */
217 0, /* rightshift */
218 0, /* size (0 = byte, 1 = short, 2 = long) */
219 8, /* bitsize */
b34976b6 220 TRUE, /* pc_relative */
f2352488 221 0, /* bitpos */
9d29900b
NC
222 complain_overflow_signed,/* complain_on_overflow */
223 special, /* special_function */
f2352488 224 "R_H8_PCREL8", /* name */
b34976b6 225 FALSE, /* partial_inplace */
f2352488
JL
226 0xff, /* src_mask */
227 0xff, /* dst_mask */
b34976b6 228 TRUE), /* pcrel_offset */
e01b0e69
JR
229};
230
231/* This structure is used to map BFD reloc codes to H8 ELF relocs. */
232
bc7eab72 233struct elf_reloc_map {
e01b0e69
JR
234 bfd_reloc_code_real_type bfd_reloc_val;
235 unsigned char howto_index;
236};
237
6288878d 238/* An array mapping BFD reloc codes to H8 ELF relocs. */
e01b0e69 239
bc7eab72 240static const struct elf_reloc_map h8_reloc_map[] = {
e01b0e69
JR
241 { BFD_RELOC_NONE, R_H8_NONE_X },
242 { BFD_RELOC_32, R_H8_DIR32_X },
243 { BFD_RELOC_16, R_H8_DIR16_X },
244 { BFD_RELOC_8, R_H8_DIR8_X },
245 { BFD_RELOC_H8_DIR16A8, R_H8_DIR16A8_X },
246 { BFD_RELOC_H8_DIR16R8, R_H8_DIR16R8_X },
247 { BFD_RELOC_H8_DIR24A8, R_H8_DIR24A8_X },
248 { BFD_RELOC_H8_DIR24R8, R_H8_DIR24R8_X },
249 { BFD_RELOC_H8_DIR32A16, R_H8_DIR32A16_X },
81f5558e 250 { BFD_RELOC_H8_DISP32A16, R_H8_DISP32A16_X },
f2352488
JL
251 { BFD_RELOC_16_PCREL, R_H8_PCREL16_X },
252 { BFD_RELOC_8_PCREL, R_H8_PCREL8_X },
e01b0e69
JR
253};
254
0a83638b 255
e01b0e69 256static reloc_howto_type *
c6baf75e
RS
257elf32_h8_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
258 bfd_reloc_code_real_type code)
e01b0e69
JR
259{
260 unsigned int i;
261
262 for (i = 0; i < sizeof (h8_reloc_map) / sizeof (struct elf_reloc_map); i++)
263 {
264 if (h8_reloc_map[i].bfd_reloc_val == code)
265 return &h8_elf_howto_table[(int) h8_reloc_map[i].howto_index];
266 }
267 return NULL;
268}
269
157090f7
AM
270static reloc_howto_type *
271elf32_h8_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
272 const char *r_name)
273{
274 unsigned int i;
275
276 for (i = 0;
277 i < sizeof (h8_elf_howto_table) / sizeof (h8_elf_howto_table[0]);
278 i++)
279 if (h8_elf_howto_table[i].name != NULL
280 && strcasecmp (h8_elf_howto_table[i].name, r_name) == 0)
281 return &h8_elf_howto_table[i];
282
283 return NULL;
284}
285
f3185997 286static bfd_boolean
c6baf75e
RS
287elf32_h8_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
288 Elf_Internal_Rela *elf_reloc)
e01b0e69
JR
289{
290 unsigned int r;
291 unsigned int i;
292
293 r = ELF32_R_TYPE (elf_reloc->r_info);
294 for (i = 0; i < sizeof (h8_elf_howto_table) / sizeof (reloc_howto_type); i++)
bc7eab72 295 if (h8_elf_howto_table[i].type == r)
e01b0e69
JR
296 {
297 bfd_reloc->howto = &h8_elf_howto_table[i];
f3185997 298 return TRUE;
e01b0e69 299 }
f3185997
NC
300 /* xgettext:c-format */
301 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r);
302 bfd_set_error (bfd_error_bad_value);
303 return FALSE;
e01b0e69
JR
304}
305
f3185997
NC
306static bfd_boolean
307elf32_h8_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED,
308 arelent *bfd_reloc ATTRIBUTE_UNUSED,
c6baf75e 309 Elf_Internal_Rela *elf_reloc ATTRIBUTE_UNUSED)
e01b0e69 310{
f3185997 311 return FALSE;
e01b0e69
JR
312}
313
a00c9dbc
JL
314/* Special handling for H8/300 relocs.
315 We only come here for pcrel stuff and return normally if not an -r link.
316 When doing -r, we can't do any arithmetic for the pcrel stuff, because
317 we support relaxing on the H8/300 series chips. */
318static bfd_reloc_status_type
c6baf75e
RS
319special (bfd *abfd ATTRIBUTE_UNUSED,
320 arelent *reloc_entry ATTRIBUTE_UNUSED,
321 asymbol *symbol ATTRIBUTE_UNUSED,
2c3fc389 322 void * data ATTRIBUTE_UNUSED,
c6baf75e
RS
323 asection *input_section ATTRIBUTE_UNUSED,
324 bfd *output_bfd,
325 char **error_message ATTRIBUTE_UNUSED)
a00c9dbc
JL
326{
327 if (output_bfd == (bfd *) NULL)
328 return bfd_reloc_continue;
329
330 /* Adjust the reloc address to that in the output section. */
331 reloc_entry->address += input_section->output_offset;
332 return bfd_reloc_ok;
333}
5e47149d
JL
334
335/* Perform a relocation as part of a final link. */
336static bfd_reloc_status_type
c6baf75e
RS
337elf32_h8_final_link_relocate (unsigned long r_type, bfd *input_bfd,
338 bfd *output_bfd ATTRIBUTE_UNUSED,
339 asection *input_section ATTRIBUTE_UNUSED,
340 bfd_byte *contents, bfd_vma offset,
341 bfd_vma value, bfd_vma addend,
342 struct bfd_link_info *info ATTRIBUTE_UNUSED,
343 asection *sym_sec ATTRIBUTE_UNUSED,
344 int is_local ATTRIBUTE_UNUSED)
5e47149d
JL
345{
346 bfd_byte *hit_data = contents + offset;
347
348 switch (r_type)
349 {
5e47149d
JL
350 case R_H8_NONE:
351 return bfd_reloc_ok;
352
353 case R_H8_DIR32:
354 case R_H8_DIR32A16:
81f5558e 355 case R_H8_DISP32A16:
a00c9dbc 356 case R_H8_DIR24A8:
5e47149d
JL
357 value += addend;
358 bfd_put_32 (input_bfd, value, hit_data);
359 return bfd_reloc_ok;
360
361 case R_H8_DIR16:
362 case R_H8_DIR16A8:
363 case R_H8_DIR16R8:
364 value += addend;
365 bfd_put_16 (input_bfd, value, hit_data);
366 return bfd_reloc_ok;
367
368 /* AKA R_RELBYTE */
369 case R_H8_DIR8:
370 value += addend;
371
5e47149d
JL
372 bfd_put_8 (input_bfd, value, hit_data);
373 return bfd_reloc_ok;
374
5e47149d
JL
375 case R_H8_DIR24R8:
376 value += addend;
377
a00c9dbc 378 /* HIT_DATA is the address for the first byte for the relocated
e804e836 379 value. Subtract 1 so that we can manipulate the data in 32-bit
a00c9dbc
JL
380 hunks. */
381 hit_data--;
382
383 /* Clear out the top byte in value. */
5e47149d 384 value &= 0xffffff;
a00c9dbc
JL
385
386 /* Retrieve the type byte for value from the section contents. */
5e47149d 387 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
a00c9dbc 388
e804e836 389 /* Now scribble it out in one 32-bit hunk. */
5e47149d
JL
390 bfd_put_32 (input_bfd, value, hit_data);
391 return bfd_reloc_ok;
392
f2352488
JL
393 case R_H8_PCREL16:
394 value -= (input_section->output_section->vma
395 + input_section->output_offset);
396 value -= offset;
397 value += addend;
398
a00c9dbc
JL
399 /* The value is relative to the start of the instruction,
400 not the relocation offset. Subtract 2 to account for
401 this minor issue. */
402 value -= 2;
403
f2352488
JL
404 bfd_put_16 (input_bfd, value, hit_data);
405 return bfd_reloc_ok;
406
407 case R_H8_PCREL8:
408 value -= (input_section->output_section->vma
409 + input_section->output_offset);
410 value -= offset;
411 value += addend;
412
a00c9dbc
JL
413 /* The value is relative to the start of the instruction,
414 not the relocation offset. Subtract 1 to account for
415 this minor issue. */
416 value -= 1;
417
f2352488
JL
418 bfd_put_8 (input_bfd, value, hit_data);
419 return bfd_reloc_ok;
420
5e47149d
JL
421 default:
422 return bfd_reloc_notsupported;
423 }
424}
425\f
426/* Relocate an H8 ELF section. */
b34976b6 427static bfd_boolean
c6baf75e
RS
428elf32_h8_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
429 bfd *input_bfd, asection *input_section,
430 bfd_byte *contents, Elf_Internal_Rela *relocs,
431 Elf_Internal_Sym *local_syms,
432 asection **local_sections)
5e47149d
JL
433{
434 Elf_Internal_Shdr *symtab_hdr;
435 struct elf_link_hash_entry **sym_hashes;
436 Elf_Internal_Rela *rel, *relend;
437
438 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
439 sym_hashes = elf_sym_hashes (input_bfd);
440
441 rel = relocs;
442 relend = relocs + input_section->reloc_count;
443 for (; rel < relend; rel++)
444 {
dc810e39 445 unsigned int r_type;
5e47149d
JL
446 unsigned long r_symndx;
447 Elf_Internal_Sym *sym;
448 asection *sec;
449 struct elf_link_hash_entry *h;
450 bfd_vma relocation;
451 bfd_reloc_status_type r;
ab96bf03
AM
452 arelent bfd_reloc;
453 reloc_howto_type *howto;
454
f3185997
NC
455 if (! elf32_h8_info_to_howto (input_bfd, &bfd_reloc, rel))
456 continue;
ab96bf03 457 howto = bfd_reloc.howto;
5e47149d
JL
458
459 r_symndx = ELF32_R_SYM (rel->r_info);
460 r_type = ELF32_R_TYPE (rel->r_info);
5e47149d
JL
461 h = NULL;
462 sym = NULL;
463 sec = NULL;
464 if (r_symndx < symtab_hdr->sh_info)
465 {
466 sym = local_syms + r_symndx;
467 sec = local_sections[r_symndx];
8517fae7 468 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5e47149d
JL
469 }
470 else
471 {
62d887d4 472 bfd_boolean unresolved_reloc, warned, ignored;
59c2e50f 473
b2a8e766
AM
474 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
475 r_symndx, symtab_hdr, sym_hashes,
476 h, sec, relocation,
62d887d4 477 unresolved_reloc, warned, ignored);
5e47149d
JL
478 }
479
dbaa2011 480 if (sec != NULL && discarded_section (sec))
e4067dbb 481 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 482 rel, 1, relend, howto, 0, contents);
ab96bf03 483
0e1862bb 484 if (bfd_link_relocatable (info))
ab96bf03
AM
485 continue;
486
5e47149d
JL
487 r = elf32_h8_final_link_relocate (r_type, input_bfd, output_bfd,
488 input_section,
489 contents, rel->r_offset,
490 relocation, rel->r_addend,
491 info, sec, h == NULL);
492
493 if (r != bfd_reloc_ok)
494 {
495 const char *name;
496 const char *msg = (const char *) 0;
dc810e39 497
5e47149d
JL
498 if (h != NULL)
499 name = h->root.root.string;
500 else
501 {
502 name = (bfd_elf_string_from_elf_section
503 (input_bfd, symtab_hdr->sh_link, sym->st_name));
504 if (name == NULL || *name == '\0')
fd361982 505 name = bfd_section_name (sec);
5e47149d
JL
506 }
507
508 switch (r)
509 {
510 case bfd_reloc_overflow:
1a72702b
AM
511 (*info->callbacks->reloc_overflow)
512 (info, (h ? &h->root : NULL), name, howto->name,
513 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
5e47149d
JL
514 break;
515
516 case bfd_reloc_undefined:
1a72702b
AM
517 (*info->callbacks->undefined_symbol)
518 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
5e47149d
JL
519 break;
520
521 case bfd_reloc_outofrange:
522 msg = _("internal error: out of range error");
523 goto common_error;
524
525 case bfd_reloc_notsupported:
526 msg = _("internal error: unsupported relocation error");
527 goto common_error;
528
529 case bfd_reloc_dangerous:
530 msg = _("internal error: dangerous error");
531 goto common_error;
532
533 default:
534 msg = _("internal error: unknown error");
535 /* fall through */
536
537 common_error:
1a72702b
AM
538 (*info->callbacks->warning) (info, msg, name, input_bfd,
539 input_section, rel->r_offset);
5e47149d
JL
540 break;
541 }
542 }
543 }
544
b34976b6 545 return TRUE;
5e47149d
JL
546}
547
0a83638b
JL
548/* Object files encode the specific H8 model they were compiled
549 for in the ELF flags field.
550
551 Examine that field and return the proper BFD machine type for
552 the object file. */
dc810e39 553static unsigned long
c6baf75e 554elf32_h8_mach (flagword flags)
0a83638b
JL
555{
556 switch (flags & EF_H8_MACH)
557 {
558 case E_H8_MACH_H8300:
559 default:
560 return bfd_mach_h8300;
561
562 case E_H8_MACH_H8300H:
563 return bfd_mach_h8300h;
564
565 case E_H8_MACH_H8300S:
566 return bfd_mach_h8300s;
8d9cd6b1
NC
567
568 case E_H8_MACH_H8300HN:
569 return bfd_mach_h8300hn;
570
571 case E_H8_MACH_H8300SN:
572 return bfd_mach_h8300sn;
5d1db417
MS
573
574 case E_H8_MACH_H8300SX:
575 return bfd_mach_h8300sx;
f4984206
RS
576
577 case E_H8_MACH_H8300SXN:
578 return bfd_mach_h8300sxn;
0a83638b
JL
579 }
580}
581
582/* The final processing done just before writing out a H8 ELF object
583 file. We use this opportunity to encode the BFD machine type
584 into the flags field in the object file. */
585
cc364be6
AM
586static bfd_boolean
587elf32_h8_final_write_processing (bfd *abfd)
0a83638b
JL
588{
589 unsigned long val;
590
591 switch (bfd_get_mach (abfd))
592 {
593 default:
594 case bfd_mach_h8300:
595 val = E_H8_MACH_H8300;
596 break;
597
598 case bfd_mach_h8300h:
599 val = E_H8_MACH_H8300H;
600 break;
601
602 case bfd_mach_h8300s:
603 val = E_H8_MACH_H8300S;
604 break;
8d9cd6b1
NC
605
606 case bfd_mach_h8300hn:
607 val = E_H8_MACH_H8300HN;
608 break;
609
610 case bfd_mach_h8300sn:
611 val = E_H8_MACH_H8300SN;
612 break;
5d1db417
MS
613
614 case bfd_mach_h8300sx:
615 val = E_H8_MACH_H8300SX;
616 break;
f4984206
RS
617
618 case bfd_mach_h8300sxn:
619 val = E_H8_MACH_H8300SXN;
620 break;
0a83638b
JL
621 }
622
623 elf_elfheader (abfd)->e_flags &= ~ (EF_H8_MACH);
624 elf_elfheader (abfd)->e_flags |= val;
cc364be6 625 return _bfd_elf_final_write_processing (abfd);
0a83638b
JL
626}
627
628/* Return nonzero if ABFD represents a valid H8 ELF object file; also
629 record the encoded machine type found in the ELF flags. */
630
b34976b6 631static bfd_boolean
c6baf75e 632elf32_h8_object_p (bfd *abfd)
0a83638b
JL
633{
634 bfd_default_set_arch_mach (abfd, bfd_arch_h8300,
635 elf32_h8_mach (elf_elfheader (abfd)->e_flags));
b34976b6 636 return TRUE;
0a83638b
JL
637}
638
639/* Merge backend specific data from an object file to the output
640 object file when linking. The only data we need to copy at this
641 time is the architecture/machine information. */
642
b34976b6 643static bfd_boolean
50e03d47 644elf32_h8_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
0a83638b 645{
50e03d47
AM
646 bfd *obfd = info->output_bfd;
647
0a83638b
JL
648 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
649 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 650 return TRUE;
0a83638b
JL
651
652 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
653 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
654 {
655 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
96ef1419
KH
656 bfd_get_mach (ibfd)))
657 return FALSE;
0a83638b
JL
658 }
659
b34976b6 660 return TRUE;
0a83638b
JL
661}
662
5907e628
JL
663/* This function handles relaxing for the H8..
664
4cc11e76 665 There are a few relaxing opportunities available on the H8:
5907e628 666
07d6d2b8 667 jmp/jsr:24 -> bra/bsr:8 2 bytes
5907e628
JL
668 The jmp may be completely eliminated if the previous insn is a
669 conditional branch to the insn after the jump. In that case
670 we invert the branch and delete the jump and save 4 bytes.
671
07d6d2b8
AM
672 bCC:16 -> bCC:8 2 bytes
673 bsr:16 -> bsr:8 2 bytes
5907e628 674
07d6d2b8
AM
675 bset:16 -> bset:8 2 bytes
676 bset:24/32 -> bset:8 4 bytes
630a7b0a
KH
677 (also applicable to other bit manipulation instructions)
678
07d6d2b8
AM
679 mov.b:16 -> mov.b:8 2 bytes
680 mov.b:24/32 -> mov.b:8 4 bytes
5907e628 681
07d6d2b8 682 bset:24/32 -> bset:16 2 bytes
7e89635a
KH
683 (also applicable to other bit manipulation instructions)
684
07d6d2b8 685 mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes
81f5558e 686
07d6d2b8 687 mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes. */
5907e628 688
b34976b6 689static bfd_boolean
c6baf75e
RS
690elf32_h8_relax_section (bfd *abfd, asection *sec,
691 struct bfd_link_info *link_info, bfd_boolean *again)
5907e628
JL
692{
693 Elf_Internal_Shdr *symtab_hdr;
694 Elf_Internal_Rela *internal_relocs;
5907e628
JL
695 Elf_Internal_Rela *irel, *irelend;
696 bfd_byte *contents = NULL;
6cdc0ccc 697 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
698 static asection *last_input_section = NULL;
699 static Elf_Internal_Rela *last_reloc = NULL;
700
701 /* Assume nothing changes. */
b34976b6 702 *again = FALSE;
5907e628 703
1049f94e 704 /* We don't have to do anything for a relocatable link, if
5907e628
JL
705 this section does not have relocs, or if this is not a
706 code section. */
0e1862bb 707 if (bfd_link_relocatable (link_info)
5907e628
JL
708 || (sec->flags & SEC_RELOC) == 0
709 || sec->reloc_count == 0
710 || (sec->flags & SEC_CODE) == 0)
b34976b6 711 return TRUE;
5907e628 712
5907e628
JL
713 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
714
715 /* Get a copy of the native relocations. */
45d6a902 716 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 717 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
5907e628
JL
718 link_info->keep_memory));
719 if (internal_relocs == NULL)
720 goto error_return;
5907e628
JL
721
722 if (sec != last_input_section)
723 last_reloc = NULL;
724
725 last_input_section = sec;
726
727 /* Walk through the relocs looking for relaxing opportunities. */
728 irelend = internal_relocs + sec->reloc_count;
729 for (irel = internal_relocs; irel < irelend; irel++)
730 {
731 bfd_vma symval;
732
bcb012d3
DD
733 {
734 arelent bfd_reloc;
bcb012d3 735
f3185997
NC
736 if (! elf32_h8_info_to_howto (abfd, &bfd_reloc, irel))
737 continue;
bcb012d3 738 }
5907e628
JL
739 /* Keep track of the previous reloc so that we can delete
740 some long jumps created by the compiler. */
741 if (irel != internal_relocs)
742 last_reloc = irel - 1;
1b786873 743
81f5558e
NC
744 switch(ELF32_R_TYPE (irel->r_info))
745 {
746 case R_H8_DIR24R8:
747 case R_H8_PCREL16:
748 case R_H8_DIR16A8:
749 case R_H8_DIR24A8:
750 case R_H8_DIR32A16:
751 case R_H8_DISP32A16:
752 break;
753 default:
754 continue;
755 }
76f99c63 756
5907e628
JL
757 /* Get the section contents if we haven't done so already. */
758 if (contents == NULL)
759 {
760 /* Get cached copy if it exists. */
761 if (elf_section_data (sec)->this_hdr.contents != NULL)
762 contents = elf_section_data (sec)->this_hdr.contents;
763 else
764 {
765 /* Go get them off disk. */
eea6121a 766 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
5907e628
JL
767 goto error_return;
768 }
769 }
770
9ad5cbcf 771 /* Read this BFD's local symbols if we haven't done so already. */
6cdc0ccc 772 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
5907e628 773 {
6cdc0ccc
AM
774 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
775 if (isymbuf == NULL)
776 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
777 symtab_hdr->sh_info, 0,
778 NULL, NULL, NULL);
779 if (isymbuf == NULL)
780 goto error_return;
5907e628
JL
781 }
782
783 /* Get the value of the symbol referred to by the reloc. */
784 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
785 {
5907e628 786 /* A local symbol. */
6cdc0ccc
AM
787 Elf_Internal_Sym *isym;
788 asection *sym_sec;
5907e628 789
32ac2c9a 790 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6cdc0ccc 791 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
03d14457
NC
792 symval = isym->st_value;
793 /* If the reloc is absolute, it will not have
794 a symbol or section associated with it. */
795 if (sym_sec)
796 symval += sym_sec->output_section->vma
797 + sym_sec->output_offset;
5907e628
JL
798 }
799 else
800 {
801 unsigned long indx;
802 struct elf_link_hash_entry *h;
803
804 /* An external symbol. */
805 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
806 h = elf_sym_hashes (abfd)[indx];
807 BFD_ASSERT (h != NULL);
808 if (h->root.type != bfd_link_hash_defined
809 && h->root.type != bfd_link_hash_defweak)
810 {
811 /* This appears to be a reference to an undefined
07d6d2b8
AM
812 symbol. Just ignore it--it will be caught by the
813 regular reloc processing. */
5907e628
JL
814 continue;
815 }
816
817 symval = (h->root.u.def.value
818 + h->root.u.def.section->output_section->vma
819 + h->root.u.def.section->output_offset);
820 }
821
822 /* For simplicity of coding, we are going to modify the section
823 contents, the section relocs, and the BFD symbol table. We
824 must tell the rest of the code not to free up this
825 information. It would be possible to instead create a table
826 of changes which have to be made, as is done in coff-mips.c;
827 that would be more work, but would require less memory when
828 the linker is run. */
829 switch (ELF32_R_TYPE (irel->r_info))
830 {
81f5558e
NC
831 /* Try to turn a 24-bit absolute branch/call into an 8-bit
832 pc-relative branch/call. */
5907e628
JL
833 case R_H8_DIR24R8:
834 {
835 bfd_vma value = symval + irel->r_addend;
836 bfd_vma dot, gap;
837
838 /* Get the address of this instruction. */
839 dot = (sec->output_section->vma
840 + sec->output_offset + irel->r_offset - 1);
841
842 /* Compute the distance from this insn to the branch target. */
843 gap = value - dot;
844
845 /* If the distance is within -126..+130 inclusive, then we can
846 relax this jump. +130 is valid since the target will move
847 two bytes closer if we do relax this branch. */
dc810e39 848 if ((int) gap >= -126 && (int) gap <= 130)
5907e628
JL
849 {
850 unsigned char code;
851
852 /* Note that we've changed the relocs, section contents,
853 etc. */
854 elf_section_data (sec)->relocs = internal_relocs;
5907e628 855 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 856 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 857
e514ac71
NC
858 /* Get the instruction code being relaxed. */
859 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
860
5907e628
JL
861 /* If the previous instruction conditionally jumped around
862 this instruction, we may be able to reverse the condition
863 and redirect the previous instruction to the target of
864 this instruction.
865
866 Such sequences are used by the compiler to deal with
e514ac71
NC
867 long conditional branches.
868
869 Only perform this optimisation for jumps (code 0x5a) not
870 subroutine calls, as otherwise it could transform:
b34976b6 871
81f5558e
NC
872 mov.w r0,r0
873 beq .L1
874 jsr @_bar
875 .L1: rts
876 _bar: rts
e514ac71 877 into:
81f5558e
NC
878 mov.w r0,r0
879 bne _bar
880 rts
881 _bar: rts
e514ac71
NC
882
883 which changes the call (jsr) into a branch (bne). */
81f5558e 884 if (code == 0x5a /* jmp24. */
e514ac71 885 && (int) gap <= 130
dc810e39 886 && (int) gap >= -128
5907e628
JL
887 && last_reloc
888 && ELF32_R_TYPE (last_reloc->r_info) == R_H8_PCREL8
889 && ELF32_R_SYM (last_reloc->r_info) < symtab_hdr->sh_info)
890 {
891 bfd_vma last_value;
892 asection *last_sym_sec;
6cdc0ccc 893 Elf_Internal_Sym *last_sym;
5907e628
JL
894
895 /* We will need to examine the symbol used by the
896 previous relocation. */
dc810e39 897
6cdc0ccc 898 last_sym = isymbuf + ELF32_R_SYM (last_reloc->r_info);
5907e628 899 last_sym_sec
6cdc0ccc
AM
900 = bfd_section_from_elf_index (abfd, last_sym->st_shndx);
901 last_value = (last_sym->st_value
5907e628
JL
902 + last_sym_sec->output_section->vma
903 + last_sym_sec->output_offset);
904
905 /* Verify that the previous relocation was for a
906 branch around this instruction and that no symbol
907 exists at the current location. */
908 if (last_value == dot + 4
909 && last_reloc->r_offset + 2 == irel->r_offset
9ad5cbcf 910 && ! elf32_h8_symbol_address_p (abfd, sec, dot))
5907e628
JL
911 {
912 /* We can eliminate this jump. Twiddle the
913 previous relocation as necessary. */
914 irel->r_info
915 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
916 ELF32_R_TYPE (R_H8_NONE));
917
bc7eab72 918 last_reloc->r_info
5907e628 919 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
bc7eab72
KH
920 ELF32_R_TYPE (R_H8_PCREL8));
921 last_reloc->r_addend = irel->r_addend;
5907e628
JL
922
923 code = bfd_get_8 (abfd,
924 contents + last_reloc->r_offset - 1);
925 code ^= 1;
926 bfd_put_8 (abfd,
927 code,
81f5558e 928 contents + last_reloc->r_offset - 1);
5907e628
JL
929
930 /* Delete four bytes of data. */
931 if (!elf32_h8_relax_delete_bytes (abfd, sec,
932 irel->r_offset - 1,
933 4))
934 goto error_return;
935
b34976b6 936 *again = TRUE;
5907e628
JL
937 break;
938 }
939 }
940
5907e628 941 if (code == 0x5e)
81f5558e
NC
942 /* This is jsr24 */
943 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1); /* bsr8. */
5907e628 944 else if (code == 0x5a)
81f5558e
NC
945 /* This is jmp24 */
946 bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1); /* bra8. */
5907e628
JL
947 else
948 abort ();
949
950 /* Fix the relocation's type. */
951 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
952 R_H8_PCREL8);
953
954 /* Delete two bytes of data. */
955 if (!elf32_h8_relax_delete_bytes (abfd, sec,
956 irel->r_offset + 1, 2))
957 goto error_return;
958
959 /* That will change things, so, we should relax again.
960 Note that this is not required, and it may be slow. */
b34976b6 961 *again = TRUE;
5907e628
JL
962 }
963 break;
964 }
965
81f5558e
NC
966 /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative
967 branch. */
5907e628
JL
968 case R_H8_PCREL16:
969 {
970 bfd_vma value = symval + irel->r_addend;
971 bfd_vma dot;
972 bfd_vma gap;
973
974 /* Get the address of this instruction. */
975 dot = (sec->output_section->vma
976 + sec->output_offset
977 + irel->r_offset - 2);
dc810e39 978
5907e628
JL
979 gap = value - dot;
980
981 /* If the distance is within -126..+130 inclusive, then we can
982 relax this jump. +130 is valid since the target will move
983 two bytes closer if we do relax this branch. */
bc7eab72 984 if ((int) gap >= -126 && (int) gap <= 130)
5907e628 985 {
bc7eab72 986 unsigned char code;
5907e628 987
bc7eab72 988 /* Note that we've changed the relocs, section contents,
5907e628 989 etc. */
bc7eab72
KH
990 elf_section_data (sec)->relocs = internal_relocs;
991 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 992 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 993
bc7eab72
KH
994 /* Get the opcode. */
995 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628
JL
996
997 if (code == 0x58)
998 {
999 /* bCC:16 -> bCC:8 */
7e89635a
KH
1000 /* Get the second byte of the original insn, which
1001 contains the condition code. */
5907e628 1002 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
7e89635a 1003
81f5558e 1004 /* Compute the first byte of the relaxed
7e89635a
KH
1005 instruction. The original sequence 0x58 0xX0
1006 is relaxed to 0x4X, where X represents the
1007 condition code. */
5907e628
JL
1008 code &= 0xf0;
1009 code >>= 4;
1010 code |= 0x40;
81f5558e 1011 bfd_put_8 (abfd, code, contents + irel->r_offset - 2); /* bCC:8. */
5907e628 1012 }
81f5558e 1013 else if (code == 0x5c) /* bsr16. */
7e89635a 1014 /* This is bsr. */
81f5558e 1015 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2); /* bsr8. */
5907e628 1016 else
bcb012d3
DD
1017 /* Might be MOVSD. */
1018 break;
5907e628
JL
1019
1020 /* Fix the relocation's type. */
bc7eab72 1021 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1022 R_H8_PCREL8);
bc7eab72 1023 irel->r_offset--;
5907e628 1024
bc7eab72
KH
1025 /* Delete two bytes of data. */
1026 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1027 irel->r_offset + 1, 2))
1028 goto error_return;
1029
bc7eab72 1030 /* That will change things, so, we should relax again.
5907e628 1031 Note that this is not required, and it may be slow. */
b34976b6 1032 *again = TRUE;
5907e628
JL
1033 }
1034 break;
1035 }
1036
81f5558e
NC
1037 /* This is a 16-bit absolute address in one of the following
1038 instructions:
630a7b0a
KH
1039
1040 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1041 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1042 "mov.b"
1043
81f5558e
NC
1044 We may relax this into an 8-bit absolute address if it's in
1045 the right range. */
5907e628
JL
1046 case R_H8_DIR16A8:
1047 {
7a9823f1 1048 bfd_vma value;
5907e628 1049
7a9823f1
RS
1050 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1051 if (value >= 0xffffff00u)
5907e628 1052 {
bc7eab72 1053 unsigned char code;
ca9a79a1 1054 unsigned char temp_code;
5907e628 1055
bc7eab72 1056 /* Note that we've changed the relocs, section contents,
5907e628 1057 etc. */
bc7eab72
KH
1058 elf_section_data (sec)->relocs = internal_relocs;
1059 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1060 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1061
bc7eab72
KH
1062 /* Get the opcode. */
1063 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1064
630a7b0a
KH
1065 /* All instructions with R_H8_DIR16A8 start with
1066 0x6a. */
bc7eab72 1067 if (code != 0x6a)
5907e628
JL
1068 abort ();
1069
ca9a79a1 1070 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
630a7b0a
KH
1071 /* If this is a mov.b instruction, clear the lower
1072 nibble, which contains the source/destination
1073 register number. */
ca9a79a1
NC
1074 if ((temp_code & 0x10) != 0x10)
1075 temp_code &= 0xf0;
5907e628 1076
ca9a79a1
NC
1077 switch (temp_code)
1078 {
1079 case 0x00:
630a7b0a 1080 /* This is mov.b @aa:16,Rd. */
ca9a79a1
NC
1081 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1082 contents + irel->r_offset - 2);
1083 break;
1084 case 0x80:
630a7b0a 1085 /* This is mov.b Rs,@aa:16. */
ca9a79a1
NC
1086 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1087 contents + irel->r_offset - 2);
1088 break;
1089 case 0x18:
630a7b0a
KH
1090 /* This is a bit-maniputation instruction that
1091 stores one bit into memory, one of "bclr",
1092 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1093 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1094 break;
1095 case 0x10:
630a7b0a
KH
1096 /* This is a bit-maniputation instruction that
1097 loads one bit from memory, one of "band",
1098 "biand", "bild", "bior", "bixor", "bld", "bor",
1099 "btst", and "bxor". */
ca9a79a1
NC
1100 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1101 break;
1102 default:
1103 abort ();
1104 }
5907e628 1105
bc7eab72
KH
1106 /* Fix the relocation's type. */
1107 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628
JL
1108 R_H8_DIR8);
1109
8c17da6e
NC
1110 /* Move the relocation. */
1111 irel->r_offset--;
1112
bc7eab72
KH
1113 /* Delete two bytes of data. */
1114 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1115 irel->r_offset + 1, 2))
1116 goto error_return;
1117
bc7eab72 1118 /* That will change things, so, we should relax again.
5907e628 1119 Note that this is not required, and it may be slow. */
b34976b6 1120 *again = TRUE;
5907e628
JL
1121 }
1122 break;
1123 }
1124
81f5558e
NC
1125 /* This is a 24-bit absolute address in one of the following
1126 instructions:
630a7b0a
KH
1127
1128 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1129 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1130 "mov.b"
1131
81f5558e
NC
1132 We may relax this into an 8-bit absolute address if it's in
1133 the right range. */
5907e628
JL
1134 case R_H8_DIR24A8:
1135 {
7a9823f1 1136 bfd_vma value;
5907e628 1137
7a9823f1
RS
1138 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1139 if (value >= 0xffffff00u)
5907e628 1140 {
bc7eab72 1141 unsigned char code;
ca9a79a1 1142 unsigned char temp_code;
5907e628 1143
bc7eab72 1144 /* Note that we've changed the relocs, section contents,
5907e628 1145 etc. */
bc7eab72
KH
1146 elf_section_data (sec)->relocs = internal_relocs;
1147 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1148 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1149
bc7eab72
KH
1150 /* Get the opcode. */
1151 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1152
630a7b0a
KH
1153 /* All instructions with R_H8_DIR24A8 start with
1154 0x6a. */
bc7eab72 1155 if (code != 0x6a)
5907e628
JL
1156 abort ();
1157
ca9a79a1
NC
1158 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1159
630a7b0a
KH
1160 /* If this is a mov.b instruction, clear the lower
1161 nibble, which contains the source/destination
1162 register number. */
ca9a79a1
NC
1163 if ((temp_code & 0x30) != 0x30)
1164 temp_code &= 0xf0;
5907e628 1165
ca9a79a1 1166 switch (temp_code)
03d14457 1167 {
7a9823f1 1168 case 0x20:
630a7b0a 1169 /* This is mov.b @aa:24/32,Rd. */
03d14457
NC
1170 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1171 contents + irel->r_offset - 2);
1172 break;
7a9823f1 1173 case 0xa0:
630a7b0a 1174 /* This is mov.b Rs,@aa:24/32. */
03d14457
NC
1175 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1176 contents + irel->r_offset - 2);
1177 break;
ca9a79a1 1178 case 0x38:
630a7b0a
KH
1179 /* This is a bit-maniputation instruction that
1180 stores one bit into memory, one of "bclr",
1181 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1182 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1183 break;
1184 case 0x30:
630a7b0a
KH
1185 /* This is a bit-maniputation instruction that
1186 loads one bit from memory, one of "band",
1187 "biand", "bild", "bior", "bixor", "bld", "bor",
1188 "btst", and "bxor". */
ca9a79a1
NC
1189 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1190 break;
03d14457 1191 default:
ca9a79a1 1192 abort();
03d14457
NC
1193 }
1194
bc7eab72
KH
1195 /* Fix the relocation's type. */
1196 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1197 R_H8_DIR8);
7a9823f1 1198 irel->r_offset--;
5907e628 1199
81f5558e 1200 /* Delete four bytes of data. */
7a9823f1
RS
1201 if (!elf32_h8_relax_delete_bytes (abfd, sec,
1202 irel->r_offset + 1, 4))
5907e628
JL
1203 goto error_return;
1204
bc7eab72 1205 /* That will change things, so, we should relax again.
5907e628 1206 Note that this is not required, and it may be slow. */
b34976b6 1207 *again = TRUE;
7a9823f1 1208 break;
5907e628
JL
1209 }
1210 }
1211
7e89635a
KH
1212 /* Fall through. */
1213
1214 /* This is a 24-/32-bit absolute address in one of the
1215 following instructions:
1216
81f5558e
NC
1217 "band", "bclr", "biand", "bild", "bior", "bist",
1218 "bixor", "bld", "bnot", "bor", "bset", "bst", "btst",
1219 "bxor", "ldc.w", "stc.w" and "mov.[bwl]"
5907e628 1220
7e89635a
KH
1221 We may relax this into an 16-bit absolute address if it's
1222 in the right range. */
5907e628
JL
1223 case R_H8_DIR32A16:
1224 {
7a9823f1 1225 bfd_vma value;
5907e628 1226
7a9823f1
RS
1227 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1228 if (value <= 0x7fff || value >= 0xffff8000u)
5907e628 1229 {
bc7eab72 1230 unsigned char code;
bcb012d3
DD
1231 unsigned char op0, op1, op2, op3;
1232 unsigned char *op_ptr;
5907e628 1233
bc7eab72 1234 /* Note that we've changed the relocs, section contents,
5907e628 1235 etc. */
bc7eab72
KH
1236 elf_section_data (sec)->relocs = internal_relocs;
1237 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1238 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1239
bcb012d3
DD
1240 if (irel->r_offset >= 4)
1241 {
81f5558e 1242 /* Check for 4-byte MOVA relaxation (SH-specific). */
bcb012d3
DD
1243 int second_reloc = 0;
1244
1245 op_ptr = contents + irel->r_offset - 4;
1246
1247 if (last_reloc)
1248 {
1249 arelent bfd_reloc;
1250 reloc_howto_type *h;
1251 bfd_vma last_reloc_size;
1252
f3185997
NC
1253 if (! elf32_h8_info_to_howto (abfd, &bfd_reloc, last_reloc))
1254 break;
bcb012d3
DD
1255 h = bfd_reloc.howto;
1256 last_reloc_size = 1 << h->size;
1257 if (last_reloc->r_offset + last_reloc_size
1258 == irel->r_offset)
1259 {
1260 op_ptr -= last_reloc_size;
1261 second_reloc = 1;
1262 }
1263 }
81f5558e 1264
d79dcc73 1265 if (irel + 1 < irelend)
bcb012d3
DD
1266 {
1267 Elf_Internal_Rela *next_reloc = irel + 1;
1268 arelent bfd_reloc;
1269 reloc_howto_type *h;
1270 bfd_vma next_reloc_size;
1271
f3185997
NC
1272 if (! elf32_h8_info_to_howto (abfd, &bfd_reloc, next_reloc))
1273 break;
bcb012d3
DD
1274 h = bfd_reloc.howto;
1275 next_reloc_size = 1 << h->size;
1276 if (next_reloc->r_offset + next_reloc_size
1277 == irel->r_offset)
1278 {
1279 op_ptr -= next_reloc_size;
1280 second_reloc = 1;
1281 }
1282 }
1283
1284 op0 = bfd_get_8 (abfd, op_ptr + 0);
1285 op1 = bfd_get_8 (abfd, op_ptr + 1);
1286 op2 = bfd_get_8 (abfd, op_ptr + 2);
1287 op3 = bfd_get_8 (abfd, op_ptr + 3);
1288
1289 if (op0 == 0x01
1290 && (op1 & 0xdf) == 0x5f
1291 && (op2 & 0x40) == 0x40
1292 && (op3 & 0x80) == 0x80)
1293 {
1294 if ((op2 & 0x08) == 0)
1295 second_reloc = 1;
1296
1297 if (second_reloc)
1298 {
1299 op3 &= ~0x08;
1300 bfd_put_8 (abfd, op3, op_ptr + 3);
1301 }
1302 else
1303 {
1304 op2 &= ~0x08;
1305 bfd_put_8 (abfd, op2, op_ptr + 2);
1306 }
1307 goto r_h8_dir32a16_common;
1308 }
1309 }
1310
81f5558e 1311 /* Now check for short version of MOVA. (SH-specific) */
bcb012d3
DD
1312 op_ptr = contents + irel->r_offset - 2;
1313 op0 = bfd_get_8 (abfd, op_ptr + 0);
1314 op1 = bfd_get_8 (abfd, op_ptr + 1);
1315
1316 if (op0 == 0x7a
1317 && (op1 & 0x88) == 0x80)
1318 {
1319 op1 |= 0x08;
1320 bfd_put_8 (abfd, op1, op_ptr + 1);
1321 goto r_h8_dir32a16_common;
1322 }
1323
bc7eab72
KH
1324 /* Get the opcode. */
1325 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
5907e628 1326
7e89635a
KH
1327 /* Fix the opcode. For all the instructions that
1328 belong to this relaxation, we simply need to turn
1329 off bit 0x20 in the previous byte. */
bc7eab72 1330 code &= ~0x20;
5907e628 1331
bc7eab72 1332 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
5907e628 1333
bcb012d3 1334 r_h8_dir32a16_common:
bc7eab72
KH
1335 /* Fix the relocation's type. */
1336 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8c17da6e 1337 R_H8_DIR16);
5907e628 1338
bc7eab72
KH
1339 /* Delete two bytes of data. */
1340 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1341 irel->r_offset + 1, 2))
1342 goto error_return;
1343
bc7eab72 1344 /* That will change things, so, we should relax again.
5907e628 1345 Note that this is not required, and it may be slow. */
b34976b6 1346 *again = TRUE;
5907e628 1347 }
81f5558e 1348 break; /* case R_H8_DIR32A16 */
5907e628
JL
1349 }
1350
81f5558e
NC
1351 case R_H8_DISP32A16:
1352 /* mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes
1353 It is assured that instruction uses at least 4 bytes opcode before
1354 reloc entry addressing mode "register indirect with displacement"
1355 relaxing options (all saving 4 bytes):
1356 0x78 0sss0000 0x6A 0010dddd disp:32 mov.b @(d:32,ERs),Rd ->
1357 0x6E 0sssdddd disp:16 mov.b @(d:16,ERs),Rd
1358 0x78 0sss0000 0x6B 0010dddd disp:32 mov.w @(d:32,ERs),Rd ->
1359 0x6F 0sssdddd disp:16 mov.w @(d:16,ERs),Rd
1360 0x01 0x00 0x78 0sss0000 0x6B 00100ddd disp:32 mov.l @(d:32,ERs),ERd ->
1361 0x01 0x00 0x6F 0sss0ddd disp:16 mov.l @(d:16,ERs),ERd
1362
1363 0x78 0ddd0000 0x6A 1010ssss disp:32 mov.b Rs,@(d:32,ERd) ->
1364 0x6E 1dddssss disp:16 mov.b Rs,@(d:16,ERd)
1365 0x78 0ddd0000 0x6B 1010ssss disp:32 mov.w Rs,@(d:32,ERd) ->
1366 0x6F 1dddssss disp:16 mov.w Rs,@(d:16,ERd)
1367 0x01 0x00 0x78 xddd0000 0x6B 10100sss disp:32 mov.l ERs,@(d:32,ERd) ->
1368 0x01 0x00 0x6F 1ddd0sss disp:16 mov.l ERs,@(d:16,ERd)
1369 mov.l prefix 0x01 0x00 can be left as is and mov.l handled same
1370 as mov.w/ */
1371 {
1372 bfd_vma value;
1373
1374 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1375 if (value <= 0x7fff || value >= 0xffff8000u)
1376 {
1377 unsigned char op0, op1, op2, op3, op0n, op1n;
1378 int relax = 0;
1379
1380 /* Note that we've changed the relocs, section contents,
1381 etc. */
1382 elf_section_data (sec)->relocs = internal_relocs;
1383 elf_section_data (sec)->this_hdr.contents = contents;
1384 symtab_hdr->contents = (unsigned char *) isymbuf;
1385
1386 if (irel->r_offset >= 4)
1387 {
1388 op0 = bfd_get_8 (abfd, contents + irel->r_offset - 4);
1389 op1 = bfd_get_8 (abfd, contents + irel->r_offset - 3);
1390 op2 = bfd_get_8 (abfd, contents + irel->r_offset - 2);
1391 op3 = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1392
1393 if (op0 == 0x78)
1394 {
1395 switch(op2)
1396 {
1397 case 0x6A:
1398 if ((op1 & 0x8F) == 0x00 && (op3 & 0x70) == 0x20)
1399 {
1400 /* mov.b. */
1401 op0n = 0x6E;
1402 relax = 1;
1403 }
1404 break;
1405 case 0x6B:
1406 if ((op1 & 0x0F) == 0x00 && (op3 & 0x70) == 0x20)
1407 {
1408 /* mov.w/l. */
1409 op0n = 0x6F;
1410 relax = 1;
1411 }
1412 break;
1413 default:
1414 break;
1415 }
1416 }
1417 }
1418
1419 if (relax)
1420 {
1421 op1n = (op3 & 0x8F) | (op1 & 0x70);
1422 bfd_put_8 (abfd, op0n, contents + irel->r_offset - 4);
1423 bfd_put_8 (abfd, op1n, contents + irel->r_offset - 3);
1424
1425 /* Fix the relocation's type. */
1426 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_H8_DIR16);
1427 irel->r_offset -= 2;
1428
1429 /* Delete four bytes of data. */
1430 if (!elf32_h8_relax_delete_bytes (abfd, sec, irel->r_offset + 2, 4))
1431 goto error_return;
1432
1433 /* That will change things, so, we should relax again.
1434 Note that this is not required, and it may be slow. */
1435 *again = TRUE;
1436 }
1437 }
1438 }
1439 break;
1440
5907e628
JL
1441 default:
1442 break;
1443 }
1444 }
1445
6cdc0ccc
AM
1446 if (isymbuf != NULL
1447 && symtab_hdr->contents != (unsigned char *) isymbuf)
5907e628 1448 {
6cdc0ccc
AM
1449 if (! link_info->keep_memory)
1450 free (isymbuf);
1451 else
1452 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628
JL
1453 }
1454
6cdc0ccc
AM
1455 if (contents != NULL
1456 && elf_section_data (sec)->this_hdr.contents != contents)
5907e628
JL
1457 {
1458 if (! link_info->keep_memory)
6cdc0ccc 1459 free (contents);
5907e628
JL
1460 else
1461 {
1462 /* Cache the section contents for elf_link_input_bfd. */
1463 elf_section_data (sec)->this_hdr.contents = contents;
1464 }
9ad5cbcf
AM
1465 }
1466
6cdc0ccc
AM
1467 if (internal_relocs != NULL
1468 && elf_section_data (sec)->relocs != internal_relocs)
1469 free (internal_relocs);
5907e628 1470
b34976b6 1471 return TRUE;
5907e628
JL
1472
1473 error_return:
6cdc0ccc
AM
1474 if (isymbuf != NULL
1475 && symtab_hdr->contents != (unsigned char *) isymbuf)
1476 free (isymbuf);
1477 if (contents != NULL
1478 && elf_section_data (sec)->this_hdr.contents != contents)
1479 free (contents);
1480 if (internal_relocs != NULL
1481 && elf_section_data (sec)->relocs != internal_relocs)
1482 free (internal_relocs);
b34976b6 1483 return FALSE;
5907e628
JL
1484}
1485
1486/* Delete some bytes from a section while relaxing. */
1487
b34976b6 1488static bfd_boolean
c6baf75e 1489elf32_h8_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count)
5907e628
JL
1490{
1491 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1492 unsigned int sec_shndx;
5907e628
JL
1493 bfd_byte *contents;
1494 Elf_Internal_Rela *irel, *irelend;
6cdc0ccc
AM
1495 Elf_Internal_Sym *isym;
1496 Elf_Internal_Sym *isymend;
5907e628 1497 bfd_vma toaddr;
9ad5cbcf
AM
1498 struct elf_link_hash_entry **sym_hashes;
1499 struct elf_link_hash_entry **end_hashes;
1500 unsigned int symcount;
5907e628 1501
9ad5cbcf 1502 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1503
1504 contents = elf_section_data (sec)->this_hdr.contents;
1505
eea6121a 1506 toaddr = sec->size;
5907e628
JL
1507
1508 irel = elf_section_data (sec)->relocs;
1509 irelend = irel + sec->reloc_count;
1510
1511 /* Actually delete the bytes. */
dc810e39
AM
1512 memmove (contents + addr, contents + addr + count,
1513 (size_t) (toaddr - addr - count));
eea6121a 1514 sec->size -= count;
5907e628
JL
1515
1516 /* Adjust all the relocs. */
1517 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1518 {
1519 /* Get the new reloc address. */
1520 if ((irel->r_offset > addr
5c0df484 1521 && irel->r_offset <= toaddr))
5907e628
JL
1522 irel->r_offset -= count;
1523 }
1524
1525 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1526 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1527 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1528 isymend = isym + symtab_hdr->sh_info;
1529 for (; isym < isymend; isym++)
5907e628 1530 {
6cdc0ccc
AM
1531 if (isym->st_shndx == sec_shndx
1532 && isym->st_value > addr
5c0df484 1533 && isym->st_value <= toaddr)
6cdc0ccc 1534 isym->st_value -= count;
5907e628
JL
1535 }
1536
1537 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1538 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1539 - symtab_hdr->sh_info);
1540 sym_hashes = elf_sym_hashes (abfd);
1541 end_hashes = sym_hashes + symcount;
1542 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1543 {
9ad5cbcf 1544 struct elf_link_hash_entry *sym_hash = *sym_hashes;
5c0df484 1545
9ad5cbcf
AM
1546 if ((sym_hash->root.type == bfd_link_hash_defined
1547 || sym_hash->root.type == bfd_link_hash_defweak)
1548 && sym_hash->root.u.def.section == sec
1549 && sym_hash->root.u.def.value > addr
5c0df484
NC
1550 && sym_hash->root.u.def.value <= toaddr)
1551 sym_hash->root.u.def.value -= count;
5907e628
JL
1552 }
1553
b34976b6 1554 return TRUE;
5907e628
JL
1555}
1556
b34976b6
AM
1557/* Return TRUE if a symbol exists at the given address, else return
1558 FALSE. */
1559static bfd_boolean
c6baf75e 1560elf32_h8_symbol_address_p (bfd *abfd, asection *sec, bfd_vma addr)
5907e628
JL
1561{
1562 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1563 unsigned int sec_shndx;
6cdc0ccc
AM
1564 Elf_Internal_Sym *isym;
1565 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1566 struct elf_link_hash_entry **sym_hashes;
1567 struct elf_link_hash_entry **end_hashes;
1568 unsigned int symcount;
5907e628 1569
9ad5cbcf 1570 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1571
1572 /* Examine all the symbols. */
9ad5cbcf 1573 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc
AM
1574 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1575 isymend = isym + symtab_hdr->sh_info;
1576 for (; isym < isymend; isym++)
5907e628 1577 {
6cdc0ccc
AM
1578 if (isym->st_shndx == sec_shndx
1579 && isym->st_value == addr)
b34976b6 1580 return TRUE;
5907e628
JL
1581 }
1582
9ad5cbcf
AM
1583 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1584 - symtab_hdr->sh_info);
1585 sym_hashes = elf_sym_hashes (abfd);
1586 end_hashes = sym_hashes + symcount;
1587 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1588 {
9ad5cbcf
AM
1589 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1590 if ((sym_hash->root.type == bfd_link_hash_defined
1591 || sym_hash->root.type == bfd_link_hash_defweak)
1592 && sym_hash->root.u.def.section == sec
1593 && sym_hash->root.u.def.value == addr)
b34976b6 1594 return TRUE;
5907e628 1595 }
9ad5cbcf 1596
b34976b6 1597 return FALSE;
5907e628
JL
1598}
1599
1600/* This is a version of bfd_generic_get_relocated_section_contents
1601 which uses elf32_h8_relocate_section. */
1602
1603static bfd_byte *
c6baf75e
RS
1604elf32_h8_get_relocated_section_contents (bfd *output_bfd,
1605 struct bfd_link_info *link_info,
1606 struct bfd_link_order *link_order,
1607 bfd_byte *data,
1608 bfd_boolean relocatable,
1609 asymbol **symbols)
5907e628
JL
1610{
1611 Elf_Internal_Shdr *symtab_hdr;
1612 asection *input_section = link_order->u.indirect.section;
1613 bfd *input_bfd = input_section->owner;
1614 asection **sections = NULL;
1615 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1616 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
1617
1618 /* We only need to handle the case of relaxing, or of having a
1619 particular set of section contents, specially. */
1049f94e 1620 if (relocatable
5907e628
JL
1621 || elf_section_data (input_section)->this_hdr.contents == NULL)
1622 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1623 link_order, data,
1049f94e 1624 relocatable,
5907e628
JL
1625 symbols);
1626
1627 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1628
1629 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1630 (size_t) input_section->size);
5907e628
JL
1631
1632 if ((input_section->flags & SEC_RELOC) != 0
1633 && input_section->reloc_count > 0)
1634 {
5907e628 1635 asection **secpp;
6cdc0ccc 1636 Elf_Internal_Sym *isym, *isymend;
9ad5cbcf 1637 bfd_size_type amt;
5907e628 1638
45d6a902 1639 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 1640 (input_bfd, input_section, NULL,
b34976b6 1641 (Elf_Internal_Rela *) NULL, FALSE));
5907e628
JL
1642 if (internal_relocs == NULL)
1643 goto error_return;
1644
6cdc0ccc
AM
1645 if (symtab_hdr->sh_info != 0)
1646 {
1647 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1648 if (isymbuf == NULL)
1649 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1650 symtab_hdr->sh_info, 0,
1651 NULL, NULL, NULL);
1652 if (isymbuf == NULL)
1653 goto error_return;
1654 }
5907e628 1655
9ad5cbcf
AM
1656 amt = symtab_hdr->sh_info;
1657 amt *= sizeof (asection *);
1658 sections = (asection **) bfd_malloc (amt);
1659 if (sections == NULL && amt != 0)
5907e628
JL
1660 goto error_return;
1661
6cdc0ccc
AM
1662 isymend = isymbuf + symtab_hdr->sh_info;
1663 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
5907e628
JL
1664 {
1665 asection *isec;
1666
6cdc0ccc 1667 if (isym->st_shndx == SHN_UNDEF)
5907e628 1668 isec = bfd_und_section_ptr;
6cdc0ccc 1669 else if (isym->st_shndx == SHN_ABS)
5907e628 1670 isec = bfd_abs_section_ptr;
6cdc0ccc 1671 else if (isym->st_shndx == SHN_COMMON)
5907e628
JL
1672 isec = bfd_com_section_ptr;
1673 else
6cdc0ccc 1674 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
5907e628
JL
1675
1676 *secpp = isec;
1677 }
1678
1679 if (! elf32_h8_relocate_section (output_bfd, link_info, input_bfd,
1680 input_section, data, internal_relocs,
6cdc0ccc 1681 isymbuf, sections))
5907e628
JL
1682 goto error_return;
1683
1684 if (sections != NULL)
1685 free (sections);
6cdc0ccc
AM
1686 if (isymbuf != NULL
1687 && symtab_hdr->contents != (unsigned char *) isymbuf)
1688 free (isymbuf);
1689 if (elf_section_data (input_section)->relocs != internal_relocs)
5907e628 1690 free (internal_relocs);
5907e628
JL
1691 }
1692
1693 return data;
1694
1695 error_return:
5907e628
JL
1696 if (sections != NULL)
1697 free (sections);
6cdc0ccc
AM
1698 if (isymbuf != NULL
1699 && symtab_hdr->contents != (unsigned char *) isymbuf)
1700 free (isymbuf);
1701 if (internal_relocs != NULL
1702 && elf_section_data (input_section)->relocs != internal_relocs)
1703 free (internal_relocs);
5907e628
JL
1704 return NULL;
1705}
1706
0a83638b 1707
6d00b590 1708#define TARGET_BIG_SYM h8300_elf32_vec
e01b0e69
JR
1709#define TARGET_BIG_NAME "elf32-h8300"
1710#define ELF_ARCH bfd_arch_h8300
1711#define ELF_MACHINE_CODE EM_H8_300
1712#define ELF_MAXPAGESIZE 0x1
1713#define bfd_elf32_bfd_reloc_type_lookup elf32_h8_reloc_type_lookup
157090f7 1714#define bfd_elf32_bfd_reloc_name_lookup elf32_h8_reloc_name_lookup
e01b0e69
JR
1715#define elf_info_to_howto elf32_h8_info_to_howto
1716#define elf_info_to_howto_rel elf32_h8_info_to_howto_rel
1717
0a83638b
JL
1718/* So we can set/examine bits in e_flags to get the specific
1719 H8 architecture in use. */
1720#define elf_backend_final_write_processing \
1721 elf32_h8_final_write_processing
1722#define elf_backend_object_p \
1723 elf32_h8_object_p
1724#define bfd_elf32_bfd_merge_private_bfd_data \
1725 elf32_h8_merge_private_bfd_data
1726
e01b0e69
JR
1727/* ??? when elf_backend_relocate_section is not defined, elf32-target.h
1728 defaults to using _bfd_generic_link_hash_table_create, but
c152c796 1729 bfd_elf_size_dynamic_sections uses
e01b0e69
JR
1730 dynobj = elf_hash_table (info)->dynobj;
1731 and thus requires an elf hash table. */
1732#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
1733
5e47149d
JL
1734/* Use an H8 specific linker, not the ELF generic linker. */
1735#define elf_backend_relocate_section elf32_h8_relocate_section
f0fe0e16 1736#define elf_backend_rela_normal 1
2627de83 1737#define elf_backend_can_gc_sections 1
5e47149d 1738
5907e628
JL
1739/* And relaxing stuff. */
1740#define bfd_elf32_bfd_relax_section elf32_h8_relax_section
1741#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 1742 elf32_h8_get_relocated_section_contents
5907e628 1743
84477db9 1744#define elf_symbol_leading_char '_'
5907e628 1745
e01b0e69 1746#include "elf32-target.h"
5518c738
YS
1747
1748#undef TARGET_BIG_SYM
1749#define TARGET_BIG_SYM h8300_elf32_linux_vec
1750#undef TARGET_BIG_NAME
1751#define TARGET_BIG_NAME "elf32-h8300-linux"
1752#undef elf_symbol_leading_char
1753#define elf32_bed elf32_h8300_linux_bed
1754
1755#include "elf32-target.h"