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* gen-aout.c (main): Fix formatting. Close file.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
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12013-10-14 Nick Clifton <nickc@redhat.com>
2
3 * read.c (add_include_dir): Use xrealloc.
4 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
5 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
6
ae335a4e
SL
72013-10-13 Sandra Loosemore <sandra@codesourcery.com>
8
9 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
10 also test/refer to "sstatus". Reformat the warning message.
11
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122013-10-10 Sean Keys <skeys@ipdatasys.com>
13
14 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
15
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JB
162013-10-10 Jan Beulich <jbeulich@suse.com>
17
18 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
19 swapping for bndmk, bndldx, and bndstx.
20
6085f853
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212013-10-09 Nick Clifton <nickc@redhat.com>
22
b7b2bb1d
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23 PR gas/16025
24 * config/tc-epiphany.c (md_convert_frag): Add missing break
25 statement.
26
6085f853
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27 PR gas/16026
28 * config/tc-mn10200.c (md_convert_frag): Add missing break
29 statement.
30
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312013-10-08 Jan Beulich <jbeulich@suse.com>
32
33 * tc-i386.c (check_word_reg): Remove misplaced "else".
34 (check_long_reg): Restore symmetry with check_word_reg.
35
d3bfe16e
JB
362013-10-08 Jan Beulich <jbeulich@suse.com>
37
38 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
39 LR/PC check.
40
38d77545
NC
412013-10-08 Nick Clifton <nickc@redhat.com>
42
43 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
44 for "<foo>a". Issue error messages for unrecognised or corrrupt
45 size extensions.
46
fe8b4cc3
KT
472013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
48
49 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
50 possible.
51
c7b0bd56
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522013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
53
54 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
55 * doc/c-i386.texi: Add -march=bdver4 option.
56
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572013-09-20 Alan Modra <amodra@gmail.com>
58
59 * configure: Regenerate.
60
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612013-09-18 Tristan Gingold <gingold@adacore.com>
62
63 * NEWS: Add marker for 2.24.
64
ab905915
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652013-09-18 Nick Clifton <nickc@redhat.com>
66
67 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
68 (move_data): New variable.
69 (md_parse_option): Parse -md.
70 (msp430_section): New function. Catch references to the .bss or
71 .data sections and generate a special symbol for use by the libcrt
72 library.
73 (md_pseudo_table): Intercept .section directives.
74 (md_longopt): Add -md
75 (md_show_usage): Likewise.
76 (msp430_operands): Generate a warning message if a NOP is inserted
77 into the instruction stream.
78 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
79
f1c38003
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802013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
81
82 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 83 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 84
1d50d57c
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852013-09-16 Will Newton <will.newton@linaro.org>
86
87 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
88 disallowing element size 64 with interleave other than 1.
89
173d3447
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902013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
91
92 * config/tc-mips.c (match_insn): Set error when $31 is used for
93 bltzal* and bgezal*.
94
ac21e7da
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952013-09-04 Tristan Gingold <gingold@adacore.com>
96
97 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
98 symbols.
99
74db7efb
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1002013-09-04 Roland McGrath <mcgrathr@google.com>
101
102 PR gas/15914
103 * config/tc-arm.c (T16_32_TAB): Add _udf.
104 (do_t_udf): New function.
105 (insns): Add "udf".
106
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1072013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
108
109 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
110 assembler errors at correct position.
111
9aff4b7a
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1122013-08-23 Yuri Chornoivan <yurchor@ukr.net>
113
114 PR binutils/15834
115 * config/tc-ia64.c: Fix typos.
116 * config/tc-sparc.c: Likewise.
117 * config/tc-z80.c: Likewise.
118 * doc/c-i386.texi: Likewise.
119 * doc/c-m32r.texi: Likewise.
120
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1212013-08-23 Will Newton <will.newton@linaro.org>
122
9aff4b7a 123 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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124 for pre-indexed addressing modes.
125
b4e6cb80
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1262013-08-21 Alan Modra <amodra@gmail.com>
127
128 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
129 range check label number for use with fb_low_counter array.
130
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1312013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
132
133 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
134 (mips_parse_argument_token, validate_micromips_insn, md_begin)
135 (check_regno, match_float_constant, check_completed_insn, append_insn)
136 (match_insn, match_mips16_insn, match_insns, macro_start)
137 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
138 (mips16_ip, mips_set_option_string, md_parse_option)
139 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
140 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
141 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
142 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
143 Start error messages with a lower-case letter. Do not end error
144 messages with a period. Wrap long messages to 80 character-lines.
145 Use "cannot" instead of "can't" and "can not".
146
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1472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * config/tc-mips.c (imm_expr): Expand comment.
150 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
151 when populated.
152
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1532013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
154
155 * config/tc-mips.c (imm2_expr): Delete.
156 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
157
5e0dc5ba
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1582013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
159
160 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
161 (macro): Remove M_DEXT and M_DINS handling.
162
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1632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
166 lax_max with lax_match.
167 (match_int_operand): Update accordingly. Don't report an error
168 for !lax_match-only cases.
169 (match_insn): Replace more_alts with lax_match and use it to
170 initialize the mips_arg_info field. Add a complete_p parameter.
171 Handle implicit VU0 suffixes here.
172 (match_invalid_for_isa, match_insns, match_mips16_insns): New
173 functions.
174 (mips_ip, mips16_ip): Use them.
175
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1762013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
177
178 * config/tc-mips.c (match_expression): Report uses of registers here.
179 Add a "must be an immediate expression" error. Handle elided offsets
180 here rather than...
181 (match_int_operand): ...here.
182
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1832013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (mips_arg_info): Remove soft_match.
186 (match_out_of_range, match_not_constant): New functions.
187 (match_const_int): Remove fallback parameter and check for soft_match.
188 Use match_not_constant.
189 (match_mapped_int_operand, match_addiusp_operand)
190 (match_perf_reg_operand, match_save_restore_list_operand)
191 (match_mdmx_imm_reg_operand): Update accordingly. Use
192 match_out_of_range and set_insn_error* instead of as_bad.
193 (match_int_operand): Likewise. Use match_not_constant in the
194 !allows_nonconst case.
195 (match_float_constant): Report invalid float constants.
196 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
197 match_float_constant to check for invalid constants. Fail the
198 match if match_const_int or match_float_constant return false.
199 (mips_ip): Update accordingly.
200 (mips16_ip): Likewise. Undo null termination of instruction name
201 once lookup is complete.
202
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2032013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
204
205 * config/tc-mips.c (mips_insn_error_format): New enum.
206 (mips_insn_error): New struct.
207 (insn_error): Change to a mips_insn_error.
208 (clear_insn_error, set_insn_error_format, set_insn_error)
209 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
210 functions.
211 (mips_parse_argument_token, md_assemble, match_insn)
212 (match_mips16_insn): Use them instead of manipulating insn_error
213 directly.
214 (mips_ip, mips16_ip): Likewise. Simplify control flow.
215
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2162013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
217
218 * config/tc-mips.c (normalize_constant_expr): Move further up file.
219 (normalize_address_expr): Likewise.
220 (match_insn, match_mips16_insn): New functions, split out from...
221 (mips_ip, mips16_ip): ...here.
222
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2232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
224
225 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
226 OP_OPTIONAL_REG.
227 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
228 for optional operands.
229
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AM
2302013-08-16 Alan Modra <amodra@gmail.com>
231
232 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
233 modifiers generally.
234
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2352013-08-16 Alan Modra <amodra@gmail.com>
236
237 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
238
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2392013-08-14 David Edelsohn <dje.gcc@gmail.com>
240
241 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
242 argument as alignment.
243
4046d87a
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2442013-08-09 Nick Clifton <nickc@redhat.com>
245
246 * config/tc-rl78.c (elf_flags): New variable.
247 (enum options): Add OPTION_G10.
248 (md_longopts): Add mg10.
249 (md_parse_option): Parse -mg10.
250 (rl78_elf_final_processing): New function.
251 * config/tc-rl78.c (tc_final_processing): Define.
252 * doc/c-rl78.texi: Document -mg10 option.
253
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2542013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
255
256 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
257 suffixes to be elided too.
258 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
259 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
260 to be omitted too.
261
13896403
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2622013-08-05 John Tytgat <john@bass-software.com>
263
264 * po/POTFILES.in: Regenerate.
265
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2662013-08-05 Eric Botcazou <ebotcazou@adacore.com>
267 Konrad Eisele <konrad@gaisler.com>
268
269 * config/tc-sparc.c (sparc_arch_types): Add leon.
270 (sparc_arch): Move sparc4 around and add leon.
271 (sparc_target_format): Document -Aleon.
272 * doc/c-sparc.texi: Likewise.
273
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2742013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
275
276 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
277
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RS
2782013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
279 Richard Sandiford <rdsandiford@googlemail.com>
280
281 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
282 (RWARN): Bump to 0x8000000.
283 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
284 (RTYPE_R5900_ACC): New register types.
285 (RTYPE_MASK): Include them.
286 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
287 macros.
288 (reg_names): Include them.
289 (mips_parse_register_1): New function, split out from...
290 (mips_parse_register): ...here. Add a channels_ptr parameter.
291 Look for VU0 channel suffixes when nonnull.
292 (reg_lookup): Update the call to mips_parse_register.
293 (mips_parse_vu0_channels): New function.
294 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
295 (mips_operand_token): Add a "channels" field to the union.
296 Extend the comment above "ch" to OT_DOUBLE_CHAR.
297 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
298 (mips_parse_argument_token): Handle channel suffixes here too.
299 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
300 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
301 Handle '#' formats.
302 (md_begin): Register $vfN and $vfI registers.
303 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
304 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
305 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
306 (match_vu0_suffix_operand): New function.
307 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
308 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
309 (mips_lookup_insn): New function.
310 (mips_ip): Use it. Allow "+K" operands to be elided at the end
311 of an instruction. Handle '#' sequences.
312
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3132013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
316 values and use it instead of sreg, treg, xreg, etc.
317
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3182013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
319
320 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
321 and mips_int_operand_max.
322 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
323 Delete.
324 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
325 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
326 instead of mips16_immed_operand.
327
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3282013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
329
330 * config/tc-mips.c (mips16_macro): Don't use move_register.
331 (mips16_ip): Allow macros to use 'p'.
332
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3332013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
334
335 * config/tc-mips.c (MAX_OPERANDS): New macro.
336 (mips_operand_array): New structure.
337 (mips_operands, mips16_operands, micromips_operands): New arrays.
338 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
339 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
340 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
341 (micromips_to_32_reg_q_map): Delete.
342 (insn_operands, insn_opno, insn_extract_operand): New functions.
343 (validate_mips_insn): Take a mips_operand_array as argument and
344 use it to build up a list of operands. Extend to handle INSN_MACRO
345 and MIPS16.
346 (validate_mips16_insn): New function.
347 (validate_micromips_insn): Take a mips_operand_array as argument.
348 Handle INSN_MACRO.
349 (md_begin): Initialize mips_operands, mips16_operands and
350 micromips_operands. Call validate_mips_insn and
351 validate_micromips_insn for macro instructions too.
352 Call validate_mips16_insn for MIPS16 instructions.
353 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
354 New functions.
355 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
356 them. Handle INSN_UDI.
357 (get_append_method): Use gpr_read_mask.
358
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3592013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
360
361 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
362 flags for MIPS16 and non-MIPS16 instructions.
363 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
364 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
365 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
366 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
367 and non-MIPS16 instructions. Fix formatting.
368
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3692013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
370
371 * config/tc-mips.c (reg_needs_delay): Move later in file.
372 Use gpr_write_mask.
373 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
374
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3752013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
376 Alexander Ivchenko <alexander.ivchenko@intel.com>
377 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
378 Sergey Lega <sergey.s.lega@intel.com>
379 Anna Tikhonova <anna.tikhonova@intel.com>
380 Ilya Tocar <ilya.tocar@intel.com>
381 Andrey Turetskiy <andrey.turetskiy@intel.com>
382 Ilya Verbin <ilya.verbin@intel.com>
383 Kirill Yukhin <kirill.yukhin@intel.com>
384 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
385
386 * config/tc-i386-intel.c (O_zmmword_ptr): New.
387 (i386_types): Add zmmword.
388 (i386_intel_simplify_register): Allow regzmm.
389 (i386_intel_simplify): Handle zmmwords.
390 (i386_intel_operand): Handle RC/SAE, vector operations and
391 zmmwords.
392 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
393 (struct RC_Operation): New.
394 (struct Mask_Operation): New.
395 (struct Broadcast_Operation): New.
396 (vex_prefix): Size of bytes increased to 4 to support EVEX
397 encoding.
398 (enum i386_error): Add new error codes: unsupported_broadcast,
399 broadcast_not_on_src_operand, broadcast_needed,
400 unsupported_masking, mask_not_on_destination, no_default_mask,
401 unsupported_rc_sae, rc_sae_operand_not_last_imm,
402 invalid_register_operand, try_vector_disp8.
403 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
404 rounding, broadcast, memshift.
405 (struct RC_name): New.
406 (RC_NamesTable): New.
407 (evexlig): New.
408 (evexwig): New.
409 (extra_symbol_chars): Add '{'.
410 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
411 (i386_operand_type): Add regzmm, regmask and vec_disp8.
412 (match_mem_size): Handle zmmwords.
413 (operand_type_match): Handle zmm-registers.
414 (mode_from_disp_size): Handle vec_disp8.
415 (fits_in_vec_disp8): New.
416 (md_begin): Handle {} properly.
417 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
418 (build_vex_prefix): Handle vrex.
419 (build_evex_prefix): New.
420 (process_immext): Adjust to properly handle EVEX.
421 (md_assemble): Add EVEX encoding support.
422 (swap_2_operands): Correctly handle operands with masking,
423 broadcasting or RC/SAE.
424 (check_VecOperands): Support EVEX features.
425 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
426 (match_template): Support regzmm and handle new error codes.
427 (process_suffix): Handle zmmwords and zmm-registers.
428 (check_byte_reg): Extend to zmm-registers.
429 (process_operands): Extend to zmm-registers.
430 (build_modrm_byte): Handle EVEX.
431 (output_insn): Adjust to properly handle EVEX case.
432 (disp_size): Handle vec_disp8.
433 (output_disp): Support compressed disp8*N evex feature.
434 (output_imm): Handle RC/SAE immediates properly.
435 (check_VecOperations): New.
436 (i386_immediate): Handle EVEX features.
437 (i386_index_check): Handle zmmwords and zmm-registers.
438 (RC_SAE_immediate): New.
439 (i386_att_operand): Handle EVEX features.
440 (parse_real_register): Add a check for ZMM/Mask registers.
441 (OPTION_MEVEXLIG): New.
442 (OPTION_MEVEXWIG): New.
443 (md_longopts): Add mevexlig and mevexwig.
444 (md_parse_option): Handle mevexlig and mevexwig options.
445 (md_show_usage): Add description for mevexlig and mevexwig.
446 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
447 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
448
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4492013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
450
451 * config/tc-i386.c (cpu_arch): Add .sha.
452 * doc/c-i386.texi: Document sha/.sha.
453
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4542013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
455 Kirill Yukhin <kirill.yukhin@intel.com>
456 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
457
458 * config/tc-i386.c (BND_PREFIX): New.
459 (struct _i386_insn): Add new field bnd_prefix.
460 (add_bnd_prefix): New.
461 (cpu_arch): Add MPX.
462 (i386_operand_type): Add regbnd.
463 (md_assemble): Handle BND prefixes.
464 (parse_insn): Likewise.
465 (output_branch): Likewise.
466 (output_jump): Likewise.
467 (build_modrm_byte): Handle regbnd.
468 (OPTION_MADD_BND_PREFIX): New.
469 (md_longopts): Add entry for 'madd-bnd-prefix'.
470 (md_parse_option): Handle madd-bnd-prefix option.
471 (md_show_usage): Add description for madd-bnd-prefix
472 option.
473 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
474
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4752013-07-24 Tristan Gingold <gingold@adacore.com>
476
477 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
478 xcoff targets.
479
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4802013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
481
482 * config/tc-s390.c (s390_machine): Don't force the .machine
483 argument to lower case.
484
e673710a
KT
4852013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
486
487 * config/tc-arm.c (s_arm_arch_extension): Improve error message
488 for invalid extension.
489
69091a2c
YZ
4902013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
491
492 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
493 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
494 (aarch64_abi): New variable.
495 (ilp32_p): Change to be a macro.
496 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
497 (struct aarch64_option_abi_value_table): New struct.
498 (aarch64_abis): New table.
499 (aarch64_parse_abi): New function.
500 (aarch64_long_opts): Add entry for -mabi=.
501 * doc/as.texinfo (Target AArch64 options): Document -mabi.
502 * doc/c-aarch64.texi: Likewise.
503
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NC
5042013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
505
506 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
507 unsigned comparison.
508
f0c00282
NC
5092013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
510
cbe02d4f 511 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 512 RX610.
cbe02d4f 513 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
514 check floating point operation support for target RX100 and
515 RX200.
cbe02d4f
AM
516 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
517 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
518 RX200, RX600, and RX610
f0c00282 519
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NC
5202013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
521
522 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
523
8be59acb
NC
5242013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
525
526 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
527 * doc/c-avr.texi: Likewise.
528
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RS
5292013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
530
531 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
532 error with older GCCs.
533 (mips16_macro_build): Dereference args.
534
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RS
5352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
536
537 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
538 New functions, split out from...
539 (reg_lookup): ...here. Remove itbl support.
540 (reglist_lookup): Delete.
541 (mips_operand_token_type): New enum.
542 (mips_operand_token): New structure.
543 (mips_operand_tokens): New variable.
544 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
545 (mips_parse_arguments): New functions.
546 (md_begin): Initialize mips_operand_tokens.
547 (mips_arg_info): Add a token field. Remove optional_reg field.
548 (match_char, match_expression): New functions.
549 (match_const_int): Use match_expression. Remove "s" argument
550 and return a boolean result. Remove O_register handling.
551 (match_regno, match_reg, match_reg_range): New functions.
552 (match_int_operand, match_mapped_int_operand, match_msb_operand)
553 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
554 (match_addiusp_operand, match_clo_clz_dest_operand)
555 (match_lwm_swm_list_operand, match_entry_exit_operand)
556 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
557 (match_tied_reg_operand): Remove "s" argument and return a boolean
558 result. Match tokens rather than text. Update calls to
559 match_const_int. Rely on match_regno to call check_regno.
560 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
561 "arg" argument. Return a boolean result.
562 (parse_float_constant): Replace with...
563 (match_float_constant): ...this new function.
564 (match_operand): Remove "s" argument and return a boolean result.
565 Update calls to subfunctions.
566 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
567 rather than string-parsing routines. Update handling of optional
568 registers for token scheme.
569
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5702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
571
572 * config/tc-mips.c (parse_float_constant): Split out from...
573 (mips_ip): ...here.
574
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5752013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
576
577 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
578 Delete.
579
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RS
5802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
581
582 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
583 (match_entry_exit_operand): New function.
584 (match_save_restore_list_operand): Likewise.
585 (match_operand): Use them.
586 (check_absolute_expr): Delete.
587 (mips16_ip): Rewrite main parsing loop to use mips_operands.
588
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5892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
590
591 * config/tc-mips.c: Enable functions commented out in previous patch.
592 (SKIP_SPACE_TABS): Move further up file.
593 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
594 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
595 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
596 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
597 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
598 (micromips_imm_b_map, micromips_imm_c_map): Delete.
599 (mips_lookup_reg_pair): Delete.
600 (macro): Use report_bad_range and report_bad_field.
601 (mips_immed, expr_const_in_range): Delete.
602 (mips_ip): Rewrite main parsing loop to use new functions.
603
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RS
6042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
605
606 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
607 Change return type to bfd_boolean.
608 (report_bad_range, report_bad_field): New functions.
609 (mips_arg_info): New structure.
610 (match_const_int, convert_reg_type, check_regno, match_int_operand)
611 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
612 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
613 (match_addiusp_operand, match_clo_clz_dest_operand)
614 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
615 (match_pc_operand, match_tied_reg_operand, match_operand)
616 (check_completed_insn): New functions, commented out for now.
617
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6182013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
619
620 * config/tc-mips.c (insn_insert_operand): New function.
621 (macro_build, mips16_macro_build): Put null character check
622 in the for loop and convert continues to breaks. Use operand
623 structures to handle constant operands.
624
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RS
6252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
626
627 * config/tc-mips.c (validate_mips_insn): Move further up file.
628 Add insn_bits and decode_operand arguments. Use the mips_operand
629 fields to work out which bits an operand occupies. Detect double
630 definitions.
631 (validate_micromips_insn): Move further up file. Call into
632 validate_mips_insn.
633
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6342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
635
636 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
637
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RS
6382013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
639
640 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
641 and "~".
642 (macro): Update accordingly.
643
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RS
6442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
645
646 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
647 (imm_reloc): Delete.
648 (md_assemble): Remove imm_reloc handling.
649 (mips_ip): Update commentary. Use offset_expr and offset_reloc
650 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
651 Use a temporary array rather than imm_reloc when parsing
652 constant expressions. Remove imm_reloc initialization.
653 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
654 for the relaxable field. Use a relax_char variable to track the
655 type of this field. Remove imm_reloc initialization.
656
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6572013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
658
659 * config/tc-mips.c (mips16_ip): Handle "I".
660
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MR
6612013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
662
663 * config/tc-mips.c (mips_flag_nan2008): New variable.
664 (options): Add OPTION_NAN enum value.
665 (md_longopts): Handle it.
666 (md_parse_option): Likewise.
667 (s_nan): New function.
668 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
669 (md_show_usage): Add -mnan.
670
671 * doc/as.texinfo (Overview): Add -mnan.
672 * doc/c-mips.texi (MIPS Opts): Document -mnan.
673 (MIPS NaN Encodings): New node. Document .nan directive.
674 (MIPS-Dependent): List the new node.
675
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TG
6762013-07-09 Tristan Gingold <gingold@adacore.com>
677
678 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
679
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RS
6802013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
683 for 'A' and assume that the constant has been elided if the result
684 is an O_register.
685
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RS
6862013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
687
688 * config/tc-mips.c (gprel16_reloc_p): New function.
689 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
690 BFD_RELOC_UNUSED.
691 (offset_high_part, small_offset_p): New functions.
692 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
693 register load and store macros, handle the 16-bit offset case first.
694 If a 16-bit offset is not suitable for the instruction we're
695 generating, load it into the temporary register using
696 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
697 M_L_DAB code once the address has been constructed. For double load
698 and store macros, again handle the 16-bit offset case first.
699 If the second register cannot be accessed from the same high
700 part as the first, load it into AT using ADDRESS_ADDI_INSN.
701 Fix the handling of LD in cases where the first register is the
702 same as the base. Also handle the case where the offset is
703 not 16 bits and the second register cannot be accessed from the
704 same high part as the first. For unaligned loads and stores,
705 fuse the offbits == 12 and old "ab" handling. Apply this handling
706 whenever the second offset needs a different high part from the first.
707 Construct the offset using ADDRESS_ADDI_INSN where possible,
708 for offbits == 16 as well as offbits == 12. Use offset_reloc
709 when constructing the individual loads and stores.
710 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
711 and offset_reloc before matching against a particular opcode.
712 Handle elided 'A' constants. Allow 'A' constants to use
713 relocation operators.
714
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RS
7152013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
716
717 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
718 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
719 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
720
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RS
7212013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
722
723 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
724 Require the msb to be <= 31 for "+s". Check that the size is <= 31
725 for both "+s" and "+S".
726
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RS
7272013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
728
729 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
730 (mips_ip, mips16_ip): Handle "+i".
731
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RS
7322013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
733
734 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
735 (micromips_to_32_reg_h_map): Rename to...
736 (micromips_to_32_reg_h_map1): ...this.
737 (micromips_to_32_reg_i_map): Rename to...
738 (micromips_to_32_reg_h_map2): ...this.
739 (mips_lookup_reg_pair): New function.
740 (gpr_write_mask, macro): Adjust after above renaming.
741 (validate_micromips_insn): Remove "mi" handling.
742 (mips_ip): Likewise. Parse both registers in a pair for "mh".
743
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RS
7442013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
747 (mips_ip): Remove "+D" and "+T" handling.
748
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7492013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
750
751 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
752 relocs.
753
2c0a3565
MS
7542013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
755
4aa2c5e2
MS
756 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
757
7582013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
759
2c0a3565
MS
760 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
761 (aarch64_force_relocation): Likewise.
762
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AM
7632013-07-02 Alan Modra <amodra@gmail.com>
764
765 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
766
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MR
7672013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
768
769 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
770 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
771 Replace @sc{mips16} with literal `MIPS16'.
772 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
773
a6bb11b2
YZ
7742013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
775
776 * config/tc-aarch64.c (reloc_table): Replace
777 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
778 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
779 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
780 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
781 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
782 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
783 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
784 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
785 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
786 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
787 (aarch64_force_relocation): Likewise.
788
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YZ
7892013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
790
791 * config/tc-aarch64.c (ilp32_p): New static variable.
792 (elf64_aarch64_target_format): Return the target according to the
793 value of 'ilp32_p'.
794 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
795 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
796 (aarch64_dwarf2_addr_size): New function.
797 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
798 (DWARF2_ADDR_SIZE): New define.
799
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8002013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
801
802 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
803
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RS
8042013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
805
806 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
807
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MR
8082013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
809
810 * config/tc-mips.c (mips_set_options): Add insn32 member.
811 (mips_opts): Initialize it.
812 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
813 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
814 (md_longopts): Add "minsn32" and "mno-insn32" options.
815 (is_size_valid): Handle insn32 mode.
816 (md_assemble): Pass instruction string down to macro.
817 (brk_fmt): Add second dimension and insn32 mode initializers.
818 (mfhl_fmt): Likewise.
819 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
820 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
821 (macro_build_jalr, move_register): Handle insn32 mode.
822 (macro_build_branch_rs): Likewise.
823 (macro): Handle insn32 mode.
824 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
825 (mips_ip): Handle insn32 mode.
826 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
827 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
828 (mips_handle_align): Handle insn32 mode.
829 (md_show_usage): Add -minsn32 and -mno-insn32.
830
831 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
832 -mno-insn32 options.
833 (-minsn32, -mno-insn32): New options.
834 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
835 options.
836 (MIPS assembly options): New node. Document .set insn32 and
837 .set noinsn32.
838 (MIPS-Dependent): List the new node.
839
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NC
8402013-06-25 Nick Clifton <nickc@redhat.com>
841
842 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
843 the PC in indirect addressing on 430xv2 parts.
844 (msp430_operands): Add version test to hardware bug encoding
845 restrictions.
846
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RM
8472013-06-24 Roland McGrath <mcgrathr@google.com>
848
d996d970
RM
849 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
850 so it skips whitespace before it.
851 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
852
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RM
853 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
854 (arm_reg_parse_multi): Skip whitespace first.
855 (parse_reg_list): Likewise.
856 (parse_vfp_reg_list): Likewise.
857 (s_arm_unwind_save_mmxwcg): Likewise.
858
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NC
8592013-06-24 Nick Clifton <nickc@redhat.com>
860
861 PR gas/15623
862 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
863
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RS
8642013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
865
866 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
867
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RS
8682013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
869
870 * config/tc-mips.c: Assert that offsetT and valueT are at least
871 8 bytes in size.
872 (GPR_SMIN, GPR_SMAX): New macros.
873 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
874
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8752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
876
877 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
878 conditions. Remove any code deselected by them.
879 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
880
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RS
8812013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
882
883 * NEWS: Note removal of ECOFF support.
884 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
885 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
886 (MULTI_CFILES): Remove config/e-mipsecoff.c.
887 * Makefile.in: Regenerate.
888 * configure.in: Remove MIPS ECOFF references.
889 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
890 Delete cases.
891 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
892 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
893 (mips-*-*): ...this single case.
894 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
895 MIPS emulations to be e-mipself*.
896 * configure: Regenerate.
897 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
898 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
899 (mips-*-sysv*): Remove coff and ecoff cases.
900 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
901 * ecoff.c: Remove reference to MIPS ECOFF.
902 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
903 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
904 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
905 (mips_hi_fixup): Tweak comment.
906 (append_insn): Require a howto.
907 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
908
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9092013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
910
911 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
912 Use "CPU" instead of "cpu".
913 * doc/c-mips.texi: Likewise.
914 (MIPS Opts): Rename to MIPS Options.
915 (MIPS option stack): Rename to MIPS Option Stack.
916 (MIPS ASE instruction generation overrides): Rename to
917 MIPS ASE Instruction Generation Overrides (for now).
918 (MIPS floating-point): Rename to MIPS Floating-Point.
919
fc16f8cc
RS
9202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
921
922 * doc/c-mips.texi (MIPS Macros): New section.
923 (MIPS Object): Replace with...
924 (MIPS Small Data): ...this new section.
925
5a7560b5
RS
9262013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
927
928 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
929 Capitalize name. Use @kindex instead of @cindex for .set entries.
930
a1b86ab7
RS
9312013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
932
933 * doc/c-mips.texi (MIPS Stabs): Remove section.
934
c6278170
RS
9352013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
936
937 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
938 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
939 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
940 (ISA_SUPPORTS_VIRT64_ASE): Delete.
941 (mips_ase): New structure.
942 (mips_ases): New table.
943 (FP64_ASES): New macro.
944 (mips_ase_groups): New array.
945 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
946 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
947 functions.
948 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
949 (md_parse_option): Use mips_ases and mips_set_ase instead of
950 separate case statements for each ASE option.
951 (mips_after_parse_args): Use FP64_ASES. Use
952 mips_check_isa_supports_ases to check the ASEs against
953 other options.
954 (s_mipsset): Use mips_ases and mips_set_ase instead of
955 separate if statements for each ASE option. Use
956 mips_check_isa_supports_ases, even when a non-ASE option
957 is specified.
958
63a4bc21
KT
9592013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
960
961 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
962
c31f3936
RS
9632013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
964
965 * config/tc-mips.c (md_shortopts, options, md_longopts)
966 (md_longopts_size): Move earlier in file.
967
846ef2d0
RS
9682013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
969
970 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
971 with a single "ase" bitmask.
972 (mips_opts): Update accordingly.
973 (file_ase, file_ase_explicit): New variables.
974 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
975 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
976 (ISA_HAS_ROR): Adjust for mips_set_options change.
977 (is_opcode_valid): Take the base ase mask directly from mips_opts.
978 (mips_ip): Adjust for mips_set_options change.
979 (md_parse_option): Likewise. Update file_ase_explicit.
980 (mips_after_parse_args): Adjust for mips_set_options change.
981 Use bitmask operations to select the default ASEs. Set file_ase
982 rather than individual per-ASE variables.
983 (s_mipsset): Adjust for mips_set_options change.
984 (mips_elf_final_processing): Test file_ase rather than
985 file_ase_mdmx. Remove commented-out code.
986
d16afab6
RS
9872013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
988
989 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
990 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
991 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
992 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
993 (mips_after_parse_args): Use the new "ase" field to choose
994 the default ASEs.
995 (mips_cpu_info_table): Move ASEs from the "flags" field to the
996 "ase" field.
997
e83a675f
RE
9982013-06-18 Richard Earnshaw <rearnsha@arm.com>
999
1000 * config/tc-arm.c (symbol_preemptible): New function.
1001 (relax_branch): Use it.
1002
7f3c4072
CM
10032013-06-17 Catherine Moore <clm@codesourcery.com>
1004 Maciej W. Rozycki <macro@codesourcery.com>
1005 Chao-Ying Fu <fu@mips.com>
1006
1007 * config/tc-mips.c (mips_set_options): Add ase_eva.
1008 (mips_set_options mips_opts): Add ase_eva.
1009 (file_ase_eva): Declare.
1010 (ISA_SUPPORTS_EVA_ASE): Define.
1011 (IS_SEXT_9BIT_NUM): Define.
1012 (MIPS_CPU_ASE_EVA): Define.
1013 (is_opcode_valid): Add support for ase_eva.
1014 (macro_build): Likewise.
1015 (macro): Likewise.
1016 (validate_mips_insn): Likewise.
1017 (validate_micromips_insn): Likewise.
1018 (mips_ip): Likewise.
1019 (options): Add OPTION_EVA and OPTION_NO_EVA.
1020 (md_longopts): Add -meva and -mno-eva.
1021 (md_parse_option): Process new options.
1022 (mips_after_parse_args): Check for valid EVA combinations.
1023 (s_mipsset): Likewise.
1024
e410add4
RS
10252013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1026
1027 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1028 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1029 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1030 (dwarf2_gen_line_info_1): Update call accordingly.
1031 (dwarf2_move_insn): New function.
1032 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1033
6a50d470
RS
10342013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1035
1036 Revert:
1037
1038 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1039
1040 PR gas/13024
1041 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1042 (dwarf2_gen_line_info_1): Delete.
1043 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1044 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1045 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1046 (dwarf2_directive_loc): Push previous .locs instead of generating
1047 them immediately.
1048
f122319e
CF
10492013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1050
1051 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1052 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1053
909c7f9c
NC
10542013-06-13 Nick Clifton <nickc@redhat.com>
1055
1056 PR gas/15602
1057 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1058 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1059 function. Generates an error if the adjusted offset is out of a
1060 16-bit range.
1061
5d5755a7
SL
10622013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1063
1064 * config/tc-nios2.c (md_apply_fix): Mask constant
1065 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1066
3bf0dbfb
MR
10672013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1068
1069 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1070 MIPS-3D instructions either.
1071 (md_convert_frag): Update the COPx branch mask accordingly.
1072
1073 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1074 option.
1075 * doc/as.texinfo (Overview): Add --relax-branch and
1076 --no-relax-branch.
1077 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1078 --no-relax-branch.
1079
9daf7bab
SL
10802013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1081
1082 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1083 omitted.
1084
d301a56b
RS
10852013-06-08 Catherine Moore <clm@codesourcery.com>
1086
1087 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1088 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1089 (append_insn): Change INSN_xxxx to ASE_xxxx.
1090
7bab7634
DC
10912013-06-01 George Thomas <george.thomas@atmel.com>
1092
cbe02d4f 1093 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1094 AVR_ISA_XMEGAU
1095
f60cf82f
L
10962013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1097
1098 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1099 for ELF.
1100
a3f278e2
CM
11012013-05-31 Paul Brook <paul@codesourcery.com>
1102
a3f278e2
CM
1103 * config/tc-mips.c (s_ehword): New.
1104
067ec077
CM
11052013-05-30 Paul Brook <paul@codesourcery.com>
1106
1107 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1108
d6101ac2
MR
11092013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1110
1111 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1112 convert relocs who have no relocatable field either. Rephrase
1113 the conditional so that the PC-relative check is only applied
1114 for REL targets.
1115
f19ccbda
MR
11162013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1117
1118 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1119 calculation.
1120
418009c2
YZ
11212013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1122
1123 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1124 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1125 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1126 (md_apply_fix): Likewise.
1127 (aarch64_force_relocation): Likewise.
1128
0a8897c7
KT
11292013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1130
1131 * config/tc-arm.c (it_fsm_post_encode): Improve
1132 warning messages about deprecated IT block formats.
1133
89d2a2a3
MS
11342013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1135
1136 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1137 inside fx_done condition.
1138
c77c0862
RS
11392013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1140
1141 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1142
c0637f3a
PB
11432013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1144
1145 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1146 and clean up warning when using PRINT_OPCODE_TABLE.
1147
5656a981
AM
11482013-05-20 Alan Modra <amodra@gmail.com>
1149
1150 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1151 and data fixups performing shift/high adjust/sign extension on
1152 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1153 when writing data fixups rather than recalculating size.
1154
997b26e8
JBG
11552013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1156
1157 * doc/c-msp430.texi: Fix typo.
1158
9f6e76f4
TG
11592013-05-16 Tristan Gingold <gingold@adacore.com>
1160
1161 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1162 are also TOC symbols.
1163
638d3803
NC
11642013-05-16 Nick Clifton <nickc@redhat.com>
1165
1166 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1167 Add -mcpu command to specify core type.
997b26e8 1168 * doc/c-msp430.texi: Update documentation.
638d3803 1169
b015e599
AP
11702013-05-09 Andrew Pinski <apinski@cavium.com>
1171
1172 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1173 (mips_opts): Update for the new field.
1174 (file_ase_virt): New variable.
1175 (ISA_SUPPORTS_VIRT_ASE): New macro.
1176 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1177 (MIPS_CPU_ASE_VIRT): New define.
1178 (is_opcode_valid): Handle ase_virt.
1179 (macro_build): Handle "+J".
1180 (validate_mips_insn): Likewise.
1181 (mips_ip): Likewise.
1182 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1183 (md_longopts): Add mvirt and mnovirt
1184 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1185 (mips_after_parse_args): Handle ase_virt field.
1186 (s_mipsset): Handle "virt" and "novirt".
1187 (mips_elf_final_processing): Add a comment about virt ASE might need
1188 a new flag.
1189 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1190 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1191 Document ".set virt" and ".set novirt".
1192
da8094d7
AM
11932013-05-09 Alan Modra <amodra@gmail.com>
1194
1195 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1196 control of operand flag bits.
1197
c5f8c205
AM
11982013-05-07 Alan Modra <amodra@gmail.com>
1199
1200 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1201 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1202 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1203 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1204 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1205 Shift and sign-extend fieldval for use by some VLE reloc
1206 operand->insert functions.
1207
b47468a6
CM
12082013-05-06 Paul Brook <paul@codesourcery.com>
1209 Catherine Moore <clm@codesourcery.com>
1210
c5f8c205
AM
1211 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1212 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1213 (md_apply_fix): Likewise.
1214 (tc_gen_reloc): Likewise.
1215
2de39019
CM
12162013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1217
1218 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1219 (mips_fix_adjustable): Adjust pc-relative check to use
1220 limited_pc_reloc_p.
1221
754e2bb9
RS
12222013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1223
1224 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1225 (s_mips_stab): Do not restrict to stabn only.
1226
13761a11
NC
12272013-05-02 Nick Clifton <nickc@redhat.com>
1228
1229 * config/tc-msp430.c: Add support for the MSP430X architecture.
1230 Add code to insert a NOP instruction after any instruction that
1231 might change the interrupt state.
1232 Add support for the LARGE memory model.
1233 Add code to initialise the .MSP430.attributes section.
1234 * config/tc-msp430.h: Add support for the MSP430X architecture.
1235 * doc/c-msp430.texi: Document the new -mL and -mN command line
1236 options.
1237 * NEWS: Mention support for the MSP430X architecture.
1238
df26367c
MR
12392013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1240
1241 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1242 alpha*-*-linux*ecoff*.
1243
f02d8318
CF
12442013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1245
1246 * config/tc-mips.c (mips_ip): Add sizelo.
1247 For "+C", "+G", and "+H", set sizelo and compare against it.
1248
b40bf0a2
NC
12492013-04-29 Nick Clifton <nickc@redhat.com>
1250
1251 * as.c (Options): Add -gdwarf-sections.
1252 (parse_args): Likewise.
1253 * as.h (flag_dwarf_sections): Declare.
1254 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1255 (process_entries): When -gdwarf-sections is enabled generate
1256 fragmentary .debug_line sections.
1257 (out_debug_line): Set the section for the .debug_line section end
1258 symbol.
1259 * doc/as.texinfo: Document -gdwarf-sections.
1260 * NEWS: Mention -gdwarf-sections.
1261
8eeccb77 12622013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1263
1264 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1265 according to the target parameter. Don't call s_segm since s_segm
1266 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1267 initialized yet.
1268 (md_begin): Call s_segm according to target parameter from command
1269 line.
1270
49926cd0
AM
12712013-04-25 Alan Modra <amodra@gmail.com>
1272
1273 * configure.in: Allow little-endian linux.
1274 * configure: Regenerate.
1275
e3031850
SL
12762013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1277
1278 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1279 "fstatus" control register to "eccinj".
1280
cb948fc0
KT
12812013-04-19 Kai Tietz <ktietz@redhat.com>
1282
1283 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1284
4455e9ad
JB
12852013-04-15 Julian Brown <julian@codesourcery.com>
1286
1287 * expr.c (add_to_result, subtract_from_result): Make global.
1288 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1289 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1290 subtract_from_result to handle extra bit of precision for .sleb128
1291 directive operands.
1292
956a6ba3
JB
12932013-04-10 Julian Brown <julian@codesourcery.com>
1294
1295 * read.c (convert_to_bignum): Add sign parameter. Use it
1296 instead of X_unsigned to determine sign of resulting bignum.
1297 (emit_expr): Pass extra argument to convert_to_bignum.
1298 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1299 X_extrabit to convert_to_bignum.
1300 (parse_bitfield_cons): Set X_extrabit.
1301 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1302 Initialise X_extrabit field as appropriate.
1303 (add_to_result): New.
1304 (subtract_from_result): New.
1305 (expr): Use above.
1306 * expr.h (expressionS): Add X_extrabit field.
1307
eb9f3f00
JB
13082013-04-10 Jan Beulich <jbeulich@suse.com>
1309
1310 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1311 register being PC when is_t or writeback, and use distinct
1312 diagnostic for the latter case.
1313
ccb84d65
JB
13142013-04-10 Jan Beulich <jbeulich@suse.com>
1315
1316 * gas/config/tc-arm.c (parse_operands): Re-write
1317 po_barrier_or_imm().
1318 (do_barrier): Remove bogus constraint().
1319 (do_t_barrier): Remove.
1320
4d13caa0
NC
13212013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1322
1323 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1324 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1325 ATmega2564RFR2
1326 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1327
16d02dc9
JB
13282013-04-09 Jan Beulich <jbeulich@suse.com>
1329
1330 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1331 Use local variable Rt in more places.
1332 (do_vmsr): Accept all control registers.
1333
05ac0ffb
JB
13342013-04-09 Jan Beulich <jbeulich@suse.com>
1335
1336 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1337 if there was none specified for moves between scalar and core
1338 register.
1339
2d51fb74
JB
13402013-04-09 Jan Beulich <jbeulich@suse.com>
1341
1342 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1343 NEON_ALL_LANES case.
1344
94dcf8bf
JB
13452013-04-08 Jan Beulich <jbeulich@suse.com>
1346
1347 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1348 PC-relative VSTR.
1349
1472d06f
JB
13502013-04-08 Jan Beulich <jbeulich@suse.com>
1351
1352 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1353 entry to sp_fiq.
1354
0c76cae8
AM
13552013-04-03 Alan Modra <amodra@gmail.com>
1356
1357 * doc/as.texinfo: Add support to generate man options for h8300.
1358 * doc/c-h8300.texi: Likewise.
1359
92eb40d9
RR
13602013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1361
1362 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1363 Cortex-A57.
1364
51dcdd4d
NC
13652013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1366
1367 PR binutils/15068
1368 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1369
c5d685bf
NC
13702013-03-26 Nick Clifton <nickc@redhat.com>
1371
9b978282
NC
1372 PR gas/15295
1373 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1374 start of the file each time.
1375
c5d685bf
NC
1376 PR gas/15178
1377 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1378 FreeBSD targets.
1379
9699c833
TG
13802013-03-26 Douglas B Rupp <rupp@gnat.com>
1381
1382 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1383 after fixup.
1384
4755303e
WN
13852013-03-21 Will Newton <will.newton@linaro.org>
1386
1387 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1388 pc-relative str instructions in Thumb mode.
1389
81f5558e
NC
13902013-03-21 Michael Schewe <michael.schewe@gmx.net>
1391
1392 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1393 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1394 R_H8_DISP32A16.
1395 * config/tc-h8300.h: Remove duplicated defines.
1396
71863e73
NC
13972013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1398
1399 PR gas/15282
1400 * tc-avr.c (mcu_has_3_byte_pc): New function.
1401 (tc_cfi_frame_initial_instructions): Call it to find return
1402 address size.
1403
795b8e6b
NC
14042013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1405
1406 PR gas/15095
1407 * config/tc-tic6x.c (tic6x_try_encode): Handle
1408 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1409 encode register pair numbers when required.
1410
ba86b375
WN
14112013-03-15 Will Newton <will.newton@linaro.org>
1412
1413 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1414 in vstr in Thumb mode for pre-ARMv7 cores.
1415
9e6f3811
AS
14162013-03-14 Andreas Schwab <schwab@suse.de>
1417
1418 * doc/c-arc.texi (ARC Directives): Revert last change and use
1419 @itemize instead of @table.
1420 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1421
b10bf8c5
NC
14222013-03-14 Nick Clifton <nickc@redhat.com>
1423
1424 PR gas/15273
1425 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1426 NULL message, instead just check ARM_CPU_IS_ANY directly.
1427
ba724cfc
NC
14282013-03-14 Nick Clifton <nickc@redhat.com>
1429
1430 PR gas/15212
9e6f3811 1431 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1432 for table format.
1433 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1434 to the @item directives.
1435 (ARM-Neon-Alignment): Move to correct place in the document.
1436 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1437 formatting.
1438 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1439 @smallexample.
1440
531a94fd
SL
14412013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1442
1443 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1444 case. Add default BAD_CASE to switch.
1445
dad60f8e
SL
14462013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1447
1448 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1449 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1450
dd5181d5
KT
14512013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1452
1453 * config/tc-arm.c (crc_ext_armv8): New feature set.
1454 (UNPRED_REG): New macro.
1455 (do_crc32_1): New function.
1456 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1457 do_crc32ch, do_crc32cw): Likewise.
1458 (TUEc): New macro.
1459 (insns): Add entries for crc32 mnemonics.
1460 (arm_extensions): Add entry for crc.
1461
8e723a10
CLT
14622013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1463
1464 * write.h (struct fix): Add fx_dot_frag field.
1465 (dot_frag): Declare.
1466 * write.c (dot_frag): New variable.
1467 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1468 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1469 * expr.c (expr): Save value of frag_now in dot_frag when setting
1470 dot_value.
1471 * read.c (emit_expr): Likewise. Delete comments.
1472
be05d201
L
14732013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1474
1475 * config/tc-i386.c (flag_code_names): Removed.
1476 (i386_index_check): Rewrote.
1477
62b0d0d5
YZ
14782013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1479
1480 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1481 add comment.
1482 (aarch64_double_precision_fmovable): New function.
1483 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1484 function; handle hexadecimal representation of IEEE754 encoding.
1485 (parse_operands): Update the call to parse_aarch64_imm_float.
1486
165de32a
L
14872013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1488
1489 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1490 (check_hle): Updated.
1491 (md_assemble): Likewise.
1492 (parse_insn): Likewise.
1493
d5de92cf
L
14942013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1495
1496 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1497 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1498 (parse_insn): Remove expecting_string_instruction. Set
1499 i.rep_prefix.
1500
e60bb1dd
YZ
15012013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1502
1503 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1504
aeebdd9b
YZ
15052013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1506
1507 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1508 for system registers.
1509
4107ae22
DD
15102013-02-27 DJ Delorie <dj@redhat.com>
1511
1512 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1513 (rl78_op): Handle %code().
1514 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1515 (tc_gen_reloc): Likwise; convert to a computed reloc.
1516 (md_apply_fix): Likewise.
1517
151fa98f
NC
15182013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1519
1520 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1521
70a8bc5b 15222013-02-25 Terry Guo <terry.guo@arm.com>
1523
1524 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1525 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1526 list of accepted CPUs.
1527
5c111e37
L
15282013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1529
1530 PR gas/15159
1531 * config/tc-i386.c (cpu_arch): Add ".smap".
1532
1533 * doc/c-i386.texi: Document smap.
1534
8a75745d
MR
15352013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1536
1537 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1538 mips_assembling_insn appropriately.
1539 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1540
79850f26
MR
15412013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1542
cf29fc61 1543 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1544 extraneous braces.
1545
4c261dff
NC
15462013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1547
5c111e37 1548 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1549
ea33f281
NC
15502013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1551
1552 * configure.tgt: Add nios2-*-rtems*.
1553
a1ccaec9
YZ
15542013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1555
1556 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1557 NULL.
1558
0aa27725
RS
15592013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1560
1561 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1562 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1563
da4339ed
NC
15642013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1565
1566 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1567 core.
1568
36591ba1 15692013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1570 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1571
1572 Based on patches from Altera Corporation.
1573
1574 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1575 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1576 * Makefile.in: Regenerated.
1577 * configure.tgt: Add case for nios2*-linux*.
1578 * config/obj-elf.c: Conditionally include elf/nios2.h.
1579 * config/tc-nios2.c: New file.
1580 * config/tc-nios2.h: New file.
1581 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1582 * doc/Makefile.in: Regenerated.
1583 * doc/all.texi: Set NIOSII.
1584 * doc/as.texinfo (Overview): Add Nios II options.
1585 (Machine Dependencies): Include c-nios2.texi.
1586 * doc/c-nios2.texi: New file.
1587 * NEWS: Note Altera Nios II support.
1588
94d4433a
AM
15892013-02-06 Alan Modra <amodra@gmail.com>
1590
1591 PR gas/14255
1592 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1593 Don't skip fixups with fx_subsy non-NULL.
1594 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1595 with fx_subsy non-NULL.
1596
ace9af6f
L
15972013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1598
1599 * doc/c-metag.texi: Add "@c man" markers.
1600
89d67ed9
AM
16012013-02-04 Alan Modra <amodra@gmail.com>
1602
1603 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1604 related code.
1605 (TC_ADJUST_RELOC_COUNT): Delete.
1606 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1607
89072bd6
AM
16082013-02-04 Alan Modra <amodra@gmail.com>
1609
1610 * po/POTFILES.in: Regenerate.
1611
f9b2d544
NC
16122013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1613
1614 * config/tc-metag.c: Make SWAP instruction less permissive with
1615 its operands.
1616
392ca752
DD
16172013-01-29 DJ Delorie <dj@redhat.com>
1618
1619 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1620 relocs in .word/.etc statements.
1621
427d0db6
RM
16222013-01-29 Roland McGrath <mcgrathr@google.com>
1623
1624 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1625 immediate value for 8-bit offset" error so it shows line info.
1626
4faf939a
JM
16272013-01-24 Joseph Myers <joseph@codesourcery.com>
1628
1629 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1630 for 64-bit output.
1631
78c8d46c
NC
16322013-01-24 Nick Clifton <nickc@redhat.com>
1633
1634 * config/tc-v850.c: Add support for e3v5 architecture.
1635 * doc/c-v850.texi: Mention new support.
1636
fb5b7503
NC
16372013-01-23 Nick Clifton <nickc@redhat.com>
1638
1639 PR gas/15039
1640 * config/tc-avr.c: Include dwarf2dbg.h.
1641
8ce3d284
L
16422013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1643
1644 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1645 (tc_i386_fix_adjustable): Likewise.
1646 (lex_got): Likewise.
1647 (tc_gen_reloc): Likewise.
1648
f5555712
YZ
16492013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1650
1651 * config/tc-aarch64.c (output_operand_error_record): Change to output
1652 the out-of-range error message as value-expected message if there is
1653 only one single value in the expected range.
1654 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1655 LSL #0 as a programmer-friendly feature.
1656
8fd4256d
L
16572013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1658
1659 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1660 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1661 BFD_RELOC_64_SIZE relocations.
1662 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1663 for it.
1664 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1665 relocations against local symbols.
1666
a5840dce
AM
16672013-01-16 Alan Modra <amodra@gmail.com>
1668
1669 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1670 finding some sort of toc syntax error, and break to avoid
1671 compiler uninit warning.
1672
af89796a
L
16732013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1674
1675 PR gas/15019
1676 * config/tc-i386.c (lex_got): Increment length by 1 if the
1677 relocation token is removed.
1678
dd42f060
NC
16792013-01-15 Nick Clifton <nickc@redhat.com>
1680
1681 * config/tc-v850.c (md_assemble): Allow signed values for
1682 V850E_IMMEDIATE.
1683
464e3686
SK
16842013-01-11 Sean Keys <skeys@ipdatasys.com>
1685
1686 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1687 git to cvs.
464e3686 1688
5817ffd1
PB
16892013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1690
1691 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1692 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1693 * config/tc-ppc.c (md_show_usage): Likewise.
1694 (ppc_handle_align): Handle power8's group ending nop.
1695
f4b1f6a9
SK
16962013-01-10 Sean Keys <skeys@ipdatasys.com>
1697
1698 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1699 that the assember exits after the opcodes have been printed.
f4b1f6a9 1700
34bca508
L
17012013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1702
1703 * app.c: Remove trailing white spaces.
1704 * as.c: Likewise.
1705 * as.h: Likewise.
1706 * cond.c: Likewise.
1707 * dw2gencfi.c: Likewise.
1708 * dwarf2dbg.h: Likewise.
1709 * ecoff.c: Likewise.
1710 * input-file.c: Likewise.
1711 * itbl-lex.h: Likewise.
1712 * output-file.c: Likewise.
1713 * read.c: Likewise.
1714 * sb.c: Likewise.
1715 * subsegs.c: Likewise.
1716 * symbols.c: Likewise.
1717 * write.c: Likewise.
1718 * config/tc-i386.c: Likewise.
1719 * doc/Makefile.am: Likewise.
1720 * doc/Makefile.in: Likewise.
1721 * doc/c-aarch64.texi: Likewise.
1722 * doc/c-alpha.texi: Likewise.
1723 * doc/c-arc.texi: Likewise.
1724 * doc/c-arm.texi: Likewise.
1725 * doc/c-avr.texi: Likewise.
1726 * doc/c-bfin.texi: Likewise.
1727 * doc/c-cr16.texi: Likewise.
1728 * doc/c-d10v.texi: Likewise.
1729 * doc/c-d30v.texi: Likewise.
1730 * doc/c-h8300.texi: Likewise.
1731 * doc/c-hppa.texi: Likewise.
1732 * doc/c-i370.texi: Likewise.
1733 * doc/c-i386.texi: Likewise.
1734 * doc/c-i860.texi: Likewise.
1735 * doc/c-m32c.texi: Likewise.
1736 * doc/c-m32r.texi: Likewise.
1737 * doc/c-m68hc11.texi: Likewise.
1738 * doc/c-m68k.texi: Likewise.
1739 * doc/c-microblaze.texi: Likewise.
1740 * doc/c-mips.texi: Likewise.
1741 * doc/c-msp430.texi: Likewise.
1742 * doc/c-mt.texi: Likewise.
1743 * doc/c-s390.texi: Likewise.
1744 * doc/c-score.texi: Likewise.
1745 * doc/c-sh.texi: Likewise.
1746 * doc/c-sh64.texi: Likewise.
1747 * doc/c-tic54x.texi: Likewise.
1748 * doc/c-tic6x.texi: Likewise.
1749 * doc/c-v850.texi: Likewise.
1750 * doc/c-xc16x.texi: Likewise.
1751 * doc/c-xgate.texi: Likewise.
1752 * doc/c-xtensa.texi: Likewise.
1753 * doc/c-z80.texi: Likewise.
1754 * doc/internals.texi: Likewise.
1755
4c665b71
RM
17562013-01-10 Roland McGrath <mcgrathr@google.com>
1757
1758 * hash.c (hash_new_sized): Make it global.
1759 * hash.h: Declare it.
1760 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1761 pass a small size.
1762
a3c62988
NC
17632013-01-10 Will Newton <will.newton@imgtec.com>
1764
1765 * Makefile.am: Add Meta.
1766 * Makefile.in: Regenerate.
1767 * config/tc-metag.c: New file.
1768 * config/tc-metag.h: New file.
1769 * configure.tgt: Add Meta.
1770 * doc/Makefile.am: Add Meta.
1771 * doc/Makefile.in: Regenerate.
1772 * doc/all.texi: Add Meta.
1773 * doc/as.texiinfo: Document Meta options.
1774 * doc/c-metag.texi: New file.
1775
b37df7c4
SE
17762013-01-09 Steve Ellcey <sellcey@mips.com>
1777
1778 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1779 calls.
1780 * config/tc-mips.c (internalError): Remove, replace with abort.
1781
a3251895
YZ
17822013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1783
1784 * config/tc-aarch64.c (parse_operands): Change to compare the result
1785 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1786
8ab8155f
NC
17872013-01-07 Nick Clifton <nickc@redhat.com>
1788
1789 PR gas/14887
1790 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1791 anticipated character.
1792 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1793 here as it is no longer needed.
1794
a4ac1c42
AS
17952013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1796
1797 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1798 * doc/c-score.texi (SCORE-Opts): Likewise.
1799 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1800
e407c74b
NC
18012013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1802
1803 * config/tc-mips.c: Add support for MIPS r5900.
1804 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1805 lq and sq.
1806 (can_swap_branch_p, get_append_method): Detect some conditional
1807 short loops to fix a bug on the r5900 by NOP in the branch delay
1808 slot.
1809 (M_MUL): Support 3 operands in multu on r5900.
1810 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1811 (s_mipsset): Force 32 bit floating point on r5900.
1812 (mips_ip): Check parameter range of instructions mfps and mtps on
1813 r5900.
1814 * configure.in: Detect CPU type when target string contains r5900
1815 (e.g. mips64r5900el-linux-gnu).
1816
62658407
L
18172013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1818
1819 * as.c (parse_args): Update copyright year to 2013.
1820
95830fd1
YZ
18212013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1822
1823 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1824 and "cortex57".
1825
517bb291 18262013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1827
517bb291
NC
1828 PR gas/14987
1829 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1830 closing bracket.
d709e4e6 1831
517bb291 1832For older changes see ChangeLog-2012
08d56133 1833\f
517bb291 1834Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1835
1836Copying and distribution of this file, with or without modification,
1837are permitted in any medium without royalty provided the copyright
1838notice and this notice are preserved.
1839
08d56133
NC
1840Local Variables:
1841mode: change-log
1842left-margin: 8
1843fill-column: 74
1844version-control: never
1845End: