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Add .abiversion related support for ELFv2
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-10-30 Alan Modra <amodra@gmail.com>
2
3 * config/tc-ppc.c: Include elf/ppc64.h.
4 (ppc_abiversion): New variable.
5 (md_pseudo_table): Add .abiversion.
6 (ppc_elf_abiversion, ppc_elf_end): New functions.
7 * config/tc-ppc.h (md_end): Define.
8
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92013-10-30 Alan Modra <amodra@gmail.com>
10
11 * config/tc-ppc.c (SEX16): Don't mask.
12 (REPORT_OVERFLOW_HI): Define as zero.
13 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
14 @tprel@high, and @tprel@higha modifiers.
15 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
16 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
17 Handle new relocs.
18 (md_apply_fix): Similarly.
19
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202013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
21
22 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
23 (fpr_write_mask): Test MSA registers.
24 (can_swap_branch_p): Check fpr write followed by fpr read.
25
3fc1d038
NC
262013-10-18 Nick Clifton <nickc@redhat.com>
27
28 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
29
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302013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
31 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
32
33 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
34 (md_longopts): Add mmsa and mno-msa.
35 (mips_ases): Add msa.
36 (RTYPE_MASK): Update.
37 (RTYPE_MSA): New define.
38 (OT_REG_ELEMENT): Replace with...
39 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
40 (mips_operand_token): Replace reg_element with index.
41 (mips_parse_argument_token): Treat vector indices as separate tokens.
42 Handle register indices.
43 (md_begin): Add MSA register names.
44 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
45 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
46 (match_mdmx_imm_reg_operand): Update accordingly.
47 (match_imm_index_operand): New function.
48 (match_reg_index_operand): New function.
49 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
50 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
51 (md_show_usage): Print -mmsa and -mno-msa.
52 * doc/as.texinfo: Document -mmsa and -mno-msa.
53 * doc/c-mips.texi: Document -mmsa and -mno-msa.
54 Document .set msa and .set nomsa.
55
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562013-10-14 Nick Clifton <nickc@redhat.com>
57
58 * read.c (add_include_dir): Use xrealloc.
59 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
60 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
61
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622013-10-13 Sandra Loosemore <sandra@codesourcery.com>
63
64 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
65 also test/refer to "sstatus". Reformat the warning message.
66
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672013-10-10 Sean Keys <skeys@ipdatasys.com>
68
69 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
70
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712013-10-10 Jan Beulich <jbeulich@suse.com>
72
73 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
74 swapping for bndmk, bndldx, and bndstx.
75
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762013-10-09 Nick Clifton <nickc@redhat.com>
77
b7b2bb1d
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78 PR gas/16025
79 * config/tc-epiphany.c (md_convert_frag): Add missing break
80 statement.
81
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82 PR gas/16026
83 * config/tc-mn10200.c (md_convert_frag): Add missing break
84 statement.
85
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862013-10-08 Jan Beulich <jbeulich@suse.com>
87
88 * tc-i386.c (check_word_reg): Remove misplaced "else".
89 (check_long_reg): Restore symmetry with check_word_reg.
90
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912013-10-08 Jan Beulich <jbeulich@suse.com>
92
93 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
94 LR/PC check.
95
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962013-10-08 Nick Clifton <nickc@redhat.com>
97
98 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
99 for "<foo>a". Issue error messages for unrecognised or corrrupt
100 size extensions.
101
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1022013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
103
104 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
105 possible.
106
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1072013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
108
109 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
110 * doc/c-i386.texi: Add -march=bdver4 option.
111
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1122013-09-20 Alan Modra <amodra@gmail.com>
113
114 * configure: Regenerate.
115
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1162013-09-18 Tristan Gingold <gingold@adacore.com>
117
118 * NEWS: Add marker for 2.24.
119
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1202013-09-18 Nick Clifton <nickc@redhat.com>
121
122 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
123 (move_data): New variable.
124 (md_parse_option): Parse -md.
125 (msp430_section): New function. Catch references to the .bss or
126 .data sections and generate a special symbol for use by the libcrt
127 library.
128 (md_pseudo_table): Intercept .section directives.
129 (md_longopt): Add -md
130 (md_show_usage): Likewise.
131 (msp430_operands): Generate a warning message if a NOP is inserted
132 into the instruction stream.
133 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
134
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1352013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
136
137 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 138 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 139
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1402013-09-16 Will Newton <will.newton@linaro.org>
141
142 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
143 disallowing element size 64 with interleave other than 1.
144
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1452013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
146
147 * config/tc-mips.c (match_insn): Set error when $31 is used for
148 bltzal* and bgezal*.
149
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1502013-09-04 Tristan Gingold <gingold@adacore.com>
151
152 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
153 symbols.
154
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1552013-09-04 Roland McGrath <mcgrathr@google.com>
156
157 PR gas/15914
158 * config/tc-arm.c (T16_32_TAB): Add _udf.
159 (do_t_udf): New function.
160 (insns): Add "udf".
161
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1622013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
163
164 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
165 assembler errors at correct position.
166
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1672013-08-23 Yuri Chornoivan <yurchor@ukr.net>
168
169 PR binutils/15834
170 * config/tc-ia64.c: Fix typos.
171 * config/tc-sparc.c: Likewise.
172 * config/tc-z80.c: Likewise.
173 * doc/c-i386.texi: Likewise.
174 * doc/c-m32r.texi: Likewise.
175
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1762013-08-23 Will Newton <will.newton@linaro.org>
177
9aff4b7a 178 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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179 for pre-indexed addressing modes.
180
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1812013-08-21 Alan Modra <amodra@gmail.com>
182
183 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
184 range check label number for use with fb_low_counter array.
185
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1862013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
187
188 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
189 (mips_parse_argument_token, validate_micromips_insn, md_begin)
190 (check_regno, match_float_constant, check_completed_insn, append_insn)
191 (match_insn, match_mips16_insn, match_insns, macro_start)
192 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
193 (mips16_ip, mips_set_option_string, md_parse_option)
194 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
195 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
196 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
197 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
198 Start error messages with a lower-case letter. Do not end error
199 messages with a period. Wrap long messages to 80 character-lines.
200 Use "cannot" instead of "can't" and "can not".
201
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2022013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (imm_expr): Expand comment.
205 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
206 when populated.
207
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2082013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c (imm2_expr): Delete.
211 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
212
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2132013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
214
215 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
216 (macro): Remove M_DEXT and M_DINS handling.
217
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2182013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
219
220 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
221 lax_max with lax_match.
222 (match_int_operand): Update accordingly. Don't report an error
223 for !lax_match-only cases.
224 (match_insn): Replace more_alts with lax_match and use it to
225 initialize the mips_arg_info field. Add a complete_p parameter.
226 Handle implicit VU0 suffixes here.
227 (match_invalid_for_isa, match_insns, match_mips16_insns): New
228 functions.
229 (mips_ip, mips16_ip): Use them.
230
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2312013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
232
233 * config/tc-mips.c (match_expression): Report uses of registers here.
234 Add a "must be an immediate expression" error. Handle elided offsets
235 here rather than...
236 (match_int_operand): ...here.
237
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2382013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
239
240 * config/tc-mips.c (mips_arg_info): Remove soft_match.
241 (match_out_of_range, match_not_constant): New functions.
242 (match_const_int): Remove fallback parameter and check for soft_match.
243 Use match_not_constant.
244 (match_mapped_int_operand, match_addiusp_operand)
245 (match_perf_reg_operand, match_save_restore_list_operand)
246 (match_mdmx_imm_reg_operand): Update accordingly. Use
247 match_out_of_range and set_insn_error* instead of as_bad.
248 (match_int_operand): Likewise. Use match_not_constant in the
249 !allows_nonconst case.
250 (match_float_constant): Report invalid float constants.
251 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
252 match_float_constant to check for invalid constants. Fail the
253 match if match_const_int or match_float_constant return false.
254 (mips_ip): Update accordingly.
255 (mips16_ip): Likewise. Undo null termination of instruction name
256 once lookup is complete.
257
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2582013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
259
260 * config/tc-mips.c (mips_insn_error_format): New enum.
261 (mips_insn_error): New struct.
262 (insn_error): Change to a mips_insn_error.
263 (clear_insn_error, set_insn_error_format, set_insn_error)
264 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
265 functions.
266 (mips_parse_argument_token, md_assemble, match_insn)
267 (match_mips16_insn): Use them instead of manipulating insn_error
268 directly.
269 (mips_ip, mips16_ip): Likewise. Simplify control flow.
270
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2712013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
272
273 * config/tc-mips.c (normalize_constant_expr): Move further up file.
274 (normalize_address_expr): Likewise.
275 (match_insn, match_mips16_insn): New functions, split out from...
276 (mips_ip, mips16_ip): ...here.
277
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2782013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
279
280 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
281 OP_OPTIONAL_REG.
282 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
283 for optional operands.
284
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2852013-08-16 Alan Modra <amodra@gmail.com>
286
287 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
288 modifiers generally.
289
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2902013-08-16 Alan Modra <amodra@gmail.com>
291
292 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
293
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2942013-08-14 David Edelsohn <dje.gcc@gmail.com>
295
296 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
297 argument as alignment.
298
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2992013-08-09 Nick Clifton <nickc@redhat.com>
300
301 * config/tc-rl78.c (elf_flags): New variable.
302 (enum options): Add OPTION_G10.
303 (md_longopts): Add mg10.
304 (md_parse_option): Parse -mg10.
305 (rl78_elf_final_processing): New function.
306 * config/tc-rl78.c (tc_final_processing): Define.
307 * doc/c-rl78.texi: Document -mg10 option.
308
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3092013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
310
311 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
312 suffixes to be elided too.
313 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
314 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
315 to be omitted too.
316
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3172013-08-05 John Tytgat <john@bass-software.com>
318
319 * po/POTFILES.in: Regenerate.
320
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3212013-08-05 Eric Botcazou <ebotcazou@adacore.com>
322 Konrad Eisele <konrad@gaisler.com>
323
324 * config/tc-sparc.c (sparc_arch_types): Add leon.
325 (sparc_arch): Move sparc4 around and add leon.
326 (sparc_target_format): Document -Aleon.
327 * doc/c-sparc.texi: Likewise.
328
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3292013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
330
331 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
332
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3332013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
334 Richard Sandiford <rdsandiford@googlemail.com>
335
336 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
337 (RWARN): Bump to 0x8000000.
338 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
339 (RTYPE_R5900_ACC): New register types.
340 (RTYPE_MASK): Include them.
341 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
342 macros.
343 (reg_names): Include them.
344 (mips_parse_register_1): New function, split out from...
345 (mips_parse_register): ...here. Add a channels_ptr parameter.
346 Look for VU0 channel suffixes when nonnull.
347 (reg_lookup): Update the call to mips_parse_register.
348 (mips_parse_vu0_channels): New function.
349 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
350 (mips_operand_token): Add a "channels" field to the union.
351 Extend the comment above "ch" to OT_DOUBLE_CHAR.
352 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
353 (mips_parse_argument_token): Handle channel suffixes here too.
354 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
355 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
356 Handle '#' formats.
357 (md_begin): Register $vfN and $vfI registers.
358 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
359 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
360 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
361 (match_vu0_suffix_operand): New function.
362 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
363 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
364 (mips_lookup_insn): New function.
365 (mips_ip): Use it. Allow "+K" operands to be elided at the end
366 of an instruction. Handle '#' sequences.
367
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3682013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
369
370 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
371 values and use it instead of sreg, treg, xreg, etc.
372
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3732013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
374
375 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
376 and mips_int_operand_max.
377 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
378 Delete.
379 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
380 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
381 instead of mips16_immed_operand.
382
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3832013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
384
385 * config/tc-mips.c (mips16_macro): Don't use move_register.
386 (mips16_ip): Allow macros to use 'p'.
387
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3882013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
389
390 * config/tc-mips.c (MAX_OPERANDS): New macro.
391 (mips_operand_array): New structure.
392 (mips_operands, mips16_operands, micromips_operands): New arrays.
393 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
394 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
395 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
396 (micromips_to_32_reg_q_map): Delete.
397 (insn_operands, insn_opno, insn_extract_operand): New functions.
398 (validate_mips_insn): Take a mips_operand_array as argument and
399 use it to build up a list of operands. Extend to handle INSN_MACRO
400 and MIPS16.
401 (validate_mips16_insn): New function.
402 (validate_micromips_insn): Take a mips_operand_array as argument.
403 Handle INSN_MACRO.
404 (md_begin): Initialize mips_operands, mips16_operands and
405 micromips_operands. Call validate_mips_insn and
406 validate_micromips_insn for macro instructions too.
407 Call validate_mips16_insn for MIPS16 instructions.
408 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
409 New functions.
410 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
411 them. Handle INSN_UDI.
412 (get_append_method): Use gpr_read_mask.
413
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4142013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
415
416 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
417 flags for MIPS16 and non-MIPS16 instructions.
418 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
419 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
420 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
421 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
422 and non-MIPS16 instructions. Fix formatting.
423
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4242013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
425
426 * config/tc-mips.c (reg_needs_delay): Move later in file.
427 Use gpr_write_mask.
428 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
429
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4302013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
431 Alexander Ivchenko <alexander.ivchenko@intel.com>
432 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
433 Sergey Lega <sergey.s.lega@intel.com>
434 Anna Tikhonova <anna.tikhonova@intel.com>
435 Ilya Tocar <ilya.tocar@intel.com>
436 Andrey Turetskiy <andrey.turetskiy@intel.com>
437 Ilya Verbin <ilya.verbin@intel.com>
438 Kirill Yukhin <kirill.yukhin@intel.com>
439 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
440
441 * config/tc-i386-intel.c (O_zmmword_ptr): New.
442 (i386_types): Add zmmword.
443 (i386_intel_simplify_register): Allow regzmm.
444 (i386_intel_simplify): Handle zmmwords.
445 (i386_intel_operand): Handle RC/SAE, vector operations and
446 zmmwords.
447 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
448 (struct RC_Operation): New.
449 (struct Mask_Operation): New.
450 (struct Broadcast_Operation): New.
451 (vex_prefix): Size of bytes increased to 4 to support EVEX
452 encoding.
453 (enum i386_error): Add new error codes: unsupported_broadcast,
454 broadcast_not_on_src_operand, broadcast_needed,
455 unsupported_masking, mask_not_on_destination, no_default_mask,
456 unsupported_rc_sae, rc_sae_operand_not_last_imm,
457 invalid_register_operand, try_vector_disp8.
458 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
459 rounding, broadcast, memshift.
460 (struct RC_name): New.
461 (RC_NamesTable): New.
462 (evexlig): New.
463 (evexwig): New.
464 (extra_symbol_chars): Add '{'.
465 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
466 (i386_operand_type): Add regzmm, regmask and vec_disp8.
467 (match_mem_size): Handle zmmwords.
468 (operand_type_match): Handle zmm-registers.
469 (mode_from_disp_size): Handle vec_disp8.
470 (fits_in_vec_disp8): New.
471 (md_begin): Handle {} properly.
472 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
473 (build_vex_prefix): Handle vrex.
474 (build_evex_prefix): New.
475 (process_immext): Adjust to properly handle EVEX.
476 (md_assemble): Add EVEX encoding support.
477 (swap_2_operands): Correctly handle operands with masking,
478 broadcasting or RC/SAE.
479 (check_VecOperands): Support EVEX features.
480 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
481 (match_template): Support regzmm and handle new error codes.
482 (process_suffix): Handle zmmwords and zmm-registers.
483 (check_byte_reg): Extend to zmm-registers.
484 (process_operands): Extend to zmm-registers.
485 (build_modrm_byte): Handle EVEX.
486 (output_insn): Adjust to properly handle EVEX case.
487 (disp_size): Handle vec_disp8.
488 (output_disp): Support compressed disp8*N evex feature.
489 (output_imm): Handle RC/SAE immediates properly.
490 (check_VecOperations): New.
491 (i386_immediate): Handle EVEX features.
492 (i386_index_check): Handle zmmwords and zmm-registers.
493 (RC_SAE_immediate): New.
494 (i386_att_operand): Handle EVEX features.
495 (parse_real_register): Add a check for ZMM/Mask registers.
496 (OPTION_MEVEXLIG): New.
497 (OPTION_MEVEXWIG): New.
498 (md_longopts): Add mevexlig and mevexwig.
499 (md_parse_option): Handle mevexlig and mevexwig options.
500 (md_show_usage): Add description for mevexlig and mevexwig.
501 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
502 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
503
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L
5042013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
505
506 * config/tc-i386.c (cpu_arch): Add .sha.
507 * doc/c-i386.texi: Document sha/.sha.
508
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L
5092013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
510 Kirill Yukhin <kirill.yukhin@intel.com>
511 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
512
513 * config/tc-i386.c (BND_PREFIX): New.
514 (struct _i386_insn): Add new field bnd_prefix.
515 (add_bnd_prefix): New.
516 (cpu_arch): Add MPX.
517 (i386_operand_type): Add regbnd.
518 (md_assemble): Handle BND prefixes.
519 (parse_insn): Likewise.
520 (output_branch): Likewise.
521 (output_jump): Likewise.
522 (build_modrm_byte): Handle regbnd.
523 (OPTION_MADD_BND_PREFIX): New.
524 (md_longopts): Add entry for 'madd-bnd-prefix'.
525 (md_parse_option): Handle madd-bnd-prefix option.
526 (md_show_usage): Add description for madd-bnd-prefix
527 option.
528 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
529
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5302013-07-24 Tristan Gingold <gingold@adacore.com>
531
532 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
533 xcoff targets.
534
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5352013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
536
537 * config/tc-s390.c (s390_machine): Don't force the .machine
538 argument to lower case.
539
e673710a
KT
5402013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
541
542 * config/tc-arm.c (s_arm_arch_extension): Improve error message
543 for invalid extension.
544
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YZ
5452013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
546
547 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
548 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
549 (aarch64_abi): New variable.
550 (ilp32_p): Change to be a macro.
551 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
552 (struct aarch64_option_abi_value_table): New struct.
553 (aarch64_abis): New table.
554 (aarch64_parse_abi): New function.
555 (aarch64_long_opts): Add entry for -mabi=.
556 * doc/as.texinfo (Target AArch64 options): Document -mabi.
557 * doc/c-aarch64.texi: Likewise.
558
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5592013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
560
561 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
562 unsigned comparison.
563
f0c00282
NC
5642013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
565
cbe02d4f 566 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 567 RX610.
cbe02d4f 568 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
569 check floating point operation support for target RX100 and
570 RX200.
cbe02d4f
AM
571 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
572 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
573 RX200, RX600, and RX610
f0c00282 574
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NC
5752013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
576
577 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
578
8be59acb
NC
5792013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
580
581 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
582 * doc/c-avr.texi: Likewise.
583
4a06e5a2
RS
5842013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
585
586 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
587 error with older GCCs.
588 (mips16_macro_build): Dereference args.
589
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RS
5902013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
591
592 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
593 New functions, split out from...
594 (reg_lookup): ...here. Remove itbl support.
595 (reglist_lookup): Delete.
596 (mips_operand_token_type): New enum.
597 (mips_operand_token): New structure.
598 (mips_operand_tokens): New variable.
599 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
600 (mips_parse_arguments): New functions.
601 (md_begin): Initialize mips_operand_tokens.
602 (mips_arg_info): Add a token field. Remove optional_reg field.
603 (match_char, match_expression): New functions.
604 (match_const_int): Use match_expression. Remove "s" argument
605 and return a boolean result. Remove O_register handling.
606 (match_regno, match_reg, match_reg_range): New functions.
607 (match_int_operand, match_mapped_int_operand, match_msb_operand)
608 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
609 (match_addiusp_operand, match_clo_clz_dest_operand)
610 (match_lwm_swm_list_operand, match_entry_exit_operand)
611 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
612 (match_tied_reg_operand): Remove "s" argument and return a boolean
613 result. Match tokens rather than text. Update calls to
614 match_const_int. Rely on match_regno to call check_regno.
615 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
616 "arg" argument. Return a boolean result.
617 (parse_float_constant): Replace with...
618 (match_float_constant): ...this new function.
619 (match_operand): Remove "s" argument and return a boolean result.
620 Update calls to subfunctions.
621 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
622 rather than string-parsing routines. Update handling of optional
623 registers for token scheme.
624
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6252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
626
627 * config/tc-mips.c (parse_float_constant): Split out from...
628 (mips_ip): ...here.
629
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6302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
631
632 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
633 Delete.
634
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RS
6352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
636
637 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
638 (match_entry_exit_operand): New function.
639 (match_save_restore_list_operand): Likewise.
640 (match_operand): Use them.
641 (check_absolute_expr): Delete.
642 (mips16_ip): Rewrite main parsing loop to use mips_operands.
643
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RS
6442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
645
646 * config/tc-mips.c: Enable functions commented out in previous patch.
647 (SKIP_SPACE_TABS): Move further up file.
648 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
649 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
650 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
651 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
652 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
653 (micromips_imm_b_map, micromips_imm_c_map): Delete.
654 (mips_lookup_reg_pair): Delete.
655 (macro): Use report_bad_range and report_bad_field.
656 (mips_immed, expr_const_in_range): Delete.
657 (mips_ip): Rewrite main parsing loop to use new functions.
658
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RS
6592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
660
661 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
662 Change return type to bfd_boolean.
663 (report_bad_range, report_bad_field): New functions.
664 (mips_arg_info): New structure.
665 (match_const_int, convert_reg_type, check_regno, match_int_operand)
666 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
667 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
668 (match_addiusp_operand, match_clo_clz_dest_operand)
669 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
670 (match_pc_operand, match_tied_reg_operand, match_operand)
671 (check_completed_insn): New functions, commented out for now.
672
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RS
6732013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
674
675 * config/tc-mips.c (insn_insert_operand): New function.
676 (macro_build, mips16_macro_build): Put null character check
677 in the for loop and convert continues to breaks. Use operand
678 structures to handle constant operands.
679
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6802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (validate_mips_insn): Move further up file.
683 Add insn_bits and decode_operand arguments. Use the mips_operand
684 fields to work out which bits an operand occupies. Detect double
685 definitions.
686 (validate_micromips_insn): Move further up file. Call into
687 validate_mips_insn.
688
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RS
6892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
690
691 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
692
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RS
6932013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
694
695 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
696 and "~".
697 (macro): Update accordingly.
698
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RS
6992013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
700
701 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
702 (imm_reloc): Delete.
703 (md_assemble): Remove imm_reloc handling.
704 (mips_ip): Update commentary. Use offset_expr and offset_reloc
705 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
706 Use a temporary array rather than imm_reloc when parsing
707 constant expressions. Remove imm_reloc initialization.
708 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
709 for the relaxable field. Use a relax_char variable to track the
710 type of this field. Remove imm_reloc initialization.
711
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7122013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
713
714 * config/tc-mips.c (mips16_ip): Handle "I".
715
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MR
7162013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
717
718 * config/tc-mips.c (mips_flag_nan2008): New variable.
719 (options): Add OPTION_NAN enum value.
720 (md_longopts): Handle it.
721 (md_parse_option): Likewise.
722 (s_nan): New function.
723 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
724 (md_show_usage): Add -mnan.
725
726 * doc/as.texinfo (Overview): Add -mnan.
727 * doc/c-mips.texi (MIPS Opts): Document -mnan.
728 (MIPS NaN Encodings): New node. Document .nan directive.
729 (MIPS-Dependent): List the new node.
730
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TG
7312013-07-09 Tristan Gingold <gingold@adacore.com>
732
733 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
734
0cbbe1b8
RS
7352013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
736
737 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
738 for 'A' and assume that the constant has been elided if the result
739 is an O_register.
740
f2ae14a1
RS
7412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
742
743 * config/tc-mips.c (gprel16_reloc_p): New function.
744 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
745 BFD_RELOC_UNUSED.
746 (offset_high_part, small_offset_p): New functions.
747 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
748 register load and store macros, handle the 16-bit offset case first.
749 If a 16-bit offset is not suitable for the instruction we're
750 generating, load it into the temporary register using
751 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
752 M_L_DAB code once the address has been constructed. For double load
753 and store macros, again handle the 16-bit offset case first.
754 If the second register cannot be accessed from the same high
755 part as the first, load it into AT using ADDRESS_ADDI_INSN.
756 Fix the handling of LD in cases where the first register is the
757 same as the base. Also handle the case where the offset is
758 not 16 bits and the second register cannot be accessed from the
759 same high part as the first. For unaligned loads and stores,
760 fuse the offbits == 12 and old "ab" handling. Apply this handling
761 whenever the second offset needs a different high part from the first.
762 Construct the offset using ADDRESS_ADDI_INSN where possible,
763 for offbits == 16 as well as offbits == 12. Use offset_reloc
764 when constructing the individual loads and stores.
765 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
766 and offset_reloc before matching against a particular opcode.
767 Handle elided 'A' constants. Allow 'A' constants to use
768 relocation operators.
769
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RS
7702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
771
772 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
773 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
774 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
775
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RS
7762013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
777
778 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
779 Require the msb to be <= 31 for "+s". Check that the size is <= 31
780 for both "+s" and "+S".
781
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RS
7822013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
783
784 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
785 (mips_ip, mips16_ip): Handle "+i".
786
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RS
7872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
788
789 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
790 (micromips_to_32_reg_h_map): Rename to...
791 (micromips_to_32_reg_h_map1): ...this.
792 (micromips_to_32_reg_i_map): Rename to...
793 (micromips_to_32_reg_h_map2): ...this.
794 (mips_lookup_reg_pair): New function.
795 (gpr_write_mask, macro): Adjust after above renaming.
796 (validate_micromips_insn): Remove "mi" handling.
797 (mips_ip): Likewise. Parse both registers in a pair for "mh".
798
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RS
7992013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
800
801 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
802 (mips_ip): Remove "+D" and "+T" handling.
803
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8042013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
805
806 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
807 relocs.
808
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MS
8092013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
810
4aa2c5e2
MS
811 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
812
8132013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
814
2c0a3565
MS
815 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
816 (aarch64_force_relocation): Likewise.
817
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AM
8182013-07-02 Alan Modra <amodra@gmail.com>
819
820 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
821
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MR
8222013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
823
824 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
825 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
826 Replace @sc{mips16} with literal `MIPS16'.
827 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
828
a6bb11b2
YZ
8292013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
830
831 * config/tc-aarch64.c (reloc_table): Replace
832 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
833 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
834 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
835 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
836 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
837 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
838 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
839 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
840 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
841 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
842 (aarch64_force_relocation): Likewise.
843
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YZ
8442013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
845
846 * config/tc-aarch64.c (ilp32_p): New static variable.
847 (elf64_aarch64_target_format): Return the target according to the
848 value of 'ilp32_p'.
849 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
850 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
851 (aarch64_dwarf2_addr_size): New function.
852 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
853 (DWARF2_ADDR_SIZE): New define.
854
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8552013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
856
857 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
858
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RS
8592013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
860
861 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
862
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MR
8632013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
864
865 * config/tc-mips.c (mips_set_options): Add insn32 member.
866 (mips_opts): Initialize it.
867 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
868 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
869 (md_longopts): Add "minsn32" and "mno-insn32" options.
870 (is_size_valid): Handle insn32 mode.
871 (md_assemble): Pass instruction string down to macro.
872 (brk_fmt): Add second dimension and insn32 mode initializers.
873 (mfhl_fmt): Likewise.
874 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
875 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
876 (macro_build_jalr, move_register): Handle insn32 mode.
877 (macro_build_branch_rs): Likewise.
878 (macro): Handle insn32 mode.
879 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
880 (mips_ip): Handle insn32 mode.
881 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
882 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
883 (mips_handle_align): Handle insn32 mode.
884 (md_show_usage): Add -minsn32 and -mno-insn32.
885
886 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
887 -mno-insn32 options.
888 (-minsn32, -mno-insn32): New options.
889 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
890 options.
891 (MIPS assembly options): New node. Document .set insn32 and
892 .set noinsn32.
893 (MIPS-Dependent): List the new node.
894
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NC
8952013-06-25 Nick Clifton <nickc@redhat.com>
896
897 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
898 the PC in indirect addressing on 430xv2 parts.
899 (msp430_operands): Add version test to hardware bug encoding
900 restrictions.
901
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RM
9022013-06-24 Roland McGrath <mcgrathr@google.com>
903
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RM
904 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
905 so it skips whitespace before it.
906 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
907
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RM
908 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
909 (arm_reg_parse_multi): Skip whitespace first.
910 (parse_reg_list): Likewise.
911 (parse_vfp_reg_list): Likewise.
912 (s_arm_unwind_save_mmxwcg): Likewise.
913
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9142013-06-24 Nick Clifton <nickc@redhat.com>
915
916 PR gas/15623
917 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
918
c3678916
RS
9192013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
920
921 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
922
42429eac
RS
9232013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
924
925 * config/tc-mips.c: Assert that offsetT and valueT are at least
926 8 bytes in size.
927 (GPR_SMIN, GPR_SMAX): New macros.
928 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
929
f3ded42a
RS
9302013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
931
932 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
933 conditions. Remove any code deselected by them.
934 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
935
e8044f35
RS
9362013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
937
938 * NEWS: Note removal of ECOFF support.
939 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
940 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
941 (MULTI_CFILES): Remove config/e-mipsecoff.c.
942 * Makefile.in: Regenerate.
943 * configure.in: Remove MIPS ECOFF references.
944 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
945 Delete cases.
946 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
947 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
948 (mips-*-*): ...this single case.
949 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
950 MIPS emulations to be e-mipself*.
951 * configure: Regenerate.
952 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
953 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
954 (mips-*-sysv*): Remove coff and ecoff cases.
955 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
956 * ecoff.c: Remove reference to MIPS ECOFF.
957 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
958 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
959 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
960 (mips_hi_fixup): Tweak comment.
961 (append_insn): Require a howto.
962 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
963
98508b2a
RS
9642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
965
966 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
967 Use "CPU" instead of "cpu".
968 * doc/c-mips.texi: Likewise.
969 (MIPS Opts): Rename to MIPS Options.
970 (MIPS option stack): Rename to MIPS Option Stack.
971 (MIPS ASE instruction generation overrides): Rename to
972 MIPS ASE Instruction Generation Overrides (for now).
973 (MIPS floating-point): Rename to MIPS Floating-Point.
974
fc16f8cc
RS
9752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
976
977 * doc/c-mips.texi (MIPS Macros): New section.
978 (MIPS Object): Replace with...
979 (MIPS Small Data): ...this new section.
980
5a7560b5
RS
9812013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
982
983 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
984 Capitalize name. Use @kindex instead of @cindex for .set entries.
985
a1b86ab7
RS
9862013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
987
988 * doc/c-mips.texi (MIPS Stabs): Remove section.
989
c6278170
RS
9902013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
991
992 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
993 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
994 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
995 (ISA_SUPPORTS_VIRT64_ASE): Delete.
996 (mips_ase): New structure.
997 (mips_ases): New table.
998 (FP64_ASES): New macro.
999 (mips_ase_groups): New array.
1000 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1001 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1002 functions.
1003 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1004 (md_parse_option): Use mips_ases and mips_set_ase instead of
1005 separate case statements for each ASE option.
1006 (mips_after_parse_args): Use FP64_ASES. Use
1007 mips_check_isa_supports_ases to check the ASEs against
1008 other options.
1009 (s_mipsset): Use mips_ases and mips_set_ase instead of
1010 separate if statements for each ASE option. Use
1011 mips_check_isa_supports_ases, even when a non-ASE option
1012 is specified.
1013
63a4bc21
KT
10142013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1015
1016 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1017
c31f3936
RS
10182013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1019
1020 * config/tc-mips.c (md_shortopts, options, md_longopts)
1021 (md_longopts_size): Move earlier in file.
1022
846ef2d0
RS
10232013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1024
1025 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1026 with a single "ase" bitmask.
1027 (mips_opts): Update accordingly.
1028 (file_ase, file_ase_explicit): New variables.
1029 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1030 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1031 (ISA_HAS_ROR): Adjust for mips_set_options change.
1032 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1033 (mips_ip): Adjust for mips_set_options change.
1034 (md_parse_option): Likewise. Update file_ase_explicit.
1035 (mips_after_parse_args): Adjust for mips_set_options change.
1036 Use bitmask operations to select the default ASEs. Set file_ase
1037 rather than individual per-ASE variables.
1038 (s_mipsset): Adjust for mips_set_options change.
1039 (mips_elf_final_processing): Test file_ase rather than
1040 file_ase_mdmx. Remove commented-out code.
1041
d16afab6
RS
10422013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1043
1044 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1045 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1046 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1047 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1048 (mips_after_parse_args): Use the new "ase" field to choose
1049 the default ASEs.
1050 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1051 "ase" field.
1052
e83a675f
RE
10532013-06-18 Richard Earnshaw <rearnsha@arm.com>
1054
1055 * config/tc-arm.c (symbol_preemptible): New function.
1056 (relax_branch): Use it.
1057
7f3c4072
CM
10582013-06-17 Catherine Moore <clm@codesourcery.com>
1059 Maciej W. Rozycki <macro@codesourcery.com>
1060 Chao-Ying Fu <fu@mips.com>
1061
1062 * config/tc-mips.c (mips_set_options): Add ase_eva.
1063 (mips_set_options mips_opts): Add ase_eva.
1064 (file_ase_eva): Declare.
1065 (ISA_SUPPORTS_EVA_ASE): Define.
1066 (IS_SEXT_9BIT_NUM): Define.
1067 (MIPS_CPU_ASE_EVA): Define.
1068 (is_opcode_valid): Add support for ase_eva.
1069 (macro_build): Likewise.
1070 (macro): Likewise.
1071 (validate_mips_insn): Likewise.
1072 (validate_micromips_insn): Likewise.
1073 (mips_ip): Likewise.
1074 (options): Add OPTION_EVA and OPTION_NO_EVA.
1075 (md_longopts): Add -meva and -mno-eva.
1076 (md_parse_option): Process new options.
1077 (mips_after_parse_args): Check for valid EVA combinations.
1078 (s_mipsset): Likewise.
1079
e410add4
RS
10802013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1081
1082 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1083 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1084 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1085 (dwarf2_gen_line_info_1): Update call accordingly.
1086 (dwarf2_move_insn): New function.
1087 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1088
6a50d470
RS
10892013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1090
1091 Revert:
1092
1093 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1094
1095 PR gas/13024
1096 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1097 (dwarf2_gen_line_info_1): Delete.
1098 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1099 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1100 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1101 (dwarf2_directive_loc): Push previous .locs instead of generating
1102 them immediately.
1103
f122319e
CF
11042013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1105
1106 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1107 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1108
909c7f9c
NC
11092013-06-13 Nick Clifton <nickc@redhat.com>
1110
1111 PR gas/15602
1112 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1113 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1114 function. Generates an error if the adjusted offset is out of a
1115 16-bit range.
1116
5d5755a7
SL
11172013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1118
1119 * config/tc-nios2.c (md_apply_fix): Mask constant
1120 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1121
3bf0dbfb
MR
11222013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1123
1124 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1125 MIPS-3D instructions either.
1126 (md_convert_frag): Update the COPx branch mask accordingly.
1127
1128 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1129 option.
1130 * doc/as.texinfo (Overview): Add --relax-branch and
1131 --no-relax-branch.
1132 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1133 --no-relax-branch.
1134
9daf7bab
SL
11352013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1136
1137 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1138 omitted.
1139
d301a56b
RS
11402013-06-08 Catherine Moore <clm@codesourcery.com>
1141
1142 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1143 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1144 (append_insn): Change INSN_xxxx to ASE_xxxx.
1145
7bab7634
DC
11462013-06-01 George Thomas <george.thomas@atmel.com>
1147
cbe02d4f 1148 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1149 AVR_ISA_XMEGAU
1150
f60cf82f
L
11512013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1152
1153 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1154 for ELF.
1155
a3f278e2
CM
11562013-05-31 Paul Brook <paul@codesourcery.com>
1157
a3f278e2
CM
1158 * config/tc-mips.c (s_ehword): New.
1159
067ec077
CM
11602013-05-30 Paul Brook <paul@codesourcery.com>
1161
1162 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1163
d6101ac2
MR
11642013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1165
1166 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1167 convert relocs who have no relocatable field either. Rephrase
1168 the conditional so that the PC-relative check is only applied
1169 for REL targets.
1170
f19ccbda
MR
11712013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1172
1173 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1174 calculation.
1175
418009c2
YZ
11762013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1177
1178 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1179 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1180 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1181 (md_apply_fix): Likewise.
1182 (aarch64_force_relocation): Likewise.
1183
0a8897c7
KT
11842013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1185
1186 * config/tc-arm.c (it_fsm_post_encode): Improve
1187 warning messages about deprecated IT block formats.
1188
89d2a2a3
MS
11892013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1190
1191 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1192 inside fx_done condition.
1193
c77c0862
RS
11942013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1195
1196 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1197
c0637f3a
PB
11982013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1199
1200 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1201 and clean up warning when using PRINT_OPCODE_TABLE.
1202
5656a981
AM
12032013-05-20 Alan Modra <amodra@gmail.com>
1204
1205 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1206 and data fixups performing shift/high adjust/sign extension on
1207 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1208 when writing data fixups rather than recalculating size.
1209
997b26e8
JBG
12102013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1211
1212 * doc/c-msp430.texi: Fix typo.
1213
9f6e76f4
TG
12142013-05-16 Tristan Gingold <gingold@adacore.com>
1215
1216 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1217 are also TOC symbols.
1218
638d3803
NC
12192013-05-16 Nick Clifton <nickc@redhat.com>
1220
1221 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1222 Add -mcpu command to specify core type.
997b26e8 1223 * doc/c-msp430.texi: Update documentation.
638d3803 1224
b015e599
AP
12252013-05-09 Andrew Pinski <apinski@cavium.com>
1226
1227 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1228 (mips_opts): Update for the new field.
1229 (file_ase_virt): New variable.
1230 (ISA_SUPPORTS_VIRT_ASE): New macro.
1231 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1232 (MIPS_CPU_ASE_VIRT): New define.
1233 (is_opcode_valid): Handle ase_virt.
1234 (macro_build): Handle "+J".
1235 (validate_mips_insn): Likewise.
1236 (mips_ip): Likewise.
1237 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1238 (md_longopts): Add mvirt and mnovirt
1239 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1240 (mips_after_parse_args): Handle ase_virt field.
1241 (s_mipsset): Handle "virt" and "novirt".
1242 (mips_elf_final_processing): Add a comment about virt ASE might need
1243 a new flag.
1244 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1245 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1246 Document ".set virt" and ".set novirt".
1247
da8094d7
AM
12482013-05-09 Alan Modra <amodra@gmail.com>
1249
1250 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1251 control of operand flag bits.
1252
c5f8c205
AM
12532013-05-07 Alan Modra <amodra@gmail.com>
1254
1255 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1256 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1257 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1258 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1259 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1260 Shift and sign-extend fieldval for use by some VLE reloc
1261 operand->insert functions.
1262
b47468a6
CM
12632013-05-06 Paul Brook <paul@codesourcery.com>
1264 Catherine Moore <clm@codesourcery.com>
1265
c5f8c205
AM
1266 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1267 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1268 (md_apply_fix): Likewise.
1269 (tc_gen_reloc): Likewise.
1270
2de39019
CM
12712013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1272
1273 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1274 (mips_fix_adjustable): Adjust pc-relative check to use
1275 limited_pc_reloc_p.
1276
754e2bb9
RS
12772013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1278
1279 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1280 (s_mips_stab): Do not restrict to stabn only.
1281
13761a11
NC
12822013-05-02 Nick Clifton <nickc@redhat.com>
1283
1284 * config/tc-msp430.c: Add support for the MSP430X architecture.
1285 Add code to insert a NOP instruction after any instruction that
1286 might change the interrupt state.
1287 Add support for the LARGE memory model.
1288 Add code to initialise the .MSP430.attributes section.
1289 * config/tc-msp430.h: Add support for the MSP430X architecture.
1290 * doc/c-msp430.texi: Document the new -mL and -mN command line
1291 options.
1292 * NEWS: Mention support for the MSP430X architecture.
1293
df26367c
MR
12942013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1295
1296 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1297 alpha*-*-linux*ecoff*.
1298
f02d8318
CF
12992013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1300
1301 * config/tc-mips.c (mips_ip): Add sizelo.
1302 For "+C", "+G", and "+H", set sizelo and compare against it.
1303
b40bf0a2
NC
13042013-04-29 Nick Clifton <nickc@redhat.com>
1305
1306 * as.c (Options): Add -gdwarf-sections.
1307 (parse_args): Likewise.
1308 * as.h (flag_dwarf_sections): Declare.
1309 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1310 (process_entries): When -gdwarf-sections is enabled generate
1311 fragmentary .debug_line sections.
1312 (out_debug_line): Set the section for the .debug_line section end
1313 symbol.
1314 * doc/as.texinfo: Document -gdwarf-sections.
1315 * NEWS: Mention -gdwarf-sections.
1316
8eeccb77 13172013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1318
1319 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1320 according to the target parameter. Don't call s_segm since s_segm
1321 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1322 initialized yet.
1323 (md_begin): Call s_segm according to target parameter from command
1324 line.
1325
49926cd0
AM
13262013-04-25 Alan Modra <amodra@gmail.com>
1327
1328 * configure.in: Allow little-endian linux.
1329 * configure: Regenerate.
1330
e3031850
SL
13312013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1332
1333 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1334 "fstatus" control register to "eccinj".
1335
cb948fc0
KT
13362013-04-19 Kai Tietz <ktietz@redhat.com>
1337
1338 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1339
4455e9ad
JB
13402013-04-15 Julian Brown <julian@codesourcery.com>
1341
1342 * expr.c (add_to_result, subtract_from_result): Make global.
1343 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1344 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1345 subtract_from_result to handle extra bit of precision for .sleb128
1346 directive operands.
1347
956a6ba3
JB
13482013-04-10 Julian Brown <julian@codesourcery.com>
1349
1350 * read.c (convert_to_bignum): Add sign parameter. Use it
1351 instead of X_unsigned to determine sign of resulting bignum.
1352 (emit_expr): Pass extra argument to convert_to_bignum.
1353 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1354 X_extrabit to convert_to_bignum.
1355 (parse_bitfield_cons): Set X_extrabit.
1356 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1357 Initialise X_extrabit field as appropriate.
1358 (add_to_result): New.
1359 (subtract_from_result): New.
1360 (expr): Use above.
1361 * expr.h (expressionS): Add X_extrabit field.
1362
eb9f3f00
JB
13632013-04-10 Jan Beulich <jbeulich@suse.com>
1364
1365 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1366 register being PC when is_t or writeback, and use distinct
1367 diagnostic for the latter case.
1368
ccb84d65
JB
13692013-04-10 Jan Beulich <jbeulich@suse.com>
1370
1371 * gas/config/tc-arm.c (parse_operands): Re-write
1372 po_barrier_or_imm().
1373 (do_barrier): Remove bogus constraint().
1374 (do_t_barrier): Remove.
1375
4d13caa0
NC
13762013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1377
1378 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1379 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1380 ATmega2564RFR2
1381 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1382
16d02dc9
JB
13832013-04-09 Jan Beulich <jbeulich@suse.com>
1384
1385 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1386 Use local variable Rt in more places.
1387 (do_vmsr): Accept all control registers.
1388
05ac0ffb
JB
13892013-04-09 Jan Beulich <jbeulich@suse.com>
1390
1391 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1392 if there was none specified for moves between scalar and core
1393 register.
1394
2d51fb74
JB
13952013-04-09 Jan Beulich <jbeulich@suse.com>
1396
1397 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1398 NEON_ALL_LANES case.
1399
94dcf8bf
JB
14002013-04-08 Jan Beulich <jbeulich@suse.com>
1401
1402 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1403 PC-relative VSTR.
1404
1472d06f
JB
14052013-04-08 Jan Beulich <jbeulich@suse.com>
1406
1407 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1408 entry to sp_fiq.
1409
0c76cae8
AM
14102013-04-03 Alan Modra <amodra@gmail.com>
1411
1412 * doc/as.texinfo: Add support to generate man options for h8300.
1413 * doc/c-h8300.texi: Likewise.
1414
92eb40d9
RR
14152013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1416
1417 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1418 Cortex-A57.
1419
51dcdd4d
NC
14202013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1421
1422 PR binutils/15068
1423 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1424
c5d685bf
NC
14252013-03-26 Nick Clifton <nickc@redhat.com>
1426
9b978282
NC
1427 PR gas/15295
1428 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1429 start of the file each time.
1430
c5d685bf
NC
1431 PR gas/15178
1432 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1433 FreeBSD targets.
1434
9699c833
TG
14352013-03-26 Douglas B Rupp <rupp@gnat.com>
1436
1437 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1438 after fixup.
1439
4755303e
WN
14402013-03-21 Will Newton <will.newton@linaro.org>
1441
1442 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1443 pc-relative str instructions in Thumb mode.
1444
81f5558e
NC
14452013-03-21 Michael Schewe <michael.schewe@gmx.net>
1446
1447 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1448 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1449 R_H8_DISP32A16.
1450 * config/tc-h8300.h: Remove duplicated defines.
1451
71863e73
NC
14522013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1453
1454 PR gas/15282
1455 * tc-avr.c (mcu_has_3_byte_pc): New function.
1456 (tc_cfi_frame_initial_instructions): Call it to find return
1457 address size.
1458
795b8e6b
NC
14592013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1460
1461 PR gas/15095
1462 * config/tc-tic6x.c (tic6x_try_encode): Handle
1463 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1464 encode register pair numbers when required.
1465
ba86b375
WN
14662013-03-15 Will Newton <will.newton@linaro.org>
1467
1468 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1469 in vstr in Thumb mode for pre-ARMv7 cores.
1470
9e6f3811
AS
14712013-03-14 Andreas Schwab <schwab@suse.de>
1472
1473 * doc/c-arc.texi (ARC Directives): Revert last change and use
1474 @itemize instead of @table.
1475 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1476
b10bf8c5
NC
14772013-03-14 Nick Clifton <nickc@redhat.com>
1478
1479 PR gas/15273
1480 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1481 NULL message, instead just check ARM_CPU_IS_ANY directly.
1482
ba724cfc
NC
14832013-03-14 Nick Clifton <nickc@redhat.com>
1484
1485 PR gas/15212
9e6f3811 1486 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1487 for table format.
1488 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1489 to the @item directives.
1490 (ARM-Neon-Alignment): Move to correct place in the document.
1491 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1492 formatting.
1493 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1494 @smallexample.
1495
531a94fd
SL
14962013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1497
1498 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1499 case. Add default BAD_CASE to switch.
1500
dad60f8e
SL
15012013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1502
1503 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1504 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1505
dd5181d5
KT
15062013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1507
1508 * config/tc-arm.c (crc_ext_armv8): New feature set.
1509 (UNPRED_REG): New macro.
1510 (do_crc32_1): New function.
1511 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1512 do_crc32ch, do_crc32cw): Likewise.
1513 (TUEc): New macro.
1514 (insns): Add entries for crc32 mnemonics.
1515 (arm_extensions): Add entry for crc.
1516
8e723a10
CLT
15172013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1518
1519 * write.h (struct fix): Add fx_dot_frag field.
1520 (dot_frag): Declare.
1521 * write.c (dot_frag): New variable.
1522 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1523 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1524 * expr.c (expr): Save value of frag_now in dot_frag when setting
1525 dot_value.
1526 * read.c (emit_expr): Likewise. Delete comments.
1527
be05d201
L
15282013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1529
1530 * config/tc-i386.c (flag_code_names): Removed.
1531 (i386_index_check): Rewrote.
1532
62b0d0d5
YZ
15332013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1534
1535 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1536 add comment.
1537 (aarch64_double_precision_fmovable): New function.
1538 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1539 function; handle hexadecimal representation of IEEE754 encoding.
1540 (parse_operands): Update the call to parse_aarch64_imm_float.
1541
165de32a
L
15422013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1543
1544 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1545 (check_hle): Updated.
1546 (md_assemble): Likewise.
1547 (parse_insn): Likewise.
1548
d5de92cf
L
15492013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1550
1551 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1552 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1553 (parse_insn): Remove expecting_string_instruction. Set
1554 i.rep_prefix.
1555
e60bb1dd
YZ
15562013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1557
1558 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1559
aeebdd9b
YZ
15602013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1561
1562 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1563 for system registers.
1564
4107ae22
DD
15652013-02-27 DJ Delorie <dj@redhat.com>
1566
1567 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1568 (rl78_op): Handle %code().
1569 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1570 (tc_gen_reloc): Likwise; convert to a computed reloc.
1571 (md_apply_fix): Likewise.
1572
151fa98f
NC
15732013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1574
1575 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1576
70a8bc5b 15772013-02-25 Terry Guo <terry.guo@arm.com>
1578
1579 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1580 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1581 list of accepted CPUs.
1582
5c111e37
L
15832013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1584
1585 PR gas/15159
1586 * config/tc-i386.c (cpu_arch): Add ".smap".
1587
1588 * doc/c-i386.texi: Document smap.
1589
8a75745d
MR
15902013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1591
1592 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1593 mips_assembling_insn appropriately.
1594 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1595
79850f26
MR
15962013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1597
cf29fc61 1598 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1599 extraneous braces.
1600
4c261dff
NC
16012013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1602
5c111e37 1603 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1604
ea33f281
NC
16052013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1606
1607 * configure.tgt: Add nios2-*-rtems*.
1608
a1ccaec9
YZ
16092013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1610
1611 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1612 NULL.
1613
0aa27725
RS
16142013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1615
1616 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1617 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1618
da4339ed
NC
16192013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1620
1621 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1622 core.
1623
36591ba1 16242013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1625 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1626
1627 Based on patches from Altera Corporation.
1628
1629 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1630 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1631 * Makefile.in: Regenerated.
1632 * configure.tgt: Add case for nios2*-linux*.
1633 * config/obj-elf.c: Conditionally include elf/nios2.h.
1634 * config/tc-nios2.c: New file.
1635 * config/tc-nios2.h: New file.
1636 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1637 * doc/Makefile.in: Regenerated.
1638 * doc/all.texi: Set NIOSII.
1639 * doc/as.texinfo (Overview): Add Nios II options.
1640 (Machine Dependencies): Include c-nios2.texi.
1641 * doc/c-nios2.texi: New file.
1642 * NEWS: Note Altera Nios II support.
1643
94d4433a
AM
16442013-02-06 Alan Modra <amodra@gmail.com>
1645
1646 PR gas/14255
1647 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1648 Don't skip fixups with fx_subsy non-NULL.
1649 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1650 with fx_subsy non-NULL.
1651
ace9af6f
L
16522013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1653
1654 * doc/c-metag.texi: Add "@c man" markers.
1655
89d67ed9
AM
16562013-02-04 Alan Modra <amodra@gmail.com>
1657
1658 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1659 related code.
1660 (TC_ADJUST_RELOC_COUNT): Delete.
1661 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1662
89072bd6
AM
16632013-02-04 Alan Modra <amodra@gmail.com>
1664
1665 * po/POTFILES.in: Regenerate.
1666
f9b2d544
NC
16672013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1668
1669 * config/tc-metag.c: Make SWAP instruction less permissive with
1670 its operands.
1671
392ca752
DD
16722013-01-29 DJ Delorie <dj@redhat.com>
1673
1674 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1675 relocs in .word/.etc statements.
1676
427d0db6
RM
16772013-01-29 Roland McGrath <mcgrathr@google.com>
1678
1679 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1680 immediate value for 8-bit offset" error so it shows line info.
1681
4faf939a
JM
16822013-01-24 Joseph Myers <joseph@codesourcery.com>
1683
1684 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1685 for 64-bit output.
1686
78c8d46c
NC
16872013-01-24 Nick Clifton <nickc@redhat.com>
1688
1689 * config/tc-v850.c: Add support for e3v5 architecture.
1690 * doc/c-v850.texi: Mention new support.
1691
fb5b7503
NC
16922013-01-23 Nick Clifton <nickc@redhat.com>
1693
1694 PR gas/15039
1695 * config/tc-avr.c: Include dwarf2dbg.h.
1696
8ce3d284
L
16972013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1698
1699 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1700 (tc_i386_fix_adjustable): Likewise.
1701 (lex_got): Likewise.
1702 (tc_gen_reloc): Likewise.
1703
f5555712
YZ
17042013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1705
1706 * config/tc-aarch64.c (output_operand_error_record): Change to output
1707 the out-of-range error message as value-expected message if there is
1708 only one single value in the expected range.
1709 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1710 LSL #0 as a programmer-friendly feature.
1711
8fd4256d
L
17122013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1713
1714 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1715 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1716 BFD_RELOC_64_SIZE relocations.
1717 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1718 for it.
1719 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1720 relocations against local symbols.
1721
a5840dce
AM
17222013-01-16 Alan Modra <amodra@gmail.com>
1723
1724 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1725 finding some sort of toc syntax error, and break to avoid
1726 compiler uninit warning.
1727
af89796a
L
17282013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1729
1730 PR gas/15019
1731 * config/tc-i386.c (lex_got): Increment length by 1 if the
1732 relocation token is removed.
1733
dd42f060
NC
17342013-01-15 Nick Clifton <nickc@redhat.com>
1735
1736 * config/tc-v850.c (md_assemble): Allow signed values for
1737 V850E_IMMEDIATE.
1738
464e3686
SK
17392013-01-11 Sean Keys <skeys@ipdatasys.com>
1740
1741 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1742 git to cvs.
464e3686 1743
5817ffd1
PB
17442013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1745
1746 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1747 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1748 * config/tc-ppc.c (md_show_usage): Likewise.
1749 (ppc_handle_align): Handle power8's group ending nop.
1750
f4b1f6a9
SK
17512013-01-10 Sean Keys <skeys@ipdatasys.com>
1752
1753 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1754 that the assember exits after the opcodes have been printed.
f4b1f6a9 1755
34bca508
L
17562013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1757
1758 * app.c: Remove trailing white spaces.
1759 * as.c: Likewise.
1760 * as.h: Likewise.
1761 * cond.c: Likewise.
1762 * dw2gencfi.c: Likewise.
1763 * dwarf2dbg.h: Likewise.
1764 * ecoff.c: Likewise.
1765 * input-file.c: Likewise.
1766 * itbl-lex.h: Likewise.
1767 * output-file.c: Likewise.
1768 * read.c: Likewise.
1769 * sb.c: Likewise.
1770 * subsegs.c: Likewise.
1771 * symbols.c: Likewise.
1772 * write.c: Likewise.
1773 * config/tc-i386.c: Likewise.
1774 * doc/Makefile.am: Likewise.
1775 * doc/Makefile.in: Likewise.
1776 * doc/c-aarch64.texi: Likewise.
1777 * doc/c-alpha.texi: Likewise.
1778 * doc/c-arc.texi: Likewise.
1779 * doc/c-arm.texi: Likewise.
1780 * doc/c-avr.texi: Likewise.
1781 * doc/c-bfin.texi: Likewise.
1782 * doc/c-cr16.texi: Likewise.
1783 * doc/c-d10v.texi: Likewise.
1784 * doc/c-d30v.texi: Likewise.
1785 * doc/c-h8300.texi: Likewise.
1786 * doc/c-hppa.texi: Likewise.
1787 * doc/c-i370.texi: Likewise.
1788 * doc/c-i386.texi: Likewise.
1789 * doc/c-i860.texi: Likewise.
1790 * doc/c-m32c.texi: Likewise.
1791 * doc/c-m32r.texi: Likewise.
1792 * doc/c-m68hc11.texi: Likewise.
1793 * doc/c-m68k.texi: Likewise.
1794 * doc/c-microblaze.texi: Likewise.
1795 * doc/c-mips.texi: Likewise.
1796 * doc/c-msp430.texi: Likewise.
1797 * doc/c-mt.texi: Likewise.
1798 * doc/c-s390.texi: Likewise.
1799 * doc/c-score.texi: Likewise.
1800 * doc/c-sh.texi: Likewise.
1801 * doc/c-sh64.texi: Likewise.
1802 * doc/c-tic54x.texi: Likewise.
1803 * doc/c-tic6x.texi: Likewise.
1804 * doc/c-v850.texi: Likewise.
1805 * doc/c-xc16x.texi: Likewise.
1806 * doc/c-xgate.texi: Likewise.
1807 * doc/c-xtensa.texi: Likewise.
1808 * doc/c-z80.texi: Likewise.
1809 * doc/internals.texi: Likewise.
1810
4c665b71
RM
18112013-01-10 Roland McGrath <mcgrathr@google.com>
1812
1813 * hash.c (hash_new_sized): Make it global.
1814 * hash.h: Declare it.
1815 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1816 pass a small size.
1817
a3c62988
NC
18182013-01-10 Will Newton <will.newton@imgtec.com>
1819
1820 * Makefile.am: Add Meta.
1821 * Makefile.in: Regenerate.
1822 * config/tc-metag.c: New file.
1823 * config/tc-metag.h: New file.
1824 * configure.tgt: Add Meta.
1825 * doc/Makefile.am: Add Meta.
1826 * doc/Makefile.in: Regenerate.
1827 * doc/all.texi: Add Meta.
1828 * doc/as.texiinfo: Document Meta options.
1829 * doc/c-metag.texi: New file.
1830
b37df7c4
SE
18312013-01-09 Steve Ellcey <sellcey@mips.com>
1832
1833 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1834 calls.
1835 * config/tc-mips.c (internalError): Remove, replace with abort.
1836
a3251895
YZ
18372013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1838
1839 * config/tc-aarch64.c (parse_operands): Change to compare the result
1840 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1841
8ab8155f
NC
18422013-01-07 Nick Clifton <nickc@redhat.com>
1843
1844 PR gas/14887
1845 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1846 anticipated character.
1847 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1848 here as it is no longer needed.
1849
a4ac1c42
AS
18502013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1851
1852 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1853 * doc/c-score.texi (SCORE-Opts): Likewise.
1854 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1855
e407c74b
NC
18562013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1857
1858 * config/tc-mips.c: Add support for MIPS r5900.
1859 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1860 lq and sq.
1861 (can_swap_branch_p, get_append_method): Detect some conditional
1862 short loops to fix a bug on the r5900 by NOP in the branch delay
1863 slot.
1864 (M_MUL): Support 3 operands in multu on r5900.
1865 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1866 (s_mipsset): Force 32 bit floating point on r5900.
1867 (mips_ip): Check parameter range of instructions mfps and mtps on
1868 r5900.
1869 * configure.in: Detect CPU type when target string contains r5900
1870 (e.g. mips64r5900el-linux-gnu).
1871
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18722013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1873
1874 * as.c (parse_args): Update copyright year to 2013.
1875
95830fd1
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18762013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1877
1878 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1879 and "cortex57".
1880
517bb291 18812013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1882
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1883 PR gas/14987
1884 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1885 closing bracket.
d709e4e6 1886
517bb291 1887For older changes see ChangeLog-2012
08d56133 1888\f
517bb291 1889Copyright (C) 2013 Free Software Foundation, Inc.
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1890
1891Copying and distribution of this file, with or without modification,
1892are permitted in any medium without royalty provided the copyright
1893notice and this notice are preserved.
1894
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1895Local Variables:
1896mode: change-log
1897left-margin: 8
1898fill-column: 74
1899version-control: never
1900End: