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Make -mlittle-endian switch set the target_big_endian variable to false.
[thirdparty/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
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1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
2132e3a3
AM
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005
4 Free Software Foundation, Inc.
adde6300
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5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24#include <stdio.h>
adde6300 25#include "as.h"
3882b010 26#include "safe-ctype.h"
adde6300
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27#include "subsegs.h"
28
1188e082
DC
29struct avr_opcodes_s
30{
31 char *name;
32 char *constraints;
c6a7ab1f 33 int insn_size; /* In words. */
1188e082
DC
34 int isa;
35 unsigned int bin_opcode;
36};
37
38#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
39{#NAME, CONSTR, SIZE, ISA, BIN},
40
41struct avr_opcodes_s avr_opcodes[] =
42{
43 #include "opcode/avr.h"
44 {NULL, NULL, 0, 0, 0}
45};
46
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47const char comment_chars[] = ";";
48const char line_comment_chars[] = "#";
49const char line_separator_chars[] = "$";
50
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51const char *md_shortopts = "m:";
52struct mcu_type_s
53{
54 char *name;
55 int isa;
56 int mach;
57};
58
1f8ae5e6
DC
59/* XXX - devices that don't seem to exist (renamed, replaced with larger
60 ones, or planned but never produced), left here for compatibility.
61 TODO: hide them in show_mcu_list output? */
62
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63static struct mcu_type_s mcu_types[] =
64{
b170af93 65 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
71d7ecf2 66 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
b170af93 67 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 68 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
65aa24b6 69 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
adde6300 70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
1f8ae5e6 71 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
b170af93
DC
72 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
adde6300
AM
76 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6 78 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
adde6300 79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
bdfdba87
MM
80 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
adde6300 82 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
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DC
83 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
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85 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
8a6def3b 88 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
71d7ecf2
MM
89 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny2313",AVR_ISA_TINY2, bfd_mach_avr2},
1f8ae5e6 91 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
b170af93 92 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 93 {"at43usb320",AVR_ISA_M103, bfd_mach_avr3},
bdfdba87 94 {"at43usb355",AVR_ISA_M603, bfd_mach_avr3},
1f8ae5e6 95 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
23794b24 96 {"atmega48", AVR_ISA_M8, bfd_mach_avr4},
1f8ae5e6 97 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
8a6def3b 98 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
1f8ae5e6 99 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
23794b24 100 {"atmega88", AVR_ISA_M8, bfd_mach_avr4},
bdfdba87 101 {"atmega8515",AVR_ISA_M8, bfd_mach_avr4},
8a6def3b 102 {"atmega8535",AVR_ISA_M8, bfd_mach_avr4},
1f8ae5e6 103 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6 104 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
bdfdba87 105 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6 106 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
5c54fd37 107 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
23794b24 108 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
8a6def3b 109 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
1f8ae5e6
DC
110 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
111 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
5c54fd37
NC
112 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
113 {"atmega3250",AVR_ISA_M323, bfd_mach_avr5},
1f8ae5e6
DC
114 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
115 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
5c54fd37
NC
116 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
117 {"atmega6450",AVR_ISA_M323, bfd_mach_avr5},
23794b24 118 {"at90can128",AVR_ISA_M128, bfd_mach_avr5},
65aa24b6 119 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
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120 {NULL, 0, 0}
121};
122
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123/* Current MCU type. */
124static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
125static struct mcu_type_s *avr_mcu = &default_mcu;
126
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127/* AVR target-specific switches. */
128struct avr_opt_s
129{
c6a7ab1f
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130 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */
131 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */
132 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */
00d2865b
NC
133};
134
135static struct avr_opt_s avr_opt = { 0, 0, 0 };
136
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137const char EXP_CHARS[] = "eE";
138const char FLT_CHARS[] = "dD";
139static void avr_set_arch (int dummy);
140
141/* The target specific pseudo-ops which we support. */
142const pseudo_typeS md_pseudo_table[] =
143{
144 {"arch", avr_set_arch, 0},
145 { NULL, NULL, 0}
146};
147
148#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 149
65b1d096
DC
150static void show_mcu_list PARAMS ((FILE *));
151static char *skip_space PARAMS ((char *));
152static char *extract_word PARAMS ((char *, char *, int));
153static unsigned int avr_operand PARAMS ((struct avr_opcodes_s *,
154 int, char *, char **));
155static unsigned int avr_operands PARAMS ((struct avr_opcodes_s *, char **));
156static unsigned int avr_get_constant PARAMS ((char *, int));
157static char *parse_exp PARAMS ((char *, expressionS *));
158static bfd_reloc_code_real_type avr_ldi_expression PARAMS ((expressionS *));
adde6300 159
adde6300
AM
160#define EXP_MOD_NAME(i) exp_mod[i].name
161#define EXP_MOD_RELOC(i) exp_mod[i].reloc
162#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
163#define HAVE_PM_P(i) exp_mod[i].have_pm
164
165struct exp_mod_s
166{
c6a7ab1f 167 char *name;
adde6300
AM
168 bfd_reloc_code_real_type reloc;
169 bfd_reloc_code_real_type neg_reloc;
170 int have_pm;
171};
172
c6a7ab1f
NC
173static struct exp_mod_s exp_mod[] =
174{
adde6300
AM
175 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
176 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
177 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
178 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
179 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
180 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
181 {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
182 {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
183};
184
185/* Opcode hash table. */
186static struct hash_control *avr_hash;
187
188/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
189static struct hash_control *avr_mod_hash;
190
00d2865b
NC
191#define OPTION_MMCU 'm'
192#define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1)
193#define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2)
194#define OPTION_NO_WRAP (OPTION_MD_BASE + 3)
adde6300 195
c6a7ab1f
NC
196struct option md_longopts[] =
197{
00d2865b
NC
198 { "mmcu", required_argument, NULL, OPTION_MMCU },
199 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
200 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
201 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
202 { NULL, no_argument, NULL, 0 }
adde6300 203};
adde6300 204
c6a7ab1f 205size_t md_longopts_size = sizeof (md_longopts);
00d2865b
NC
206
207/* Display nicely formatted list of known MCU names. */
c6a7ab1f 208
00d2865b 209static void
c6a7ab1f
NC
210show_mcu_list (stream)
211 FILE *stream;
00d2865b
NC
212{
213 int i, x;
214
215 fprintf (stream, _("Known MCU names:"));
216 x = 1000;
1dab94dd 217
00d2865b
NC
218 for (i = 0; mcu_types[i].name; i++)
219 {
220 int len = strlen (mcu_types[i].name);
1dab94dd 221
00d2865b 222 x += len + 1;
1dab94dd 223
00d2865b 224 if (x < 75)
c6a7ab1f 225 fprintf (stream, " %s", mcu_types[i].name);
00d2865b
NC
226 else
227 {
228 fprintf (stream, "\n %s", mcu_types[i].name);
229 x = len + 2;
230 }
231 }
1dab94dd 232
c6a7ab1f 233 fprintf (stream, "\n");
00d2865b
NC
234}
235
adde6300
AM
236static inline char *
237skip_space (s)
c6a7ab1f 238 char *s;
adde6300
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239{
240 while (*s == ' ' || *s == '\t')
241 ++s;
242 return s;
243}
244
245/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 246
adde6300
AM
247static char *
248extract_word (char *from, char *to, int limit)
249{
250 char *op_start;
251 char *op_end;
252 int size = 0;
253
254 /* Drop leading whitespace. */
255 from = skip_space (from);
256 *to = 0;
c6a7ab1f 257
adde6300 258 /* Find the op code end. */
c6a7ab1f 259 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
adde6300
AM
260 {
261 to[size++] = *op_end++;
262 if (size + 1 >= limit)
263 break;
264 }
1dab94dd 265
adde6300
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266 to[size] = 0;
267 return op_end;
268}
269
270int
271md_estimate_size_before_relax (fragp, seg)
df136245
DC
272 fragS *fragp ATTRIBUTE_UNUSED;
273 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
274{
275 abort ();
276 return 0;
277}
278
279void
280md_show_usage (stream)
c6a7ab1f 281 FILE *stream;
adde6300 282{
00d2865b
NC
283 fprintf (stream,
284 _("AVR options:\n"
adde6300
AM
285 " -mmcu=[avr-name] select microcontroller variant\n"
286 " [avr-name] can be:\n"
65aa24b6
NC
287 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
288 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
289 " avr3 - ATmega103, ATmega603\n"
290 " avr4 - ATmega83, ATmega85\n"
291 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 292 " or immediate microcontroller name.\n"));
00d2865b
NC
293 fprintf (stream,
294 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
295 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
296 " (default for avr4, avr5)\n"
297 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
298 " (default for avr3, avr5)\n"));
299 show_mcu_list (stream);
adde6300
AM
300}
301
302static void
303avr_set_arch (dummy)
df136245 304 int dummy ATTRIBUTE_UNUSED;
adde6300 305{
c6a7ab1f 306 char *str;
1dab94dd 307
c6a7ab1f 308 str = (char *) alloca (20);
adde6300 309 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 310 md_parse_option (OPTION_MMCU, str);
adde6300
AM
311 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
312}
313
314int
315md_parse_option (c, arg)
316 int c;
317 char *arg;
318{
00d2865b 319 switch (c)
adde6300 320 {
00d2865b
NC
321 case OPTION_MMCU:
322 {
323 int i;
324 char *s = alloca (strlen (arg) + 1);
adde6300 325
00d2865b
NC
326 {
327 char *t = s;
328 char *arg1 = arg;
329
330 do
3882b010 331 *t = TOLOWER (*arg1++);
00d2865b
NC
332 while (*t++);
333 }
334
335 for (i = 0; mcu_types[i].name; ++i)
336 if (strcmp (mcu_types[i].name, s) == 0)
337 break;
adde6300 338
00d2865b
NC
339 if (!mcu_types[i].name)
340 {
341 show_mcu_list (stderr);
342 as_fatal (_("unknown MCU: %s\n"), arg);
343 }
65aa24b6 344
00d2865b
NC
345 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
346 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
347 as .arch ... in the asm output at the same time. */
00d2865b
NC
348 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
349 avr_mcu = &mcu_types[i];
350 else
351 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
352 avr_mcu->name, mcu_types[i].name);
353 return 1;
354 }
355 case OPTION_ALL_OPCODES:
356 avr_opt.all_opcodes = 1;
357 return 1;
358 case OPTION_NO_SKIP_BUG:
359 avr_opt.no_skip_bug = 1;
360 return 1;
361 case OPTION_NO_WRAP:
362 avr_opt.no_wrap = 1;
adde6300
AM
363 return 1;
364 }
1dab94dd 365
adde6300
AM
366 return 0;
367}
368
369symbolS *
c6a7ab1f 370md_undefined_symbol (name)
df136245 371 char *name ATTRIBUTE_UNUSED;
adde6300
AM
372{
373 return 0;
374}
375
c6a7ab1f
NC
376/* Turn a string in input_line_pointer into a floating point constant
377 of type TYPE, and store the appropriate bytes in *LITP. The number
378 of LITTLENUMS emitted is stored in *SIZEP. An error message is
379 returned, or NULL on OK. */
380
adde6300
AM
381char *
382md_atof (type, litP, sizeP)
383 int type;
384 char *litP;
385 int *sizeP;
386{
387 int prec;
388 LITTLENUM_TYPE words[4];
389 LITTLENUM_TYPE *wordP;
390 char *t;
391
392 switch (type)
393 {
394 case 'f':
395 prec = 2;
396 break;
397 case 'd':
398 prec = 4;
399 break;
400 default:
401 *sizeP = 0;
402 return _("bad call to md_atof");
403 }
404
405 t = atof_ieee (input_line_pointer, type, words);
406 if (t)
407 input_line_pointer = t;
408
409 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1dab94dd 410
adde6300
AM
411 /* This loop outputs the LITTLENUMs in REVERSE order. */
412 for (wordP = words + prec - 1; prec--;)
413 {
414 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
415 litP += sizeof (LITTLENUM_TYPE);
416 }
1dab94dd 417
adde6300
AM
418 return NULL;
419}
420
421void
422md_convert_frag (abfd, sec, fragP)
c6a7ab1f
NC
423 bfd *abfd ATTRIBUTE_UNUSED;
424 asection *sec ATTRIBUTE_UNUSED;
425 fragS *fragP ATTRIBUTE_UNUSED;
adde6300
AM
426{
427 abort ();
428}
429
adde6300
AM
430void
431md_begin ()
432{
df136245 433 unsigned int i;
adde6300 434 struct avr_opcodes_s *opcode;
c6a7ab1f 435 avr_hash = hash_new ();
adde6300
AM
436
437 /* Insert unique names into hash table. This hash table then provides a
438 quick index to the first opcode with a particular name in the opcode
439 table. */
adde6300
AM
440 for (opcode = avr_opcodes; opcode->name; opcode++)
441 hash_insert (avr_hash, opcode->name, (char *) opcode);
442
443 avr_mod_hash = hash_new ();
444
445 for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i)
c6a7ab1f
NC
446 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10));
447
adde6300
AM
448 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
449}
450
df136245 451/* Resolve STR as a constant expression and return the result.
c6a7ab1f 452 If result greater than MAX then error. */
df136245
DC
453
454static unsigned int
455avr_get_constant (str, max)
c6a7ab1f 456 char *str;
df136245
DC
457 int max;
458{
459 expressionS ex;
460 str = skip_space (str);
461 input_line_pointer = str;
462 expression (&ex);
463
464 if (ex.X_op != O_constant)
465 as_bad (_("constant value required"));
466
467 if (ex.X_add_number > max || ex.X_add_number < 0)
c6a7ab1f 468 as_bad (_("number must be less than %d"), max + 1);
1dab94dd 469
df136245
DC
470 return ex.X_add_number;
471}
472
df136245 473/* Parse instruction operands.
c6a7ab1f 474 Return binary opcode. */
df136245 475
adde6300
AM
476static unsigned int
477avr_operands (opcode, line)
478 struct avr_opcodes_s *opcode;
479 char **line;
480{
481 char *op = opcode->constraints;
482 unsigned int bin = opcode->bin_opcode;
483 char *frag = frag_more (opcode->insn_size * 2);
484 char *str = *line;
485 int where = frag - frag_now->fr_literal;
c6a7ab1f 486 static unsigned int prev = 0; /* Previous opcode. */
adde6300
AM
487
488 /* Opcode have operands. */
489 if (*op)
490 {
491 unsigned int reg1 = 0;
492 unsigned int reg2 = 0;
493 int reg1_present = 0;
494 int reg2_present = 0;
495
496 /* Parse first operand. */
497 if (REGISTER_P (*op))
498 reg1_present = 1;
499 reg1 = avr_operand (opcode, where, op, &str);
500 ++op;
501
502 /* Parse second operand. */
503 if (*op)
504 {
505 if (*op == ',')
506 ++op;
1dab94dd 507
adde6300
AM
508 if (*op == '=')
509 {
510 reg2 = reg1;
511 reg2_present = 1;
512 }
513 else
514 {
515 if (REGISTER_P (*op))
516 reg2_present = 1;
517
518 str = skip_space (str);
519 if (*str++ != ',')
00d2865b 520 as_bad (_("`,' required"));
adde6300
AM
521 str = skip_space (str);
522
523 reg2 = avr_operand (opcode, where, op, &str);
524
525 }
1dab94dd 526
adde6300
AM
527 if (reg1_present && reg2_present)
528 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
529 else if (reg2_present)
530 reg2 <<= 4;
531 }
532 if (reg1_present)
533 reg1 <<= 4;
534 bin |= reg1 | reg2;
535 }
b170af93 536
65b1d096
DC
537 /* Detect undefined combinations (like ld r31,Z+). */
538 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
539 as_warn (_("undefined combination of operands"));
00d2865b 540
adde6300
AM
541 if (opcode->insn_size == 2)
542 {
00d2865b
NC
543 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
544 (AVR core bug, fixed in the newer devices). */
545
23794b24
MM
546 if (!(avr_opt.no_skip_bug ||
547 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
65b1d096
DC
548 && AVR_SKIP_P (prev))
549 as_warn (_("skipping two-word instruction"));
00d2865b 550
c6a7ab1f 551 bfd_putl32 ((bfd_vma) bin, frag);
adde6300
AM
552 }
553 else
c6a7ab1f 554 bfd_putl16 ((bfd_vma) bin, frag);
b170af93
DC
555
556 prev = bin;
adde6300
AM
557 *line = str;
558 return bin;
559}
560
750bce0e
NC
561/* Parse for ldd/std offset */
562
563static void
564avr_offset_expression (expressionS *exp)
565{
566 char *str = input_line_pointer;
567 char *tmp;
568 char op[8];
569
570 tmp = str;
571 str = extract_word (str, op, sizeof (op));
572
573 input_line_pointer = tmp;
574 expression (exp);
575
576 /* Warn about expressions that fail to use lo8 (). */
577 if (exp->X_op == O_constant)
578 {
579 int x = exp->X_add_number;
580
581 if (x < -255 || x > 255)
582 as_warn (_("constant out of 8-bit range: %d"), x);
583 }
584}
585
df136245 586/* Parse one instruction operand.
c6a7ab1f
NC
587 Return operand bitmask. Also fixups can be generated. */
588
adde6300
AM
589static unsigned int
590avr_operand (opcode, where, op, line)
591 struct avr_opcodes_s *opcode;
592 int where;
593 char *op;
594 char **line;
595{
adde6300 596 expressionS op_expr;
df136245
DC
597 unsigned int op_mask = 0;
598 char *str = skip_space (*line);
adde6300 599
adde6300
AM
600 switch (*op)
601 {
602 /* Any register operand. */
603 case 'w':
604 case 'd':
605 case 'r':
b170af93
DC
606 case 'a':
607 case 'v':
c6a7ab1f
NC
608 if (*str == 'r' || *str == 'R')
609 {
610 char r_name[20];
1dab94dd 611
c6a7ab1f 612 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 613 op_mask = 0xff;
3882b010 614 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
615 {
616 if (r_name[2] == '\0')
617 op_mask = r_name[1] - '0';
618 else if (r_name[1] != '0'
3882b010 619 && ISDIGIT (r_name[2])
c6a7ab1f
NC
620 && r_name[3] == '\0')
621 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
622 }
623 }
624 else
625 {
626 op_mask = avr_get_constant (str, 31);
627 str = input_line_pointer;
628 }
1dab94dd 629
c6a7ab1f
NC
630 if (op_mask <= 31)
631 {
632 switch (*op)
633 {
634 case 'a':
635 if (op_mask < 16 || op_mask > 23)
636 as_bad (_("register r16-r23 required"));
637 op_mask -= 16;
638 break;
1dab94dd 639
c6a7ab1f
NC
640 case 'd':
641 if (op_mask < 16)
642 as_bad (_("register number above 15 required"));
643 op_mask -= 16;
644 break;
1dab94dd 645
c6a7ab1f
NC
646 case 'v':
647 if (op_mask & 1)
648 as_bad (_("even register number required"));
649 op_mask >>= 1;
650 break;
1dab94dd 651
c6a7ab1f 652 case 'w':
65b1d096 653 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 654 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 655 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
656 break;
657 }
658 break;
659 }
660 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
661 break;
662
663 case 'e':
664 {
665 char c;
1dab94dd 666
adde6300
AM
667 if (*str == '-')
668 {
c6a7ab1f 669 str = skip_space (str + 1);
adde6300
AM
670 op_mask = 0x1002;
671 }
3882b010 672 c = TOLOWER (*str);
adde6300
AM
673 if (c == 'x')
674 op_mask |= 0x100c;
675 else if (c == 'y')
676 op_mask |= 0x8;
677 else if (c != 'z')
00d2865b 678 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 679
c6a7ab1f 680 str = skip_space (str + 1);
adde6300
AM
681 if (*str == '+')
682 {
683 ++str;
684 if (op_mask & 2)
00d2865b 685 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
686 op_mask |= 0x1001;
687 }
e38c9cc2 688
1188e082 689 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 690 registers, no predecrement, no postincrement. */
00d2865b
NC
691 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
692 && !(avr_mcu->isa & AVR_ISA_SRAM))
693 as_bad (_("addressing mode not supported"));
adde6300
AM
694 }
695 break;
696
b170af93 697 case 'z':
c6a7ab1f
NC
698 if (*str == '-')
699 as_bad (_("can't predecrement"));
1dab94dd 700
c6a7ab1f
NC
701 if (! (*str == 'z' || *str == 'Z'))
702 as_bad (_("pointer register Z required"));
1dab94dd 703
c6a7ab1f
NC
704 str = skip_space (str + 1);
705
706 if (*str == '+')
707 {
708 ++str;
709 op_mask |= 1;
710 }
b170af93
DC
711 break;
712
adde6300
AM
713 case 'b':
714 {
3882b010 715 char c = TOLOWER (*str++);
1dab94dd 716
adde6300
AM
717 if (c == 'y')
718 op_mask |= 0x8;
719 else if (c != 'z')
00d2865b 720 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
721 str = skip_space (str);
722 if (*str++ == '+')
723 {
750bce0e
NC
724 input_line_pointer = str;
725 avr_offset_expression (& op_expr);
adde6300 726 str = input_line_pointer;
750bce0e
NC
727 fix_new_exp (frag_now, where, 3,
728 &op_expr, FALSE, BFD_RELOC_AVR_6);
adde6300
AM
729 }
730 }
731 break;
732
733 case 'h':
c6a7ab1f
NC
734 str = parse_exp (str, &op_expr);
735 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 736 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
adde6300
AM
737 break;
738
739 case 'L':
c6a7ab1f
NC
740 str = parse_exp (str, &op_expr);
741 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 742 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
743 break;
744
745 case 'l':
c6a7ab1f
NC
746 str = parse_exp (str, &op_expr);
747 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 748 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
749 break;
750
751 case 'i':
c6a7ab1f
NC
752 str = parse_exp (str, &op_expr);
753 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
b34976b6 754 &op_expr, FALSE, BFD_RELOC_16);
adde6300
AM
755 break;
756
757 case 'M':
758 {
759 bfd_reloc_code_real_type r_type;
1dab94dd 760
c6a7ab1f
NC
761 input_line_pointer = str;
762 r_type = avr_ldi_expression (&op_expr);
763 str = input_line_pointer;
adde6300 764 fix_new_exp (frag_now, where, 3,
b34976b6 765 &op_expr, FALSE, r_type);
adde6300
AM
766 }
767 break;
768
769 case 'n':
770 {
771 unsigned int x;
1dab94dd 772
adde6300
AM
773 x = ~avr_get_constant (str, 255);
774 str = input_line_pointer;
775 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
776 }
777 break;
778
779 case 'K':
750bce0e
NC
780 input_line_pointer = str;
781 avr_offset_expression (& op_expr);
782 str = input_line_pointer;
783 fix_new_exp (frag_now, where, 3,
784 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
adde6300
AM
785 break;
786
787 case 'S':
788 case 's':
789 {
790 unsigned int x;
1dab94dd 791
adde6300
AM
792 x = avr_get_constant (str, 7);
793 str = input_line_pointer;
794 if (*op == 'S')
795 x <<= 4;
796 op_mask |= x;
797 }
798 break;
799
800 case 'P':
801 {
802 unsigned int x;
1dab94dd 803
adde6300
AM
804 x = avr_get_constant (str, 63);
805 str = input_line_pointer;
806 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
807 }
808 break;
809
810 case 'p':
811 {
812 unsigned int x;
1dab94dd 813
adde6300
AM
814 x = avr_get_constant (str, 31);
815 str = input_line_pointer;
816 op_mask |= x << 3;
817 }
818 break;
1dab94dd 819
1188e082
DC
820 case '?':
821 break;
1dab94dd 822
adde6300 823 default:
00d2865b 824 as_bad (_("unknown constraint `%c'"), *op);
adde6300 825 }
1dab94dd 826
adde6300
AM
827 *line = str;
828 return op_mask;
829}
830
831/* GAS will call this function for each section at the end of the assembly,
832 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 833
adde6300
AM
834valueT
835md_section_align (seg, addr)
836 asection *seg;
837 valueT addr;
838{
839 int align = bfd_get_section_alignment (stdoutput, seg);
840 return ((addr + (1 << align) - 1) & (-1 << align));
841}
842
843/* If you define this macro, it should return the offset between the
844 address of a PC relative fixup and the position from which the PC
845 relative adjustment should be made. On many processors, the base
846 of a PC relative instruction is the next instruction, so this
847 macro would return the length of an instruction. */
c6a7ab1f 848
adde6300
AM
849long
850md_pcrel_from_section (fixp, sec)
851 fixS *fixp;
852 segT sec;
853{
c6a7ab1f 854 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
855 && (!S_IS_DEFINED (fixp->fx_addsy)
856 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
857 return 0;
1dab94dd 858
adde6300
AM
859 return fixp->fx_frag->fr_address + fixp->fx_where;
860}
861
862/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
863 value in the object file. */
864
94f592af
NC
865void
866md_apply_fix3 (fixP, valP, seg)
867 fixS *fixP;
868 valueT * valP;
adde6300
AM
869 segT seg;
870{
871 unsigned char *where;
872 unsigned long insn;
a161fe53 873 long value = *valP;
adde6300 874
94f592af
NC
875 if (fixP->fx_addsy == (symbolS *) NULL)
876 fixP->fx_done = 1;
877
87733541
AM
878 else if (fixP->fx_pcrel)
879 {
880 segT s = S_GET_SEGMENT (fixP->fx_addsy);
881
882 if (s == seg || s == absolute_section)
883 {
884 value += S_GET_VALUE (fixP->fx_addsy);
885 fixP->fx_done = 1;
886 }
887 }
888
a161fe53
AM
889 /* We don't actually support subtracting a symbol. */
890 if (fixP->fx_subsy != (symbolS *) NULL)
891 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1dab94dd 892
94f592af 893 switch (fixP->fx_r_type)
adde6300
AM
894 {
895 default:
94f592af 896 fixP->fx_no_overflow = 1;
adde6300
AM
897 break;
898 case BFD_RELOC_AVR_7_PCREL:
899 case BFD_RELOC_AVR_13_PCREL:
900 case BFD_RELOC_32:
901 case BFD_RELOC_16:
902 case BFD_RELOC_AVR_CALL:
903 break;
904 }
905
94f592af 906 if (fixP->fx_done)
adde6300
AM
907 {
908 /* Fetch the instruction, insert the fully resolved operand
909 value, and stuff the instruction back again. */
2132e3a3 910 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
adde6300
AM
911 insn = bfd_getl16 (where);
912
94f592af 913 switch (fixP->fx_r_type)
adde6300
AM
914 {
915 case BFD_RELOC_AVR_7_PCREL:
916 if (value & 1)
94f592af 917 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 918 _("odd address operand: %ld"), value);
1dab94dd 919
adde6300
AM
920 /* Instruction addresses are always right-shifted by 1. */
921 value >>= 1;
922 --value; /* Correct PC. */
1dab94dd 923
adde6300 924 if (value < -64 || value > 63)
94f592af 925 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
926 _("operand out of range: %ld"), value);
927 value = (value << 3) & 0x3f8;
928 bfd_putl16 ((bfd_vma) (value | insn), where);
929 break;
930
931 case BFD_RELOC_AVR_13_PCREL:
932 if (value & 1)
94f592af 933 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 934 _("odd address operand: %ld"), value);
1dab94dd 935
adde6300
AM
936 /* Instruction addresses are always right-shifted by 1. */
937 value >>= 1;
938 --value; /* Correct PC. */
adde6300
AM
939
940 if (value < -2048 || value > 2047)
941 {
65aa24b6 942 /* No wrap for devices with >8K of program memory. */
00d2865b 943 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
94f592af 944 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
945 _("operand out of range: %ld"), value);
946 }
947
948 value &= 0xfff;
949 bfd_putl16 ((bfd_vma) (value | insn), where);
950 break;
951
952 case BFD_RELOC_32:
953 bfd_putl16 ((bfd_vma) value, where);
954 break;
955
956 case BFD_RELOC_16:
957 bfd_putl16 ((bfd_vma) value, where);
958 break;
959
960 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 961 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
962 break;
963
750bce0e
NC
964 case BFD_RELOC_AVR_LDI:
965 if (value > 255)
966 as_bad_where (fixP->fx_file, fixP->fx_line,
967 _("operand out of range: %ld"), value);
968 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
969 break;
970
971 case BFD_RELOC_AVR_6:
972 if ((value > 63) || (value < 0))
973 as_bad_where (fixP->fx_file, fixP->fx_line,
974 _("operand out of range: %ld"), value);
975 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
976 break;
977
978 case BFD_RELOC_AVR_6_ADIW:
979 if ((value > 63) || (value < 0))
980 as_bad_where (fixP->fx_file, fixP->fx_line,
981 _("operand out of range: %ld"), value);
982 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
983 break;
984
adde6300
AM
985 case BFD_RELOC_AVR_LO8_LDI:
986 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
987 break;
988
989 case -BFD_RELOC_AVR_LO8_LDI:
990 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
991 break;
992
993 case BFD_RELOC_AVR_HI8_LDI:
994 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
995 break;
996
997 case -BFD_RELOC_AVR_HI8_LDI:
998 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
999 break;
1000
1001 case BFD_RELOC_AVR_HH8_LDI:
1002 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1003 break;
1004
1005 case BFD_RELOC_AVR_LO8_LDI_NEG:
1006 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1007 break;
1008
1009 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1010 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1011 break;
1012
1013 case BFD_RELOC_AVR_HI8_LDI_NEG:
1014 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1015 break;
1016
1017 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1018 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1019 break;
1020
1021 case BFD_RELOC_AVR_HH8_LDI_NEG:
1022 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1023 break;
1024
1025 case BFD_RELOC_AVR_LO8_LDI_PM:
1026 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1027 break;
1028
1029 case BFD_RELOC_AVR_HI8_LDI_PM:
1030 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1031 break;
1032
1033 case BFD_RELOC_AVR_HH8_LDI_PM:
1034 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1035 break;
1036
1037 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1038 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1039 break;
1040
1041 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1042 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1043 break;
1044
1045 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1046 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1047 break;
1048
1049 case BFD_RELOC_AVR_CALL:
1050 {
1051 unsigned long x;
1dab94dd 1052
adde6300
AM
1053 x = bfd_getl16 (where);
1054 if (value & 1)
94f592af 1055 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1056 _("odd address operand: %ld"), value);
1057 value >>= 1;
1058 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1059 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 1060 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
1061 }
1062 break;
1063
1064 default:
c6a7ab1f 1065 as_fatal (_("line %d: unknown relocation type: 0x%x"),
94f592af 1066 fixP->fx_line, fixP->fx_r_type);
adde6300
AM
1067 break;
1068 }
1069 }
1070 else
1071 {
94f592af 1072 switch (fixP->fx_r_type)
adde6300
AM
1073 {
1074 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1075 case -BFD_RELOC_AVR_HI8_LDI:
1076 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1077 case -BFD_RELOC_AVR_LO8_LDI:
94f592af 1078 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1079 _("only constant expression allowed"));
94f592af 1080 fixP->fx_done = 1;
adde6300
AM
1081 break;
1082 default:
1083 break;
1084 }
adde6300 1085 }
adde6300
AM
1086}
1087
adde6300
AM
1088/* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1089 will pass the resulting reloc to `bfd_install_relocation'. This
1090 currently works poorly, as `bfd_install_relocation' often does the
1091 wrong thing, and instances of `tc_gen_reloc' have been written to
1092 work around the problems, which in turns makes it difficult to fix
c6a7ab1f 1093 `bfd_install_relocation'. */
adde6300
AM
1094
1095/* If while processing a fixup, a reloc really needs to be created
1096 then it is done here. */
1097
1098arelent *
1099tc_gen_reloc (seg, fixp)
df136245 1100 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
1101 fixS *fixp;
1102{
1103 arelent *reloc;
1104
1105 reloc = (arelent *) xmalloc (sizeof (arelent));
1106
1107 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1108 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1109
1110 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1111 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1112 if (reloc->howto == (reloc_howto_type *) NULL)
1113 {
1114 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1115 _("reloc %d not supported by object file format"),
1116 (int) fixp->fx_r_type);
adde6300
AM
1117 return NULL;
1118 }
1119
1120 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1121 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1122 reloc->address = fixp->fx_offset;
1123
1124 reloc->addend = fixp->fx_offset;
1125
1126 return reloc;
1127}
1128
adde6300
AM
1129void
1130md_assemble (str)
1131 char *str;
1132{
c6a7ab1f 1133 struct avr_opcodes_s *opcode;
adde6300
AM
1134 char op[11];
1135
c6a7ab1f 1136 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1137
1138 if (!op[0])
00d2865b 1139 as_bad (_("can't find opcode "));
adde6300
AM
1140
1141 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1142
1143 if (opcode == NULL)
1144 {
00d2865b 1145 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1146 return;
1147 }
1148
b170af93 1149 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1150 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1151
1188e082
DC
1152 if (*str && *opcode->constraints == '?')
1153 ++opcode;
b170af93 1154
00d2865b
NC
1155 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1156 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1157
1158 /* We used to set input_line_pointer to the result of get_operands,
1159 but that is wrong. Our caller assumes we don't change it. */
1160 {
1161 char *t = input_line_pointer;
1162 avr_operands (opcode, &str);
b170af93 1163 if (*skip_space (str))
00d2865b 1164 as_bad (_("garbage at end of line"));
adde6300
AM
1165 input_line_pointer = t;
1166 }
1167}
1168
1169/* Parse ordinary expression. */
c6a7ab1f 1170
adde6300
AM
1171static char *
1172parse_exp (s, op)
1173 char *s;
c6a7ab1f 1174 expressionS *op;
adde6300
AM
1175{
1176 input_line_pointer = s;
1177 expression (op);
1178 if (op->X_op == O_absent)
1179 as_bad (_("missing operand"));
1180 return input_line_pointer;
1181}
1182
adde6300
AM
1183/* Parse special expressions (needed for LDI command):
1184 xx8 (address)
1185 xx8 (-address)
1186 pm_xx8 (address)
1187 pm_xx8 (-address)
c6a7ab1f
NC
1188 where xx is: hh, hi, lo. */
1189
adde6300
AM
1190static bfd_reloc_code_real_type
1191avr_ldi_expression (exp)
1192 expressionS *exp;
1193{
1194 char *str = input_line_pointer;
1195 char *tmp;
1196 char op[8];
1197 int mod;
1198 tmp = str;
1199
1200 str = extract_word (str, op, sizeof (op));
1dab94dd 1201
adde6300
AM
1202 if (op[0])
1203 {
1204 mod = (int) hash_find (avr_mod_hash, op);
1dab94dd 1205
adde6300
AM
1206 if (mod)
1207 {
1208 int closes = 0;
1dab94dd 1209
adde6300
AM
1210 mod -= 10;
1211 str = skip_space (str);
1dab94dd 1212
adde6300
AM
1213 if (*str == '(')
1214 {
1215 int neg_p = 0;
1dab94dd 1216
adde6300 1217 ++str;
1dab94dd 1218
adde6300
AM
1219 if (strncmp ("pm(", str, 3) == 0
1220 || strncmp ("-(pm(", str, 5) == 0)
1221 {
c6a7ab1f 1222 if (HAVE_PM_P (mod))
adde6300
AM
1223 {
1224 ++mod;
1225 ++closes;
1226 }
1227 else
00d2865b 1228 as_bad (_("illegal expression"));
1dab94dd 1229
adde6300
AM
1230 if (*str == '-')
1231 {
1232 neg_p = 1;
1233 ++closes;
1234 str += 5;
1235 }
1236 else
1237 str += 3;
1238 }
1dab94dd 1239
adde6300
AM
1240 if (*str == '-' && *(str + 1) == '(')
1241 {
1242 neg_p ^= 1;
1243 ++closes;
1244 str += 2;
1245 }
1dab94dd 1246
adde6300
AM
1247 input_line_pointer = str;
1248 expression (exp);
1dab94dd 1249
adde6300
AM
1250 do
1251 {
1252 if (*input_line_pointer != ')')
1253 {
00d2865b 1254 as_bad (_("`)' required"));
adde6300
AM
1255 break;
1256 }
1257 input_line_pointer++;
1258 }
1259 while (closes--);
1dab94dd 1260
adde6300
AM
1261 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
1262 }
1263 }
1264 }
1dab94dd 1265
adde6300
AM
1266 input_line_pointer = tmp;
1267 expression (exp);
00d2865b 1268
c6a7ab1f 1269 /* Warn about expressions that fail to use lo8 (). */
00d2865b
NC
1270 if (exp->X_op == O_constant)
1271 {
1272 int x = exp->X_add_number;
1273 if (x < -255 || x > 255)
1274 as_warn (_("constant out of 8-bit range: %d"), x);
1275 }
00d2865b 1276
750bce0e 1277 return BFD_RELOC_AVR_LDI;
adde6300
AM
1278}
1279
1280/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1281 `avr_cons_fix_new'. */
adde6300
AM
1282static int exp_mod_pm = 0;
1283
1284/* Parse special CONS expression: pm (expression)
1285 which is used for addressing to a program memory.
c6a7ab1f
NC
1286 Relocation: BFD_RELOC_AVR_16_PM. */
1287
adde6300
AM
1288void
1289avr_parse_cons_expression (exp, nbytes)
1290 expressionS *exp;
1291 int nbytes;
1292{
c6a7ab1f 1293 char *tmp;
adde6300
AM
1294
1295 exp_mod_pm = 0;
1296
1297 tmp = input_line_pointer = skip_space (input_line_pointer);
1298
1299 if (nbytes == 2)
1300 {
c6a7ab1f 1301 char *pm_name = "pm";
adde6300 1302 int len = strlen (pm_name);
1dab94dd 1303
adde6300
AM
1304 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1305 {
1306 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1307
adde6300
AM
1308 if (*input_line_pointer == '(')
1309 {
1310 input_line_pointer = skip_space (input_line_pointer + 1);
1311 exp_mod_pm = 1;
1312 expression (exp);
1dab94dd 1313
adde6300
AM
1314 if (*input_line_pointer == ')')
1315 ++input_line_pointer;
1316 else
1317 {
00d2865b 1318 as_bad (_("`)' required"));
adde6300
AM
1319 exp_mod_pm = 0;
1320 }
1dab94dd 1321
adde6300
AM
1322 return;
1323 }
1dab94dd 1324
adde6300
AM
1325 input_line_pointer = tmp;
1326 }
1327 }
1dab94dd 1328
adde6300
AM
1329 expression (exp);
1330}
1331
1332void
c6a7ab1f 1333avr_cons_fix_new (frag, where, nbytes, exp)
adde6300
AM
1334 fragS *frag;
1335 int where;
1336 int nbytes;
1337 expressionS *exp;
1338{
1339 if (exp_mod_pm == 0)
1340 {
1341 if (nbytes == 2)
b34976b6 1342 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
adde6300 1343 else if (nbytes == 4)
b34976b6 1344 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
adde6300 1345 else
00d2865b 1346 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
adde6300
AM
1347 }
1348 else
1349 {
1350 if (nbytes == 2)
b34976b6 1351 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
adde6300 1352 else
00d2865b 1353 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
adde6300
AM
1354 exp_mod_pm = 0;
1355 }
1356}