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ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
250d07de 2 Copyright (C) 2009-2021 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
33eaf5de 29 unsigned int in_scale; /* >=1 if processing multiplication operand
ee86248c
JB
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
f2f5811f
JB
55/* mmword ptr X_add_symbol */
56#define O_mmword_ptr O_qword_ptr
ee86248c 57/* fword ptr X_add_symbol */
7456d03d 58#define O_fword_ptr O_md24
ee86248c 59/* tbyte ptr X_add_symbol */
7456d03d
JB
60#define O_tbyte_ptr O_md23
61/* oword ptr X_add_symbol */
62#define O_oword_ptr O_md22
ee86248c 63/* xmmword ptr X_add_symbol */
7456d03d 64#define O_xmmword_ptr O_oword_ptr
ee86248c 65/* ymmword ptr X_add_symbol */
7456d03d 66#define O_ymmword_ptr O_md21
43234a1e 67/* zmmword ptr X_add_symbol */
7456d03d 68#define O_zmmword_ptr O_md20
ee86248c
JB
69
70static struct
71 {
72 const char *name;
1e9cc1c2 73 operatorT op;
ee86248c
JB
74 unsigned int operands;
75 }
76const i386_operators[] =
77 {
78 { "and", O_bit_and, 2 },
79 { "eq", O_eq, 2 },
80 { "ge", O_ge, 2 },
81 { "gt", O_gt, 2 },
82 { "le", O_le, 2 },
83 { "lt", O_lt, 2 },
84 { "mod", O_modulus, 2 },
85 { "ne", O_ne, 2 },
86 { "not", O_bit_not, 1 },
87 { "offset", O_offset, 1 },
88 { "or", O_bit_inclusive_or, 2 },
89 { "shl", O_left_shift, 2 },
90 { "short", O_short, 1 },
91 { "shr", O_right_shift, 2 },
92 { "xor", O_bit_exclusive_or, 2 },
93 { NULL, O_illegal, 0 }
94 };
95
96static struct
97 {
98 const char *name;
1e9cc1c2 99 operatorT op;
ee86248c
JB
100 unsigned short sz[3];
101 }
102const i386_types[] =
103 {
104#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
105 I386_TYPE(byte, 1),
106 I386_TYPE(word, 2),
107 I386_TYPE(dword, 4),
108 I386_TYPE(fword, 6),
109 I386_TYPE(qword, 8),
f2f5811f 110 I386_TYPE(mmword, 8),
ee86248c
JB
111 I386_TYPE(tbyte, 10),
112 I386_TYPE(oword, 16),
113 I386_TYPE(xmmword, 16),
114 I386_TYPE(ymmword, 32),
43234a1e 115 I386_TYPE(zmmword, 64),
ee86248c
JB
116#undef I386_TYPE
117 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
118 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
119 { NULL, O_illegal, { 0, 0, 0 } }
120 };
121
122operatorT i386_operator (const char *name, unsigned int operands, char *pc)
123{
124 unsigned int j;
125
b3983e5f
JB
126#ifdef SVR4_COMMENT_CHARS
127 if (!name && operands == 2 && *input_line_pointer == '\\')
128 switch (input_line_pointer[1])
129 {
130 case '/': input_line_pointer += 2; return O_divide;
131 case '%': input_line_pointer += 2; return O_modulus;
132 case '*': input_line_pointer += 2; return O_multiply;
133 }
134#endif
135
ee86248c
JB
136 if (!intel_syntax)
137 return O_absent;
138
139 if (!name)
140 {
141 if (operands != 2)
142 return O_illegal;
143 switch (*input_line_pointer)
144 {
145 case ':':
146 ++input_line_pointer;
147 return O_full_ptr;
148 case '[':
149 ++input_line_pointer;
150 return O_index;
151 case '@':
152 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
153 {
154 int adjust = 0;
155 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
156 &adjust,
d258b828 157 &intel_state.reloc_types);
ee86248c
JB
158
159 if (!gotfree_input_line)
160 break;
161 free (gotfree_input_line);
162 *input_line_pointer++ = '+';
163 memset (input_line_pointer, '0', adjust - 1);
164 input_line_pointer[adjust - 1] = ' ';
165 return O_add;
166 }
167 break;
168 }
169 return O_illegal;
170 }
171
172 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 173 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
174 {
175 if (i386_operators[j].operands
176 && i386_operators[j].operands != operands)
177 return O_illegal;
1e9cc1c2 178 return i386_operators[j].op;
ee86248c
JB
179 }
180
181 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 182 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c 183 break;
d02603dc 184
ee86248c
JB
185 if (i386_types[j].name && *pc == ' ')
186 {
d02603dc
NC
187 char *pname;
188 char c;
189
190 ++input_line_pointer;
191 c = get_symbol_name (&pname);
ee86248c 192
91d6fa6a 193 if (strcasecmp (pname, "ptr") == 0)
ee86248c 194 {
d02603dc 195 /* FIXME: What if c == '"' ? */
91d6fa6a 196 pname[-1] = *pc;
ee86248c
JB
197 *pc = c;
198 if (intel_syntax > 0 || operands != 1)
199 return O_illegal;
1e9cc1c2 200 return i386_types[j].op;
ee86248c
JB
201 }
202
d02603dc 203 (void) restore_line_pointer (c);
91d6fa6a 204 input_line_pointer = pname - 1;
ee86248c
JB
205 }
206
207 return O_absent;
208}
209
210static int i386_intel_parse_name (const char *name, expressionS *e)
211{
91d6fa6a 212 unsigned int j;
ee86248c 213
b7adb16d
JB
214 if (! strcmp (name, "$"))
215 {
216 current_location (e);
217 return 1;
218 }
219
91d6fa6a
NC
220 for (j = 0; i386_types[j].name; ++j)
221 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
222 {
223 e->X_op = O_constant;
91d6fa6a 224 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
225 e->X_add_symbol = NULL;
226 e->X_op_symbol = NULL;
227 return 1;
228 }
229
230 return 0;
231}
232
91d6fa6a 233static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 234 const reg_entry *base,
91d6fa6a 235 const reg_entry *iindex)
ee86248c 236{
f09c1772
L
237 if ((this_operand >= 0
238 && rreg != i.op[this_operand].regs)
239 || base != intel_state.base
240 || iindex != intel_state.index)
ee86248c
JB
241 {
242 as_bad (_("invalid use of register"));
243 return 0;
244 }
245 return 1;
246}
247
248static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
249{
27dee630 250 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
251 if (S_GET_SEGMENT (sym) == absolute_section)
252 {
253 offsetT val = e->X_add_number;
254
27dee630 255 *e = *exp;
ee86248c
JB
256 e->X_add_number += val;
257 }
258 else
259 {
27dee630
L
260 if (exp->X_op == O_symbol
261 && strcmp (S_GET_NAME (exp->X_add_symbol),
262 GLOBAL_OFFSET_TABLE_NAME) == 0)
263 sym = exp->X_add_symbol;
ee86248c
JB
264 e->X_add_symbol = sym;
265 e->X_op_symbol = NULL;
266 e->X_op = O_symbol;
267 }
268}
269
3c7b9c2c
L
270static int
271i386_intel_simplify_register (expressionS *e)
272{
273 int reg_num;
274
275 if (this_operand < 0 || intel_state.in_offset)
276 {
277 as_bad (_("invalid use of register"));
278 return 0;
279 }
280
281 if (e->X_op == O_register)
282 reg_num = e->X_add_number;
283 else
284 reg_num = e->X_md - 1;
285
35015cd1
NC
286 if (reg_num < 0 || reg_num >= (int) i386_regtab_size)
287 {
288 as_bad (_("invalid register number"));
289 return 0;
290 }
291
3c7b9c2c
L
292 if (!intel_state.in_bracket)
293 {
294 if (i.op[this_operand].regs)
295 {
296 as_bad (_("invalid use of register"));
297 return 0;
298 }
00cee14f 299 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg
3c7b9c2c
L
300 && i386_regtab[reg_num].reg_num == RegFlat)
301 {
302 as_bad (_("invalid use of pseudo-register"));
303 return 0;
304 }
305 i.op[this_operand].regs = i386_regtab + reg_num;
306 }
9e2934f7 307 else if (!intel_state.index
1b54b8d7
JB
308 && (i386_regtab[reg_num].reg_type.bitfield.xmmword
309 || i386_regtab[reg_num].reg_type.bitfield.ymmword
310 || i386_regtab[reg_num].reg_type.bitfield.zmmword
e968fc9b 311 || i386_regtab[reg_num].reg_num == RegIZ))
9e2934f7 312 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
313 else if (!intel_state.base && !intel_state.in_scale)
314 intel_state.base = i386_regtab + reg_num;
315 else if (!intel_state.index)
9e2934f7
JB
316 {
317 if (intel_state.in_scale
47cd3fa7
JB
318 || current_templates->start->base_opcode == 0xf30f1b /* bndmk */
319 || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */
9e2934f7
JB
320 || i386_regtab[reg_num].reg_type.bitfield.baseindex)
321 intel_state.index = i386_regtab + reg_num;
322 else
323 {
324 /* Convert base to index and make ESP/RSP the base. */
325 intel_state.index = intel_state.base;
326 intel_state.base = i386_regtab + reg_num;
327 }
328 }
3c7b9c2c
L
329 else
330 {
331 /* esp is invalid as index */
8280f326 332 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
3c7b9c2c
L
333 }
334 return 2;
335}
336
ee86248c
JB
337static int i386_intel_simplify (expressionS *);
338
339static INLINE int i386_intel_simplify_symbol(symbolS *sym)
340{
341 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
342
343 if (ret == 2)
344 {
345 S_SET_SEGMENT(sym, absolute_section);
346 ret = 1;
347 }
348 return ret;
349}
350
351static int i386_intel_simplify (expressionS *e)
352{
f09c1772
L
353 const reg_entry *the_reg = (this_operand >= 0
354 ? i.op[this_operand].regs : NULL);
ee86248c 355 const reg_entry *base = intel_state.base;
91d6fa6a 356 const reg_entry *state_index = intel_state.index;
ee86248c
JB
357 int ret;
358
359 if (!intel_syntax)
360 return 1;
361
362 switch (e->X_op)
363 {
364 case O_index:
365 if (e->X_add_symbol)
366 {
367 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
368 || !i386_intel_check(the_reg, intel_state.base,
369 intel_state.index))
5bb3703f 370 return 0;
ee86248c
JB
371 }
372 if (!intel_state.in_offset)
373 ++intel_state.in_bracket;
374 ret = i386_intel_simplify_symbol (e->X_op_symbol);
375 if (!intel_state.in_offset)
376 --intel_state.in_bracket;
377 if (!ret)
378 return 0;
379 if (e->X_add_symbol)
380 e->X_op = O_add;
381 else
382 i386_intel_fold (e, e->X_op_symbol);
383 break;
384
385 case O_offset:
6cee4cda 386 intel_state.has_offset = 1;
ee86248c
JB
387 ++intel_state.in_offset;
388 ret = i386_intel_simplify_symbol (e->X_add_symbol);
389 --intel_state.in_offset;
91d6fa6a 390 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
391 return 0;
392 i386_intel_fold (e, e->X_add_symbol);
393 return ret;
394
395 case O_byte_ptr:
396 case O_word_ptr:
397 case O_dword_ptr:
398 case O_fword_ptr:
f2f5811f 399 case O_qword_ptr: /* O_mmword_ptr */
ee86248c 400 case O_tbyte_ptr:
7456d03d 401 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 402 case O_ymmword_ptr:
43234a1e 403 case O_zmmword_ptr:
ee86248c
JB
404 case O_near_ptr:
405 case O_far_ptr:
406 if (intel_state.op_modifier == O_absent)
407 intel_state.op_modifier = e->X_op;
408 /* FALLTHROUGH */
409 case O_short:
f09c1772
L
410 if (symbol_get_value_expression (e->X_add_symbol)->X_op
411 == O_register)
ee86248c
JB
412 {
413 as_bad (_("invalid use of register"));
414 return 0;
415 }
416 if (!i386_intel_simplify_symbol (e->X_add_symbol))
417 return 0;
418 i386_intel_fold (e, e->X_add_symbol);
419 break;
420
421 case O_full_ptr:
f09c1772
L
422 if (symbol_get_value_expression (e->X_op_symbol)->X_op
423 == O_register)
ee86248c
JB
424 {
425 as_bad (_("invalid use of register"));
426 return 0;
427 }
428 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
429 || !i386_intel_check(the_reg, intel_state.base,
430 intel_state.index))
ee86248c
JB
431 return 0;
432 if (!intel_state.in_offset)
fd4e0347
JB
433 {
434 if (!intel_state.seg)
435 intel_state.seg = e->X_add_symbol;
436 else
437 {
438 expressionS exp;
439
440 exp.X_op = O_full_ptr;
441 exp.X_add_symbol = e->X_add_symbol;
442 exp.X_op_symbol = intel_state.seg;
443 intel_state.seg = make_expr_symbol (&exp);
444 }
445 }
ee86248c
JB
446 i386_intel_fold (e, e->X_op_symbol);
447 break;
448
ee86248c
JB
449 case O_multiply:
450 if (this_operand >= 0 && intel_state.in_bracket)
451 {
452 expressionS *scale = NULL;
c2a5914e 453 int has_index = (intel_state.index != NULL);
ee86248c
JB
454
455 if (!intel_state.in_scale++)
456 intel_state.scale_factor = 1;
457
458 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 459 if (ret && !has_index && intel_state.index)
ee86248c
JB
460 scale = symbol_get_value_expression (e->X_op_symbol);
461
462 if (ret)
463 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 464 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
465 scale = symbol_get_value_expression (e->X_add_symbol);
466
c2a5914e 467 if (ret && scale)
ee86248c
JB
468 {
469 resolve_expression (scale);
470 if (scale->X_op != O_constant
dc821c5f 471 || intel_state.index->reg_type.bitfield.word)
ee86248c
JB
472 scale->X_add_number = 0;
473 intel_state.scale_factor *= scale->X_add_number;
474 }
475
476 --intel_state.in_scale;
477 if (!ret)
478 return 0;
479
480 if (!intel_state.in_scale)
481 switch (intel_state.scale_factor)
482 {
483 case 1:
484 i.log2_scale_factor = 0;
485 break;
486 case 2:
487 i.log2_scale_factor = 1;
488 break;
489 case 4:
490 i.log2_scale_factor = 2;
491 break;
492 case 8:
493 i.log2_scale_factor = 3;
494 break;
495 default:
496 /* esp is invalid as index */
8280f326 497 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
ee86248c
JB
498 break;
499 }
500
501 break;
502 }
92b4f90c 503 goto fallthrough;
3c7b9c2c
L
504
505 case O_register:
506 ret = i386_intel_simplify_register (e);
507 if (ret == 2)
508 {
509 gas_assert (e->X_add_number < (unsigned short) -1);
510 e->X_md = (unsigned short) e->X_add_number + 1;
511 e->X_op = O_constant;
512 e->X_add_number = 0;
513 }
514 return ret;
515
516 case O_constant:
517 if (e->X_md)
518 return i386_intel_simplify_register (e);
519
ee86248c
JB
520 /* FALLTHROUGH */
521 default:
dc1e8a47 522 fallthrough:
f09c1772
L
523 if (e->X_add_symbol
524 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c
JB
525 return 0;
526 if (e->X_op == O_add || e->X_op == O_subtract)
527 {
528 base = intel_state.base;
91d6fa6a 529 state_index = intel_state.index;
ee86248c 530 }
91d6fa6a 531 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
532 || (e->X_op_symbol
533 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 534 || !i386_intel_check (the_reg,
f09c1772
L
535 (e->X_op != O_add
536 ? base : intel_state.base),
537 (e->X_op != O_add
538 ? state_index : intel_state.index)))
ee86248c
JB
539 return 0;
540 break;
541 }
542
f09c1772
L
543 if (this_operand >= 0
544 && e->X_op == O_symbol
545 && !intel_state.in_offset)
ee86248c
JB
546 {
547 segT seg = S_GET_SEGMENT (e->X_add_symbol);
548
549 if (seg != absolute_section
550 && seg != reg_section
551 && seg != expr_section)
552 intel_state.is_mem |= 2 - !intel_state.in_bracket;
553 }
554
555 return 1;
556}
557
558int i386_need_index_operator (void)
559{
560 return intel_syntax < 0;
561}
562
563static int
564i386_intel_operand (char *operand_string, int got_a_float)
565{
566 char *saved_input_line_pointer, *buf;
567 segT exp_seg;
568 expressionS exp, *expP;
569 char suffix = 0;
570 int ret;
571
43234a1e
L
572 /* Handle vector immediates. */
573 if (RC_SAE_immediate (operand_string))
574 return 1;
575
ee86248c
JB
576 /* Initialize state structure. */
577 intel_state.op_modifier = O_absent;
578 intel_state.is_mem = 0;
25303607 579 intel_state.is_indirect = 0;
1acf546e 580 intel_state.has_offset = 0;
ee86248c
JB
581 intel_state.base = NULL;
582 intel_state.index = NULL;
583 intel_state.seg = NULL;
584 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
585 gas_assert (!intel_state.in_offset);
586 gas_assert (!intel_state.in_bracket);
587 gas_assert (!intel_state.in_scale);
ee86248c
JB
588
589 saved_input_line_pointer = input_line_pointer;
590 input_line_pointer = buf = xstrdup (operand_string);
591
592 intel_syntax = -1;
593 memset (&exp, 0, sizeof(exp));
594 exp_seg = expression (&exp);
595 ret = i386_intel_simplify (&exp);
596 intel_syntax = 1;
597
598 SKIP_WHITESPACE ();
43234a1e
L
599
600 /* Handle vector operations. */
601 if (*input_line_pointer == '{')
602 {
603 char *end = check_VecOperations (input_line_pointer, NULL);
604 if (end)
605 input_line_pointer = end;
606 else
607 ret = 0;
608 }
609
ee86248c
JB
610 if (!is_end_of_line[(unsigned char) *input_line_pointer])
611 {
38bf5113
JB
612 if (ret)
613 as_bad (_("junk `%s' after expression"), input_line_pointer);
ee86248c
JB
614 ret = 0;
615 }
616 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
617 {
38bf5113
JB
618 if (ret)
619 as_bad (_("invalid expression"));
ee86248c
JB
620 ret = 0;
621 }
6cee4cda
L
622 else if (!intel_state.has_offset
623 && input_line_pointer > buf
624 && *(input_line_pointer - 1) == ']')
25303607
L
625 {
626 intel_state.is_mem |= 1;
627 intel_state.is_indirect = 1;
628 }
ee86248c
JB
629
630 input_line_pointer = saved_input_line_pointer;
631 free (buf);
632
9c2799c2
NC
633 gas_assert (!intel_state.in_offset);
634 gas_assert (!intel_state.in_bracket);
635 gas_assert (!intel_state.in_scale);
ee86248c
JB
636
637 if (!ret)
638 return 0;
639
640 if (intel_state.op_modifier != O_absent
641 && current_templates->start->base_opcode != 0x8d /* lea */)
642 {
643 i.types[this_operand].bitfield.unspecified = 0;
644
645 switch (intel_state.op_modifier)
646 {
647 case O_byte_ptr:
648 i.types[this_operand].bitfield.byte = 1;
649 suffix = BYTE_MNEM_SUFFIX;
650 break;
651
652 case O_word_ptr:
653 i.types[this_operand].bitfield.word = 1;
37404387 654 if (got_a_float == 2) /* "fi..." */
ee86248c
JB
655 suffix = SHORT_MNEM_SUFFIX;
656 else
657 suffix = WORD_MNEM_SUFFIX;
658 break;
659
660 case O_dword_ptr:
661 i.types[this_operand].bitfield.dword = 1;
662 if ((current_templates->start->name[0] == 'l'
663 && current_templates->start->name[2] == 's'
664 && current_templates->start->name[3] == 0)
665 || current_templates->start->base_opcode == 0x62 /* bound */)
666 suffix = WORD_MNEM_SUFFIX;
d488367a 667 else if (flag_code != CODE_32BIT
0cfa3eb3
JB
668 && (current_templates->start->opcode_modifier.jump == JUMP
669 || current_templates->start->opcode_modifier.jump
670 == JUMP_DWORD))
d488367a
JB
671 suffix = flag_code == CODE_16BIT ? LONG_DOUBLE_MNEM_SUFFIX
672 : WORD_MNEM_SUFFIX;
ee86248c
JB
673 else if (got_a_float == 1) /* "f..." */
674 suffix = SHORT_MNEM_SUFFIX;
675 else
676 suffix = LONG_MNEM_SUFFIX;
677 break;
678
679 case O_fword_ptr:
680 i.types[this_operand].bitfield.fword = 1;
681 if (current_templates->start->name[0] == 'l'
682 && current_templates->start->name[2] == 's'
683 && current_templates->start->name[3] == 0)
684 suffix = LONG_MNEM_SUFFIX;
685 else if (!got_a_float)
686 {
687 if (flag_code == CODE_16BIT)
688 add_prefix (DATA_PREFIX_OPCODE);
689 suffix = LONG_DOUBLE_MNEM_SUFFIX;
690 }
ee86248c
JB
691 break;
692
f2f5811f 693 case O_qword_ptr: /* O_mmword_ptr */
ee86248c
JB
694 i.types[this_operand].bitfield.qword = 1;
695 if (current_templates->start->base_opcode == 0x62 /* bound */
696 || got_a_float == 1) /* "f..." */
697 suffix = LONG_MNEM_SUFFIX;
698 else
699 suffix = QWORD_MNEM_SUFFIX;
700 break;
701
702 case O_tbyte_ptr:
703 i.types[this_operand].bitfield.tbyte = 1;
704 if (got_a_float == 1)
705 suffix = LONG_DOUBLE_MNEM_SUFFIX;
a8f4f6b9 706 else if ((current_templates->start->operand_types[0].bitfield.fword
5990e377
JB
707 || current_templates->start->operand_types[0].bitfield.tbyte
708 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
709 || current_templates->start->opcode_modifier.jump == JUMP)
a8f4f6b9 710 && flag_code == CODE_64BIT)
5990e377 711 suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt, call, jmp */
ee86248c 712 else
a8f4f6b9 713 i.types[this_operand].bitfield.byte = 1; /* cause an error */
ee86248c
JB
714 break;
715
7456d03d 716 case O_oword_ptr: /* O_xmmword_ptr */
ee86248c 717 i.types[this_operand].bitfield.xmmword = 1;
ee86248c
JB
718 break;
719
720 case O_ymmword_ptr:
721 i.types[this_operand].bitfield.ymmword = 1;
ee86248c
JB
722 break;
723
43234a1e
L
724 case O_zmmword_ptr:
725 i.types[this_operand].bitfield.zmmword = 1;
43234a1e
L
726 break;
727
ee86248c
JB
728 case O_far_ptr:
729 suffix = LONG_DOUBLE_MNEM_SUFFIX;
730 /* FALLTHROUGH */
731 case O_near_ptr:
0cfa3eb3
JB
732 if (current_templates->start->opcode_modifier.jump != JUMP
733 && current_templates->start->opcode_modifier.jump != JUMP_DWORD)
164d49cb
JB
734 {
735 /* cause an error */
736 i.types[this_operand].bitfield.byte = 1;
737 i.types[this_operand].bitfield.tbyte = 1;
738 suffix = i.suffix;
739 }
ee86248c
JB
740 break;
741
742 default:
743 BAD_CASE (intel_state.op_modifier);
744 break;
745 }
746
747 if (!i.suffix)
748 i.suffix = suffix;
749 else if (i.suffix != suffix)
750 {
751 as_bad (_("conflicting operand size modifiers"));
752 return 0;
753 }
754 }
755
756 /* Operands for jump/call need special consideration. */
0cfa3eb3
JB
757 if (current_templates->start->opcode_modifier.jump == JUMP
758 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
759 || current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT)
ee86248c 760 {
6f2f06be
JB
761 bfd_boolean jumpabsolute = FALSE;
762
f09c1772
L
763 if (i.op[this_operand].regs
764 || intel_state.base
765 || intel_state.index
ee86248c 766 || intel_state.is_mem > 1)
6f2f06be 767 jumpabsolute = TRUE;
ee86248c
JB
768 else
769 switch (intel_state.op_modifier)
770 {
771 case O_near_ptr:
772 if (intel_state.seg)
6f2f06be 773 jumpabsolute = TRUE;
ee86248c
JB
774 else
775 intel_state.is_mem = 1;
776 break;
777 case O_far_ptr:
778 case O_absent:
779 if (!intel_state.seg)
780 {
781 intel_state.is_mem = 1;
782 if (intel_state.op_modifier == O_absent)
25303607
L
783 {
784 if (intel_state.is_indirect == 1)
6f2f06be 785 jumpabsolute = TRUE;
25303607
L
786 break;
787 }
ee86248c
JB
788 as_bad (_("cannot infer the segment part of the operand"));
789 return 0;
790 }
791 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
6f2f06be 792 jumpabsolute = TRUE;
ee86248c
JB
793 else
794 {
795 i386_operand_type types;
796
797 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
798 {
799 as_bad (_("at most %d immediate operands are allowed"),
800 MAX_IMMEDIATE_OPERANDS);
801 return 0;
802 }
803 expP = &im_expressions[i.imm_operands++];
804 memset (expP, 0, sizeof(*expP));
805 expP->X_op = O_symbol;
806 expP->X_add_symbol = intel_state.seg;
807 i.op[this_operand].imms = expP;
808
809 resolve_expression (expP);
810 operand_type_set (&types, ~0);
811 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
812 expP, types, operand_string))
813 return 0;
814 if (i.operands < MAX_OPERANDS)
815 {
816 this_operand = i.operands++;
817 i.types[this_operand].bitfield.unspecified = 1;
818 }
819 if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
820 i.suffix = 0;
821 intel_state.seg = NULL;
822 intel_state.is_mem = 0;
823 }
824 break;
825 default:
6f2f06be 826 jumpabsolute = TRUE;
ee86248c
JB
827 break;
828 }
6f2f06be
JB
829 if (jumpabsolute)
830 {
831 i.jumpabsolute = TRUE;
832 intel_state.is_mem |= 1;
833 }
ee86248c
JB
834 }
835 else if (intel_state.seg)
836 intel_state.is_mem |= 1;
837
838 if (i.op[this_operand].regs)
839 {
840 i386_operand_type temp;
841
842 /* Register operand. */
843 if (intel_state.base || intel_state.index || intel_state.seg)
844 {
845 as_bad (_("invalid operand"));
846 return 0;
847 }
848
849 temp = i.op[this_operand].regs->reg_type;
850 temp.bitfield.baseindex = 0;
f09c1772
L
851 i.types[this_operand] = operand_type_or (i.types[this_operand],
852 temp);
ee86248c
JB
853 i.types[this_operand].bitfield.unspecified = 0;
854 ++i.reg_operands;
855 }
f09c1772
L
856 else if (intel_state.base
857 || intel_state.index
858 || intel_state.seg
ee86248c
JB
859 || intel_state.is_mem)
860 {
861 /* Memory operand. */
8325cc63
JB
862 if (i.mem_operands == 1 && !maybe_adjust_templates ())
863 return 0;
faf786e6 864 if ((int) i.mem_operands
ee86248c
JB
865 >= 2 - !current_templates->start->opcode_modifier.isstring)
866 {
313c53d1
L
867 /* Handle
868
869 call 0x9090,0x90909090
870 lcall 0x9090,0x90909090
871 jmp 0x9090,0x90909090
872 ljmp 0x9090,0x90909090
873 */
874
0cfa3eb3
JB
875 if ((current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT
876 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
877 || current_templates->start->opcode_modifier.jump == JUMP)
313c53d1
L
878 && this_operand == 1
879 && intel_state.seg == NULL
880 && i.mem_operands == 1
881 && i.disp_operands == 1
882 && intel_state.op_modifier == O_absent)
883 {
884 /* Try to process the first operand as immediate, */
885 this_operand = 0;
886 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
887 intel_state.reloc_types,
888 NULL))
889 {
890 this_operand = 1;
891 expP = &im_expressions[0];
892 i.op[this_operand].imms = expP;
893 *expP = exp;
894
895 /* Try to process the second operand as immediate, */
896 if (i386_finalize_immediate (exp_seg, expP,
897 intel_state.reloc_types,
898 NULL))
899 {
900 i.mem_operands = 0;
901 i.disp_operands = 0;
902 i.imm_operands = 2;
c48dadc9 903 i.flags[0] &= ~Operand_Mem;
313c53d1
L
904 i.types[0].bitfield.disp16 = 0;
905 i.types[0].bitfield.disp32 = 0;
906 i.types[0].bitfield.disp32s = 0;
907 return 1;
908 }
909 }
910 }
911
ee86248c
JB
912 as_bad (_("too many memory references for `%s'"),
913 current_templates->start->name);
914 return 0;
915 }
916
2abc2bec
JB
917 /* Swap base and index in 16-bit memory operands like
918 [si+bx]. Since i386_index_check is also used in AT&T
919 mode we have to do this here. */
920 if (intel_state.base
921 && intel_state.index
dc821c5f
JB
922 && intel_state.base->reg_type.bitfield.word
923 && intel_state.index->reg_type.bitfield.word
2abc2bec
JB
924 && intel_state.base->reg_num >= 6
925 && intel_state.index->reg_num < 6)
926 {
927 i.base_reg = intel_state.index;
928 i.index_reg = intel_state.base;
929 }
930 else
931 {
932 i.base_reg = intel_state.base;
933 i.index_reg = intel_state.index;
934 }
935
936 if (i.base_reg || i.index_reg)
937 i.types[this_operand].bitfield.baseindex = 1;
938
ee86248c
JB
939 expP = &disp_expressions[i.disp_operands];
940 memcpy (expP, &exp, sizeof(exp));
941 resolve_expression (expP);
942
f09c1772
L
943 if (expP->X_op != O_constant
944 || expP->X_add_number
2abc2bec 945 || !i.types[this_operand].bitfield.baseindex)
ee86248c
JB
946 {
947 i.op[this_operand].disps = expP;
948 i.disp_operands++;
949
2abc2bec
JB
950 i386_addressing_mode ();
951
ee86248c
JB
952 if (flag_code == CODE_64BIT)
953 {
ee86248c
JB
954 if (!i.prefix[ADDR_PREFIX])
955 {
956 i.types[this_operand].bitfield.disp64 = 1;
957 i.types[this_operand].bitfield.disp32s = 1;
958 }
48bcea9f
JB
959 else
960 i.types[this_operand].bitfield.disp32 = 1;
ee86248c
JB
961 }
962 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
963 i.types[this_operand].bitfield.disp32 = 1;
964 else
965 i.types[this_operand].bitfield.disp16 = 1;
966
967#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
968 /*
969 * exp_seg is used only for verification in
970 * i386_finalize_displacement, and we can end up seeing reg_section
971 * here - but we know we removed all registers from the expression
972 * (or error-ed on any remaining ones) in i386_intel_simplify. I
973 * consider the check in i386_finalize_displacement bogus anyway, in
974 * particular because it doesn't allow for expr_section, so I'd
975 * rather see that check (and the similar one in
976 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
977 * expert I can't really say whether that would have other bad side
978 * effects.
979 */
980 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
981 && exp_seg == reg_section)
982 exp_seg = expP->X_op != O_constant ? undefined_section
983 : absolute_section;
984#endif
985
986 if (!i386_finalize_displacement (exp_seg, expP,
987 intel_state.reloc_types,
988 operand_string))
989 return 0;
990 }
991
ee86248c
JB
992 if (intel_state.seg)
993 {
fd4e0347 994 for (ret = check_none; ; ret = operand_check)
e21440ba
JB
995 {
996 expP = symbol_get_value_expression (intel_state.seg);
fd4e0347
JB
997 if (expP->X_op != O_full_ptr
998 || symbol_get_value_expression (expP->X_op_symbol)->X_op
999 != O_register)
e21440ba
JB
1000 break;
1001 intel_state.seg = expP->X_add_symbol;
1002 }
0398aac5 1003 if (expP->X_op != O_register)
ee86248c
JB
1004 {
1005 as_bad (_("segment register name expected"));
1006 return 0;
1007 }
00cee14f 1008 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg)
ee86248c
JB
1009 {
1010 as_bad (_("invalid use of register"));
1011 return 0;
1012 }
fd4e0347
JB
1013 switch (ret)
1014 {
1015 case check_error:
1016 as_bad (_("redundant segment overrides"));
1017 return 0;
1018 case check_warning:
1019 as_warn (_("redundant segment overrides"));
1020 break;
1021 }
ee86248c
JB
1022 switch (i386_regtab[expP->X_add_number].reg_num)
1023 {
1024 case 0: i.seg[i.mem_operands] = &es; break;
1025 case 1: i.seg[i.mem_operands] = &cs; break;
1026 case 2: i.seg[i.mem_operands] = &ss; break;
1027 case 3: i.seg[i.mem_operands] = &ds; break;
1028 case 4: i.seg[i.mem_operands] = &fs; break;
1029 case 5: i.seg[i.mem_operands] = &gs; break;
1030 case RegFlat: i.seg[i.mem_operands] = NULL; break;
1031 }
1032 }
1033
ee86248c
JB
1034 if (!i386_index_check (operand_string))
1035 return 0;
1036
c48dadc9 1037 i.flags[this_operand] |= Operand_Mem;
8325cc63
JB
1038 if (i.mem_operands == 0)
1039 i.memop1_string = xstrdup (operand_string);
ee86248c
JB
1040 ++i.mem_operands;
1041 }
1042 else
1043 {
1044 /* Immediate. */
1045 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
1046 {
1047 as_bad (_("at most %d immediate operands are allowed"),
1048 MAX_IMMEDIATE_OPERANDS);
1049 return 0;
1050 }
1051
1052 expP = &im_expressions[i.imm_operands++];
1053 i.op[this_operand].imms = expP;
1054 *expP = exp;
1055
1056 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
1057 operand_string);
1058 }
1059
1060 return 1;
1061}