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aa137e4d 1/* tc-tilegx.c -- Assemble for a Tile-Gx chip.
250d07de 2 Copyright (C) 2011-2021 Free Software Foundation, Inc.
aa137e4d
NC
3
4 This file is part of GAS, the GNU Assembler.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21#include "as.h"
aa137e4d
NC
22#include "subsegs.h"
23
24#include "elf/tilegx.h"
25#include "opcode/tilegx.h"
26
27#include "dwarf2dbg.h"
28#include "dw2gencfi.h"
29
30#include "safe-ctype.h"
31
32
33/* Special registers. */
34#define TREG_IDN0 57
35#define TREG_IDN1 58
36#define TREG_UDN0 59
37#define TREG_UDN1 60
38#define TREG_UDN2 61
39#define TREG_UDN3 62
40#define TREG_ZERO 63
41
42
43/* Generic assembler global variables which must be defined by all
44 targets. */
45
46/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
47int tilegx_cie_data_alignment;
48
49/* Characters which always start a comment. */
50const char comment_chars[] = "#";
51
52/* Characters which start a comment at the beginning of a line. */
53const char line_comment_chars[] = "#";
54
55/* Characters which may be used to separate multiple commands on a
56 single line. */
57const char line_separator_chars[] = ";";
58
59/* Characters which are used to indicate an exponent in a floating
60 point number. */
61const char EXP_CHARS[] = "eE";
62
63/* Characters which mean that a number is a floating point constant,
64 as in 0d1.0. */
65const char FLT_CHARS[] = "rRsSfFdDxXpP";
66
67/* Either 32 or 64. */
68static int tilegx_arch_size = 64;
69
70
71const char *
72tilegx_target_format (void)
73{
fb6cedde
WL
74 if (target_big_endian) {
75 return tilegx_arch_size == 64 ? "elf64-tilegx-be" : "elf32-tilegx-be";
76 } else {
77 return tilegx_arch_size == 64 ? "elf64-tilegx-le" : "elf32-tilegx-le";
78 }
aa137e4d
NC
79}
80
81
82#define OPTION_32 (OPTION_MD_BASE + 0)
83#define OPTION_64 (OPTION_MD_BASE + 1)
fb6cedde
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84#define OPTION_EB (OPTION_MD_BASE + 2)
85#define OPTION_EL (OPTION_MD_BASE + 3)
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NC
86
87const char *md_shortopts = "VQ:";
88
89struct option md_longopts[] =
90{
91 {"32", no_argument, NULL, OPTION_32},
92 {"64", no_argument, NULL, OPTION_64},
fb6cedde
WL
93 {"EB", no_argument, NULL, OPTION_EB },
94 {"EL", no_argument, NULL, OPTION_EL },
aa137e4d
NC
95 {NULL, no_argument, NULL, 0}
96};
97
98size_t md_longopts_size = sizeof (md_longopts);
99
100int
17b9d67d 101md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
aa137e4d
NC
102{
103 switch (c)
104 {
105 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
106 should be emitted or not. FIXME: Not implemented. */
107 case 'Q':
108 break;
109
110 /* -V: SVR4 argument to print version ID. */
111 case 'V':
112 print_version_id ();
113 break;
114
115 case OPTION_32:
116 tilegx_arch_size = 32;
117 break;
118
119 case OPTION_64:
120 tilegx_arch_size = 64;
121 break;
122
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123 case OPTION_EB:
124 target_big_endian = 1;
125 break;
126
127 case OPTION_EL:
128 target_big_endian = 0;
129 break;
130
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NC
131 default:
132 return 0;
133 }
134
135 return 1;
136}
137
138void
139md_show_usage (FILE *stream)
140{
141 fprintf (stream, _("\
142 -Q ignored\n\
143 -V print assembler version number\n\
fb6cedde 144 -EB/-EL generate big-endian/little-endian code\n\
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NC
145 --32/--64 generate 32bit/64bit code\n"));
146}
147
148
149/* Extra expression types. */
150
151#define O_hw0 O_md1
152#define O_hw1 O_md2
153#define O_hw2 O_md3
154#define O_hw3 O_md4
155#define O_hw0_last O_md5
156#define O_hw1_last O_md6
157#define O_hw2_last O_md7
158#define O_hw0_got O_md8
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159#define O_hw0_last_got O_md9
160#define O_hw1_last_got O_md10
161#define O_plt O_md11
162#define O_hw0_tls_gd O_md12
163#define O_hw0_last_tls_gd O_md13
164#define O_hw1_last_tls_gd O_md14
165#define O_hw0_tls_ie O_md15
166#define O_hw0_last_tls_ie O_md16
167#define O_hw1_last_tls_ie O_md17
168#define O_hw0_tls_le O_md18
169#define O_hw0_last_tls_le O_md19
170#define O_hw1_last_tls_le O_md20
171#define O_tls_gd_call O_md21
172#define O_tls_gd_add O_md22
173#define O_tls_ie_load O_md23
174#define O_tls_add O_md24
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WL
175#define O_hw0_plt O_md25
176#define O_hw1_plt O_md26
177#define O_hw1_last_plt O_md27
178#define O_hw2_last_plt O_md28
aa137e4d 179
629310ab 180static htab_t special_operator_hash;
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NC
181
182/* Hash tables for instruction mnemonic lookup. */
629310ab 183static htab_t op_hash;
aa137e4d
NC
184
185/* Hash table for spr lookup. */
629310ab 186static htab_t spr_hash;
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187
188/* True temporarily while parsing an SPR expression. This changes the
189 * namespace to include SPR names. */
190static int parsing_spr;
191
192/* Are we currently inside `{ ... }'? */
193static int inside_bundle;
194
195struct tilegx_instruction
196{
197 const struct tilegx_opcode *opcode;
198 tilegx_pipeline pipe;
199 expressionS operand_values[TILEGX_MAX_OPERANDS];
200};
201
202/* This keeps track of the current bundle being built up. */
203static struct tilegx_instruction current_bundle[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
204
205/* Index in current_bundle for the next instruction to parse. */
206static int current_bundle_index;
207
208/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
209 'zero' is not a real register, so using it accidentally would be a
210 nasty bug. For other registers, such as 'sp', code using multiple names
211 for the same physical register is excessively confusing.
212
213 The '.require_canonical_reg_names' pseudo-op turns this error on,
214 and the '.no_require_canonical_reg_names' pseudo-op turns this off.
215 By default the error is on. */
216static int require_canonical_reg_names;
217
218/* Allow bundles that do undefined or suspicious things like write
219 two different values to the same register at the same time.
220
221 The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
222 and the '.allow_suspicious_bundles' pseudo-op turns this off. */
223static int allow_suspicious_bundles;
224
225
226/* A hash table of main processor registers, mapping each register name
227 to its index.
228
229 Furthermore, if the register number is greater than the number
230 of registers for that processor, the user used an illegal alias
231 for that register (e.g. r63 instead of zero), so we should generate
232 a warning. The attempted register number can be found by clearing
233 NONCANONICAL_REG_NAME_FLAG. */
629310ab 234static htab_t main_reg_hash;
aa137e4d
NC
235
236
237/* We cannot unambiguously store a 0 in a hash table and look it up,
238 so we OR in this flag to every canonical register. */
239#define CANONICAL_REG_NAME_FLAG 0x1000
240
241/* By default we disallow register aliases like r63, but we record
242 them in the hash table in case the .no_require_canonical_reg_names
243 directive is used. Noncanonical names have this value added to them. */
244#define NONCANONICAL_REG_NAME_FLAG 0x2000
245
246/* Discards flags for register hash table entries and returns the
247 reg number. */
248#define EXTRACT_REGNO(p) ((p) & 63)
249
250/* This function is called once, at assembler startup time. It should
251 set up all the tables, etc., that the MD part of the assembler will
252 need. */
253
254void
255md_begin (void)
256{
257 const struct tilegx_opcode *op;
258 int i;
82590249
WL
259 int mach = (tilegx_arch_size == 64) ? bfd_mach_tilegx : bfd_mach_tilegx32;
260
261 if (! bfd_set_arch_mach (stdoutput, bfd_arch_tilegx, mach))
262 as_warn (_("Could not set architecture and machine"));
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NC
263
264 /* Guarantee text section is aligned. */
fd361982 265 bfd_set_section_alignment (text_section,
aa137e4d
NC
266 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
267
268 require_canonical_reg_names = 1;
269 allow_suspicious_bundles = 0;
270 current_bundle_index = 0;
271 inside_bundle = 0;
272
273 tilegx_cie_data_alignment = (tilegx_arch_size == 64 ? -8 : -4);
274
275 /* Initialize special operator hash table. */
629310ab 276 special_operator_hash = str_htab_create ();
aa137e4d 277#define INSERT_SPECIAL_OP(name) \
fe0e921f 278 str_hash_insert (special_operator_hash, #name, (void *) O_##name, 0)
aa137e4d
NC
279
280 INSERT_SPECIAL_OP (hw0);
281 INSERT_SPECIAL_OP (hw1);
282 INSERT_SPECIAL_OP (hw2);
283 INSERT_SPECIAL_OP (hw3);
284 INSERT_SPECIAL_OP (hw0_last);
285 INSERT_SPECIAL_OP (hw1_last);
286 INSERT_SPECIAL_OP (hw2_last);
287 /* hw3_last is a convenience alias for the equivalent hw3. */
fe0e921f 288 str_hash_insert (special_operator_hash, "hw3_last", (void *) O_hw3, 0);
aa137e4d 289 INSERT_SPECIAL_OP (hw0_got);
aa137e4d
NC
290 INSERT_SPECIAL_OP (hw0_last_got);
291 INSERT_SPECIAL_OP (hw1_last_got);
aa137e4d
NC
292 INSERT_SPECIAL_OP(plt);
293 INSERT_SPECIAL_OP (hw0_tls_gd);
aa137e4d
NC
294 INSERT_SPECIAL_OP (hw0_last_tls_gd);
295 INSERT_SPECIAL_OP (hw1_last_tls_gd);
aa137e4d 296 INSERT_SPECIAL_OP (hw0_tls_ie);
aa137e4d
NC
297 INSERT_SPECIAL_OP (hw0_last_tls_ie);
298 INSERT_SPECIAL_OP (hw1_last_tls_ie);
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WL
299 INSERT_SPECIAL_OP (hw0_tls_le);
300 INSERT_SPECIAL_OP (hw0_last_tls_le);
301 INSERT_SPECIAL_OP (hw1_last_tls_le);
302 INSERT_SPECIAL_OP (tls_gd_call);
303 INSERT_SPECIAL_OP (tls_gd_add);
304 INSERT_SPECIAL_OP (tls_ie_load);
305 INSERT_SPECIAL_OP (tls_add);
e5b95258
WL
306 INSERT_SPECIAL_OP (hw0_plt);
307 INSERT_SPECIAL_OP (hw1_plt);
308 INSERT_SPECIAL_OP (hw1_last_plt);
309 INSERT_SPECIAL_OP (hw2_last_plt);
aa137e4d
NC
310#undef INSERT_SPECIAL_OP
311
312 /* Initialize op_hash hash table. */
629310ab 313 op_hash = str_htab_create ();
aa137e4d 314 for (op = &tilegx_opcodes[0]; op->name != NULL; op++)
fe0e921f
AM
315 if (str_hash_insert (op_hash, op->name, op, 0) != NULL)
316 as_fatal (_("duplicate %s"), op->name);
aa137e4d
NC
317
318 /* Initialize the spr hash table. */
319 parsing_spr = 0;
629310ab 320 spr_hash = str_htab_create ();
aa137e4d 321 for (i = 0; i < tilegx_num_sprs; i++)
fe0e921f 322 str_hash_insert (spr_hash, tilegx_sprs[i].name, &tilegx_sprs[i], 0);
aa137e4d
NC
323
324 /* Set up the main_reg_hash table. We use this instead of
325 creating a symbol in the register section to avoid ambiguities
326 with labels that have the same names as registers. */
629310ab 327 main_reg_hash = str_htab_create ();
aa137e4d
NC
328 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
329 {
330 char buf[64];
331
629310ab 332 str_hash_insert (main_reg_hash, tilegx_register_names[i],
fe0e921f 333 (void *) (long) (i | CANONICAL_REG_NAME_FLAG), 0);
aa137e4d
NC
334
335 /* See if we should insert a noncanonical alias, like r63. */
336 sprintf (buf, "r%d", i);
337 if (strcmp (buf, tilegx_register_names[i]) != 0)
629310ab 338 str_hash_insert (main_reg_hash, xstrdup (buf),
fe0e921f 339 (void *) (long) (i | NONCANONICAL_REG_NAME_FLAG), 0);
aa137e4d
NC
340 }
341}
342
343#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
344 ((p0) | ((p1) << 8) | ((p2) << 16))
345#define BUNDLE_TEMPLATE(p0, p1, p2) \
346 { { (p0), (p1), (p2) }, \
347 BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
348 }
349
350#define NO_PIPELINE TILEGX_NUM_PIPELINE_ENCODINGS
351
352struct bundle_template
353{
354 tilegx_pipeline pipe[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
355 unsigned int pipe_mask;
356};
357
358static const struct bundle_template bundle_templates[] =
359{
360 /* In Y format we must always have something in Y2, since it has
361 no fnop, so this conveys that Y2 must always be used. */
362 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0, TILEGX_PIPELINE_Y2, NO_PIPELINE),
363 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1, TILEGX_PIPELINE_Y2, NO_PIPELINE),
364 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y0, NO_PIPELINE),
365 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y1, NO_PIPELINE),
366
367 /* Y format has three instructions. */
368 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2),
369 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1),
370 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2),
371 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0),
372 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1),
373 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0),
374
375 /* X format has only two instructions. */
376 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X0, TILEGX_PIPELINE_X1, NO_PIPELINE),
377 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X1, TILEGX_PIPELINE_X0, NO_PIPELINE)
378};
379
380
381static void
382prepend_nop_to_bundle (tilegx_mnemonic mnemonic)
383{
384 memmove (&current_bundle[1], &current_bundle[0],
385 current_bundle_index * sizeof current_bundle[0]);
386 current_bundle[0].opcode = &tilegx_opcodes[mnemonic];
387 ++current_bundle_index;
388}
389
390static tilegx_bundle_bits
391insert_operand (tilegx_bundle_bits bits,
392 const struct tilegx_operand *operand,
393 int operand_value,
3b4dbbbf 394 const char *file,
aa137e4d
NC
395 unsigned lineno)
396{
397 /* Range-check the immediate. */
398 int num_bits = operand->num_bits;
399
400 operand_value >>= operand->rightshift;
401
402 if (bfd_check_overflow (operand->is_signed
403 ? complain_overflow_signed
404 : complain_overflow_unsigned,
405 num_bits,
406 0,
407 bfd_arch_bits_per_address (stdoutput),
408 operand_value)
409 != bfd_reloc_ok)
410 {
411 offsetT min, max;
412 if (operand->is_signed)
413 {
414 min = -(1 << (num_bits - 1));
415 max = (1 << (num_bits - 1)) - 1;
416 }
417 else
418 {
419 min = 0;
420 max = (1 << num_bits) - 1;
421 }
422 as_bad_value_out_of_range (_("operand"), operand_value, min, max,
423 file, lineno);
424 }
425
426 /* Write out the bits for the immediate. */
427 return bits | operand->insert (operand_value);
428}
429
430
431static int
3b4dbbbf
TS
432apply_special_operator (operatorT op, offsetT num, const char *file,
433 unsigned lineno)
aa137e4d
NC
434{
435 int ret;
436 int check_shift = -1;
437
438 switch (op)
439 {
aa137e4d
NC
440 case O_hw0_last:
441 check_shift = 0;
442 /* Fall through. */
aa137e4d
NC
443 case O_hw0:
444 ret = (signed short)num;
445 break;
446
aa137e4d
NC
447 case O_hw1_last:
448 check_shift = 16;
449 /* Fall through. */
aa137e4d
NC
450 case O_hw1:
451 ret = (signed short)(num >> 16);
452 break;
453
aa137e4d
NC
454 case O_hw2_last:
455 check_shift = 32;
456 /* Fall through. */
aa137e4d
NC
457 case O_hw2:
458 ret = (signed short)(num >> 32);
459 break;
460
aa137e4d
NC
461 case O_hw3:
462 ret = (signed short)(num >> 48);
463 break;
464
465 default:
466 abort ();
467 break;
468 }
469
470 if (check_shift >= 0 && ret != (num >> check_shift))
471 {
472 as_bad_value_out_of_range (_("operand"), num,
473 ~0ULL << (check_shift + 16 - 1),
474 ~0ULL >> (64 - (check_shift + 16 - 1)),
475 file, lineno);
476 }
477
478 return ret;
479}
480
481static tilegx_bundle_bits
482emit_tilegx_instruction (tilegx_bundle_bits bits,
483 int num_operands,
484 const unsigned char *operands,
485 expressionS *operand_values,
486 char *bundle_start)
487{
488 int i;
489
490 for (i = 0; i < num_operands; i++)
491 {
492 const struct tilegx_operand *operand =
493 &tilegx_operands[operands[i]];
494 expressionS *operand_exp = &operand_values[i];
495 int is_pc_relative = operand->is_pc_relative;
496
497 if (operand_exp->X_op == O_register
498 || (operand_exp->X_op == O_constant && !is_pc_relative))
499 {
500 /* We know what the bits are right now, so insert them. */
501 bits = insert_operand (bits, operand, operand_exp->X_add_number,
502 NULL, 0);
503 }
504 else
505 {
506 bfd_reloc_code_real_type reloc = operand->default_reloc;
507 expressionS subexp;
508 int die = 0, use_subexp = 0, require_symbol = 0;
509 fixS *fixP;
510
511 /* Take an expression like hw0(x) and turn it into x with
512 a different reloc type. */
513 switch (operand_exp->X_op)
514 {
515#define HANDLE_OP16(suffix) \
516 switch (reloc) \
517 { \
518 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: \
519 reloc = BFD_RELOC_TILEGX_IMM16_X0_##suffix; \
520 break; \
521 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: \
522 reloc = BFD_RELOC_TILEGX_IMM16_X1_##suffix; \
523 break; \
524 default: \
525 die = 1; \
526 break; \
527 } \
528 use_subexp = 1
529
530 case O_hw0:
531 HANDLE_OP16 (HW0);
532 break;
533
534 case O_hw1:
535 HANDLE_OP16 (HW1);
536 break;
537
538 case O_hw2:
539 HANDLE_OP16 (HW2);
540 break;
541
542 case O_hw3:
543 HANDLE_OP16 (HW3);
544 break;
545
546 case O_hw0_last:
547 HANDLE_OP16 (HW0_LAST);
548 break;
549
550 case O_hw1_last:
551 HANDLE_OP16 (HW1_LAST);
552 break;
553
554 case O_hw2_last:
555 HANDLE_OP16 (HW2_LAST);
556 break;
557
558 case O_hw0_got:
559 HANDLE_OP16 (HW0_GOT);
560 require_symbol = 1;
561 break;
562
aa137e4d
NC
563 case O_hw0_last_got:
564 HANDLE_OP16 (HW0_LAST_GOT);
565 require_symbol = 1;
566 break;
567
568 case O_hw1_last_got:
569 HANDLE_OP16 (HW1_LAST_GOT);
570 require_symbol = 1;
571 break;
572
aa137e4d
NC
573 case O_hw0_tls_gd:
574 HANDLE_OP16 (HW0_TLS_GD);
575 require_symbol = 1;
576 break;
577
6f7be959
WL
578 case O_hw0_last_tls_gd:
579 HANDLE_OP16 (HW0_LAST_TLS_GD);
aa137e4d
NC
580 require_symbol = 1;
581 break;
582
6f7be959
WL
583 case O_hw1_last_tls_gd:
584 HANDLE_OP16 (HW1_LAST_TLS_GD);
aa137e4d
NC
585 require_symbol = 1;
586 break;
587
6f7be959
WL
588 case O_hw0_tls_ie:
589 HANDLE_OP16 (HW0_TLS_IE);
aa137e4d
NC
590 require_symbol = 1;
591 break;
592
6f7be959
WL
593 case O_hw0_last_tls_ie:
594 HANDLE_OP16 (HW0_LAST_TLS_IE);
aa137e4d
NC
595 require_symbol = 1;
596 break;
597
6f7be959
WL
598 case O_hw1_last_tls_ie:
599 HANDLE_OP16 (HW1_LAST_TLS_IE);
aa137e4d
NC
600 require_symbol = 1;
601 break;
602
6f7be959
WL
603 case O_hw0_tls_le:
604 HANDLE_OP16 (HW0_TLS_LE);
aa137e4d
NC
605 require_symbol = 1;
606 break;
607
6f7be959
WL
608 case O_hw0_last_tls_le:
609 HANDLE_OP16 (HW0_LAST_TLS_LE);
aa137e4d
NC
610 require_symbol = 1;
611 break;
612
6f7be959
WL
613 case O_hw1_last_tls_le:
614 HANDLE_OP16 (HW1_LAST_TLS_LE);
aa137e4d
NC
615 require_symbol = 1;
616 break;
617
e5b95258
WL
618 case O_hw0_plt:
619 HANDLE_OP16 (HW0_PLT_PCREL);
620 break;
621
622 case O_hw1_plt:
623 HANDLE_OP16 (HW1_PLT_PCREL);
624 break;
625
626 case O_hw1_last_plt:
627 HANDLE_OP16 (HW1_LAST_PLT_PCREL);
628 break;
629
630 case O_hw2_last_plt:
631 HANDLE_OP16 (HW2_LAST_PLT_PCREL);
632 break;
633
6f7be959 634#undef HANDLE_OP16
aa137e4d 635
6f7be959
WL
636 case O_plt:
637 switch (reloc)
638 {
639 case BFD_RELOC_TILEGX_JUMPOFF_X1:
640 reloc = BFD_RELOC_TILEGX_JUMPOFF_X1_PLT;
641 break;
642 default:
643 die = 1;
644 break;
645 }
646 use_subexp = 1;
aa137e4d
NC
647 require_symbol = 1;
648 break;
649
6f7be959
WL
650 case O_tls_gd_call:
651 switch (reloc)
652 {
653 case BFD_RELOC_TILEGX_JUMPOFF_X1:
654 reloc = BFD_RELOC_TILEGX_TLS_GD_CALL;
655 break;
656 default:
657 die = 1;
658 break;
659 }
660 use_subexp = 1;
aa137e4d
NC
661 require_symbol = 1;
662 break;
663
6f7be959
WL
664 case O_tls_gd_add:
665 switch (reloc)
666 {
667 case BFD_RELOC_TILEGX_IMM8_X0:
668 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD;
669 break;
670 case BFD_RELOC_TILEGX_IMM8_X1:
671 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD;
672 break;
673 case BFD_RELOC_TILEGX_IMM8_Y0:
674 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD;
675 break;
676 case BFD_RELOC_TILEGX_IMM8_Y1:
677 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD;
678 break;
679 default:
680 die = 1;
681 break;
682 }
683 use_subexp = 1;
aa137e4d
NC
684 require_symbol = 1;
685 break;
686
6f7be959
WL
687 case O_tls_ie_load:
688 switch (reloc)
689 {
690 case BFD_RELOC_TILEGX_IMM8_X1:
691 reloc = BFD_RELOC_TILEGX_TLS_IE_LOAD;
692 break;
693 default:
694 die = 1;
695 break;
696 }
697 use_subexp = 1;
aa137e4d
NC
698 require_symbol = 1;
699 break;
700
6f7be959 701 case O_tls_add:
aa137e4d
NC
702 switch (reloc)
703 {
6f7be959
WL
704 case BFD_RELOC_TILEGX_IMM8_X0:
705 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD;
706 break;
707 case BFD_RELOC_TILEGX_IMM8_X1:
708 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD;
709 break;
710 case BFD_RELOC_TILEGX_IMM8_Y0:
711 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD;
712 break;
713 case BFD_RELOC_TILEGX_IMM8_Y1:
714 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD;
aa137e4d
NC
715 break;
716 default:
717 die = 1;
718 break;
719 }
720 use_subexp = 1;
721 require_symbol = 1;
722 break;
723
724 default:
725 /* Do nothing. */
726 break;
727 }
728
729 if (die)
730 {
731 as_bad (_("Invalid operator for operand."));
732 }
733 else if (use_subexp)
734 {
8d1015a8 735 expressionS *sval = NULL;
aa137e4d
NC
736 /* Now that we've changed the reloc, change ha16(x) into x,
737 etc. */
738
8d1015a8
AM
739 if (symbol_symbolS (operand_exp->X_add_symbol))
740 sval = symbol_get_value_expression (operand_exp->X_add_symbol);
741 if (sval && sval->X_md)
aa137e4d 742 {
aa137e4d
NC
743 /* HACK: We used X_md to mark this symbol as a fake wrapper
744 around a real expression. To unwrap it, we just grab its
745 value here. */
8d1015a8 746 operand_exp = sval;
e8b9f508
WL
747
748 if (require_symbol)
749 {
750 /* Look at the expression, and reject it if it's not a
751 plain symbol. */
752 if (operand_exp->X_op != O_symbol
753 || operand_exp->X_add_number != 0)
754 as_bad (_("Operator may only be applied to symbols."));
755 }
aa137e4d
NC
756 }
757 else
758 {
759 /* The value of this expression is an actual symbol, so
760 turn that into an expression. */
761 memset (&subexp, 0, sizeof subexp);
762 subexp.X_op = O_symbol;
763 subexp.X_add_symbol = operand_exp->X_add_symbol;
764 operand_exp = &subexp;
765 }
766 }
767
768 /* Create a fixup to handle this later. */
769 fixP = fix_new_exp (frag_now,
770 bundle_start - frag_now->fr_literal,
771 (operand->num_bits + 7) >> 3,
772 operand_exp,
773 is_pc_relative,
774 reloc);
775 fixP->tc_fix_data = operand;
776
777 /* Don't do overflow checking if we are applying a function like
778 ha16. */
779 fixP->fx_no_overflow |= use_subexp;
780 }
781 }
782 return bits;
783}
784
785
786/* Detects and complains if two instructions in current_bundle write
787 to the same register, either implicitly or explicitly, or if a
788 read-only register is written. */
789static void
790check_illegal_reg_writes (void)
791{
792 BFD_HOST_U_64_BIT all_regs_written = 0;
793 int j;
794
795 for (j = 0; j < current_bundle_index; j++)
796 {
797 const struct tilegx_instruction *instr = &current_bundle[j];
798 int k;
799 BFD_HOST_U_64_BIT regs =
800 ((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
801 BFD_HOST_U_64_BIT conflict;
802
803 for (k = 0; k < instr->opcode->num_operands; k++)
804 {
805 const struct tilegx_operand *operand =
806 &tilegx_operands[instr->opcode->operands[instr->pipe][k]];
807
808 if (operand->is_dest_reg)
809 {
810 int regno = instr->operand_values[k].X_add_number;
811 BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
812
813 if ((mask & ( (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
814 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
815 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
816 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
817 && !allow_suspicious_bundles)
818 {
819 as_bad (_("Writes to register '%s' are not allowed."),
820 tilegx_register_names[regno]);
821 }
822
823 regs |= mask;
824 }
825 }
826
827 /* Writing to the zero register doesn't count. */
828 regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
829
830 conflict = all_regs_written & regs;
831 if (conflict != 0 && !allow_suspicious_bundles)
832 {
833 /* Find which register caused the conflict. */
834 const char *conflicting_reg_name = "???";
835 int i;
836
837 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
838 {
839 if (((conflict >> i) & 1) != 0)
840 {
841 conflicting_reg_name = tilegx_register_names[i];
842 break;
843 }
844 }
845
846 as_bad (_("Two instructions in the same bundle both write "
847 "to register %s, which is not allowed."),
848 conflicting_reg_name);
849 }
850
851 all_regs_written |= regs;
852 }
853}
854
855
856static void
857tilegx_flush_bundle (void)
858{
859 unsigned i;
860 int j;
861 addressT addr_mod;
862 unsigned compatible_pipes;
863 const struct bundle_template *match;
864 char *f;
865
866 inside_bundle = 0;
867
868 switch (current_bundle_index)
869 {
870 case 0:
871 /* No instructions. */
872 return;
873 case 1:
874 if (current_bundle[0].opcode->can_bundle)
875 {
876 /* Simplify later logic by adding an explicit fnop. */
877 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
878 }
879 else
880 {
881 /* This instruction cannot be bundled with anything else.
882 Prepend an explicit 'nop', rather than an 'fnop', because
883 fnops can be replaced by later binary-processing tools while
884 nops cannot. */
885 prepend_nop_to_bundle (TILEGX_OPC_NOP);
886 }
887 break;
888 default:
889 if (!allow_suspicious_bundles)
890 {
891 /* Make sure all instructions can be bundled with other
892 instructions. */
893 const struct tilegx_opcode *cannot_bundle = NULL;
894 bfd_boolean seen_non_nop = FALSE;
895
896 for (j = 0; j < current_bundle_index; j++)
897 {
898 const struct tilegx_opcode *op = current_bundle[j].opcode;
899
900 if (!op->can_bundle && cannot_bundle == NULL)
901 cannot_bundle = op;
902 else if (op->mnemonic != TILEGX_OPC_NOP
903 && op->mnemonic != TILEGX_OPC_INFO
904 && op->mnemonic != TILEGX_OPC_INFOL)
905 seen_non_nop = TRUE;
906 }
907
908 if (cannot_bundle != NULL && seen_non_nop)
909 {
910 current_bundle_index = 0;
911 as_bad (_("'%s' may not be bundled with other instructions."),
912 cannot_bundle->name);
913 return;
914 }
915 }
916 break;
917 }
918
919 compatible_pipes =
920 BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
921 current_bundle[1].opcode->pipes,
922 (current_bundle_index == 3
923 ? current_bundle[2].opcode->pipes
924 : (1 << NO_PIPELINE)));
925
926 /* Find a template that works, if any. */
927 match = NULL;
928 for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
929 {
930 const struct bundle_template *b = &bundle_templates[i];
931 if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
932 {
933 match = b;
934 break;
935 }
936 }
937
938 if (match == NULL)
939 {
940 current_bundle_index = 0;
941 as_bad (_("Invalid combination of instructions for bundle."));
942 return;
943 }
944
945 /* If the section seems to have no alignment set yet, go ahead and
946 make it large enough to hold code. */
fd361982
AM
947 if (bfd_section_alignment (now_seg) == 0)
948 bfd_set_section_alignment (now_seg,
aa137e4d
NC
949 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
950
951 for (j = 0; j < current_bundle_index; j++)
952 current_bundle[j].pipe = match->pipe[j];
953
954 if (current_bundle_index == 2 && !tilegx_is_x_pipeline (match->pipe[0]))
955 {
956 /* We are in Y mode with only two instructions, so add an FNOP. */
957 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
958
959 /* Figure out what pipe the fnop must be in via arithmetic.
960 * p0 + p1 + p2 must sum to the sum of TILEGX_PIPELINE_Y[012]. */
961 current_bundle[0].pipe =
962 (tilegx_pipeline)((TILEGX_PIPELINE_Y0
963 + TILEGX_PIPELINE_Y1
964 + TILEGX_PIPELINE_Y2) -
965 (current_bundle[1].pipe + current_bundle[2].pipe));
966 }
967
968 check_illegal_reg_writes ();
969
970 f = frag_more (TILEGX_BUNDLE_SIZE_IN_BYTES);
971
972 /* Check to see if this bundle is at an offset that is a multiple of 8-bytes
973 from the start of the frag. */
974 addr_mod = frag_now_fix () & (TILEGX_BUNDLE_ALIGNMENT_IN_BYTES - 1);
975 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
976 as_bad (_("instruction address is not a multiple of 8"));
977 frag_now->insn_addr = addr_mod;
978 frag_now->has_code = 1;
979
980 tilegx_bundle_bits bits = 0;
981 for (j = 0; j < current_bundle_index; j++)
982 {
983 struct tilegx_instruction *instr = &current_bundle[j];
984 tilegx_pipeline pipeline = instr->pipe;
985 const struct tilegx_opcode *opcode = instr->opcode;
986
987 bits |= emit_tilegx_instruction (opcode->fixed_bit_values[pipeline],
988 opcode->num_operands,
989 &opcode->operands[pipeline][0],
990 instr->operand_values,
991 f);
992 }
993
994 number_to_chars_littleendian (f, bits, 8);
995 current_bundle_index = 0;
996
997 /* Emit DWARF2 debugging information. */
998 dwarf2_emit_insn (TILEGX_BUNDLE_SIZE_IN_BYTES);
999}
1000
1001
1002/* Extend the expression parser to handle hw0(label), etc.
1003 as well as SPR names when in the context of parsing an SPR. */
1004
1005int
1006tilegx_parse_name (char *name, expressionS *e, char *nextcharP)
1007{
1008 operatorT op = O_illegal;
1009
1010 if (parsing_spr)
1011 {
629310ab 1012 void* val = str_hash_find (spr_hash, name);
aa137e4d
NC
1013 if (val == NULL)
1014 return 0;
1015
1016 memset (e, 0, sizeof *e);
1017 e->X_op = O_constant;
1018 e->X_add_number = ((const struct tilegx_spr *)val)->number;
1019 return 1;
1020 }
1021
1022 if (*nextcharP != '(')
1023 {
1024 /* hw0, etc. not followed by a paren is just a label with that name. */
1025 return 0;
1026 }
1027 else
1028 {
1029 /* Look up the operator in our table. */
629310ab 1030 void* val = str_hash_find (special_operator_hash, name);
aa137e4d
NC
1031 if (val == 0)
1032 return 0;
1033 op = (operatorT)(long)val;
1034 }
1035
1036 /* Restore old '(' and skip it. */
1037 *input_line_pointer = '(';
1038 ++input_line_pointer;
1039
1040 expression (e);
1041
1042 if (*input_line_pointer != ')')
1043 {
1044 as_bad (_("Missing ')'"));
1045 *nextcharP = *input_line_pointer;
1046 return 0;
1047 }
1048 /* Skip ')'. */
1049 ++input_line_pointer;
1050
1051 if (e->X_op == O_register || e->X_op == O_absent)
1052 {
1053 as_bad (_("Invalid expression."));
1054 e->X_op = O_constant;
1055 e->X_add_number = 0;
1056 }
1057 else
1058 {
1059 /* Wrap subexpression with a unary operator. */
1060 symbolS *sym = make_expr_symbol (e);
1061
1062 if (sym != e->X_add_symbol)
1063 {
1064 /* HACK: mark this symbol as a temporary wrapper around a proper
1065 expression, so we can unwrap it later once we have communicated
1066 the relocation type. */
8d1015a8 1067 symbol_get_value_expression (sym)->X_md = 1;
aa137e4d
NC
1068 }
1069
1070 memset (e, 0, sizeof *e);
1071 e->X_op = op;
1072 e->X_add_symbol = sym;
1073 e->X_add_number = 0;
1074 }
1075
1076 *nextcharP = *input_line_pointer;
1077 return 1;
1078}
1079
1080
1081/* Parses an expression which must be a register name. */
1082
1083static void
1084parse_reg_expression (expressionS* expression)
1085{
d02603dc
NC
1086 char *regname;
1087 char terminating_char;
1088 void *pval;
1089 int regno_and_flags;
1090 int regno;
1091
aa137e4d
NC
1092 /* Zero everything to make sure we don't miss any flags. */
1093 memset (expression, 0, sizeof *expression);
1094
d02603dc 1095 terminating_char = get_symbol_name (&regname);
aa137e4d 1096
629310ab 1097 pval = str_hash_find (main_reg_hash, regname);
aa137e4d 1098 if (pval == NULL)
d02603dc 1099 as_bad (_("Expected register, got '%s'."), regname);
aa137e4d 1100
d02603dc
NC
1101 regno_and_flags = (int)(size_t)pval;
1102 regno = EXTRACT_REGNO(regno_and_flags);
aa137e4d
NC
1103
1104 if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
1105 && require_canonical_reg_names)
d02603dc
NC
1106 as_warn (_("Found use of non-canonical register name %s; "
1107 "use %s instead."),
1108 regname, tilegx_register_names[regno]);
aa137e4d
NC
1109
1110 /* Restore the old character following the register name. */
d02603dc 1111 (void) restore_line_pointer (terminating_char);
aa137e4d
NC
1112
1113 /* Fill in the expression fields to indicate it's a register. */
1114 expression->X_op = O_register;
1115 expression->X_add_number = regno;
1116}
1117
1118
1119/* Parses and type-checks comma-separated operands in input_line_pointer. */
1120
1121static void
1122parse_operands (const char *opcode_name,
1123 const unsigned char *operands,
1124 int num_operands,
1125 expressionS *operand_values)
1126{
1127 int i;
1128
1129 memset (operand_values, 0, num_operands * sizeof operand_values[0]);
1130
1131 SKIP_WHITESPACE ();
1132 for (i = 0; i < num_operands; i++)
1133 {
1134 tilegx_operand_type type = tilegx_operands[operands[i]].type;
1135
1136 SKIP_WHITESPACE ();
1137
1138 if (type == TILEGX_OP_TYPE_REGISTER)
1139 {
1140 parse_reg_expression (&operand_values[i]);
1141 }
1142 else if (*input_line_pointer == '}')
1143 {
1144 operand_values[i].X_op = O_absent;
1145 }
1146 else if (type == TILEGX_OP_TYPE_SPR)
1147 {
1148 /* Modify the expression parser to add SPRs to the namespace. */
1149 parsing_spr = 1;
1150 expression (&operand_values[i]);
1151 parsing_spr = 0;
1152 }
1153 else
1154 {
1155 expression (&operand_values[i]);
1156 }
1157
1158 SKIP_WHITESPACE ();
1159
1160 if (i + 1 < num_operands)
1161 {
1162 int separator = (unsigned char)*input_line_pointer++;
1163
1164 if (is_end_of_line[separator] || (separator == '}'))
1165 {
1166 as_bad (_("Too few operands to '%s'."), opcode_name);
1167 return;
1168 }
1169 else if (separator != ',')
1170 {
1171 as_bad (_("Unexpected character '%c' after operand %d to %s."),
1172 (char)separator, i + 1, opcode_name);
1173 return;
1174 }
1175 }
1176
1177 /* Arbitrarily use the first valid pipe to get the operand type,
1178 since they are all the same. */
1179 switch (tilegx_operands[operands[i]].type)
1180 {
1181 case TILEGX_OP_TYPE_REGISTER:
1182 /* Handled in parse_reg_expression already. */
1183 break;
1184 case TILEGX_OP_TYPE_SPR:
1185 /* Fall through */
1186 case TILEGX_OP_TYPE_IMMEDIATE:
1187 /* Fall through */
1188 case TILEGX_OP_TYPE_ADDRESS:
1189 if ( operand_values[i].X_op == O_register
1190 || operand_values[i].X_op == O_illegal
1191 || operand_values[i].X_op == O_absent)
1192 as_bad (_("Expected immediate expression"));
1193 break;
1194 default:
1195 abort();
1196 }
1197 }
1198
1199 if (!is_end_of_line[(unsigned char)*input_line_pointer])
1200 {
1201 switch (*input_line_pointer)
1202 {
1203 case '}':
1204 if (!inside_bundle)
1205 as_bad (_("Found '}' when not bundling."));
1206 ++input_line_pointer;
1207 inside_bundle = 0;
1208 demand_empty_rest_of_line ();
1209 break;
1210
1211 case ',':
1212 as_bad (_("Too many operands"));
1213 break;
1214
1215 default:
1216 /* Use default error for unrecognized garbage. */
1217 demand_empty_rest_of_line ();
1218 break;
1219 }
1220 }
1221}
1222
1223
1224/* This is the guts of the machine-dependent assembler. STR points to a
1225 machine dependent instruction. This function is supposed to emit the
1226 frags/bytes it assembles to. */
1227
1228void
1229md_assemble (char *str)
1230{
1231 char old_char;
1232 size_t opname_len;
1233 char *old_input_line_pointer;
1234 const struct tilegx_opcode *op;
1235 int first_pipe;
1236
1237 /* Split off the opcode and look it up. */
1238 opname_len = strcspn (str, " {}");
1239 old_char = str[opname_len];
1240 str[opname_len] = '\0';
1241
fe0e921f 1242 op = str_hash_find (op_hash, str);
aa137e4d
NC
1243 str[opname_len] = old_char;
1244 if (op == NULL)
1245 {
1246 as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
1247 return;
1248 }
1249
1250 /* Prepare to parse the operands. */
1251 old_input_line_pointer = input_line_pointer;
1252 input_line_pointer = str + opname_len;
1253 SKIP_WHITESPACE ();
1254
1255 if (current_bundle_index == TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE)
1256 {
1257 as_bad (_("Too many instructions for bundle."));
1258 tilegx_flush_bundle ();
1259 }
1260
1261 /* Make sure we have room for the upcoming bundle before we
1262 create any fixups. Otherwise if we have to switch to a new
1263 frag the fixup dot_value fields will be wrong. */
1264 frag_grow (TILEGX_BUNDLE_SIZE_IN_BYTES);
1265
1266 /* Find a valid pipe for this opcode. */
1267 for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
1268 ;
1269
1270 /* Call the function that assembles this instruction. */
1271 current_bundle[current_bundle_index].opcode = op;
1272 parse_operands (op->name,
1273 &op->operands[first_pipe][0],
1274 op->num_operands,
1275 current_bundle[current_bundle_index].operand_values);
1276 ++current_bundle_index;
1277
1278 /* Restore the saved value of input_line_pointer. */
1279 input_line_pointer = old_input_line_pointer;
1280
1281 /* If we weren't inside curly braces, go ahead and emit
1282 this lone instruction as a bundle right now. */
1283 if (!inside_bundle)
1284 tilegx_flush_bundle ();
1285}
1286
1287
1288static void
1289s_require_canonical_reg_names (int require)
1290{
1291 demand_empty_rest_of_line ();
1292 require_canonical_reg_names = require;
1293}
1294
1295static void
1296s_allow_suspicious_bundles (int allow)
1297{
1298 demand_empty_rest_of_line ();
1299 allow_suspicious_bundles = allow;
1300}
1301
1302const pseudo_typeS md_pseudo_table[] =
1303{
1304 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0). */
1305 {"word", cons, 4},
1306 {"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
1307 {"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
1308 {"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
1309 {"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
1310 { NULL, 0, 0 }
1311};
1312
fb6cedde
WL
1313void
1314md_number_to_chars (char * buf, valueT val, int n)
1315{
1316 if (target_big_endian)
1317 number_to_chars_bigendian (buf, val, n);
1318 else
1319 number_to_chars_littleendian (buf, val, n);
1320}
1321
aa137e4d
NC
1322/* Turn the string pointed to by litP into a floating point constant
1323 of type TYPE, and emit the appropriate bytes. The number of
1324 LITTLENUMS emitted is stored in *SIZEP. An error message is
1325 returned, or NULL on OK. */
1326
6d4af3c2 1327const char *
aa137e4d
NC
1328md_atof (int type, char *litP, int *sizeP)
1329{
1330 int prec;
1331 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1332 LITTLENUM_TYPE *wordP;
1333 char *t;
1334
1335 switch (type)
1336 {
1337 case 'f':
1338 case 'F':
1339 prec = 2;
1340 break;
1341
1342 case 'd':
1343 case 'D':
1344 prec = 4;
1345 break;
1346
1347 default:
1348 *sizeP = 0;
1349 return _("Bad call to md_atof ()");
1350 }
1351 t = atof_ieee (input_line_pointer, type, words);
1352 if (t)
1353 input_line_pointer = t;
1354
1355 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1356 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
1357 the bigendian 386. */
1358 for (wordP = words + prec - 1; prec--;)
1359 {
1360 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
1361 litP += sizeof (LITTLENUM_TYPE);
1362 }
1363 return 0;
1364}
1365
1366
1367/* We have no need to default values of symbols. */
1368
1369symbolS *
1370md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1371{
1372 return NULL;
1373}
1374
1375
1376void
1377tilegx_cons_fix_new (fragS *frag,
1378 int where,
1379 int nbytes,
1380 expressionS *exp)
1381{
1382 expressionS subexp;
1383 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
1384 int no_overflow = 0;
1385 fixS *fixP;
1386
1387 /* See if it's one of our special functions. */
1388 switch (exp->X_op)
1389 {
1390 case O_hw0:
1391 reloc = BFD_RELOC_TILEGX_HW0;
1392 no_overflow = 1;
1393 break;
1394 case O_hw1:
1395 reloc = BFD_RELOC_TILEGX_HW1;
1396 no_overflow = 1;
1397 break;
1398 case O_hw2:
1399 reloc = BFD_RELOC_TILEGX_HW2;
1400 no_overflow = 1;
1401 break;
1402 case O_hw3:
1403 reloc = BFD_RELOC_TILEGX_HW3;
1404 no_overflow = 1;
1405 break;
1406 case O_hw0_last:
1407 reloc = BFD_RELOC_TILEGX_HW0_LAST;
1408 break;
1409 case O_hw1_last:
1410 reloc = BFD_RELOC_TILEGX_HW1_LAST;
1411 break;
1412 case O_hw2_last:
1413 reloc = BFD_RELOC_TILEGX_HW2_LAST;
1414 break;
1415
1416 default:
1417 /* Do nothing. */
1418 break;
1419 }
1420
1421 if (reloc != BFD_RELOC_NONE)
1422 {
1423 if (nbytes != 2)
1424 {
1425 as_bad (_("This operator only produces two byte values."));
1426 nbytes = 2;
1427 }
1428
1429 memset (&subexp, 0, sizeof subexp);
1430 subexp.X_op = O_symbol;
1431 subexp.X_add_symbol = exp->X_add_symbol;
1432 exp = &subexp;
1433 }
1434 else
1435 {
1436 switch (nbytes)
1437 {
1438 case 1:
1439 reloc = BFD_RELOC_8;
1440 break;
1441 case 2:
1442 reloc = BFD_RELOC_16;
1443 break;
1444 case 4:
1445 reloc = BFD_RELOC_32;
1446 break;
1447 case 8:
1448 reloc = BFD_RELOC_64;
1449 break;
1450 default:
1451 as_bad (_("unsupported BFD relocation size %d"), nbytes);
1452 reloc = BFD_RELOC_64;
1453 break;
1454 }
1455 }
1456
1457 fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
1458 fixP->tc_fix_data = NULL;
1459 fixP->fx_no_overflow |= no_overflow;
1460}
1461
1462
1463void
1464md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
1465{
1466 const struct tilegx_operand *operand;
1467 valueT value = *valP;
1468 operatorT special;
1469 char *p;
1470
1471 /* Leave these for the linker. */
1472 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1473 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1474 return;
1475
1476 if (fixP->fx_subsy != (symbolS *) NULL)
1477 {
1478 /* We can't actually support subtracting a symbol. */
1479 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1480 }
1481
1482 /* Correct relocation types for pc-relativeness. */
1483 switch (fixP->fx_r_type)
1484 {
1485#define FIX_PCREL(rtype) \
1486 case rtype: \
1487 if (fixP->fx_pcrel) \
1488 fixP->fx_r_type = rtype##_PCREL; \
1489 break; \
1490 \
1491 case rtype##_PCREL: \
1492 if (!fixP->fx_pcrel) \
1493 fixP->fx_r_type = rtype; \
1494 break
1495
e5b95258
WL
1496#define FIX_PLT_PCREL(rtype) \
1497 case rtype##_PLT_PCREL: \
1498 if (!fixP->fx_pcrel) \
1499 fixP->fx_r_type = rtype; \
1500 \
1501 break;
1502
aa137e4d
NC
1503 FIX_PCREL (BFD_RELOC_8);
1504 FIX_PCREL (BFD_RELOC_16);
1505 FIX_PCREL (BFD_RELOC_32);
1506 FIX_PCREL (BFD_RELOC_64);
1507 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1508 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1509 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1510 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1511 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2);
1512 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2);
1513 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW3);
1514 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW3);
1515 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST);
1516 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST);
1517 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1518 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1519 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1520 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
e5b95258
WL
1521 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1522 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1523 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1524 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1525 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1526 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1527 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1528 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
aa137e4d
NC
1529
1530#undef FIX_PCREL
1531
1532 default:
1533 /* Do nothing */
1534 break;
1535 }
1536
1537 if (fixP->fx_addsy != NULL)
1538 {
1539#ifdef OBJ_ELF
1540 switch (fixP->fx_r_type)
1541 {
6f7be959
WL
1542 case BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD:
1543 case BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD:
1544 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD:
1545 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD:
1546 case BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD:
1547 case BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD:
1548 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD:
1549 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD:
aa137e4d
NC
1550 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
1551 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
aa137e4d
NC
1552 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
1553 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
aa137e4d
NC
1554 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
1555 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
6f7be959
WL
1556 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
1557 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
1558 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
1559 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
aa137e4d
NC
1560 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
1561 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
6f7be959
WL
1562 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE:
1563 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE:
1564 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE:
1565 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE:
1566 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE:
1567 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE:
1568 case BFD_RELOC_TILEGX_TLS_GD_CALL:
1569 case BFD_RELOC_TILEGX_TLS_IE_LOAD:
aa137e4d
NC
1570 case BFD_RELOC_TILEGX_TLS_DTPMOD64:
1571 case BFD_RELOC_TILEGX_TLS_DTPOFF64:
1572 case BFD_RELOC_TILEGX_TLS_TPOFF64:
1573 case BFD_RELOC_TILEGX_TLS_DTPMOD32:
1574 case BFD_RELOC_TILEGX_TLS_DTPOFF32:
1575 case BFD_RELOC_TILEGX_TLS_TPOFF32:
1576 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1577 break;
1578
1579 default:
1580 /* Do nothing */
1581 break;
1582 }
1583#endif
1584 return;
1585 }
1586
1587 /* Apply hw0, etc. */
1588 special = O_illegal;
1589 switch (fixP->fx_r_type)
1590 {
1591 case BFD_RELOC_TILEGX_HW0:
1592 case BFD_RELOC_TILEGX_IMM16_X0_HW0:
1593 case BFD_RELOC_TILEGX_IMM16_X1_HW0:
1594 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL:
1595 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL:
e5b95258
WL
1596 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL:
1597 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL:
aa137e4d
NC
1598 special = O_hw0;
1599 break;
1600
1601 case BFD_RELOC_TILEGX_HW0_LAST:
1602 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:
1603 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:
1604 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL:
1605 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL:
e5b95258
WL
1606 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL:
1607 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL:
aa137e4d
NC
1608 special = O_hw0_last;
1609 break;
1610
1611 case BFD_RELOC_TILEGX_HW1:
1612 case BFD_RELOC_TILEGX_IMM16_X0_HW1:
1613 case BFD_RELOC_TILEGX_IMM16_X1_HW1:
1614 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL:
1615 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL:
e5b95258
WL
1616 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL:
1617 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL:
aa137e4d
NC
1618 special = O_hw1;
1619 break;
1620
1621 case BFD_RELOC_TILEGX_HW1_LAST:
1622 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST:
1623 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST:
1624 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL:
1625 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL:
e5b95258
WL
1626 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL:
1627 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL:
aa137e4d
NC
1628 special = O_hw1_last;
1629 break;
1630
1631 case BFD_RELOC_TILEGX_HW2:
1632 case BFD_RELOC_TILEGX_IMM16_X0_HW2:
1633 case BFD_RELOC_TILEGX_IMM16_X1_HW2:
1634 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL:
1635 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL:
e5b95258
WL
1636 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL:
1637 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL:
aa137e4d
NC
1638 special = O_hw2;
1639 break;
1640
1641 case BFD_RELOC_TILEGX_HW2_LAST:
1642 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST:
1643 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST:
1644 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL:
1645 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL:
e5b95258
WL
1646 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL:
1647 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL:
aa137e4d
NC
1648 special = O_hw2_last;
1649 break;
1650
1651 case BFD_RELOC_TILEGX_HW3:
1652 case BFD_RELOC_TILEGX_IMM16_X0_HW3:
1653 case BFD_RELOC_TILEGX_IMM16_X1_HW3:
1654 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL:
1655 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL:
e5b95258
WL
1656 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL:
1657 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL:
aa137e4d
NC
1658 special = O_hw3;
1659 break;
1660
1661 default:
1662 /* Do nothing */
1663 break;
1664 }
1665
1666 if (special != O_illegal)
1667 {
1668 *valP = value = apply_special_operator (special, value,
1669 fixP->fx_file, fixP->fx_line);
1670 }
1671
1672 p = fixP->fx_frag->fr_literal + fixP->fx_where;
1673
1674 operand = fixP->tc_fix_data;
1675 if (operand != NULL)
1676 {
1677 /* It's an instruction operand. */
1678 tilegx_bundle_bits bits =
1679 insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
1680
1681 /* Note that we might either be writing out bits for a bundle
1682 or a static network instruction, which are different sizes, so it's
1683 important to stop touching memory once we run out of bits.
1684 ORing in values is OK since we know the existing bits for
1685 this operand are zero. */
1686 for (; bits != 0; bits >>= 8)
1687 *p++ |= (char)bits;
1688 }
1689 else
1690 {
1691 /* Some other kind of relocation. */
1692 switch (fixP->fx_r_type)
1693 {
1694 case BFD_RELOC_8:
1695 case BFD_RELOC_8_PCREL:
1696 md_number_to_chars (p, value, 1);
1697 break;
1698
1699 case BFD_RELOC_16:
1700 case BFD_RELOC_16_PCREL:
1701 md_number_to_chars (p, value, 2);
1702 break;
1703
1704 case BFD_RELOC_32:
1705 case BFD_RELOC_32_PCREL:
1706 md_number_to_chars (p, value, 4);
1707 break;
1708
1709 case BFD_RELOC_64:
1710 case BFD_RELOC_64_PCREL:
1711 md_number_to_chars (p, value, 8);
1712 break;
1713
1714 default:
1715 /* Leave it for the linker. */
1716 return;
1717 }
1718 }
1719
1720 fixP->fx_done = 1;
1721}
1722
1723
1724/* Generate the BFD reloc to be stuck in the object file from the
1725 fixup used internally in the assembler. */
1726
1727arelent *
1728tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
1729{
1730 arelent *reloc;
1731
add39d23
TS
1732 reloc = XNEW (arelent);
1733 reloc->sym_ptr_ptr = XNEW (asymbol *);
aa137e4d
NC
1734 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1735 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1736
1737 /* Make sure none of our internal relocations make it this far.
1738 They'd better have been fully resolved by this point. */
1739 gas_assert ((int) fixp->fx_r_type > 0);
1740
1741 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1742 if (reloc->howto == NULL)
1743 {
1744 as_bad_where (fixp->fx_file, fixp->fx_line,
1745 _("cannot represent `%s' relocation in object file"),
1746 bfd_get_reloc_code_name (fixp->fx_r_type));
1747 return NULL;
1748 }
1749
1750 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1751 {
1752 as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
1753 bfd_get_reloc_code_name (fixp->fx_r_type),
1754 fixp->fx_pcrel, reloc->howto->pc_relative);
1755 }
1756 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1757
1758 reloc->addend = fixp->fx_offset;
1759
1760 return reloc;
1761}
1762
1763
1764/* The location from which a PC relative jump should be calculated,
1765 given a PC relative reloc. */
1766
1767long
1768md_pcrel_from (fixS *fixP)
1769{
1770 return fixP->fx_frag->fr_address + fixP->fx_where;
1771}
1772
1773
1774/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
1775 a section symbol plus some offset. */
1776int
1777tilegx_fix_adjustable (fixS *fix)
1778{
1779 /* Prevent all adjustments to global symbols */
1780 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
1781 return 0;
1782
1783 return 1;
1784}
1785
1786
1787int
1788tilegx_unrecognized_line (int ch)
1789{
1790 switch (ch)
1791 {
1792 case '{':
1793 if (inside_bundle)
1794 {
1795 as_bad (_("Found '{' when already bundling."));
1796 }
1797 else
1798 {
1799 inside_bundle = 1;
1800 current_bundle_index = 0;
1801 }
1802 return 1;
1803
1804 case '}':
1805 if (!inside_bundle)
1806 {
1807 as_bad (_("Found '}' when not bundling."));
1808 }
1809 else
1810 {
1811 tilegx_flush_bundle ();
1812 }
1813
1814 /* Allow '{' to follow on the same line. We also allow ";;", but that
1815 happens automatically because ';' is an end of line marker. */
1816 SKIP_WHITESPACE ();
1817 if (input_line_pointer[0] == '{')
1818 {
1819 input_line_pointer++;
1820 return tilegx_unrecognized_line ('{');
1821 }
1822
1823 demand_empty_rest_of_line ();
1824 return 1;
1825
1826 default:
1827 break;
1828 }
1829
1830 /* Not a valid line. */
1831 return 0;
1832}
1833
1834
1835/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
1836 of an rs_align_code fragment. */
1837
1838void
1839tilegx_handle_align (fragS *fragp)
1840{
1841 addressT bytes, fix;
1842 char *p;
1843
1844 if (fragp->fr_type != rs_align_code)
1845 return;
1846
1847 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
1848 p = fragp->fr_literal + fragp->fr_fix;
1849 fix = 0;
1850
1851 /* Determine the bits for NOP. */
1852 const struct tilegx_opcode *nop_opcode =
1853 &tilegx_opcodes[TILEGX_OPC_NOP];
1854 tilegx_bundle_bits nop =
1855 ( nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X0]
1856 | nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X1]);
1857
1858 if ((bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
1859 {
1860 fix = bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1);
1861 memset (p, 0, fix);
1862 p += fix;
1863 bytes -= fix;
1864 }
1865
1866 number_to_chars_littleendian (p, nop, 8);
1867 fragp->fr_fix += fix;
1868 fragp->fr_var = TILEGX_BUNDLE_SIZE_IN_BYTES;
1869}
1870
1871/* Standard calling conventions leave the CFA at SP on entry. */
1872void
1873tilegx_cfi_frame_initial_instructions (void)
1874{
1875 cfi_add_CFA_def_cfa_register (54);
1876}
1877
1878int
1879tc_tilegx_regname_to_dw2regnum (char *regname)
1880{
1881 int i;
1882 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
1883 {
1884 if (!strcmp (regname, tilegx_register_names[i]))
1885 return i;
1886 }
1887
1888 return -1;
1889}