]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/doc/c-m68k.texi
* config/sh/tm-sh.h (BELIEVE_PCC_PROMOTION): Define, so that
[thirdparty/binutils-gdb.git] / gas / doc / c-m68k.texi
CommitLineData
b4d51f3d
ILT
1@c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
2@c This is part of the GAS manual.
3@c For copying conditions, see the file as.texinfo.
4@ifset GENERIC
5@page
6@node M68K-Dependent
7@chapter M680x0 Dependent Features
8@end ifset
9@ifclear GENERIC
10@node Machine Dependencies
11@chapter M680x0 Dependent Features
12@end ifclear
13
14@cindex M680x0 support
15@menu
16* M68K-Opts:: M680x0 Options
17* M68K-Syntax:: Syntax
18* M68K-Moto-Syntax:: Motorola Syntax
19* M68K-Float:: Floating Point
20* M68K-Directives:: 680x0 Machine Directives
21* M68K-opcodes:: Opcodes
22@end menu
23
24@node M68K-Opts
25@section M680x0 Options
26
27@cindex options, M680x0
28@cindex M680x0 options
29The Motorola 680x0 version of @code{@value{AS}} has a few machine
30dependent options.
31
32@cindex @samp{-l} option, M680x0
33You can use the @samp{-l} option to shorten the size of references to undefined
34symbols. If you do not use the @samp{-l} option, references to undefined
35symbols are wide enough for a full @code{long} (32 bits). (Since
36@code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} can
37only allocate space for the linker to fill in later. Since @code{@value{AS}}
38does not know how far away these symbols are, it allocates as much space as it
39can.) If you use this option, the references are only one word wide (16 bits).
40This may be useful if you want the object file to be as small as possible, and
41you know that the relevant symbols are always less than 17 bits away.
42
43@cindex @samp{--register-prefix-optional} option, M680x0
44For some configurations, especially those where the compiler normally
45does not prepend an underscore to the names of user variables, the
46assembler requires a @samp{%} before any use of a register name. This
47is intended to let the assembler distinguish between C variables and
48functions named @samp{a0} through @samp{a7}, and so on. The @samp{%} is
49always accepted, but is not required for certain configurations, notably
50@samp{sun3}. The @samp{--register-prefix-optional} option may be used
51to permit omitting the @samp{%} even for configurations for which it is
52normally required. If this is done, it will generally be impossible to
53refer to C variables and functions with the same names as register
54names.
55
56@cindex @samp{--bitwise-or} option, M680x0
57Normally the character @samp{|} is treated as a comment character, which
58means that it can not be used in expressions. The @samp{--bitwise-or}
59option turns @samp{|} into a normal character. In this mode, you must
60either use C style comments, or start comments with a @samp{#} character
61at the beginning of a line.
62
63@cindex @samp{--base-size-default-16}
64@cindex @samp{--base-size-default-32}
65If you use an addressing mode with a base register without specifying
66the size, @code{@value{AS}} will normally use the full 32 bit value.
67For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to
68@samp{%a0@@(%d0:l)}. You may use the @samp{--base-size-default-16}
69option to tell @code{@value{AS}} to default to using the 16 bit value.
70In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}.
71You may use the @samp{--base-size-default-32} option to restore the
72default behaviour.
73
74@cindex @samp{-m68000} and related options
75@cindex architecture options, M680x0
76@cindex M680x0 architecture options
77@code{@value{AS}} can assemble code for several different members of the
78Motorola 680x0 family. The default depends upon how @code{@value{AS}}
79was configured when it was built; normally, the default is to assemble
80code for the 68020 microprocessor. The following options may be used to
81change the default. These options control which instructions and
82addressing modes are permitted. The members of the 680x0 family are
83very similar. For detailed information about the differences, see the
84Motorola manuals.
85
86@table @samp
87@item -m68000
88@itemx -m68008
89@itemx -m68302
90Assemble for the 68000. @samp{-m68008} and @samp{-m68302} are synonyms
91for @samp{-m68000}, since the chips are the same from the point of view
92of the assembler.
93
94@item -m68010
95Assemble for the 68010.
96
97@item -m68020
98Assemble for the 68020. This is normally the default.
99
100@item -m68030
101Assemble for the 68030.
102
103@item -m68040
104Assemble for the 68040.
105
106@item -m68060
107Assemble for the 68060.
108
109@item -mcpu32
110@itemx -m68331
111@itemx -m68332
112@itemx -m68333
113@itemx -m68340
114@itemx -m68360
115Assemble for the CPU32 family of chips.
116
117@item -m5200
118Assemble for the ColdFire family of chips.
119
120@item -m68881
121@itemx -m68882
122Assemble 68881 floating point instructions. This is the default for the
12368020, 68030, and the CPU32. The 68040 and 68060 always support
124floating point instructions.
125
126@item -mno-68881
127Do not assemble 68881 floating point instructions. This is the default
128for 68000 and the 68010. The 68040 and 68060 always support floating
129point instructions, even if this option is used.
130
131@item -m68851
132Assemble 68851 MMU instructions. This is the default for the 68020,
13368030, and 68060. The 68040 accepts a somewhat different set of MMU
134instructions; @samp{-m68851} and @samp{-m68040} should not be used
135together.
136
137@item -mno-68851
138Do not assemble 68851 MMU instructions. This is the default for the
13968000, 68010, and the CPU32. The 68040 accepts a somewhat different set
140of MMU instructions.
141@end table
142
143@node M68K-Syntax
144@section Syntax
145
146@cindex @sc{mit}
147This syntax for the Motorola 680x0 was developed at @sc{mit}.
148
149@cindex M680x0 syntax
150@cindex syntax, M680x0
151@cindex M680x0 size modifiers
152@cindex size modifiers, M680x0
153The 680x0 version of @code{@value{AS}} uses instructions names and
154syntax compatible with the Sun assembler. Intervening periods are
155ignored; for example, @samp{movl} is equivalent to @samp{mov.l}.
156
157In the following table @var{apc} stands for any of the address registers
158(@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
159zero-address relative to the program counter (@samp{%zpc}), a suppressed
160address register (@samp{%za0} through @samp{%za7}), or it may be omitted
161entirely. The use of @var{size} means one of @samp{w} or @samp{l}, and
162it may be omitted, along with the leading colon, unless a scale is also
163specified. The use of @var{scale} means one of @samp{1}, @samp{2},
164@samp{4}, or @samp{8}, and it may always be omitted along with the
165leading colon.
166
167@cindex M680x0 addressing modes
168@cindex addressing modes, M680x0
169The following addressing modes are understood:
170@table @dfn
171@item Immediate
172@samp{#@var{number}}
173
174@item Data Register
175@samp{%d0} through @samp{%d7}
176
177@item Address Register
178@samp{%a0} through @samp{%a7}@*
179@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}
180is also known as @samp{%fp}, the Frame Pointer.
181
182@item Address Register Indirect
183@samp{%a0@@} through @samp{%a7@@}
184
185@item Address Register Postincrement
186@samp{%a0@@+} through @samp{%a7@@+}
187
188@item Address Register Predecrement
189@samp{%a0@@-} through @samp{%a7@@-}
190
191@item Indirect Plus Offset
192@samp{@var{apc}@@(@var{number})}
193
194@item Index
195@samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})}
196
197The @var{number} may be omitted.
198
199@item Postindex
200@samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})}
201
202The @var{onumber} or the @var{register}, but not both, may be omitted.
203
204@item Preindex
205@samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})}
206
207The @var{number} may be omitted. Omitting the @var{register} produces
208the Postindex addressing mode.
209
210@item Absolute
211@samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by
212@samp{:b}, @samp{:w}, or @samp{:l}.
213@end table
214
215@node M68K-Moto-Syntax
216@section Motorola Syntax
217
218@cindex Motorola syntax for the 680x0
219@cindex alternate syntax for the 680x0
220
221The standard Motorola syntax for this chip differs from the syntax
222already discussed (@pxref{M68K-Syntax,,Syntax}). @code{@value{AS}} can
223accept Motorola syntax for operands, even if @sc{mit} syntax is used for
224other operands in the same instruction. The two kinds of syntax are
225fully compatible.
226
227In the following table @var{apc} stands for any of the address registers
228(@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
229zero-address relative to the program counter (@samp{%zpc}), or a
230suppressed address register (@samp{%za0} through @samp{%za7}). The use
231of @var{size} means one of @samp{w} or @samp{l}, and it may always be
232omitted along with the leading dot. The use of @var{scale} means one of
233@samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omitted
234along with the leading asterisk.
235
236The following additional addressing modes are understood:
237
238@table @dfn
239@item Address Register Indirect
240@samp{(%a0)} through @samp{(%a7)}@*
241@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}
242is also known as @samp{%fp}, the Frame Pointer.
243
244@item Address Register Postincrement
245@samp{(%a0)+} through @samp{(%a7)+}
246
247@item Address Register Predecrement
248@samp{-(%a0)} through @samp{-(%a7)}
249
250@item Indirect Plus Offset
251@samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})},
252or @samp{@var{number}(@var{%pc})}.
253
254The @var{number} may also appear within the parentheses, as in
255@samp{(@var{number},@var{%a0})}. When used with the @var{pc}, the
256@var{number} may be omitted (with an address register, omitting the
257@var{number} produces Address Register Indirect mode).
258
259@item Index
260@samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})}
261
262The @var{number} may be omitted, or it may appear within the
263parentheses. The @var{apc} may be omitted. The @var{register} and the
264@var{apc} may appear in either order. If both @var{apc} and
265@var{register} are address registers, and the @var{size} and @var{scale}
266are omitted, then the first register is taken as the base register, and
267the second as the index register.
268
269@item Postindex
270@samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})}
271
272The @var{onumber}, or the @var{register}, or both, may be omitted.
273Either the @var{number} or the @var{apc} may be omitted, but not both.
274
275@item Preindex
276@samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})}
277
278The @var{number}, or the @var{apc}, or the @var{register}, or any two of
279them, may be omitted. The @var{onumber} may be omitted. The
280@var{register} and the @var{apc} may appear in either order. If both
281@var{apc} and @var{register} are address registers, and the @var{size}
282and @var{scale} are omitted, then the first register is taken as the
283base register, and the second as the index register.
284@end table
285
286@node M68K-Float
287@section Floating Point
288
289@cindex floating point, M680x0
290@cindex M680x0 floating point
291Packed decimal (P) format floating literals are not supported.
292Feel free to add the code!
293
294The floating point formats generated by directives are these.
295
296@table @code
297@cindex @code{float} directive, M680x0
298@item .float
299@code{Single} precision floating point constants.
300
301@cindex @code{double} directive, M680x0
302@item .double
303@code{Double} precision floating point constants.
304
305@cindex @code{extend} directive M680x0
306@cindex @code{ldouble} directive M680x0
307@item .extend
308@itemx .ldouble
309@code{Extended} precision (@code{long double}) floating point constants.
310@end table
311
312@node M68K-Directives
313@section 680x0 Machine Directives
314
315@cindex M680x0 directives
316@cindex directives, M680x0
317In order to be compatible with the Sun assembler the 680x0 assembler
318understands the following directives.
319
320@table @code
321@cindex @code{data1} directive, M680x0
322@item .data1
323This directive is identical to a @code{.data 1} directive.
324
325@cindex @code{data2} directive, M680x0
326@item .data2
327This directive is identical to a @code{.data 2} directive.
328
329@cindex @code{even} directive, M680x0
330@item .even
331This directive is a special case of the @code{.align} directive; it
332aligns the output to an even byte boundary.
333
334@cindex @code{skip} directive, M680x0
335@item .skip
336This directive is identical to a @code{.space} directive.
337@end table
338
339@need 2000
340@node M68K-opcodes
341@section Opcodes
342
343@cindex M680x0 opcodes
344@cindex opcodes, M680x0
345@cindex instruction set, M680x0
346@c doc@cygnus.com: I don't see any point in the following
347@c paragraph. Bugs are bugs; how does saying this
348@c help anyone?
349@ignore
350Danger: Several bugs have been found in the opcode table (and
351fixed). More bugs may exist. Be careful when using obscure
352instructions.
353@end ignore
354
355@menu
356* M68K-Branch:: Branch Improvement
357* M68K-Chars:: Special Characters
358@end menu
359
360@node M68K-Branch
361@subsection Branch Improvement
362
363@cindex pseudo-opcodes, M680x0
364@cindex M680x0 pseudo-opcodes
365@cindex branch improvement, M680x0
366@cindex M680x0 branch improvement
367Certain pseudo opcodes are permitted for branch instructions.
368They expand to the shortest branch instruction that reach the
369target. Generally these mnemonics are made by substituting @samp{j} for
370@samp{b} at the start of a Motorola mnemonic.
371
372The following table summarizes the pseudo-operations. A @code{*} flags
373cases that are more fully described after the table:
374
375@smallexample
376 Displacement
377 +-------------------------------------------------
378 | 68020 68000/10
379Pseudo-Op |BYTE WORD LONG LONG non-PC relative
380 +-------------------------------------------------
381 jbsr |bsrs bsr bsrl jsr jsr
382 jra |bras bra bral jmp jmp
383* jXX |bXXs bXX bXXl bNXs;jmpl bNXs;jmp
384* dbXX |dbXX dbXX dbXX; bra; jmpl
385* fjXX |fbXXw fbXXw fbXXl fbNXw;jmp
386
387XX: condition
388NX: negative of condition XX
389
390@end smallexample
391@center @code{*}---see full description below
392
393@table @code
394@item jbsr
395@itemx jra
396These are the simplest jump pseudo-operations; they always map to one
397particular machine instruction, depending on the displacement to the
398branch target.
399
400@item j@var{XX}
401Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,
402where @var{XX} is a conditional branch or condition-code test. The full
403list of pseudo-ops in this family is:
404@smallexample
405 jhi jls jcc jcs jne jeq jvc
406 jvs jpl jmi jge jlt jgt jle
407@end smallexample
408
409For the cases of non-PC relative displacements and long displacements on
410the 68000 or 68010, @code{@value{AS}} issues a longer code fragment in terms of
411@var{NX}, the opposite condition to @var{XX}. For example, for the
412non-PC relative case:
413@smallexample
414 j@var{XX} foo
415@end smallexample
416gives
417@smallexample
418 b@var{NX}s oof
419 jmp foo
420 oof:
421@end smallexample
422
423@item db@var{XX}
424The full family of pseudo-operations covered here is
425@smallexample
426 dbhi dbls dbcc dbcs dbne dbeq dbvc
427 dbvs dbpl dbmi dbge dblt dbgt dble
428 dbf dbra dbt
429@end smallexample
430
431Other than for word and byte displacements, when the source reads
432@samp{db@var{XX} foo}, @code{@value{AS}} emits
433@smallexample
434 db@var{XX} oo1
435 bra oo2
436 oo1:jmpl foo
437 oo2:
438@end smallexample
439
440@item fj@var{XX}
441This family includes
442@smallexample
443 fjne fjeq fjge fjlt fjgt fjle fjf
444 fjt fjgl fjgle fjnge fjngl fjngle fjngt
445 fjnle fjnlt fjoge fjogl fjogt fjole fjolt
446 fjor fjseq fjsf fjsne fjst fjueq fjuge
447 fjugt fjule fjult fjun
448@end smallexample
449
450For branch targets that are not PC relative, @code{@value{AS}} emits
451@smallexample
452 fb@var{NX} oof
453 jmp foo
454 oof:
455@end smallexample
456when it encounters @samp{fj@var{XX} foo}.
457
458@end table
459
460@node M68K-Chars
461@subsection Special Characters
462
463@cindex special characters, M680x0
464@cindex M680x0 immediate character
465@cindex immediate character, M680x0
466@cindex M680x0 line comment character
467@cindex line comment character, M680x0
468@cindex comments, M680x0
469The immediate character is @samp{#} for Sun compatibility. The
470line-comment character is @samp{|} (unless the @samp{--bitwise-or}
471option is used). If a @samp{#} appears at the beginning of a line, it
472is treated as a comment unless it looks like @samp{# line file}, in
473which case it is treated normally.
474