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c649a7c2 | 1 | /* Target definitions for delta68. |
4434e2dc | 2 | Copyright 1993, 1994, 1998 Free Software Foundation, Inc. |
c649a7c2 JK |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
6c9638b4 | 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
c649a7c2 JK |
19 | |
20 | /* Define BPT_VECTOR if it is different than the default. | |
21 | This is the vector number used by traps to indicate a breakpoint. */ | |
22 | ||
23 | #define BPT_VECTOR 0x1 | |
24 | ||
c649a7c2 JK |
25 | #define GCC_COMPILED_FLAG_SYMBOL "gcc_compiled%" |
26 | #define GCC2_COMPILED_FLAG_SYMBOL "gcc2_compiled%" | |
27 | ||
28 | /* Amount PC must be decremented by after a breakpoint. | |
29 | On the Delta, the kernel decrements it for us. */ | |
30 | ||
31 | #define DECR_PC_AFTER_BREAK 0 | |
32 | ||
522b9962 JK |
33 | /* Not sure what happens if we try to store this register, but |
34 | phdm@info.ucl.ac.be says we need this define. */ | |
ca3c57e5 | 35 | |
522b9962 JK |
36 | #define CANNOT_STORE_REGISTER(regno) (regno == FPI_REGNUM) |
37 | ||
ca3c57e5 SS |
38 | /* Extract from an array REGBUF containing the (raw) register state |
39 | a function return value of type TYPE, and copy that, in virtual format, | |
40 | into VALBUF. */ | |
41 | ||
4434e2dc | 42 | /* When it returns a float/double value, use fp0 in sysV68. */ |
ca3c57e5 SS |
43 | /* When it returns a pointer value, use a0 in sysV68. */ |
44 | ||
4434e2dc JM |
45 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ |
46 | if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \ | |
75a1d67a | 47 | REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE, \ |
4434e2dc JM |
48 | ®BUF[REGISTER_BYTE (FP0_REGNUM)], \ |
49 | VALBUF); \ | |
50 | else \ | |
51 | memcpy ((VALBUF), \ | |
52 | (char *) ((REGBUF) + \ | |
53 | (TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : \ | |
54 | (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)))), \ | |
55 | TYPE_LENGTH(TYPE)) | |
ca3c57e5 SS |
56 | |
57 | /* Write into appropriate registers a function return value | |
58 | of type TYPE, given in virtual format. */ | |
59 | ||
4434e2dc | 60 | /* When it returns a float/double value, use fp0 in sysV68. */ |
ca3c57e5 SS |
61 | /* When it returns a pointer value, use a0 in sysV68. */ |
62 | ||
63 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ | |
4434e2dc JM |
64 | if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \ |
65 | { \ | |
66 | char raw_buf[REGISTER_RAW_SIZE (FP0_REGNUM)]; \ | |
75a1d67a JM |
67 | REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buf); \ |
68 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), \ | |
4434e2dc JM |
69 | raw_buf, REGISTER_RAW_SIZE (FP0_REGNUM)); \ |
70 | } \ | |
71 | else \ | |
72 | write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : 0), \ | |
73 | VALBUF, TYPE_LENGTH (TYPE)) | |
74 | ||
75a1d67a JM |
75 | /* Return number of args passed to a frame. |
76 | Can return -1, meaning no way to tell. */ | |
77 | ||
78 | #define FRAME_NUM_ARGS(val, fi) \ | |
79 | { register CORE_ADDR pc = FRAME_SAVED_PC (fi); \ | |
80 | register int insn = 0177777 & read_memory_integer (pc, 2); \ | |
81 | val = 0; \ | |
82 | if (insn == 0047757 || insn == 0157374) /* lea W(sp),sp or addaw #W,sp */ \ | |
83 | val = read_memory_integer (pc + 2, 2); \ | |
84 | else if ((insn & 0170777) == 0050217 /* addql #N, sp */ \ | |
85 | || (insn & 0170777) == 0050117) /* addqw */ \ | |
86 | { val = (insn >> 9) & 7; if (val == 0) val = 8; } \ | |
87 | else if (insn == 0157774) /* addal #WW, sp */ \ | |
88 | val = read_memory_integer (pc + 2, 4); \ | |
89 | val >>= 2; } | |
90 | ||
4434e2dc JM |
91 | /* On M68040 versions of sysV68 R3V7.1, ptrace(PT_WRITE_I) does not clear |
92 | the processor's instruction cache as it should. */ | |
93 | #define CLEAR_INSN_CACHE() clear_insn_cache() | |
ca3c57e5 | 94 | |
c649a7c2 | 95 | #include "m68k/tm-m68k.h" |
4434e2dc JM |
96 | |
97 | /* Extract from an array REGBUF containing the (raw) register state | |
98 | the address in which a function should return its structure value, | |
99 | as a CORE_ADDR (or an expression that can be used as one). */ | |
100 | ||
101 | #undef EXTRACT_STRUCT_VALUE_ADDRESS | |
102 | #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF)\ | |
103 | (*(CORE_ADDR *)((char*)(REGBUF) + 8 * 4)) |