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Fix powerpc-power8.exp test with new mnemonics
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CommitLineData
a7aad9aa 1/* Target-dependent code for the HP PA-RISC architecture.
cda5a58a 2
3666a048 3 Copyright (C) 1986-2021 Free Software Foundation, Inc.
c906108c
SS
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
c5aa993b 8 This file is part of GDB.
c906108c 9
c5aa993b
JM
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
c5aa993b 13 (at your option) any later version.
c906108c 14
c5aa993b
JM
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
c906108c 19
c5aa993b 20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c
SS
22
23#include "defs.h"
c906108c
SS
24#include "bfd.h"
25#include "inferior.h"
4e052eda 26#include "regcache.h"
e5d66720 27#include "completer.h"
59623e27 28#include "osabi.h"
343af405 29#include "arch-utils.h"
1777feb0 30/* For argument passing to the inferior. */
c906108c 31#include "symtab.h"
fde2cceb 32#include "dis-asm.h"
26d08f08
AC
33#include "trad-frame.h"
34#include "frame-unwind.h"
35#include "frame-base.h"
c906108c 36
c906108c
SS
37#include "gdbcore.h"
38#include "gdbcmd.h"
e6bb342a 39#include "gdbtypes.h"
c906108c 40#include "objfiles.h"
3ff7cf9e 41#include "hppa-tdep.h"
325fac50 42#include <algorithm>
c906108c 43
491144b5 44static bool hppa_debug = false;
369aa520 45
60383d10 46/* Some local constants. */
3ff7cf9e
JB
47static const int hppa32_num_regs = 128;
48static const int hppa64_num_regs = 96;
49
61a12cfa
JK
50/* We use the objfile->obj_private pointer for two things:
51 * 1. An unwind table;
52 *
53 * 2. A pointer to any associated shared library object.
54 *
55 * #defines are used to help refer to these objects.
56 */
57
58/* Info about the unwind table associated with an object file.
59 * This is hung off of the "objfile->obj_private" pointer, and
60 * is allocated in the objfile's psymbol obstack. This allows
61 * us to have unique unwind info for each executable and shared
62 * library that we are debugging.
63 */
64struct hppa_unwind_info
65 {
66 struct unwind_table_entry *table; /* Pointer to unwind info */
67 struct unwind_table_entry *cache; /* Pointer to last entry we found */
68 int last; /* Index of last entry */
69 };
70
71struct hppa_objfile_private
72 {
73 struct hppa_unwind_info *unwind_info; /* a pointer */
74 struct so_list *so_info; /* a pointer */
75 CORE_ADDR dp;
76
77 int dummy_call_sequence_reg;
78 CORE_ADDR dummy_call_sequence_addr;
79 };
80
7c46b9fb
RC
81/* hppa-specific object data -- unwind and solib info.
82 TODO/maybe: think about splitting this into two parts; the unwind data is
83 common to all hppa targets, but is only used in this file; we can register
84 that separately and make this static. The solib data is probably hpux-
85 specific, so we can create a separate extern objfile_data that is registered
86 by hppa-hpux-tdep.c and shared with pa64solib.c and somsolib.c. */
9a73f0ad
TT
87static const struct objfile_key<hppa_objfile_private,
88 gdb::noop_deleter<hppa_objfile_private>>
89 hppa_objfile_priv_data;
7c46b9fb 90
405feb71 91/* Get at various relevant fields of an instruction word. */
e2ac8128
JB
92#define MASK_5 0x1f
93#define MASK_11 0x7ff
94#define MASK_14 0x3fff
95#define MASK_21 0x1fffff
96
e2ac8128
JB
97/* Sizes (in bytes) of the native unwind entries. */
98#define UNWIND_ENTRY_SIZE 16
99#define STUB_UNWIND_ENTRY_SIZE 8
100
c906108c 101/* Routines to extract various sized constants out of hppa
1777feb0 102 instructions. */
c906108c
SS
103
104/* This assumes that no garbage lies outside of the lower bits of
1777feb0 105 value. */
c906108c 106
63807e1d 107static int
abc485a1 108hppa_sign_extend (unsigned val, unsigned bits)
c906108c 109{
66c6502d 110 return (int) (val >> (bits - 1) ? (-(1 << bits)) | val : val);
c906108c
SS
111}
112
1777feb0 113/* For many immediate values the sign bit is the low bit! */
c906108c 114
63807e1d 115static int
abc485a1 116hppa_low_hppa_sign_extend (unsigned val, unsigned bits)
c906108c 117{
66c6502d 118 return (int) ((val & 0x1 ? (-(1 << (bits - 1))) : 0) | val >> 1);
c906108c
SS
119}
120
e2ac8128 121/* Extract the bits at positions between FROM and TO, using HP's numbering
1777feb0 122 (MSB = 0). */
e2ac8128 123
abc485a1
RC
124int
125hppa_get_field (unsigned word, int from, int to)
e2ac8128
JB
126{
127 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
128}
129
1777feb0 130/* Extract the immediate field from a ld{bhw}s instruction. */
c906108c 131
abc485a1
RC
132int
133hppa_extract_5_load (unsigned word)
c906108c 134{
abc485a1 135 return hppa_low_hppa_sign_extend (word >> 16 & MASK_5, 5);
c906108c
SS
136}
137
1777feb0 138/* Extract the immediate field from a break instruction. */
c906108c 139
abc485a1
RC
140unsigned
141hppa_extract_5r_store (unsigned word)
c906108c
SS
142{
143 return (word & MASK_5);
144}
145
1777feb0 146/* Extract the immediate field from a {sr}sm instruction. */
c906108c 147
abc485a1
RC
148unsigned
149hppa_extract_5R_store (unsigned word)
c906108c
SS
150{
151 return (word >> 16 & MASK_5);
152}
153
1777feb0 154/* Extract a 14 bit immediate field. */
c906108c 155
abc485a1
RC
156int
157hppa_extract_14 (unsigned word)
c906108c 158{
abc485a1 159 return hppa_low_hppa_sign_extend (word & MASK_14, 14);
c906108c
SS
160}
161
1777feb0 162/* Extract a 21 bit constant. */
c906108c 163
abc485a1
RC
164int
165hppa_extract_21 (unsigned word)
c906108c
SS
166{
167 int val;
168
169 word &= MASK_21;
170 word <<= 11;
abc485a1 171 val = hppa_get_field (word, 20, 20);
c906108c 172 val <<= 11;
abc485a1 173 val |= hppa_get_field (word, 9, 19);
c906108c 174 val <<= 2;
abc485a1 175 val |= hppa_get_field (word, 5, 6);
c906108c 176 val <<= 5;
abc485a1 177 val |= hppa_get_field (word, 0, 4);
c906108c 178 val <<= 2;
abc485a1
RC
179 val |= hppa_get_field (word, 7, 8);
180 return hppa_sign_extend (val, 21) << 11;
c906108c
SS
181}
182
c906108c 183/* extract a 17 bit constant from branch instructions, returning the
1777feb0 184 19 bit signed value. */
c906108c 185
abc485a1
RC
186int
187hppa_extract_17 (unsigned word)
c906108c 188{
abc485a1
RC
189 return hppa_sign_extend (hppa_get_field (word, 19, 28) |
190 hppa_get_field (word, 29, 29) << 10 |
191 hppa_get_field (word, 11, 15) << 11 |
c906108c
SS
192 (word & 0x1) << 16, 17) << 2;
193}
3388d7ff
RC
194
195CORE_ADDR
196hppa_symbol_address(const char *sym)
197{
3b7344d5 198 struct bound_minimal_symbol minsym;
3388d7ff
RC
199
200 minsym = lookup_minimal_symbol (sym, NULL, NULL);
3b7344d5 201 if (minsym.minsym)
77e371c0 202 return BMSYMBOL_VALUE_ADDRESS (minsym);
3388d7ff
RC
203 else
204 return (CORE_ADDR)-1;
205}
77d18ded 206
61a12cfa 207static struct hppa_objfile_private *
77d18ded
RC
208hppa_init_objfile_priv_data (struct objfile *objfile)
209{
e39db4db
SM
210 hppa_objfile_private *priv
211 = OBSTACK_ZALLOC (&objfile->objfile_obstack, hppa_objfile_private);
77d18ded 212
9a73f0ad 213 hppa_objfile_priv_data.set (objfile, priv);
77d18ded
RC
214
215 return priv;
216}
c906108c
SS
217\f
218
219/* Compare the start address for two unwind entries returning 1 if
220 the first address is larger than the second, -1 if the second is
221 larger than the first, and zero if they are equal. */
222
223static int
fba45db2 224compare_unwind_entries (const void *arg1, const void *arg2)
c906108c 225{
9a3c8263
SM
226 const struct unwind_table_entry *a = (const struct unwind_table_entry *) arg1;
227 const struct unwind_table_entry *b = (const struct unwind_table_entry *) arg2;
c906108c
SS
228
229 if (a->region_start > b->region_start)
230 return 1;
231 else if (a->region_start < b->region_start)
232 return -1;
233 else
234 return 0;
235}
236
53a5351d 237static void
fdd72f95 238record_text_segment_lowaddr (bfd *abfd, asection *section, void *data)
53a5351d 239{
fdd72f95 240 if ((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
53a5351d 241 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
fdd72f95
RC
242 {
243 bfd_vma value = section->vma - section->filepos;
244 CORE_ADDR *low_text_segment_address = (CORE_ADDR *)data;
245
246 if (value < *low_text_segment_address)
dda83cd7 247 *low_text_segment_address = value;
fdd72f95 248 }
53a5351d
JM
249}
250
c906108c 251static void
fba45db2 252internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
1777feb0 253 asection *section, unsigned int entries,
241fd515 254 size_t size, CORE_ADDR text_offset)
c906108c
SS
255{
256 /* We will read the unwind entries into temporary memory, then
257 fill in the actual unwind table. */
fdd72f95 258
c906108c
SS
259 if (size > 0)
260 {
08feed99 261 struct gdbarch *gdbarch = objfile->arch ();
c906108c
SS
262 unsigned long tmp;
263 unsigned i;
224c3ddb 264 char *buf = (char *) alloca (size);
fdd72f95 265 CORE_ADDR low_text_segment_address;
c906108c 266
fdd72f95 267 /* For ELF targets, then unwinds are supposed to
1777feb0 268 be segment relative offsets instead of absolute addresses.
c2c6d25f
JM
269
270 Note that when loading a shared library (text_offset != 0) the
271 unwinds are already relative to the text_offset that will be
272 passed in. */
5db8bbe5 273 if (gdbarch_tdep (gdbarch)->is_elf && text_offset == 0)
53a5351d 274 {
dda83cd7 275 low_text_segment_address = -1;
fdd72f95 276
53a5351d 277 bfd_map_over_sections (objfile->obfd,
fdd72f95
RC
278 record_text_segment_lowaddr,
279 &low_text_segment_address);
53a5351d 280
fdd72f95 281 text_offset = low_text_segment_address;
53a5351d 282 }
5db8bbe5 283 else if (gdbarch_tdep (gdbarch)->solib_get_text_base)
dda83cd7 284 {
5db8bbe5 285 text_offset = gdbarch_tdep (gdbarch)->solib_get_text_base (objfile);
acf86d54 286 }
53a5351d 287
c906108c
SS
288 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
289
290 /* Now internalize the information being careful to handle host/target
dda83cd7 291 endian issues. */
c906108c
SS
292 for (i = 0; i < entries; i++)
293 {
294 table[i].region_start = bfd_get_32 (objfile->obfd,
c5aa993b 295 (bfd_byte *) buf);
c906108c
SS
296 table[i].region_start += text_offset;
297 buf += 4;
c5aa993b 298 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
299 table[i].region_end += text_offset;
300 buf += 4;
c5aa993b 301 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
302 buf += 4;
303 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
304 table[i].Millicode = (tmp >> 30) & 0x1;
305 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
306 table[i].Region_description = (tmp >> 27) & 0x3;
6fcecea0 307 table[i].reserved = (tmp >> 26) & 0x1;
c906108c
SS
308 table[i].Entry_SR = (tmp >> 25) & 0x1;
309 table[i].Entry_FR = (tmp >> 21) & 0xf;
310 table[i].Entry_GR = (tmp >> 16) & 0x1f;
311 table[i].Args_stored = (tmp >> 15) & 0x1;
312 table[i].Variable_Frame = (tmp >> 14) & 0x1;
313 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
314 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
315 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
316 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
6fcecea0 317 table[i].sr4export = (tmp >> 9) & 0x1;
c906108c
SS
318 table[i].cxx_info = (tmp >> 8) & 0x1;
319 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
320 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
6fcecea0 321 table[i].reserved1 = (tmp >> 5) & 0x1;
c906108c
SS
322 table[i].Save_SP = (tmp >> 4) & 0x1;
323 table[i].Save_RP = (tmp >> 3) & 0x1;
324 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
6fcecea0 325 table[i].save_r19 = (tmp >> 1) & 0x1;
c906108c 326 table[i].Cleanup_defined = tmp & 0x1;
c5aa993b 327 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
c906108c
SS
328 buf += 4;
329 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
330 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
331 table[i].Large_frame = (tmp >> 29) & 0x1;
6fcecea0
RC
332 table[i].alloca_frame = (tmp >> 28) & 0x1;
333 table[i].reserved2 = (tmp >> 27) & 0x1;
c906108c
SS
334 table[i].Total_frame_size = tmp & 0x7ffffff;
335
1777feb0 336 /* Stub unwinds are handled elsewhere. */
c906108c
SS
337 table[i].stub_unwind.stub_type = 0;
338 table[i].stub_unwind.padding = 0;
339 }
340 }
341}
342
343/* Read in the backtrace information stored in the `$UNWIND_START$' section of
344 the object file. This info is used mainly by find_unwind_entry() to find
345 out the stack frame size and frame pointer used by procedures. We put
346 everything on the psymbol obstack in the objfile so that it automatically
347 gets freed when the objfile is destroyed. */
348
349static void
fba45db2 350read_unwind_info (struct objfile *objfile)
c906108c 351{
d4f3574e 352 asection *unwind_sec, *stub_unwind_sec;
241fd515 353 size_t unwind_size, stub_unwind_size, total_size;
d4f3574e 354 unsigned index, unwind_entries;
c906108c
SS
355 unsigned stub_entries, total_entries;
356 CORE_ADDR text_offset;
7c46b9fb
RC
357 struct hppa_unwind_info *ui;
358 struct hppa_objfile_private *obj_private;
c906108c 359
b3b3bada 360 text_offset = objfile->text_section_offset ();
7c46b9fb
RC
361 ui = (struct hppa_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
362 sizeof (struct hppa_unwind_info));
c906108c
SS
363
364 ui->table = NULL;
365 ui->cache = NULL;
366 ui->last = -1;
367
d4f3574e
SS
368 /* For reasons unknown the HP PA64 tools generate multiple unwinder
369 sections in a single executable. So we just iterate over every
85102364 370 section in the BFD looking for unwinder sections instead of trying
1777feb0 371 to do a lookup with bfd_get_section_by_name.
c906108c 372
d4f3574e
SS
373 First determine the total size of the unwind tables so that we
374 can allocate memory in a nice big hunk. */
375 total_entries = 0;
376 for (unwind_sec = objfile->obfd->sections;
377 unwind_sec;
378 unwind_sec = unwind_sec->next)
c906108c 379 {
d4f3574e
SS
380 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
381 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
382 {
fd361982 383 unwind_size = bfd_section_size (unwind_sec);
d4f3574e 384 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
c906108c 385
d4f3574e
SS
386 total_entries += unwind_entries;
387 }
c906108c
SS
388 }
389
d4f3574e 390 /* Now compute the size of the stub unwinds. Note the ELF tools do not
043f5962 391 use stub unwinds at the current time. */
d4f3574e
SS
392 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
393
c906108c
SS
394 if (stub_unwind_sec)
395 {
fd361982 396 stub_unwind_size = bfd_section_size (stub_unwind_sec);
c906108c
SS
397 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
398 }
399 else
400 {
401 stub_unwind_size = 0;
402 stub_entries = 0;
403 }
404
405 /* Compute total number of unwind entries and their total size. */
d4f3574e 406 total_entries += stub_entries;
c906108c
SS
407 total_size = total_entries * sizeof (struct unwind_table_entry);
408
409 /* Allocate memory for the unwind table. */
410 ui->table = (struct unwind_table_entry *)
8b92e4d5 411 obstack_alloc (&objfile->objfile_obstack, total_size);
c5aa993b 412 ui->last = total_entries - 1;
c906108c 413
d4f3574e
SS
414 /* Now read in each unwind section and internalize the standard unwind
415 entries. */
c906108c 416 index = 0;
d4f3574e
SS
417 for (unwind_sec = objfile->obfd->sections;
418 unwind_sec;
419 unwind_sec = unwind_sec->next)
420 {
421 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
422 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
423 {
fd361982 424 unwind_size = bfd_section_size (unwind_sec);
d4f3574e
SS
425 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
426
427 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
428 unwind_entries, unwind_size, text_offset);
429 index += unwind_entries;
430 }
431 }
432
433 /* Now read in and internalize the stub unwind entries. */
c906108c
SS
434 if (stub_unwind_size > 0)
435 {
436 unsigned int i;
224c3ddb 437 char *buf = (char *) alloca (stub_unwind_size);
c906108c
SS
438
439 /* Read in the stub unwind entries. */
440 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
441 0, stub_unwind_size);
442
443 /* Now convert them into regular unwind entries. */
444 for (i = 0; i < stub_entries; i++, index++)
445 {
446 /* Clear out the next unwind entry. */
447 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
448
1777feb0 449 /* Convert offset & size into region_start and region_end.
c906108c
SS
450 Stuff away the stub type into "reserved" fields. */
451 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
452 (bfd_byte *) buf);
453 ui->table[index].region_start += text_offset;
454 buf += 4;
455 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
c5aa993b 456 (bfd_byte *) buf);
c906108c
SS
457 buf += 2;
458 ui->table[index].region_end
c5aa993b
JM
459 = ui->table[index].region_start + 4 *
460 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
c906108c
SS
461 buf += 2;
462 }
463
464 }
465
466 /* Unwind table needs to be kept sorted. */
467 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
468 compare_unwind_entries);
469
470 /* Keep a pointer to the unwind information. */
9a73f0ad 471 obj_private = hppa_objfile_priv_data.get (objfile);
7c46b9fb 472 if (obj_private == NULL)
77d18ded
RC
473 obj_private = hppa_init_objfile_priv_data (objfile);
474
c906108c
SS
475 obj_private->unwind_info = ui;
476}
477
478/* Lookup the unwind (stack backtrace) info for the given PC. We search all
479 of the objfiles seeking the unwind table entry for this PC. Each objfile
480 contains a sorted list of struct unwind_table_entry. Since we do a binary
481 search of the unwind tables, we depend upon them to be sorted. */
482
483struct unwind_table_entry *
fba45db2 484find_unwind_entry (CORE_ADDR pc)
c906108c
SS
485{
486 int first, middle, last;
7c46b9fb 487 struct hppa_objfile_private *priv;
c906108c 488
369aa520 489 if (hppa_debug)
5af949e3 490 fprintf_unfiltered (gdb_stdlog, "{ find_unwind_entry %s -> ",
dda83cd7 491 hex_string (pc));
369aa520 492
1777feb0 493 /* A function at address 0? Not in HP-UX! */
c906108c 494 if (pc == (CORE_ADDR) 0)
369aa520
RC
495 {
496 if (hppa_debug)
497 fprintf_unfiltered (gdb_stdlog, "NULL }\n");
498 return NULL;
499 }
c906108c 500
2030c079 501 for (objfile *objfile : current_program_space->objfiles ())
aed57c53
TT
502 {
503 struct hppa_unwind_info *ui;
504 ui = NULL;
9a73f0ad 505 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
506 if (priv)
507 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
508
509 if (!ui)
510 {
511 read_unwind_info (objfile);
9a73f0ad 512 priv = hppa_objfile_priv_data.get (objfile);
aed57c53
TT
513 if (priv == NULL)
514 error (_("Internal error reading unwind information."));
515 ui = ((struct hppa_objfile_private *) priv)->unwind_info;
516 }
517
518 /* First, check the cache. */
519
520 if (ui->cache
521 && pc >= ui->cache->region_start
522 && pc <= ui->cache->region_end)
523 {
524 if (hppa_debug)
525 fprintf_unfiltered (gdb_stdlog, "%s (cached) }\n",
526 hex_string ((uintptr_t) ui->cache));
527 return ui->cache;
528 }
529
530 /* Not in the cache, do a binary search. */
531
532 first = 0;
533 last = ui->last;
534
535 while (first <= last)
536 {
537 middle = (first + last) / 2;
538 if (pc >= ui->table[middle].region_start
539 && pc <= ui->table[middle].region_end)
540 {
541 ui->cache = &ui->table[middle];
542 if (hppa_debug)
543 fprintf_unfiltered (gdb_stdlog, "%s }\n",
544 hex_string ((uintptr_t) ui->cache));
545 return &ui->table[middle];
546 }
547
548 if (pc < ui->table[middle].region_start)
549 last = middle - 1;
550 else
551 first = middle + 1;
552 }
553 }
369aa520
RC
554
555 if (hppa_debug)
556 fprintf_unfiltered (gdb_stdlog, "NULL (not found) }\n");
557
c906108c
SS
558 return NULL;
559}
560
c9cf6e20
MG
561/* Implement the stack_frame_destroyed_p gdbarch method.
562
563 The epilogue is defined here as the area either on the `bv' instruction
1777feb0 564 itself or an instruction which destroys the function's stack frame.
1fb24930
RC
565
566 We do not assume that the epilogue is at the end of a function as we can
567 also have return sequences in the middle of a function. */
c9cf6e20 568
1fb24930 569static int
c9cf6e20 570hppa_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1fb24930 571{
e17a4113 572 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1fb24930
RC
573 unsigned long status;
574 unsigned int inst;
e362b510 575 gdb_byte buf[4];
1fb24930 576
8defab1a 577 status = target_read_memory (pc, buf, 4);
1fb24930
RC
578 if (status != 0)
579 return 0;
580
e17a4113 581 inst = extract_unsigned_integer (buf, 4, byte_order);
1fb24930
RC
582
583 /* The most common way to perform a stack adjustment ldo X(sp),sp
584 We are destroying a stack frame if the offset is negative. */
585 if ((inst & 0xffffc000) == 0x37de0000
586 && hppa_extract_14 (inst) < 0)
587 return 1;
588
589 /* ldw,mb D(sp),X or ldd,mb D(sp),X */
590 if (((inst & 0x0fc010e0) == 0x0fc010e0
591 || (inst & 0x0fc010e0) == 0x0fc010e0)
592 && hppa_extract_14 (inst) < 0)
593 return 1;
594
595 /* bv %r0(%rp) or bv,n %r0(%rp) */
596 if (inst == 0xe840c000 || inst == 0xe840c002)
597 return 1;
598
599 return 0;
600}
601
04180708 602constexpr gdb_byte hppa_break_insn[] = {0x00, 0x01, 0x00, 0x04};
598cc9dc 603
04180708 604typedef BP_MANIPULATION (hppa_break_insn) hppa_breakpoint;
aaab4dba 605
e23457df
AC
606/* Return the name of a register. */
607
4a302917 608static const char *
d93859e2 609hppa32_register_name (struct gdbarch *gdbarch, int i)
e23457df 610{
a121b7c1 611 static const char *names[] = {
e23457df
AC
612 "flags", "r1", "rp", "r3",
613 "r4", "r5", "r6", "r7",
614 "r8", "r9", "r10", "r11",
615 "r12", "r13", "r14", "r15",
616 "r16", "r17", "r18", "r19",
617 "r20", "r21", "r22", "r23",
618 "r24", "r25", "r26", "dp",
619 "ret0", "ret1", "sp", "r31",
620 "sar", "pcoqh", "pcsqh", "pcoqt",
621 "pcsqt", "eiem", "iir", "isr",
622 "ior", "ipsw", "goto", "sr4",
623 "sr0", "sr1", "sr2", "sr3",
624 "sr5", "sr6", "sr7", "cr0",
625 "cr8", "cr9", "ccr", "cr12",
626 "cr13", "cr24", "cr25", "cr26",
627 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
628 "fpsr", "fpe1", "fpe2", "fpe3",
629 "fpe4", "fpe5", "fpe6", "fpe7",
630 "fr4", "fr4R", "fr5", "fr5R",
631 "fr6", "fr6R", "fr7", "fr7R",
632 "fr8", "fr8R", "fr9", "fr9R",
633 "fr10", "fr10R", "fr11", "fr11R",
634 "fr12", "fr12R", "fr13", "fr13R",
635 "fr14", "fr14R", "fr15", "fr15R",
636 "fr16", "fr16R", "fr17", "fr17R",
637 "fr18", "fr18R", "fr19", "fr19R",
638 "fr20", "fr20R", "fr21", "fr21R",
639 "fr22", "fr22R", "fr23", "fr23R",
640 "fr24", "fr24R", "fr25", "fr25R",
641 "fr26", "fr26R", "fr27", "fr27R",
642 "fr28", "fr28R", "fr29", "fr29R",
643 "fr30", "fr30R", "fr31", "fr31R"
644 };
645 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
646 return NULL;
647 else
648 return names[i];
649}
650
4a302917 651static const char *
d93859e2 652hppa64_register_name (struct gdbarch *gdbarch, int i)
e23457df 653{
a121b7c1 654 static const char *names[] = {
e23457df
AC
655 "flags", "r1", "rp", "r3",
656 "r4", "r5", "r6", "r7",
657 "r8", "r9", "r10", "r11",
658 "r12", "r13", "r14", "r15",
659 "r16", "r17", "r18", "r19",
660 "r20", "r21", "r22", "r23",
661 "r24", "r25", "r26", "dp",
662 "ret0", "ret1", "sp", "r31",
663 "sar", "pcoqh", "pcsqh", "pcoqt",
664 "pcsqt", "eiem", "iir", "isr",
665 "ior", "ipsw", "goto", "sr4",
666 "sr0", "sr1", "sr2", "sr3",
667 "sr5", "sr6", "sr7", "cr0",
668 "cr8", "cr9", "ccr", "cr12",
669 "cr13", "cr24", "cr25", "cr26",
670 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
671 "fpsr", "fpe1", "fpe2", "fpe3",
672 "fr4", "fr5", "fr6", "fr7",
673 "fr8", "fr9", "fr10", "fr11",
674 "fr12", "fr13", "fr14", "fr15",
675 "fr16", "fr17", "fr18", "fr19",
676 "fr20", "fr21", "fr22", "fr23",
677 "fr24", "fr25", "fr26", "fr27",
678 "fr28", "fr29", "fr30", "fr31"
679 };
680 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
681 return NULL;
682 else
683 return names[i];
684}
685
85c83e99 686/* Map dwarf DBX register numbers to GDB register numbers. */
1ef7fcb5 687static int
d3f73121 688hppa64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1ef7fcb5 689{
85c83e99 690 /* The general registers and the sar are the same in both sets. */
0fde2c53 691 if (reg >= 0 && reg <= 32)
1ef7fcb5
RC
692 return reg;
693
694 /* fr4-fr31 are mapped from 72 in steps of 2. */
85c83e99 695 if (reg >= 72 && reg < 72 + 28 * 2 && !(reg & 1))
1ef7fcb5
RC
696 return HPPA64_FP4_REGNUM + (reg - 72) / 2;
697
1ef7fcb5
RC
698 return -1;
699}
700
79508e1e
AC
701/* This function pushes a stack frame with arguments as part of the
702 inferior function calling mechanism.
703
704 This is the version of the function for the 32-bit PA machines, in
705 which later arguments appear at lower addresses. (The stack always
706 grows towards higher addresses.)
707
708 We simply allocate the appropriate amount of stack space and put
709 arguments into their proper slots. */
710
4a302917 711static CORE_ADDR
7d9b040b 712hppa32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
79508e1e
AC
713 struct regcache *regcache, CORE_ADDR bp_addr,
714 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
715 function_call_return_method return_method,
716 CORE_ADDR struct_addr)
79508e1e 717{
e17a4113
UW
718 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
719
79508e1e
AC
720 /* Stack base address at which any pass-by-reference parameters are
721 stored. */
722 CORE_ADDR struct_end = 0;
723 /* Stack base address at which the first parameter is stored. */
724 CORE_ADDR param_end = 0;
725
79508e1e
AC
726 /* Two passes. First pass computes the location of everything,
727 second pass writes the bytes out. */
728 int write_pass;
d49771ef
RC
729
730 /* Global pointer (r19) of the function we are trying to call. */
731 CORE_ADDR gp;
732
733 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
734
79508e1e
AC
735 for (write_pass = 0; write_pass < 2; write_pass++)
736 {
1797a8f6 737 CORE_ADDR struct_ptr = 0;
1777feb0 738 /* The first parameter goes into sp-36, each stack slot is 4-bytes.
dda83cd7 739 struct_ptr is adjusted for each argument below, so the first
2a6228ef
RC
740 argument will end up at sp-36. */
741 CORE_ADDR param_ptr = 32;
79508e1e 742 int i;
2a6228ef
RC
743 int small_struct = 0;
744
79508e1e
AC
745 for (i = 0; i < nargs; i++)
746 {
747 struct value *arg = args[i];
4991999e 748 struct type *type = check_typedef (value_type (arg));
79508e1e
AC
749 /* The corresponding parameter that is pushed onto the
750 stack, and [possibly] passed in a register. */
948f8e3d 751 gdb_byte param_val[8];
79508e1e
AC
752 int param_len;
753 memset (param_val, 0, sizeof param_val);
754 if (TYPE_LENGTH (type) > 8)
755 {
756 /* Large parameter, pass by reference. Store the value
757 in "struct" area and then pass its address. */
758 param_len = 4;
1797a8f6 759 struct_ptr += align_up (TYPE_LENGTH (type), 8);
79508e1e 760 if (write_pass)
0fd88904 761 write_memory (struct_end - struct_ptr, value_contents (arg),
79508e1e 762 TYPE_LENGTH (type));
e17a4113
UW
763 store_unsigned_integer (param_val, 4, byte_order,
764 struct_end - struct_ptr);
79508e1e 765 }
78134374
SM
766 else if (type->code () == TYPE_CODE_INT
767 || type->code () == TYPE_CODE_ENUM)
79508e1e
AC
768 {
769 /* Integer value store, right aligned. "unpack_long"
770 takes care of any sign-extension problems. */
771 param_len = align_up (TYPE_LENGTH (type), 4);
e17a4113 772 store_unsigned_integer (param_val, param_len, byte_order,
79508e1e 773 unpack_long (type,
0fd88904 774 value_contents (arg)));
79508e1e 775 }
78134374 776 else if (type->code () == TYPE_CODE_FLT)
dda83cd7 777 {
2a6228ef
RC
778 /* Floating point value store, right aligned. */
779 param_len = align_up (TYPE_LENGTH (type), 4);
0fd88904 780 memcpy (param_val, value_contents (arg), param_len);
dda83cd7 781 }
79508e1e
AC
782 else
783 {
79508e1e 784 param_len = align_up (TYPE_LENGTH (type), 4);
2a6228ef
RC
785
786 /* Small struct value are stored right-aligned. */
79508e1e 787 memcpy (param_val + param_len - TYPE_LENGTH (type),
0fd88904 788 value_contents (arg), TYPE_LENGTH (type));
2a6228ef
RC
789
790 /* Structures of size 5, 6 and 7 bytes are special in that
dda83cd7 791 the higher-ordered word is stored in the lower-ordered
2a6228ef
RC
792 argument, and even though it is a 8-byte quantity the
793 registers need not be 8-byte aligned. */
1b07b470 794 if (param_len > 4 && param_len < 8)
2a6228ef 795 small_struct = 1;
79508e1e 796 }
2a6228ef 797
1797a8f6 798 param_ptr += param_len;
2a6228ef 799 if (param_len == 8 && !small_struct)
dda83cd7 800 param_ptr = align_up (param_ptr, 8);
2a6228ef
RC
801
802 /* First 4 non-FP arguments are passed in gr26-gr23.
803 First 4 32-bit FP arguments are passed in fr4L-fr7L.
804 First 2 64-bit FP arguments are passed in fr5 and fr7.
805
806 The rest go on the stack, starting at sp-36, towards lower
807 addresses. 8-byte arguments must be aligned to a 8-byte
808 stack boundary. */
79508e1e
AC
809 if (write_pass)
810 {
1797a8f6 811 write_memory (param_end - param_ptr, param_val, param_len);
2a6228ef
RC
812
813 /* There are some cases when we don't know the type
814 expected by the callee (e.g. for variadic functions), so
815 pass the parameters in both general and fp regs. */
816 if (param_ptr <= 48)
79508e1e 817 {
2a6228ef
RC
818 int grreg = 26 - (param_ptr - 36) / 4;
819 int fpLreg = 72 + (param_ptr - 36) / 4 * 2;
820 int fpreg = 74 + (param_ptr - 32) / 8 * 4;
821
b66f5587
SM
822 regcache->cooked_write (grreg, param_val);
823 regcache->cooked_write (fpLreg, param_val);
2a6228ef 824
79508e1e 825 if (param_len > 4)
2a6228ef 826 {
b66f5587 827 regcache->cooked_write (grreg + 1, param_val + 4);
2a6228ef 828
b66f5587
SM
829 regcache->cooked_write (fpreg, param_val);
830 regcache->cooked_write (fpreg + 1, param_val + 4);
2a6228ef 831 }
79508e1e
AC
832 }
833 }
834 }
835
836 /* Update the various stack pointers. */
837 if (!write_pass)
838 {
2a6228ef 839 struct_end = sp + align_up (struct_ptr, 64);
79508e1e
AC
840 /* PARAM_PTR already accounts for all the arguments passed
841 by the user. However, the ABI mandates minimum stack
842 space allocations for outgoing arguments. The ABI also
843 mandates minimum stack alignments which we must
844 preserve. */
2a6228ef 845 param_end = struct_end + align_up (param_ptr, 64);
79508e1e
AC
846 }
847 }
848
849 /* If a structure has to be returned, set up register 28 to hold its
1777feb0 850 address. */
cf84fa6b 851 if (return_method == return_method_struct)
9c9acae0 852 regcache_cooked_write_unsigned (regcache, 28, struct_addr);
79508e1e 853
e38c262f 854 gp = tdep->find_global_pointer (gdbarch, function);
d49771ef
RC
855
856 if (gp != 0)
9c9acae0 857 regcache_cooked_write_unsigned (regcache, 19, gp);
d49771ef 858
79508e1e 859 /* Set the return address. */
77d18ded
RC
860 if (!gdbarch_push_dummy_code_p (gdbarch))
861 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
79508e1e 862
c4557624 863 /* Update the Stack Pointer. */
34f75cc1 864 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, param_end);
c4557624 865
2a6228ef 866 return param_end;
79508e1e
AC
867}
868
38ca4e0c
MK
869/* The 64-bit PA-RISC calling conventions are documented in "64-Bit
870 Runtime Architecture for PA-RISC 2.0", which is distributed as part
871 as of the HP-UX Software Transition Kit (STK). This implementation
872 is based on version 3.3, dated October 6, 1997. */
2f690297 873
38ca4e0c 874/* Check whether TYPE is an "Integral or Pointer Scalar Type". */
2f690297 875
38ca4e0c
MK
876static int
877hppa64_integral_or_pointer_p (const struct type *type)
878{
78134374 879 switch (type->code ())
38ca4e0c
MK
880 {
881 case TYPE_CODE_INT:
882 case TYPE_CODE_BOOL:
883 case TYPE_CODE_CHAR:
884 case TYPE_CODE_ENUM:
885 case TYPE_CODE_RANGE:
886 {
887 int len = TYPE_LENGTH (type);
888 return (len == 1 || len == 2 || len == 4 || len == 8);
889 }
890 case TYPE_CODE_PTR:
891 case TYPE_CODE_REF:
aa006118 892 case TYPE_CODE_RVALUE_REF:
38ca4e0c
MK
893 return (TYPE_LENGTH (type) == 8);
894 default:
895 break;
896 }
897
898 return 0;
899}
900
901/* Check whether TYPE is a "Floating Scalar Type". */
902
903static int
904hppa64_floating_p (const struct type *type)
905{
78134374 906 switch (type->code ())
38ca4e0c
MK
907 {
908 case TYPE_CODE_FLT:
909 {
910 int len = TYPE_LENGTH (type);
911 return (len == 4 || len == 8 || len == 16);
912 }
913 default:
914 break;
915 }
916
917 return 0;
918}
2f690297 919
1218e655
RC
920/* If CODE points to a function entry address, try to look up the corresponding
921 function descriptor and return its address instead. If CODE is not a
922 function entry address, then just return it unchanged. */
923static CORE_ADDR
e17a4113 924hppa64_convert_code_addr_to_fptr (struct gdbarch *gdbarch, CORE_ADDR code)
1218e655 925{
e17a4113 926 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1218e655
RC
927 struct obj_section *sec, *opd;
928
929 sec = find_pc_section (code);
930
931 if (!sec)
932 return code;
933
934 /* If CODE is in a data section, assume it's already a fptr. */
935 if (!(sec->the_bfd_section->flags & SEC_CODE))
936 return code;
937
938 ALL_OBJFILE_OSECTIONS (sec->objfile, opd)
939 {
940 if (strcmp (opd->the_bfd_section->name, ".opd") == 0)
aded6f54 941 break;
1218e655
RC
942 }
943
944 if (opd < sec->objfile->sections_end)
945 {
946 CORE_ADDR addr;
947
aded6f54
PA
948 for (addr = obj_section_addr (opd);
949 addr < obj_section_endaddr (opd);
950 addr += 2 * 8)
951 {
1218e655 952 ULONGEST opdaddr;
948f8e3d 953 gdb_byte tmp[8];
1218e655
RC
954
955 if (target_read_memory (addr, tmp, sizeof (tmp)))
956 break;
e17a4113 957 opdaddr = extract_unsigned_integer (tmp, sizeof (tmp), byte_order);
1218e655 958
aded6f54 959 if (opdaddr == code)
1218e655
RC
960 return addr - 16;
961 }
962 }
963
964 return code;
965}
966
4a302917 967static CORE_ADDR
7d9b040b 968hppa64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2f690297
AC
969 struct regcache *regcache, CORE_ADDR bp_addr,
970 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
971 function_call_return_method return_method,
972 CORE_ADDR struct_addr)
2f690297 973{
38ca4e0c 974 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 975 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
38ca4e0c
MK
976 int i, offset = 0;
977 CORE_ADDR gp;
2f690297 978
38ca4e0c
MK
979 /* "The outgoing parameter area [...] must be aligned at a 16-byte
980 boundary." */
981 sp = align_up (sp, 16);
2f690297 982
38ca4e0c
MK
983 for (i = 0; i < nargs; i++)
984 {
985 struct value *arg = args[i];
986 struct type *type = value_type (arg);
987 int len = TYPE_LENGTH (type);
0fd88904 988 const bfd_byte *valbuf;
1218e655 989 bfd_byte fptrbuf[8];
38ca4e0c 990 int regnum;
2f690297 991
38ca4e0c
MK
992 /* "Each parameter begins on a 64-bit (8-byte) boundary." */
993 offset = align_up (offset, 8);
77d18ded 994
38ca4e0c 995 if (hppa64_integral_or_pointer_p (type))
2f690297 996 {
38ca4e0c 997 /* "Integral scalar parameters smaller than 64 bits are
dda83cd7
SM
998 padded on the left (i.e., the value is in the
999 least-significant bits of the 64-bit storage unit, and
1000 the high-order bits are undefined)." Therefore we can
1001 safely sign-extend them. */
38ca4e0c 1002 if (len < 8)
449e1137 1003 {
df4df182 1004 arg = value_cast (builtin_type (gdbarch)->builtin_int64, arg);
38ca4e0c
MK
1005 len = 8;
1006 }
1007 }
1008 else if (hppa64_floating_p (type))
1009 {
1010 if (len > 8)
1011 {
1012 /* "Quad-precision (128-bit) floating-point scalar
1013 parameters are aligned on a 16-byte boundary." */
1014 offset = align_up (offset, 16);
1015
1016 /* "Double-extended- and quad-precision floating-point
dda83cd7
SM
1017 parameters within the first 64 bytes of the parameter
1018 list are always passed in general registers." */
449e1137
AC
1019 }
1020 else
1021 {
38ca4e0c 1022 if (len == 4)
449e1137 1023 {
38ca4e0c
MK
1024 /* "Single-precision (32-bit) floating-point scalar
1025 parameters are padded on the left with 32 bits of
1026 garbage (i.e., the floating-point value is in the
1027 least-significant 32 bits of a 64-bit storage
1028 unit)." */
1029 offset += 4;
449e1137 1030 }
38ca4e0c
MK
1031
1032 /* "Single- and double-precision floating-point
dda83cd7
SM
1033 parameters in this area are passed according to the
1034 available formal parameter information in a function
1035 prototype. [...] If no prototype is in scope,
1036 floating-point parameters must be passed both in the
1037 corresponding general registers and in the
1038 corresponding floating-point registers." */
38ca4e0c
MK
1039 regnum = HPPA64_FP4_REGNUM + offset / 8;
1040
1041 if (regnum < HPPA64_FP4_REGNUM + 8)
449e1137 1042 {
38ca4e0c
MK
1043 /* "Single-precision floating-point parameters, when
1044 passed in floating-point registers, are passed in
1045 the right halves of the floating point registers;
1046 the left halves are unused." */
e4c4a59b
SM
1047 regcache->cooked_write_part (regnum, offset % 8, len,
1048 value_contents (arg));
449e1137
AC
1049 }
1050 }
2f690297 1051 }
38ca4e0c 1052 else
2f690297 1053 {
38ca4e0c
MK
1054 if (len > 8)
1055 {
1056 /* "Aggregates larger than 8 bytes are aligned on a
1057 16-byte boundary, possibly leaving an unused argument
1777feb0 1058 slot, which is filled with garbage. If necessary,
38ca4e0c
MK
1059 they are padded on the right (with garbage), to a
1060 multiple of 8 bytes." */
1061 offset = align_up (offset, 16);
1062 }
1063 }
1064
1218e655 1065 /* If we are passing a function pointer, make sure we pass a function
dda83cd7 1066 descriptor instead of the function entry address. */
78134374 1067 if (type->code () == TYPE_CODE_PTR
dda83cd7
SM
1068 && TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC)
1069 {
1218e655
RC
1070 ULONGEST codeptr, fptr;
1071
1072 codeptr = unpack_long (type, value_contents (arg));
e17a4113
UW
1073 fptr = hppa64_convert_code_addr_to_fptr (gdbarch, codeptr);
1074 store_unsigned_integer (fptrbuf, TYPE_LENGTH (type), byte_order,
1075 fptr);
1218e655
RC
1076 valbuf = fptrbuf;
1077 }
1078 else
dda83cd7
SM
1079 {
1080 valbuf = value_contents (arg);
1218e655
RC
1081 }
1082
38ca4e0c 1083 /* Always store the argument in memory. */
1218e655 1084 write_memory (sp + offset, valbuf, len);
38ca4e0c 1085
38ca4e0c
MK
1086 regnum = HPPA_ARG0_REGNUM - offset / 8;
1087 while (regnum > HPPA_ARG0_REGNUM - 8 && len > 0)
1088 {
e4c4a59b
SM
1089 regcache->cooked_write_part (regnum, offset % 8, std::min (len, 8),
1090 valbuf);
325fac50
PA
1091 offset += std::min (len, 8);
1092 valbuf += std::min (len, 8);
1093 len -= std::min (len, 8);
38ca4e0c 1094 regnum--;
2f690297 1095 }
38ca4e0c
MK
1096
1097 offset += len;
2f690297
AC
1098 }
1099
38ca4e0c
MK
1100 /* Set up GR29 (%ret1) to hold the argument pointer (ap). */
1101 regcache_cooked_write_unsigned (regcache, HPPA_RET1_REGNUM, sp + 64);
1102
1103 /* Allocate the outgoing parameter area. Make sure the outgoing
1104 parameter area is multiple of 16 bytes in length. */
325fac50 1105 sp += std::max (align_up (offset, 16), (ULONGEST) 64);
38ca4e0c
MK
1106
1107 /* Allocate 32-bytes of scratch space. The documentation doesn't
1108 mention this, but it seems to be needed. */
1109 sp += 32;
1110
1111 /* Allocate the frame marker area. */
1112 sp += 16;
1113
1114 /* If a structure has to be returned, set up GR 28 (%ret0) to hold
1115 its address. */
cf84fa6b 1116 if (return_method == return_method_struct)
38ca4e0c 1117 regcache_cooked_write_unsigned (regcache, HPPA_RET0_REGNUM, struct_addr);
2f690297 1118
38ca4e0c 1119 /* Set up GR27 (%dp) to hold the global pointer (gp). */
e38c262f 1120 gp = tdep->find_global_pointer (gdbarch, function);
77d18ded 1121 if (gp != 0)
38ca4e0c 1122 regcache_cooked_write_unsigned (regcache, HPPA_DP_REGNUM, gp);
77d18ded 1123
38ca4e0c 1124 /* Set up GR2 (%rp) to hold the return pointer (rp). */
77d18ded
RC
1125 if (!gdbarch_push_dummy_code_p (gdbarch))
1126 regcache_cooked_write_unsigned (regcache, HPPA_RP_REGNUM, bp_addr);
2f690297 1127
38ca4e0c
MK
1128 /* Set up GR30 to hold the stack pointer (sp). */
1129 regcache_cooked_write_unsigned (regcache, HPPA_SP_REGNUM, sp);
c4557624 1130
38ca4e0c 1131 return sp;
2f690297 1132}
38ca4e0c 1133\f
2f690297 1134
08a27113
MK
1135/* Handle 32/64-bit struct return conventions. */
1136
1137static enum return_value_convention
6a3a010b 1138hppa32_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1139 struct type *type, struct regcache *regcache,
e127f0db 1140 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1141{
1142 if (TYPE_LENGTH (type) <= 2 * 4)
1143 {
1144 /* The value always lives in the right hand end of the register
1145 (or register pair)? */
1146 int b;
78134374 1147 int reg = type->code () == TYPE_CODE_FLT ? HPPA_FP4_REGNUM : 28;
08a27113
MK
1148 int part = TYPE_LENGTH (type) % 4;
1149 /* The left hand register contains only part of the value,
1150 transfer that first so that the rest can be xfered as entire
1151 4-byte registers. */
1152 if (part > 0)
1153 {
1154 if (readbuf != NULL)
73bb0000 1155 regcache->cooked_read_part (reg, 4 - part, part, readbuf);
08a27113 1156 if (writebuf != NULL)
e4c4a59b 1157 regcache->cooked_write_part (reg, 4 - part, part, writebuf);
08a27113
MK
1158 reg++;
1159 }
1160 /* Now transfer the remaining register values. */
1161 for (b = part; b < TYPE_LENGTH (type); b += 4)
1162 {
1163 if (readbuf != NULL)
dca08e1f 1164 regcache->cooked_read (reg, readbuf + b);
08a27113 1165 if (writebuf != NULL)
b66f5587 1166 regcache->cooked_write (reg, writebuf + b);
08a27113
MK
1167 reg++;
1168 }
1169 return RETURN_VALUE_REGISTER_CONVENTION;
1170 }
1171 else
1172 return RETURN_VALUE_STRUCT_CONVENTION;
1173}
1174
1175static enum return_value_convention
6a3a010b 1176hppa64_return_value (struct gdbarch *gdbarch, struct value *function,
08a27113 1177 struct type *type, struct regcache *regcache,
e127f0db 1178 gdb_byte *readbuf, const gdb_byte *writebuf)
08a27113
MK
1179{
1180 int len = TYPE_LENGTH (type);
1181 int regnum, offset;
1182
bad43aa5 1183 if (len > 16)
08a27113 1184 {
85102364 1185 /* All return values larger than 128 bits must be aggregate
dda83cd7 1186 return values. */
9738b034
MK
1187 gdb_assert (!hppa64_integral_or_pointer_p (type));
1188 gdb_assert (!hppa64_floating_p (type));
08a27113
MK
1189
1190 /* "Aggregate return values larger than 128 bits are returned in
1191 a buffer allocated by the caller. The address of the buffer
1192 must be passed in GR 28." */
1193 return RETURN_VALUE_STRUCT_CONVENTION;
1194 }
1195
1196 if (hppa64_integral_or_pointer_p (type))
1197 {
1198 /* "Integral return values are returned in GR 28. Values
dda83cd7 1199 smaller than 64 bits are padded on the left (with garbage)." */
08a27113
MK
1200 regnum = HPPA_RET0_REGNUM;
1201 offset = 8 - len;
1202 }
1203 else if (hppa64_floating_p (type))
1204 {
1205 if (len > 8)
1206 {
1207 /* "Double-extended- and quad-precision floating-point
1208 values are returned in GRs 28 and 29. The sign,
1209 exponent, and most-significant bits of the mantissa are
1210 returned in GR 28; the least-significant bits of the
1211 mantissa are passed in GR 29. For double-extended
1212 precision values, GR 29 is padded on the right with 48
1213 bits of garbage." */
1214 regnum = HPPA_RET0_REGNUM;
1215 offset = 0;
1216 }
1217 else
1218 {
1219 /* "Single-precision and double-precision floating-point
1220 return values are returned in FR 4R (single precision) or
1221 FR 4 (double-precision)." */
1222 regnum = HPPA64_FP4_REGNUM;
1223 offset = 8 - len;
1224 }
1225 }
1226 else
1227 {
1228 /* "Aggregate return values up to 64 bits in size are returned
dda83cd7
SM
1229 in GR 28. Aggregates smaller than 64 bits are left aligned
1230 in the register; the pad bits on the right are undefined."
08a27113
MK
1231
1232 "Aggregate return values between 65 and 128 bits are returned
1233 in GRs 28 and 29. The first 64 bits are placed in GR 28, and
1234 the remaining bits are placed, left aligned, in GR 29. The
1235 pad bits on the right of GR 29 (if any) are undefined." */
1236 regnum = HPPA_RET0_REGNUM;
1237 offset = 0;
1238 }
1239
1240 if (readbuf)
1241 {
08a27113
MK
1242 while (len > 0)
1243 {
73bb0000
SM
1244 regcache->cooked_read_part (regnum, offset, std::min (len, 8),
1245 readbuf);
325fac50
PA
1246 readbuf += std::min (len, 8);
1247 len -= std::min (len, 8);
08a27113
MK
1248 regnum++;
1249 }
1250 }
1251
1252 if (writebuf)
1253 {
08a27113
MK
1254 while (len > 0)
1255 {
e4c4a59b
SM
1256 regcache->cooked_write_part (regnum, offset, std::min (len, 8),
1257 writebuf);
325fac50
PA
1258 writebuf += std::min (len, 8);
1259 len -= std::min (len, 8);
08a27113
MK
1260 regnum++;
1261 }
1262 }
1263
1264 return RETURN_VALUE_REGISTER_CONVENTION;
1265}
1266\f
1267
d49771ef 1268static CORE_ADDR
a7aad9aa 1269hppa32_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
d49771ef
RC
1270 struct target_ops *targ)
1271{
1272 if (addr & 2)
1273 {
0dfff4cb 1274 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
a7aad9aa 1275 CORE_ADDR plabel = addr & ~3;
0dfff4cb 1276 return read_memory_typed_address (plabel, func_ptr_type);
d49771ef
RC
1277 }
1278
1279 return addr;
1280}
1281
1797a8f6
AC
1282static CORE_ADDR
1283hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1284{
1285 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1286 and not _bit_)! */
1287 return align_up (addr, 64);
1288}
1289
2f690297
AC
1290/* Force all frames to 16-byte alignment. Better safe than sorry. */
1291
1292static CORE_ADDR
1797a8f6 1293hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2f690297
AC
1294{
1295 /* Just always 16-byte align. */
1296 return align_up (addr, 16);
1297}
1298
cb8c24b6 1299static CORE_ADDR
c113ed0c 1300hppa_read_pc (readable_regcache *regcache)
c906108c 1301{
cc72850f 1302 ULONGEST ipsw;
61a1198a 1303 ULONGEST pc;
c906108c 1304
c113ed0c
YQ
1305 regcache->cooked_read (HPPA_IPSW_REGNUM, &ipsw);
1306 regcache->cooked_read (HPPA_PCOQ_HEAD_REGNUM, &pc);
fe46cd3a
RC
1307
1308 /* If the current instruction is nullified, then we are effectively
1309 still executing the previous instruction. Pretend we are still
cc72850f
MK
1310 there. This is needed when single stepping; if the nullified
1311 instruction is on a different line, we don't want GDB to think
1312 we've stepped onto that line. */
fe46cd3a
RC
1313 if (ipsw & 0x00200000)
1314 pc -= 4;
1315
cc72850f 1316 return pc & ~0x3;
c906108c
SS
1317}
1318
cc72850f 1319void
61a1198a 1320hppa_write_pc (struct regcache *regcache, CORE_ADDR pc)
c906108c 1321{
61a1198a
UW
1322 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_HEAD_REGNUM, pc);
1323 regcache_cooked_write_unsigned (regcache, HPPA_PCOQ_TAIL_REGNUM, pc + 4);
c906108c
SS
1324}
1325
c906108c 1326/* For the given instruction (INST), return any adjustment it makes
1777feb0 1327 to the stack pointer or zero for no adjustment.
c906108c
SS
1328
1329 This only handles instructions commonly found in prologues. */
1330
1331static int
fba45db2 1332prologue_inst_adjust_sp (unsigned long inst)
c906108c
SS
1333{
1334 /* This must persist across calls. */
1335 static int save_high21;
1336
1337 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1338 if ((inst & 0xffffc000) == 0x37de0000)
abc485a1 1339 return hppa_extract_14 (inst);
c906108c
SS
1340
1341 /* stwm X,D(sp) */
1342 if ((inst & 0xffe00000) == 0x6fc00000)
abc485a1 1343 return hppa_extract_14 (inst);
c906108c 1344
104c1213
JM
1345 /* std,ma X,D(sp) */
1346 if ((inst & 0xffe00008) == 0x73c00008)
66c6502d 1347 return (inst & 0x1 ? -(1 << 13) : 0) | (((inst >> 4) & 0x3ff) << 3);
104c1213 1348
e22b26cb 1349 /* addil high21,%r30; ldo low11,(%r1),%r30)
c906108c 1350 save high bits in save_high21 for later use. */
e22b26cb 1351 if ((inst & 0xffe00000) == 0x2bc00000)
c906108c 1352 {
abc485a1 1353 save_high21 = hppa_extract_21 (inst);
c906108c
SS
1354 return 0;
1355 }
1356
1357 if ((inst & 0xffff0000) == 0x343e0000)
abc485a1 1358 return save_high21 + hppa_extract_14 (inst);
c906108c
SS
1359
1360 /* fstws as used by the HP compilers. */
1361 if ((inst & 0xffffffe0) == 0x2fd01220)
abc485a1 1362 return hppa_extract_5_load (inst);
c906108c
SS
1363
1364 /* No adjustment. */
1365 return 0;
1366}
1367
1368/* Return nonzero if INST is a branch of some kind, else return zero. */
1369
1370static int
fba45db2 1371is_branch (unsigned long inst)
c906108c
SS
1372{
1373 switch (inst >> 26)
1374 {
1375 case 0x20:
1376 case 0x21:
1377 case 0x22:
1378 case 0x23:
7be570e7 1379 case 0x27:
c906108c
SS
1380 case 0x28:
1381 case 0x29:
1382 case 0x2a:
1383 case 0x2b:
7be570e7 1384 case 0x2f:
c906108c
SS
1385 case 0x30:
1386 case 0x31:
1387 case 0x32:
1388 case 0x33:
1389 case 0x38:
1390 case 0x39:
1391 case 0x3a:
7be570e7 1392 case 0x3b:
c906108c
SS
1393 return 1;
1394
1395 default:
1396 return 0;
1397 }
1398}
1399
1400/* Return the register number for a GR which is saved by INST or
b35018fd 1401 zero if INST does not save a GR.
c906108c 1402
b35018fd 1403 Referenced from:
7be570e7 1404
b35018fd
CG
1405 parisc 1.1:
1406 https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
c906108c 1407
b35018fd
CG
1408 parisc 2.0:
1409 https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
c906108c 1410
b35018fd
CG
1411 According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
1412 on page 106 in parisc 2.0, all instructions for storing values from
1413 the general registers are:
c5aa993b 1414
b35018fd 1415 Store: stb, sth, stw, std (according to Chapter 7, they
dda83cd7 1416 are only in both "inst >> 26" and "inst >> 6".
b35018fd 1417 Store Absolute: stwa, stda (according to Chapter 7, they are only
dda83cd7 1418 in "inst >> 6".
b35018fd 1419 Store Bytes: stby, stdby (according to Chapter 7, they are
dda83cd7 1420 only in "inst >> 6").
b35018fd
CG
1421
1422 For (inst >> 26), according to Chapter 7:
1423
1424 The effective memory reference address is formed by the addition
1425 of an immediate displacement to a base value.
1426
1427 - stb: 0x18, store a byte from a general register.
1428
1429 - sth: 0x19, store a halfword from a general register.
1430
1431 - stw: 0x1a, store a word from a general register.
1432
1433 - stwm: 0x1b, store a word from a general register and perform base
85102364 1434 register modification (2.0 will still treat it as stw).
b35018fd
CG
1435
1436 - std: 0x1c, store a doubleword from a general register (2.0 only).
1437
1438 - stw: 0x1f, store a word from a general register (2.0 only).
1439
1440 For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
1441
1442 The effective memory reference address is formed by the addition
1443 of an index value to a base value specified in the instruction.
1444
1445 - stb: 0x08, store a byte from a general register (1.1 calls stbs).
1446
1447 - sth: 0x09, store a halfword from a general register (1.1 calls
1448 sths).
1449
1450 - stw: 0x0a, store a word from a general register (1.1 calls stws).
1451
1452 - std: 0x0b: store a doubleword from a general register (2.0 only)
1453
1454 Implement fast byte moves (stores) to unaligned word or doubleword
1455 destination.
1456
1457 - stby: 0x0c, for unaligned word (1.1 calls stbys).
1458
1459 - stdby: 0x0d for unaligned doubleword (2.0 only).
1460
1461 Store a word or doubleword using an absolute memory address formed
1462 using short or long displacement or indexed
1463
1464 - stwa: 0x0e, store a word from a general register to an absolute
1465 address (1.0 calls stwas).
1466
1467 - stda: 0x0f, store a doubleword from a general register to an
1468 absolute address (2.0 only). */
1469
1470static int
1471inst_saves_gr (unsigned long inst)
1472{
1473 switch ((inst >> 26) & 0x0f)
1474 {
1475 case 0x03:
1476 switch ((inst >> 6) & 0x0f)
1477 {
1478 case 0x08:
1479 case 0x09:
1480 case 0x0a:
1481 case 0x0b:
1482 case 0x0c:
1483 case 0x0d:
1484 case 0x0e:
1485 case 0x0f:
1486 return hppa_extract_5R_store (inst);
1487 default:
1488 return 0;
1489 }
1490 case 0x18:
1491 case 0x19:
1492 case 0x1a:
1493 case 0x1b:
1494 case 0x1c:
1495 /* no 0x1d or 0x1e -- according to parisc 2.0 document */
1496 case 0x1f:
1497 return hppa_extract_5R_store (inst);
1498 default:
1499 return 0;
1500 }
c906108c
SS
1501}
1502
1503/* Return the register number for a FR which is saved by INST or
1504 zero it INST does not save a FR.
1505
1506 Note we only care about full 64bit register stores (that's the only
1507 kind of stores the prologue will use).
1508
1509 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1510
1511static int
fba45db2 1512inst_saves_fr (unsigned long inst)
c906108c 1513{
1777feb0 1514 /* Is this an FSTD? */
c906108c 1515 if ((inst & 0xfc00dfc0) == 0x2c001200)
abc485a1 1516 return hppa_extract_5r_store (inst);
7be570e7 1517 if ((inst & 0xfc000002) == 0x70000002)
abc485a1 1518 return hppa_extract_5R_store (inst);
1777feb0 1519 /* Is this an FSTW? */
c906108c 1520 if ((inst & 0xfc00df80) == 0x24001200)
abc485a1 1521 return hppa_extract_5r_store (inst);
7be570e7 1522 if ((inst & 0xfc000002) == 0x7c000000)
abc485a1 1523 return hppa_extract_5R_store (inst);
c906108c
SS
1524 return 0;
1525}
1526
1527/* Advance PC across any function entry prologue instructions
1777feb0 1528 to reach some "real" code.
c906108c
SS
1529
1530 Use information in the unwind table to determine what exactly should
1531 be in the prologue. */
1532
1533
a71f8c30 1534static CORE_ADDR
be8626e0
MD
1535skip_prologue_hard_way (struct gdbarch *gdbarch, CORE_ADDR pc,
1536 int stop_before_branch)
c906108c 1537{
e17a4113 1538 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
e362b510 1539 gdb_byte buf[4];
c906108c
SS
1540 CORE_ADDR orig_pc = pc;
1541 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1542 unsigned long args_stored, status, i, restart_gr, restart_fr;
1543 struct unwind_table_entry *u;
a71f8c30 1544 int final_iteration;
c906108c
SS
1545
1546 restart_gr = 0;
1547 restart_fr = 0;
1548
1549restart:
1550 u = find_unwind_entry (pc);
1551 if (!u)
1552 return pc;
1553
1777feb0 1554 /* If we are not at the beginning of a function, then return now. */
c906108c
SS
1555 if ((pc & ~0x3) != u->region_start)
1556 return pc;
1557
1558 /* This is how much of a frame adjustment we need to account for. */
1559 stack_remaining = u->Total_frame_size << 3;
1560
1561 /* Magic register saves we want to know about. */
1562 save_rp = u->Save_RP;
1563 save_sp = u->Save_SP;
1564
1565 /* An indication that args may be stored into the stack. Unfortunately
1566 the HPUX compilers tend to set this in cases where no args were
1567 stored too!. */
1568 args_stored = 1;
1569
1570 /* Turn the Entry_GR field into a bitmask. */
1571 save_gr = 0;
1572 for (i = 3; i < u->Entry_GR + 3; i++)
1573 {
1574 /* Frame pointer gets saved into a special location. */
eded0a31 1575 if (u->Save_SP && i == HPPA_FP_REGNUM)
c906108c
SS
1576 continue;
1577
1578 save_gr |= (1 << i);
1579 }
1580 save_gr &= ~restart_gr;
1581
1582 /* Turn the Entry_FR field into a bitmask too. */
1583 save_fr = 0;
1584 for (i = 12; i < u->Entry_FR + 12; i++)
1585 save_fr |= (1 << i);
1586 save_fr &= ~restart_fr;
1587
a71f8c30
RC
1588 final_iteration = 0;
1589
c906108c
SS
1590 /* Loop until we find everything of interest or hit a branch.
1591
1592 For unoptimized GCC code and for any HP CC code this will never ever
1593 examine any user instructions.
1594
85102364 1595 For optimized GCC code we're faced with problems. GCC will schedule
c906108c
SS
1596 its prologue and make prologue instructions available for delay slot
1597 filling. The end result is user code gets mixed in with the prologue
1598 and a prologue instruction may be in the delay slot of the first branch
1599 or call.
1600
1601 Some unexpected things are expected with debugging optimized code, so
1602 we allow this routine to walk past user instructions in optimized
1603 GCC code. */
1604 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1605 || args_stored)
1606 {
1607 unsigned int reg_num;
1608 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1609 unsigned long old_save_rp, old_save_sp, next_inst;
1610
1611 /* Save copies of all the triggers so we can compare them later
dda83cd7 1612 (only for HPC). */
c906108c
SS
1613 old_save_gr = save_gr;
1614 old_save_fr = save_fr;
1615 old_save_rp = save_rp;
1616 old_save_sp = save_sp;
1617 old_stack_remaining = stack_remaining;
1618
8defab1a 1619 status = target_read_memory (pc, buf, 4);
e17a4113 1620 inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1621
c906108c
SS
1622 /* Yow! */
1623 if (status != 0)
1624 return pc;
1625
1626 /* Note the interesting effects of this instruction. */
1627 stack_remaining -= prologue_inst_adjust_sp (inst);
1628
7be570e7
JM
1629 /* There are limited ways to store the return pointer into the
1630 stack. */
c4c79048 1631 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1 || inst == 0x73c23fe1)
c906108c
SS
1632 save_rp = 0;
1633
104c1213 1634 /* These are the only ways we save SP into the stack. At this time
dda83cd7 1635 the HP compilers never bother to save SP into the stack. */
104c1213
JM
1636 if ((inst & 0xffffc000) == 0x6fc10000
1637 || (inst & 0xffffc00c) == 0x73c10008)
c906108c
SS
1638 save_sp = 0;
1639
6426a772 1640 /* Are we loading some register with an offset from the argument
dda83cd7 1641 pointer? */
6426a772
JM
1642 if ((inst & 0xffe00000) == 0x37a00000
1643 || (inst & 0xffffffe0) == 0x081d0240)
1644 {
1645 pc += 4;
1646 continue;
1647 }
1648
c906108c
SS
1649 /* Account for general and floating-point register saves. */
1650 reg_num = inst_saves_gr (inst);
1651 save_gr &= ~(1 << reg_num);
1652
1653 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1654 Unfortunately args_stored only tells us that some arguments
1655 where stored into the stack. Not how many or what kind!
c906108c 1656
dda83cd7
SM
1657 This is a kludge as on the HP compiler sets this bit and it
1658 never does prologue scheduling. So once we see one, skip past
1659 all of them. We have similar code for the fp arg stores below.
c906108c 1660
dda83cd7
SM
1661 FIXME. Can still die if we have a mix of GR and FR argument
1662 stores! */
be8626e0 1663 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1664 && reg_num <= 26)
c906108c 1665 {
be8626e0 1666 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23)
819844ad 1667 && reg_num <= 26)
c906108c
SS
1668 {
1669 pc += 4;
8defab1a 1670 status = target_read_memory (pc, buf, 4);
e17a4113 1671 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1672 if (status != 0)
1673 return pc;
1674 reg_num = inst_saves_gr (inst);
1675 }
1676 args_stored = 0;
1677 continue;
1678 }
1679
1680 reg_num = inst_saves_fr (inst);
1681 save_fr &= ~(1 << reg_num);
1682
8defab1a 1683 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1684 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c5aa993b 1685
c906108c
SS
1686 /* Yow! */
1687 if (status != 0)
1688 return pc;
1689
1690 /* We've got to be read to handle the ldo before the fp register
dda83cd7 1691 save. */
c906108c
SS
1692 if ((inst & 0xfc000000) == 0x34000000
1693 && inst_saves_fr (next_inst) >= 4
819844ad 1694 && inst_saves_fr (next_inst)
be8626e0 1695 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1696 {
1697 /* So we drop into the code below in a reasonable state. */
1698 reg_num = inst_saves_fr (next_inst);
1699 pc -= 4;
1700 }
1701
1702 /* Ugh. Also account for argument stores into the stack.
dda83cd7
SM
1703 This is a kludge as on the HP compiler sets this bit and it
1704 never does prologue scheduling. So once we see one, skip past
1705 all of them. */
819844ad 1706 if (reg_num >= 4
be8626e0 1707 && reg_num <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c 1708 {
819844ad
UW
1709 while (reg_num >= 4
1710 && reg_num
be8626e0 1711 <= (gdbarch_ptr_bit (gdbarch) == 64 ? 11 : 7))
c906108c
SS
1712 {
1713 pc += 8;
8defab1a 1714 status = target_read_memory (pc, buf, 4);
e17a4113 1715 inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1716 if (status != 0)
1717 return pc;
1718 if ((inst & 0xfc000000) != 0x34000000)
1719 break;
8defab1a 1720 status = target_read_memory (pc + 4, buf, 4);
e17a4113 1721 next_inst = extract_unsigned_integer (buf, 4, byte_order);
c906108c
SS
1722 if (status != 0)
1723 return pc;
1724 reg_num = inst_saves_fr (next_inst);
1725 }
1726 args_stored = 0;
1727 continue;
1728 }
1729
1730 /* Quit if we hit any kind of branch. This can happen if a prologue
dda83cd7 1731 instruction is in the delay slot of the first call/branch. */
a71f8c30 1732 if (is_branch (inst) && stop_before_branch)
c906108c
SS
1733 break;
1734
1735 /* What a crock. The HP compilers set args_stored even if no
dda83cd7
SM
1736 arguments were stored into the stack (boo hiss). This could
1737 cause this code to then skip a bunch of user insns (up to the
1738 first branch).
1739
1740 To combat this we try to identify when args_stored was bogusly
1741 set and clear it. We only do this when args_stored is nonzero,
1742 all other resources are accounted for, and nothing changed on
1743 this pass. */
c906108c 1744 if (args_stored
c5aa993b 1745 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
c906108c
SS
1746 && old_save_gr == save_gr && old_save_fr == save_fr
1747 && old_save_rp == save_rp && old_save_sp == save_sp
1748 && old_stack_remaining == stack_remaining)
1749 break;
c5aa993b 1750
c906108c
SS
1751 /* Bump the PC. */
1752 pc += 4;
a71f8c30
RC
1753
1754 /* !stop_before_branch, so also look at the insn in the delay slot
dda83cd7 1755 of the branch. */
a71f8c30
RC
1756 if (final_iteration)
1757 break;
1758 if (is_branch (inst))
1759 final_iteration = 1;
c906108c
SS
1760 }
1761
85102364 1762 /* We've got a tentative location for the end of the prologue. However
c906108c
SS
1763 because of limitations in the unwind descriptor mechanism we may
1764 have went too far into user code looking for the save of a register
1765 that does not exist. So, if there registers we expected to be saved
1766 but never were, mask them out and restart.
1767
1768 This should only happen in optimized code, and should be very rare. */
c5aa993b 1769 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
c906108c
SS
1770 {
1771 pc = orig_pc;
1772 restart_gr = save_gr;
1773 restart_fr = save_fr;
1774 goto restart;
1775 }
1776
1777 return pc;
1778}
1779
1780
7be570e7
JM
1781/* Return the address of the PC after the last prologue instruction if
1782 we can determine it from the debug symbols. Else return zero. */
c906108c
SS
1783
1784static CORE_ADDR
fba45db2 1785after_prologue (CORE_ADDR pc)
c906108c
SS
1786{
1787 struct symtab_and_line sal;
1788 CORE_ADDR func_addr, func_end;
c906108c 1789
7be570e7
JM
1790 /* If we can not find the symbol in the partial symbol table, then
1791 there is no hope we can determine the function's start address
1792 with this code. */
c906108c 1793 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
7be570e7 1794 return 0;
c906108c 1795
7be570e7 1796 /* Get the line associated with FUNC_ADDR. */
c906108c
SS
1797 sal = find_pc_line (func_addr, 0);
1798
7be570e7
JM
1799 /* There are only two cases to consider. First, the end of the source line
1800 is within the function bounds. In that case we return the end of the
1801 source line. Second is the end of the source line extends beyond the
1802 bounds of the current function. We need to use the slow code to
1777feb0 1803 examine instructions in that case.
c906108c 1804
7be570e7
JM
1805 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1806 the wrong thing to do. In fact, it should be entirely possible for this
1807 function to always return zero since the slow instruction scanning code
1808 is supposed to *always* work. If it does not, then it is a bug. */
1809 if (sal.end < func_end)
1810 return sal.end;
c5aa993b 1811 else
7be570e7 1812 return 0;
c906108c
SS
1813}
1814
1815/* To skip prologues, I use this predicate. Returns either PC itself
1816 if the code at PC does not look like a function prologue; otherwise
1777feb0 1817 returns an address that (if we're lucky) follows the prologue.
a71f8c30
RC
1818
1819 hppa_skip_prologue is called by gdb to place a breakpoint in a function.
1777feb0 1820 It doesn't necessarily skips all the insns in the prologue. In fact
a71f8c30
RC
1821 we might not want to skip all the insns because a prologue insn may
1822 appear in the delay slot of the first branch, and we don't want to
1823 skip over the branch in that case. */
c906108c 1824
8d153463 1825static CORE_ADDR
6093d2eb 1826hppa_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
c906108c 1827{
c5aa993b 1828 CORE_ADDR post_prologue_pc;
c906108c 1829
c5aa993b
JM
1830 /* See if we can determine the end of the prologue via the symbol table.
1831 If so, then return either PC, or the PC after the prologue, whichever
1832 is greater. */
c906108c 1833
c5aa993b 1834 post_prologue_pc = after_prologue (pc);
c906108c 1835
7be570e7
JM
1836 /* If after_prologue returned a useful address, then use it. Else
1837 fall back on the instruction skipping code.
1838
1839 Some folks have claimed this causes problems because the breakpoint
1840 may be the first instruction of the prologue. If that happens, then
1841 the instruction skipping code has a bug that needs to be fixed. */
c5aa993b 1842 if (post_prologue_pc != 0)
325fac50 1843 return std::max (pc, post_prologue_pc);
c5aa993b 1844 else
be8626e0 1845 return (skip_prologue_hard_way (gdbarch, pc, 1));
c906108c
SS
1846}
1847
29d375ac 1848/* Return an unwind entry that falls within the frame's code block. */
227e86ad 1849
29d375ac 1850static struct unwind_table_entry *
227e86ad 1851hppa_find_unwind_entry_in_block (struct frame_info *this_frame)
29d375ac 1852{
227e86ad 1853 CORE_ADDR pc = get_frame_address_in_block (this_frame);
93d42b30
DJ
1854
1855 /* FIXME drow/20070101: Calling gdbarch_addr_bits_remove on the
ad1193e7 1856 result of get_frame_address_in_block implies a problem.
93d42b30 1857 The bits should have been removed earlier, before the return
c7ce8faa 1858 value of gdbarch_unwind_pc. That might be happening already;
93d42b30
DJ
1859 if it isn't, it should be fixed. Then this call can be
1860 removed. */
227e86ad 1861 pc = gdbarch_addr_bits_remove (get_frame_arch (this_frame), pc);
29d375ac
RC
1862 return find_unwind_entry (pc);
1863}
1864
26d08f08
AC
1865struct hppa_frame_cache
1866{
1867 CORE_ADDR base;
098caef4 1868 trad_frame_saved_reg *saved_regs;
26d08f08
AC
1869};
1870
1871static struct hppa_frame_cache *
227e86ad 1872hppa_frame_cache (struct frame_info *this_frame, void **this_cache)
26d08f08 1873{
227e86ad 1874 struct gdbarch *gdbarch = get_frame_arch (this_frame);
e17a4113
UW
1875 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1876 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
26d08f08
AC
1877 struct hppa_frame_cache *cache;
1878 long saved_gr_mask;
1879 long saved_fr_mask;
26d08f08
AC
1880 long frame_size;
1881 struct unwind_table_entry *u;
9f7194c3 1882 CORE_ADDR prologue_end;
50b2f48a 1883 int fp_in_r1 = 0;
26d08f08
AC
1884 int i;
1885
369aa520
RC
1886 if (hppa_debug)
1887 fprintf_unfiltered (gdb_stdlog, "{ hppa_frame_cache (frame=%d) -> ",
227e86ad 1888 frame_relative_level(this_frame));
369aa520 1889
26d08f08 1890 if ((*this_cache) != NULL)
369aa520
RC
1891 {
1892 if (hppa_debug)
dda83cd7
SM
1893 fprintf_unfiltered (gdb_stdlog, "base=%s (cached) }",
1894 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 1895 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1896 }
26d08f08
AC
1897 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
1898 (*this_cache) = cache;
227e86ad 1899 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
26d08f08
AC
1900
1901 /* Yow! */
227e86ad 1902 u = hppa_find_unwind_entry_in_block (this_frame);
26d08f08 1903 if (!u)
369aa520
RC
1904 {
1905 if (hppa_debug)
dda83cd7 1906 fprintf_unfiltered (gdb_stdlog, "base=NULL (no unwind entry) }");
9a3c8263 1907 return (struct hppa_frame_cache *) (*this_cache);
369aa520 1908 }
26d08f08
AC
1909
1910 /* Turn the Entry_GR field into a bitmask. */
1911 saved_gr_mask = 0;
1912 for (i = 3; i < u->Entry_GR + 3; i++)
1913 {
1914 /* Frame pointer gets saved into a special location. */
eded0a31 1915 if (u->Save_SP && i == HPPA_FP_REGNUM)
26d08f08
AC
1916 continue;
1917
1918 saved_gr_mask |= (1 << i);
1919 }
1920
1921 /* Turn the Entry_FR field into a bitmask too. */
1922 saved_fr_mask = 0;
1923 for (i = 12; i < u->Entry_FR + 12; i++)
1924 saved_fr_mask |= (1 << i);
1925
1926 /* Loop until we find everything of interest or hit a branch.
1927
1928 For unoptimized GCC code and for any HP CC code this will never ever
1929 examine any user instructions.
1930
1931 For optimized GCC code we're faced with problems. GCC will schedule
1932 its prologue and make prologue instructions available for delay slot
1933 filling. The end result is user code gets mixed in with the prologue
1934 and a prologue instruction may be in the delay slot of the first branch
1935 or call.
1936
1937 Some unexpected things are expected with debugging optimized code, so
1938 we allow this routine to walk past user instructions in optimized
1939 GCC code. */
1940 {
1941 int final_iteration = 0;
46acf081 1942 CORE_ADDR pc, start_pc, end_pc;
26d08f08
AC
1943 int looking_for_sp = u->Save_SP;
1944 int looking_for_rp = u->Save_RP;
1945 int fp_loc = -1;
9f7194c3 1946
a71f8c30 1947 /* We have to use skip_prologue_hard_way instead of just
9f7194c3
RC
1948 skip_prologue_using_sal, in case we stepped into a function without
1949 symbol information. hppa_skip_prologue also bounds the returned
1950 pc by the passed in pc, so it will not return a pc in the next
1777feb0 1951 function.
a71f8c30
RC
1952
1953 We used to call hppa_skip_prologue to find the end of the prologue,
1954 but if some non-prologue instructions get scheduled into the prologue,
1955 and the program is compiled with debug information, the "easy" way
1956 in hppa_skip_prologue will return a prologue end that is too early
1957 for us to notice any potential frame adjustments. */
d5c27f81 1958
ef02daa9
DJ
1959 /* We used to use get_frame_func to locate the beginning of the
1960 function to pass to skip_prologue. However, when objects are
1961 compiled without debug symbols, get_frame_func can return the wrong
1777feb0 1962 function (or 0). We can do better than that by using unwind records.
46acf081 1963 This only works if the Region_description of the unwind record
1777feb0 1964 indicates that it includes the entry point of the function.
46acf081
RC
1965 HP compilers sometimes generate unwind records for regions that
1966 do not include the entry or exit point of a function. GNU tools
1967 do not do this. */
1968
1969 if ((u->Region_description & 0x2) == 0)
1970 start_pc = u->region_start;
1971 else
227e86ad 1972 start_pc = get_frame_func (this_frame);
d5c27f81 1973
be8626e0 1974 prologue_end = skip_prologue_hard_way (gdbarch, start_pc, 0);
227e86ad 1975 end_pc = get_frame_pc (this_frame);
9f7194c3
RC
1976
1977 if (prologue_end != 0 && end_pc > prologue_end)
1978 end_pc = prologue_end;
1979
26d08f08 1980 frame_size = 0;
9f7194c3 1981
46acf081 1982 for (pc = start_pc;
26d08f08
AC
1983 ((saved_gr_mask || saved_fr_mask
1984 || looking_for_sp || looking_for_rp
1985 || frame_size < (u->Total_frame_size << 3))
9f7194c3 1986 && pc < end_pc);
26d08f08
AC
1987 pc += 4)
1988 {
1989 int reg;
e362b510 1990 gdb_byte buf4[4];
4a302917
RC
1991 long inst;
1992
bdec2917 1993 if (!safe_frame_unwind_memory (this_frame, pc, buf4))
4a302917 1994 {
5af949e3
UW
1995 error (_("Cannot read instruction at %s."),
1996 paddress (gdbarch, pc));
9a3c8263 1997 return (struct hppa_frame_cache *) (*this_cache);
4a302917
RC
1998 }
1999
e17a4113 2000 inst = extract_unsigned_integer (buf4, sizeof buf4, byte_order);
9f7194c3 2001
26d08f08
AC
2002 /* Note the interesting effects of this instruction. */
2003 frame_size += prologue_inst_adjust_sp (inst);
2004
2005 /* There are limited ways to store the return pointer into the
2006 stack. */
2007 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2008 {
2009 looking_for_rp = 0;
098caef4 2010 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
26d08f08 2011 }
dfaf8edb
MK
2012 else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
2013 {
2014 looking_for_rp = 0;
098caef4 2015 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24);
dfaf8edb 2016 }
c4c79048 2017 else if (inst == 0x0fc212c1
dda83cd7 2018 || inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
26d08f08
AC
2019 {
2020 looking_for_rp = 0;
098caef4 2021 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
26d08f08
AC
2022 }
2023
2024 /* Check to see if we saved SP into the stack. This also
2025 happens to indicate the location of the saved frame
2026 pointer. */
2027 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2028 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2029 {
2030 looking_for_sp = 0;
098caef4 2031 cache->saved_regs[HPPA_FP_REGNUM].set_addr (0);
26d08f08 2032 }
50b2f48a
RC
2033 else if (inst == 0x08030241) /* copy %r3, %r1 */
2034 {
2035 fp_in_r1 = 1;
2036 }
26d08f08
AC
2037
2038 /* Account for general and floating-point register saves. */
2039 reg = inst_saves_gr (inst);
2040 if (reg >= 3 && reg <= 18
eded0a31 2041 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
26d08f08
AC
2042 {
2043 saved_gr_mask &= ~(1 << reg);
abc485a1 2044 if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
26d08f08
AC
2045 /* stwm with a positive displacement is a _post_
2046 _modify_. */
098caef4 2047 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2048 else if ((inst & 0xfc00000c) == 0x70000008)
2049 /* A std has explicit post_modify forms. */
098caef4 2050 cache->saved_regs[reg].set_addr (0);
26d08f08
AC
2051 else
2052 {
2053 CORE_ADDR offset;
2054
2055 if ((inst >> 26) == 0x1c)
66c6502d 2056 offset = (inst & 0x1 ? -(1 << 13) : 0)
1777feb0 2057 | (((inst >> 4) & 0x3ff) << 3);
26d08f08 2058 else if ((inst >> 26) == 0x03)
abc485a1 2059 offset = hppa_low_hppa_sign_extend (inst & 0x1f, 5);
26d08f08 2060 else
abc485a1 2061 offset = hppa_extract_14 (inst);
26d08f08
AC
2062
2063 /* Handle code with and without frame pointers. */
2064 if (u->Save_SP)
098caef4 2065 cache->saved_regs[reg].set_addr (offset);
26d08f08 2066 else
098caef4
LM
2067 cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3)
2068 + offset);
26d08f08
AC
2069 }
2070 }
2071
2072 /* GCC handles callee saved FP regs a little differently.
2073
2074 It emits an instruction to put the value of the start of
2075 the FP store area into %r1. It then uses fstds,ma with a
2076 basereg of %r1 for the stores.
2077
2078 HP CC emits them at the current stack pointer modifying the
2079 stack pointer as it stores each register. */
2080
2081 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2082 if ((inst & 0xffffc000) == 0x34610000
2083 || (inst & 0xffffc000) == 0x37c10000)
abc485a1 2084 fp_loc = hppa_extract_14 (inst);
26d08f08
AC
2085
2086 reg = inst_saves_fr (inst);
2087 if (reg >= 12 && reg <= 21)
2088 {
2089 /* Note +4 braindamage below is necessary because the FP
2090 status registers are internally 8 registers rather than
2091 the expected 4 registers. */
2092 saved_fr_mask &= ~(1 << reg);
2093 if (fp_loc == -1)
2094 {
2095 /* 1st HP CC FP register store. After this
2096 instruction we've set enough state that the GCC and
2097 HPCC code are both handled in the same manner. */
098caef4 2098 cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0);
26d08f08
AC
2099 fp_loc = 8;
2100 }
2101 else
2102 {
098caef4 2103 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc);
26d08f08
AC
2104 fp_loc += 8;
2105 }
2106 }
2107
1777feb0 2108 /* Quit if we hit any kind of branch the previous iteration. */
26d08f08
AC
2109 if (final_iteration)
2110 break;
2111 /* We want to look precisely one instruction beyond the branch
2112 if we have not found everything yet. */
2113 if (is_branch (inst))
2114 final_iteration = 1;
2115 }
2116 }
2117
2118 {
2119 /* The frame base always represents the value of %sp at entry to
2120 the current function (and is thus equivalent to the "saved"
2121 stack pointer. */
227e86ad 2122 CORE_ADDR this_sp = get_frame_register_unsigned (this_frame,
dda83cd7 2123 HPPA_SP_REGNUM);
ed70ba00 2124 CORE_ADDR fp;
9f7194c3
RC
2125
2126 if (hppa_debug)
5af949e3 2127 fprintf_unfiltered (gdb_stdlog, " (this_sp=%s, pc=%s, "
dda83cd7
SM
2128 "prologue_end=%s) ",
2129 paddress (gdbarch, this_sp),
5af949e3
UW
2130 paddress (gdbarch, get_frame_pc (this_frame)),
2131 paddress (gdbarch, prologue_end));
9f7194c3 2132
ed70ba00 2133 /* Check to see if a frame pointer is available, and use it for
dda83cd7 2134 frame unwinding if it is.
ed70ba00 2135
dda83cd7
SM
2136 There are some situations where we need to rely on the frame
2137 pointer to do stack unwinding. For example, if a function calls
2138 alloca (), the stack pointer can get adjusted inside the body of
2139 the function. In this case, the ABI requires that the compiler
2140 maintain a frame pointer for the function.
ed70ba00 2141
dda83cd7
SM
2142 The unwind record has a flag (alloca_frame) that indicates that
2143 a function has a variable frame; unfortunately, gcc/binutils
2144 does not set this flag. Instead, whenever a frame pointer is used
2145 and saved on the stack, the Save_SP flag is set. We use this to
2146 decide whether to use the frame pointer for unwinding.
ed70ba00 2147
dda83cd7 2148 TODO: For the HP compiler, maybe we should use the alloca_frame flag
ed70ba00
RC
2149 instead of Save_SP. */
2150
227e86ad 2151 fp = get_frame_register_unsigned (this_frame, HPPA_FP_REGNUM);
46acf081 2152
6fcecea0 2153 if (u->alloca_frame)
46acf081 2154 fp -= u->Total_frame_size << 3;
ed70ba00 2155
227e86ad 2156 if (get_frame_pc (this_frame) >= prologue_end
dda83cd7 2157 && (u->Save_SP || u->alloca_frame) && fp != 0)
ed70ba00 2158 {
24b21115 2159 cache->base = fp;
ed70ba00 2160
24b21115 2161 if (hppa_debug)
5af949e3
UW
2162 fprintf_unfiltered (gdb_stdlog, " (base=%s) [frame pointer]",
2163 paddress (gdbarch, cache->base));
ed70ba00 2164 }
1658da49 2165 else if (u->Save_SP
a9a87d35 2166 && cache->saved_regs[HPPA_SP_REGNUM].is_addr ())
9f7194c3 2167 {
dda83cd7 2168 /* Both we're expecting the SP to be saved and the SP has been
9f7194c3
RC
2169 saved. The entry SP value is saved at this frame's SP
2170 address. */
dda83cd7 2171 cache->base = read_memory_integer (this_sp, word_size, byte_order);
9f7194c3
RC
2172
2173 if (hppa_debug)
5af949e3 2174 fprintf_unfiltered (gdb_stdlog, " (base=%s) [saved]",
dda83cd7 2175 paddress (gdbarch, cache->base));
9f7194c3 2176 }
26d08f08 2177 else
9f7194c3 2178 {
dda83cd7 2179 /* The prologue has been slowly allocating stack space. Adjust
1658da49 2180 the SP back. */
dda83cd7 2181 cache->base = this_sp - frame_size;
9f7194c3 2182 if (hppa_debug)
5af949e3
UW
2183 fprintf_unfiltered (gdb_stdlog, " (base=%s) [unwind adjust]",
2184 paddress (gdbarch, cache->base));
9f7194c3
RC
2185
2186 }
a9a87d35 2187 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
26d08f08
AC
2188 }
2189
412275d5
AC
2190 /* The PC is found in the "return register", "Millicode" uses "r31"
2191 as the return register while normal code uses "rp". */
26d08f08 2192 if (u->Millicode)
9f7194c3 2193 {
a9a87d35 2194 if (cache->saved_regs[31].is_addr ())
dda83cd7
SM
2195 {
2196 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
9ed5ba24
RC
2197 if (hppa_debug)
2198 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [stack] } ");
dda83cd7 2199 }
9f7194c3
RC
2200 else
2201 {
227e86ad 2202 ULONGEST r31 = get_frame_register_unsigned (this_frame, 31);
a9a87d35 2203 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (r31);
9ed5ba24
RC
2204 if (hppa_debug)
2205 fprintf_unfiltered (gdb_stdlog, " (pc=r31) [frame] } ");
dda83cd7 2206 }
9f7194c3 2207 }
26d08f08 2208 else
9f7194c3 2209 {
a9a87d35 2210 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
dda83cd7
SM
2211 {
2212 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
9ed5ba24
RC
2213 cache->saved_regs[HPPA_RP_REGNUM];
2214 if (hppa_debug)
2215 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [stack] } ");
dda83cd7 2216 }
9f7194c3
RC
2217 else
2218 {
227e86ad 2219 ULONGEST rp = get_frame_register_unsigned (this_frame,
dda83cd7 2220 HPPA_RP_REGNUM);
a9a87d35 2221 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
9ed5ba24
RC
2222 if (hppa_debug)
2223 fprintf_unfiltered (gdb_stdlog, " (pc=rp) [frame] } ");
9f7194c3
RC
2224 }
2225 }
26d08f08 2226
50b2f48a
RC
2227 /* If Save_SP is set, then we expect the frame pointer to be saved in the
2228 frame. However, there is a one-insn window where we haven't saved it
2229 yet, but we've already clobbered it. Detect this case and fix it up.
2230
2231 The prologue sequence for frame-pointer functions is:
2232 0: stw %rp, -20(%sp)
2233 4: copy %r3, %r1
2234 8: copy %sp, %r3
2235 c: stw,ma %r1, XX(%sp)
2236
2237 So if we are at offset c, the r3 value that we want is not yet saved
2238 on the stack, but it's been overwritten. The prologue analyzer will
2239 set fp_in_r1 when it sees the copy insn so we know to get the value
2240 from r1 instead. */
a9a87d35 2241 if (u->Save_SP && !cache->saved_regs[HPPA_FP_REGNUM].is_addr ()
50b2f48a
RC
2242 && fp_in_r1)
2243 {
227e86ad 2244 ULONGEST r1 = get_frame_register_unsigned (this_frame, 1);
a9a87d35 2245 cache->saved_regs[HPPA_FP_REGNUM].set_value (r1);
50b2f48a 2246 }
1658da49 2247
26d08f08
AC
2248 {
2249 /* Convert all the offsets into addresses. */
2250 int reg;
65c5db89 2251 for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
26d08f08 2252 {
a9a87d35 2253 if (cache->saved_regs[reg].is_addr ())
098caef4
LM
2254 cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
2255 + cache->base);
26d08f08
AC
2256 }
2257 }
2258
f77a2124 2259 {
f77a2124
RC
2260 struct gdbarch_tdep *tdep;
2261
f77a2124
RC
2262 tdep = gdbarch_tdep (gdbarch);
2263
2264 if (tdep->unwind_adjust_stub)
227e86ad 2265 tdep->unwind_adjust_stub (this_frame, cache->base, cache->saved_regs);
f77a2124
RC
2266 }
2267
369aa520 2268 if (hppa_debug)
5af949e3
UW
2269 fprintf_unfiltered (gdb_stdlog, "base=%s }",
2270 paddress (gdbarch, ((struct hppa_frame_cache *)*this_cache)->base));
9a3c8263 2271 return (struct hppa_frame_cache *) (*this_cache);
26d08f08
AC
2272}
2273
2274static void
227e86ad
JB
2275hppa_frame_this_id (struct frame_info *this_frame, void **this_cache,
2276 struct frame_id *this_id)
26d08f08 2277{
d5c27f81 2278 struct hppa_frame_cache *info;
d5c27f81
RC
2279 struct unwind_table_entry *u;
2280
227e86ad
JB
2281 info = hppa_frame_cache (this_frame, this_cache);
2282 u = hppa_find_unwind_entry_in_block (this_frame);
d5c27f81
RC
2283
2284 (*this_id) = frame_id_build (info->base, u->region_start);
26d08f08
AC
2285}
2286
227e86ad
JB
2287static struct value *
2288hppa_frame_prev_register (struct frame_info *this_frame,
2289 void **this_cache, int regnum)
26d08f08 2290{
227e86ad
JB
2291 struct hppa_frame_cache *info = hppa_frame_cache (this_frame, this_cache);
2292
1777feb0
MS
2293 return hppa_frame_prev_register_helper (this_frame,
2294 info->saved_regs, regnum);
227e86ad
JB
2295}
2296
2297static int
2298hppa_frame_unwind_sniffer (const struct frame_unwind *self,
dda83cd7 2299 struct frame_info *this_frame, void **this_cache)
227e86ad
JB
2300{
2301 if (hppa_find_unwind_entry_in_block (this_frame))
2302 return 1;
2303
2304 return 0;
0da28f8a
RC
2305}
2306
2307static const struct frame_unwind hppa_frame_unwind =
2308{
2309 NORMAL_FRAME,
8fbca658 2310 default_frame_unwind_stop_reason,
0da28f8a 2311 hppa_frame_this_id,
227e86ad
JB
2312 hppa_frame_prev_register,
2313 NULL,
2314 hppa_frame_unwind_sniffer
0da28f8a
RC
2315};
2316
0da28f8a
RC
2317/* This is a generic fallback frame unwinder that kicks in if we fail all
2318 the other ones. Normally we would expect the stub and regular unwinder
2319 to work, but in some cases we might hit a function that just doesn't
2320 have any unwind information available. In this case we try to do
2321 unwinding solely based on code reading. This is obviously going to be
2322 slow, so only use this as a last resort. Currently this will only
2323 identify the stack and pc for the frame. */
2324
2325static struct hppa_frame_cache *
227e86ad 2326hppa_fallback_frame_cache (struct frame_info *this_frame, void **this_cache)
0da28f8a 2327{
e17a4113
UW
2328 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2329 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0da28f8a 2330 struct hppa_frame_cache *cache;
4ba6a975
MK
2331 unsigned int frame_size = 0;
2332 int found_rp = 0;
2333 CORE_ADDR start_pc;
0da28f8a 2334
d5c27f81 2335 if (hppa_debug)
4ba6a975
MK
2336 fprintf_unfiltered (gdb_stdlog,
2337 "{ hppa_fallback_frame_cache (frame=%d) -> ",
227e86ad 2338 frame_relative_level (this_frame));
d5c27f81 2339
0da28f8a
RC
2340 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2341 (*this_cache) = cache;
227e86ad 2342 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
0da28f8a 2343
227e86ad 2344 start_pc = get_frame_func (this_frame);
4ba6a975 2345 if (start_pc)
0da28f8a 2346 {
227e86ad 2347 CORE_ADDR cur_pc = get_frame_pc (this_frame);
4ba6a975 2348 CORE_ADDR pc;
0da28f8a 2349
4ba6a975
MK
2350 for (pc = start_pc; pc < cur_pc; pc += 4)
2351 {
2352 unsigned int insn;
0da28f8a 2353
e17a4113 2354 insn = read_memory_unsigned_integer (pc, 4, byte_order);
4ba6a975 2355 frame_size += prologue_inst_adjust_sp (insn);
6d1be3f1 2356
4ba6a975
MK
2357 /* There are limited ways to store the return pointer into the
2358 stack. */
2359 if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2360 {
098caef4 2361 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
4ba6a975
MK
2362 found_rp = 1;
2363 }
c4c79048 2364 else if (insn == 0x0fc212c1
dda83cd7 2365 || insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
4ba6a975 2366 {
098caef4 2367 cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
4ba6a975
MK
2368 found_rp = 1;
2369 }
2370 }
412275d5 2371 }
0da28f8a 2372
d5c27f81 2373 if (hppa_debug)
4ba6a975
MK
2374 fprintf_unfiltered (gdb_stdlog, " frame_size=%d, found_rp=%d }\n",
2375 frame_size, found_rp);
d5c27f81 2376
227e86ad 2377 cache->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
4ba6a975 2378 cache->base -= frame_size;
a9a87d35 2379 cache->saved_regs[HPPA_SP_REGNUM].set_value (cache->base);
0da28f8a 2380
a9a87d35 2381 if (cache->saved_regs[HPPA_RP_REGNUM].is_addr ())
0da28f8a 2382 {
098caef4
LM
2383 cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr ()
2384 + cache->base);
4ba6a975
MK
2385 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
2386 cache->saved_regs[HPPA_RP_REGNUM];
0da28f8a 2387 }
412275d5
AC
2388 else
2389 {
4ba6a975 2390 ULONGEST rp;
227e86ad 2391 rp = get_frame_register_unsigned (this_frame, HPPA_RP_REGNUM);
a9a87d35 2392 cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_value (rp);
412275d5 2393 }
0da28f8a
RC
2394
2395 return cache;
26d08f08
AC
2396}
2397
0da28f8a 2398static void
227e86ad 2399hppa_fallback_frame_this_id (struct frame_info *this_frame, void **this_cache,
0da28f8a
RC
2400 struct frame_id *this_id)
2401{
2402 struct hppa_frame_cache *info =
227e86ad
JB
2403 hppa_fallback_frame_cache (this_frame, this_cache);
2404
2405 (*this_id) = frame_id_build (info->base, get_frame_func (this_frame));
0da28f8a
RC
2406}
2407
227e86ad
JB
2408static struct value *
2409hppa_fallback_frame_prev_register (struct frame_info *this_frame,
dda83cd7 2410 void **this_cache, int regnum)
0da28f8a 2411{
1777feb0
MS
2412 struct hppa_frame_cache *info
2413 = hppa_fallback_frame_cache (this_frame, this_cache);
227e86ad 2414
1777feb0
MS
2415 return hppa_frame_prev_register_helper (this_frame,
2416 info->saved_regs, regnum);
0da28f8a
RC
2417}
2418
2419static const struct frame_unwind hppa_fallback_frame_unwind =
26d08f08
AC
2420{
2421 NORMAL_FRAME,
8fbca658 2422 default_frame_unwind_stop_reason,
0da28f8a 2423 hppa_fallback_frame_this_id,
227e86ad
JB
2424 hppa_fallback_frame_prev_register,
2425 NULL,
2426 default_frame_sniffer
26d08f08
AC
2427};
2428
7f07c5b6
RC
2429/* Stub frames, used for all kinds of call stubs. */
2430struct hppa_stub_unwind_cache
2431{
2432 CORE_ADDR base;
098caef4 2433 trad_frame_saved_reg *saved_regs;
7f07c5b6
RC
2434};
2435
2436static struct hppa_stub_unwind_cache *
227e86ad 2437hppa_stub_frame_unwind_cache (struct frame_info *this_frame,
7f07c5b6
RC
2438 void **this_cache)
2439{
7f07c5b6
RC
2440 struct hppa_stub_unwind_cache *info;
2441
2442 if (*this_cache)
9a3c8263 2443 return (struct hppa_stub_unwind_cache *) *this_cache;
7f07c5b6
RC
2444
2445 info = FRAME_OBSTACK_ZALLOC (struct hppa_stub_unwind_cache);
2446 *this_cache = info;
227e86ad 2447 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
7f07c5b6 2448
227e86ad 2449 info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
7f07c5b6 2450
22b0923d 2451 /* By default we assume that stubs do not change the rp. */
098caef4 2452 info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM);
22b0923d 2453
7f07c5b6
RC
2454 return info;
2455}
2456
2457static void
227e86ad 2458hppa_stub_frame_this_id (struct frame_info *this_frame,
7f07c5b6
RC
2459 void **this_prologue_cache,
2460 struct frame_id *this_id)
2461{
2462 struct hppa_stub_unwind_cache *info
227e86ad 2463 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57
RC
2464
2465 if (info)
227e86ad 2466 *this_id = frame_id_build (info->base, get_frame_func (this_frame));
7f07c5b6
RC
2467}
2468
227e86ad
JB
2469static struct value *
2470hppa_stub_frame_prev_register (struct frame_info *this_frame,
2471 void **this_prologue_cache, int regnum)
7f07c5b6
RC
2472{
2473 struct hppa_stub_unwind_cache *info
227e86ad 2474 = hppa_stub_frame_unwind_cache (this_frame, this_prologue_cache);
f1b38a57 2475
227e86ad 2476 if (info == NULL)
8a3fe4f8 2477 error (_("Requesting registers from null frame."));
7f07c5b6 2478
1777feb0
MS
2479 return hppa_frame_prev_register_helper (this_frame,
2480 info->saved_regs, regnum);
227e86ad 2481}
7f07c5b6 2482
227e86ad
JB
2483static int
2484hppa_stub_unwind_sniffer (const struct frame_unwind *self,
dda83cd7
SM
2485 struct frame_info *this_frame,
2486 void **this_cache)
7f07c5b6 2487{
227e86ad
JB
2488 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2489 struct gdbarch *gdbarch = get_frame_arch (this_frame);
84674fe1 2490 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
7f07c5b6 2491
6d1be3f1 2492 if (pc == 0
84674fe1 2493 || (tdep->in_solib_call_trampoline != NULL
3e5d3a5a 2494 && tdep->in_solib_call_trampoline (gdbarch, pc))
464963c9 2495 || gdbarch_in_solib_return_trampoline (gdbarch, pc, NULL))
227e86ad
JB
2496 return 1;
2497 return 0;
7f07c5b6
RC
2498}
2499
227e86ad
JB
2500static const struct frame_unwind hppa_stub_frame_unwind = {
2501 NORMAL_FRAME,
8fbca658 2502 default_frame_unwind_stop_reason,
227e86ad
JB
2503 hppa_stub_frame_this_id,
2504 hppa_stub_frame_prev_register,
2505 NULL,
2506 hppa_stub_unwind_sniffer
2507};
2508
cc72850f 2509CORE_ADDR
26d08f08
AC
2510hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2511{
fe46cd3a
RC
2512 ULONGEST ipsw;
2513 CORE_ADDR pc;
2514
cc72850f
MK
2515 ipsw = frame_unwind_register_unsigned (next_frame, HPPA_IPSW_REGNUM);
2516 pc = frame_unwind_register_unsigned (next_frame, HPPA_PCOQ_HEAD_REGNUM);
fe46cd3a
RC
2517
2518 /* If the current instruction is nullified, then we are effectively
2519 still executing the previous instruction. Pretend we are still
cc72850f
MK
2520 there. This is needed when single stepping; if the nullified
2521 instruction is on a different line, we don't want GDB to think
2522 we've stepped onto that line. */
fe46cd3a
RC
2523 if (ipsw & 0x00200000)
2524 pc -= 4;
2525
cc72850f 2526 return pc & ~0x3;
26d08f08
AC
2527}
2528
ff644745
JB
2529/* Return the minimal symbol whose name is NAME and stub type is STUB_TYPE.
2530 Return NULL if no such symbol was found. */
2531
3b7344d5 2532struct bound_minimal_symbol
ff644745 2533hppa_lookup_stub_minimal_symbol (const char *name,
dda83cd7 2534 enum unwind_stub_types stub_type)
ff644745 2535{
3b7344d5 2536 struct bound_minimal_symbol result = { NULL, NULL };
ff644745 2537
2030c079 2538 for (objfile *objfile : current_program_space->objfiles ())
ff644745 2539 {
7932255d 2540 for (minimal_symbol *msym : objfile->msymbols ())
5325b9bf 2541 {
c9d95fa3 2542 if (strcmp (msym->linkage_name (), name) == 0)
3b7344d5 2543 {
5325b9bf
TT
2544 struct unwind_table_entry *u;
2545
2546 u = find_unwind_entry (MSYMBOL_VALUE (msym));
2547 if (u != NULL && u->stub_unwind.stub_type == stub_type)
2548 {
2549 result.objfile = objfile;
2550 result.minsym = msym;
2551 return result;
2552 }
3b7344d5 2553 }
5325b9bf 2554 }
ff644745
JB
2555 }
2556
3b7344d5 2557 return result;
ff644745
JB
2558}
2559
c906108c 2560static void
c482f52c 2561unwind_command (const char *exp, int from_tty)
c906108c
SS
2562{
2563 CORE_ADDR address;
2564 struct unwind_table_entry *u;
2565
2566 /* If we have an expression, evaluate it and use it as the address. */
2567
2568 if (exp != 0 && *exp != 0)
2569 address = parse_and_eval_address (exp);
2570 else
2571 return;
2572
2573 u = find_unwind_entry (address);
2574
2575 if (!u)
2576 {
2577 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2578 return;
2579 }
2580
3329c4b5 2581 printf_unfiltered ("unwind_table_entry (%s):\n", host_address_to_string (u));
c906108c 2582
5af949e3 2583 printf_unfiltered ("\tregion_start = %s\n", hex_string (u->region_start));
c906108c 2584
5af949e3 2585 printf_unfiltered ("\tregion_end = %s\n", hex_string (u->region_end));
c906108c 2586
c906108c 2587#define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
c906108c
SS
2588
2589 printf_unfiltered ("\n\tflags =");
2590 pif (Cannot_unwind);
2591 pif (Millicode);
2592 pif (Millicode_save_sr0);
2593 pif (Entry_SR);
2594 pif (Args_stored);
2595 pif (Variable_Frame);
2596 pif (Separate_Package_Body);
2597 pif (Frame_Extension_Millicode);
2598 pif (Stack_Overflow_Check);
2599 pif (Two_Instruction_SP_Increment);
6fcecea0
RC
2600 pif (sr4export);
2601 pif (cxx_info);
2602 pif (cxx_try_catch);
2603 pif (sched_entry_seq);
c906108c
SS
2604 pif (Save_SP);
2605 pif (Save_RP);
2606 pif (Save_MRP_in_frame);
6fcecea0 2607 pif (save_r19);
c906108c
SS
2608 pif (Cleanup_defined);
2609 pif (MPE_XL_interrupt_marker);
2610 pif (HP_UX_interrupt_marker);
2611 pif (Large_frame);
6fcecea0 2612 pif (alloca_frame);
c906108c
SS
2613
2614 putchar_unfiltered ('\n');
2615
c906108c 2616#define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
c906108c
SS
2617
2618 pin (Region_description);
2619 pin (Entry_FR);
2620 pin (Entry_GR);
2621 pin (Total_frame_size);
57dac9e1
RC
2622
2623 if (u->stub_unwind.stub_type)
2624 {
2625 printf_unfiltered ("\tstub type = ");
2626 switch (u->stub_unwind.stub_type)
dda83cd7 2627 {
57dac9e1
RC
2628 case LONG_BRANCH:
2629 printf_unfiltered ("long branch\n");
2630 break;
2631 case PARAMETER_RELOCATION:
2632 printf_unfiltered ("parameter relocation\n");
2633 break;
2634 case EXPORT:
2635 printf_unfiltered ("export\n");
2636 break;
2637 case IMPORT:
2638 printf_unfiltered ("import\n");
2639 break;
2640 case IMPORT_SHLIB:
2641 printf_unfiltered ("import shlib\n");
2642 break;
2643 default:
2644 printf_unfiltered ("unknown (%d)\n", u->stub_unwind.stub_type);
2645 }
2646 }
c906108c 2647}
c906108c 2648
38ca4e0c
MK
2649/* Return the GDB type object for the "standard" data type of data in
2650 register REGNUM. */
d709c020 2651
eded0a31 2652static struct type *
38ca4e0c 2653hppa32_register_type (struct gdbarch *gdbarch, int regnum)
d709c020 2654{
38ca4e0c 2655 if (regnum < HPPA_FP4_REGNUM)
df4df182 2656 return builtin_type (gdbarch)->builtin_uint32;
d709c020 2657 else
27067745 2658 return builtin_type (gdbarch)->builtin_float;
d709c020
JB
2659}
2660
eded0a31 2661static struct type *
38ca4e0c 2662hppa64_register_type (struct gdbarch *gdbarch, int regnum)
3ff7cf9e 2663{
38ca4e0c 2664 if (regnum < HPPA64_FP4_REGNUM)
df4df182 2665 return builtin_type (gdbarch)->builtin_uint64;
3ff7cf9e 2666 else
27067745 2667 return builtin_type (gdbarch)->builtin_double;
3ff7cf9e
JB
2668}
2669
38ca4e0c
MK
2670/* Return non-zero if REGNUM is not a register available to the user
2671 through ptrace/ttrace. */
d709c020 2672
8d153463 2673static int
64a3914f 2674hppa32_cannot_store_register (struct gdbarch *gdbarch, int regnum)
d709c020
JB
2675{
2676 return (regnum == 0
dda83cd7
SM
2677 || regnum == HPPA_PCSQ_HEAD_REGNUM
2678 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2679 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA_FP4_REGNUM));
38ca4e0c 2680}
d709c020 2681
d037d088 2682static int
64a3914f 2683hppa32_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2684{
2685 /* cr26 and cr27 are readable (but not writable) from userspace. */
2686 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2687 return 0;
2688 else
64a3914f 2689 return hppa32_cannot_store_register (gdbarch, regnum);
d037d088
CD
2690}
2691
38ca4e0c 2692static int
64a3914f 2693hppa64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
38ca4e0c
MK
2694{
2695 return (regnum == 0
dda83cd7
SM
2696 || regnum == HPPA_PCSQ_HEAD_REGNUM
2697 || (regnum >= HPPA_PCSQ_TAIL_REGNUM && regnum < HPPA_IPSW_REGNUM)
2698 || (regnum > HPPA_IPSW_REGNUM && regnum < HPPA64_FP4_REGNUM));
d709c020
JB
2699}
2700
d037d088 2701static int
64a3914f 2702hppa64_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
d037d088
CD
2703{
2704 /* cr26 and cr27 are readable (but not writable) from userspace. */
2705 if (regnum == HPPA_CR26_REGNUM || regnum == HPPA_CR27_REGNUM)
2706 return 0;
2707 else
64a3914f 2708 return hppa64_cannot_store_register (gdbarch, regnum);
d037d088
CD
2709}
2710
8d153463 2711static CORE_ADDR
85ddcc70 2712hppa_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
d709c020
JB
2713{
2714 /* The low two bits of the PC on the PA contain the privilege level.
2715 Some genius implementing a (non-GCC) compiler apparently decided
2716 this means that "addresses" in a text section therefore include a
2717 privilege level, and thus symbol tables should contain these bits.
2718 This seems like a bonehead thing to do--anyway, it seems to work
2719 for our purposes to just ignore those bits. */
2720
2721 return (addr &= ~0x3);
2722}
2723
e127f0db
MK
2724/* Get the ARGIth function argument for the current function. */
2725
4a302917 2726static CORE_ADDR
143985b7
AF
2727hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2728 struct type *type)
2729{
e127f0db 2730 return get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 26 - argi);
143985b7
AF
2731}
2732
05d1431c 2733static enum register_status
849d0ba8 2734hppa_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
e127f0db 2735 int regnum, gdb_byte *buf)
0f8d9d59 2736{
05d1431c
PA
2737 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2738 ULONGEST tmp;
2739 enum register_status status;
0f8d9d59 2740
03f50fc8 2741 status = regcache->raw_read (regnum, &tmp);
05d1431c
PA
2742 if (status == REG_VALID)
2743 {
2744 if (regnum == HPPA_PCOQ_HEAD_REGNUM || regnum == HPPA_PCOQ_TAIL_REGNUM)
2745 tmp &= ~0x3;
2746 store_unsigned_integer (buf, sizeof tmp, byte_order, tmp);
2747 }
2748 return status;
0f8d9d59
RC
2749}
2750
d49771ef 2751static CORE_ADDR
e38c262f 2752hppa_find_global_pointer (struct gdbarch *gdbarch, struct value *function)
d49771ef
RC
2753{
2754 return 0;
2755}
2756
227e86ad
JB
2757struct value *
2758hppa_frame_prev_register_helper (struct frame_info *this_frame,
098caef4 2759 trad_frame_saved_reg saved_regs[],
227e86ad 2760 int regnum)
0da28f8a 2761{
227e86ad 2762 struct gdbarch *arch = get_frame_arch (this_frame);
e17a4113 2763 enum bfd_endian byte_order = gdbarch_byte_order (arch);
8f4e467c 2764
8693c419
MK
2765 if (regnum == HPPA_PCOQ_TAIL_REGNUM)
2766 {
227e86ad
JB
2767 int size = register_size (arch, HPPA_PCOQ_HEAD_REGNUM);
2768 CORE_ADDR pc;
2769 struct value *pcoq_val =
dda83cd7
SM
2770 trad_frame_get_prev_register (this_frame, saved_regs,
2771 HPPA_PCOQ_HEAD_REGNUM);
8693c419 2772
e17a4113
UW
2773 pc = extract_unsigned_integer (value_contents_all (pcoq_val),
2774 size, byte_order);
227e86ad 2775 return frame_unwind_got_constant (this_frame, regnum, pc + 4);
8693c419 2776 }
0da28f8a 2777
227e86ad 2778 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
0da28f8a 2779}
8693c419 2780\f
0da28f8a 2781
34f55018
MK
2782/* An instruction to match. */
2783struct insn_pattern
2784{
2785 unsigned int data; /* See if it matches this.... */
2786 unsigned int mask; /* ... with this mask. */
2787};
2788
2789/* See bfd/elf32-hppa.c */
2790static struct insn_pattern hppa_long_branch_stub[] = {
2791 /* ldil LR'xxx,%r1 */
2792 { 0x20200000, 0xffe00000 },
2793 /* be,n RR'xxx(%sr4,%r1) */
2794 { 0xe0202002, 0xffe02002 },
2795 { 0, 0 }
2796};
2797
2798static struct insn_pattern hppa_long_branch_pic_stub[] = {
2799 /* b,l .+8, %r1 */
2800 { 0xe8200000, 0xffe00000 },
2801 /* addil LR'xxx - ($PIC_pcrel$0 - 4), %r1 */
2802 { 0x28200000, 0xffe00000 },
2803 /* be,n RR'xxxx - ($PIC_pcrel$0 - 8)(%sr4, %r1) */
2804 { 0xe0202002, 0xffe02002 },
2805 { 0, 0 }
2806};
2807
2808static struct insn_pattern hppa_import_stub[] = {
2809 /* addil LR'xxx, %dp */
2810 { 0x2b600000, 0xffe00000 },
2811 /* ldw RR'xxx(%r1), %r21 */
2812 { 0x48350000, 0xffffb000 },
2813 /* bv %r0(%r21) */
2814 { 0xeaa0c000, 0xffffffff },
2815 /* ldw RR'xxx+4(%r1), %r19 */
2816 { 0x48330000, 0xffffb000 },
2817 { 0, 0 }
2818};
2819
2820static struct insn_pattern hppa_import_pic_stub[] = {
2821 /* addil LR'xxx,%r19 */
2822 { 0x2a600000, 0xffe00000 },
2823 /* ldw RR'xxx(%r1),%r21 */
2824 { 0x48350000, 0xffffb000 },
2825 /* bv %r0(%r21) */
2826 { 0xeaa0c000, 0xffffffff },
2827 /* ldw RR'xxx+4(%r1),%r19 */
2828 { 0x48330000, 0xffffb000 },
2829 { 0, 0 },
2830};
2831
2832static struct insn_pattern hppa_plt_stub[] = {
2833 /* b,l 1b, %r20 - 1b is 3 insns before here */
2834 { 0xea9f1fdd, 0xffffffff },
2835 /* depi 0,31,2,%r20 */
2836 { 0xd6801c1e, 0xffffffff },
2837 { 0, 0 }
34f55018
MK
2838};
2839
2840/* Maximum number of instructions on the patterns above. */
2841#define HPPA_MAX_INSN_PATTERN_LEN 4
2842
2843/* Return non-zero if the instructions at PC match the series
2844 described in PATTERN, or zero otherwise. PATTERN is an array of
2845 'struct insn_pattern' objects, terminated by an entry whose mask is
2846 zero.
2847
2848 When the match is successful, fill INSN[i] with what PATTERN[i]
2849 matched. */
2850
2851static int
e17a4113
UW
2852hppa_match_insns (struct gdbarch *gdbarch, CORE_ADDR pc,
2853 struct insn_pattern *pattern, unsigned int *insn)
34f55018 2854{
e17a4113 2855 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
34f55018
MK
2856 CORE_ADDR npc = pc;
2857 int i;
2858
2859 for (i = 0; pattern[i].mask; i++)
2860 {
2861 gdb_byte buf[HPPA_INSN_SIZE];
2862
8defab1a 2863 target_read_memory (npc, buf, HPPA_INSN_SIZE);
e17a4113 2864 insn[i] = extract_unsigned_integer (buf, HPPA_INSN_SIZE, byte_order);
34f55018 2865 if ((insn[i] & pattern[i].mask) == pattern[i].data)
dda83cd7 2866 npc += 4;
34f55018 2867 else
dda83cd7 2868 return 0;
34f55018
MK
2869 }
2870
2871 return 1;
2872}
2873
85102364 2874/* This relaxed version of the instruction matcher allows us to match
34f55018
MK
2875 from somewhere inside the pattern, by looking backwards in the
2876 instruction scheme. */
2877
2878static int
e17a4113
UW
2879hppa_match_insns_relaxed (struct gdbarch *gdbarch, CORE_ADDR pc,
2880 struct insn_pattern *pattern, unsigned int *insn)
34f55018
MK
2881{
2882 int offset, len = 0;
2883
2884 while (pattern[len].mask)
2885 len++;
2886
2887 for (offset = 0; offset < len; offset++)
e17a4113
UW
2888 if (hppa_match_insns (gdbarch, pc - offset * HPPA_INSN_SIZE,
2889 pattern, insn))
34f55018
MK
2890 return 1;
2891
2892 return 0;
2893}
2894
2895static int
2896hppa_in_dyncall (CORE_ADDR pc)
2897{
2898 struct unwind_table_entry *u;
2899
2900 u = find_unwind_entry (hppa_symbol_address ("$$dyncall"));
2901 if (!u)
2902 return 0;
2903
2904 return (pc >= u->region_start && pc <= u->region_end);
2905}
2906
2907int
3e5d3a5a 2908hppa_in_solib_call_trampoline (struct gdbarch *gdbarch, CORE_ADDR pc)
34f55018
MK
2909{
2910 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2911 struct unwind_table_entry *u;
2912
3e5d3a5a 2913 if (in_plt_section (pc) || hppa_in_dyncall (pc))
34f55018
MK
2914 return 1;
2915
2916 /* The GNU toolchain produces linker stubs without unwind
2917 information. Since the pattern matching for linker stubs can be
2918 quite slow, so bail out if we do have an unwind entry. */
2919
2920 u = find_unwind_entry (pc);
806e23c0 2921 if (u != NULL)
34f55018
MK
2922 return 0;
2923
e17a4113
UW
2924 return
2925 (hppa_match_insns_relaxed (gdbarch, pc, hppa_import_stub, insn)
2926 || hppa_match_insns_relaxed (gdbarch, pc, hppa_import_pic_stub, insn)
2927 || hppa_match_insns_relaxed (gdbarch, pc, hppa_long_branch_stub, insn)
2928 || hppa_match_insns_relaxed (gdbarch, pc,
2929 hppa_long_branch_pic_stub, insn));
34f55018
MK
2930}
2931
2932/* This code skips several kind of "trampolines" used on PA-RISC
2933 systems: $$dyncall, import stubs and PLT stubs. */
2934
2935CORE_ADDR
52f729a7 2936hppa_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
34f55018 2937{
0dfff4cb
UW
2938 struct gdbarch *gdbarch = get_frame_arch (frame);
2939 struct type *func_ptr_type = builtin_type (gdbarch)->builtin_func_ptr;
2940
34f55018
MK
2941 unsigned int insn[HPPA_MAX_INSN_PATTERN_LEN];
2942 int dp_rel;
2943
2944 /* $$dyncall handles both PLABELs and direct addresses. */
2945 if (hppa_in_dyncall (pc))
2946 {
52f729a7 2947 pc = get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 22);
34f55018
MK
2948
2949 /* PLABELs have bit 30 set; if it's a PLABEL, then dereference it. */
2950 if (pc & 0x2)
0dfff4cb 2951 pc = read_memory_typed_address (pc & ~0x3, func_ptr_type);
34f55018
MK
2952
2953 return pc;
2954 }
2955
e17a4113
UW
2956 dp_rel = hppa_match_insns (gdbarch, pc, hppa_import_stub, insn);
2957 if (dp_rel || hppa_match_insns (gdbarch, pc, hppa_import_pic_stub, insn))
34f55018
MK
2958 {
2959 /* Extract the target address from the addil/ldw sequence. */
2960 pc = hppa_extract_21 (insn[0]) + hppa_extract_14 (insn[1]);
2961
2962 if (dp_rel)
dda83cd7 2963 pc += get_frame_register_unsigned (frame, HPPA_DP_REGNUM);
34f55018 2964 else
dda83cd7 2965 pc += get_frame_register_unsigned (frame, HPPA_R0_REGNUM + 19);
34f55018
MK
2966
2967 /* fallthrough */
2968 }
2969
3e5d3a5a 2970 if (in_plt_section (pc))
34f55018 2971 {
0dfff4cb 2972 pc = read_memory_typed_address (pc, func_ptr_type);
34f55018
MK
2973
2974 /* If the PLT slot has not yet been resolved, the target will be
dda83cd7 2975 the PLT stub. */
3e5d3a5a 2976 if (in_plt_section (pc))
34f55018
MK
2977 {
2978 /* Sanity check: are we pointing to the PLT stub? */
24b21115 2979 if (!hppa_match_insns (gdbarch, pc, hppa_plt_stub, insn))
34f55018 2980 {
5af949e3
UW
2981 warning (_("Cannot resolve PLT stub at %s."),
2982 paddress (gdbarch, pc));
34f55018
MK
2983 return 0;
2984 }
2985
2986 /* This should point to the fixup routine. */
0dfff4cb 2987 pc = read_memory_typed_address (pc + 8, func_ptr_type);
34f55018
MK
2988 }
2989 }
2990
2991 return pc;
2992}
2993\f
2994
8e8b2dba
MC
2995/* Here is a table of C type sizes on hppa with various compiles
2996 and options. I measured this on PA 9000/800 with HP-UX 11.11
2997 and these compilers:
2998
2999 /usr/ccs/bin/cc HP92453-01 A.11.01.21
3000 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
3001 /opt/aCC/bin/aCC B3910B A.03.45
3002 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
3003
3004 cc : 1 2 4 4 8 : 4 8 -- : 4 4
3005 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3006 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3007 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3008 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
3009 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
3010 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
3011 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
3012
3013 Each line is:
3014
3015 compiler and options
3016 char, short, int, long, long long
3017 float, double, long double
3018 char *, void (*)()
3019
3020 So all these compilers use either ILP32 or LP64 model.
3021 TODO: gcc has more options so it needs more investigation.
3022
a2379359
MC
3023 For floating point types, see:
3024
3025 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
3026 HP-UX floating-point guide, hpux 11.00
3027
8e8b2dba
MC
3028 -- chastain 2003-12-18 */
3029
e6e68f1f
JB
3030static struct gdbarch *
3031hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3032{
3ff7cf9e 3033 struct gdbarch_tdep *tdep;
e6e68f1f
JB
3034 struct gdbarch *gdbarch;
3035
3036 /* find a candidate among the list of pre-declared architectures. */
3037 arches = gdbarch_list_lookup_by_info (arches, &info);
3038 if (arches != NULL)
3039 return (arches->gdbarch);
3040
3041 /* If none found, then allocate and initialize one. */
41bf6aca 3042 tdep = XCNEW (struct gdbarch_tdep);
3ff7cf9e
JB
3043 gdbarch = gdbarch_alloc (&info, tdep);
3044
3045 /* Determine from the bfd_arch_info structure if we are dealing with
3046 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
3047 then default to a 32bit machine. */
3048 if (info.bfd_arch_info != NULL)
3049 tdep->bytes_per_address =
3050 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
3051 else
3052 tdep->bytes_per_address = 4;
3053
d49771ef
RC
3054 tdep->find_global_pointer = hppa_find_global_pointer;
3055
3ff7cf9e
JB
3056 /* Some parts of the gdbarch vector depend on whether we are running
3057 on a 32 bits or 64 bits target. */
3058 switch (tdep->bytes_per_address)
3059 {
3060 case 4:
dda83cd7
SM
3061 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
3062 set_gdbarch_register_name (gdbarch, hppa32_register_name);
3063 set_gdbarch_register_type (gdbarch, hppa32_register_type);
38ca4e0c
MK
3064 set_gdbarch_cannot_store_register (gdbarch,
3065 hppa32_cannot_store_register);
3066 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3067 hppa32_cannot_fetch_register);
dda83cd7 3068 break;
3ff7cf9e 3069 case 8:
dda83cd7
SM
3070 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
3071 set_gdbarch_register_name (gdbarch, hppa64_register_name);
3072 set_gdbarch_register_type (gdbarch, hppa64_register_type);
3073 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, hppa64_dwarf_reg_to_regnum);
38ca4e0c
MK
3074 set_gdbarch_cannot_store_register (gdbarch,
3075 hppa64_cannot_store_register);
3076 set_gdbarch_cannot_fetch_register (gdbarch,
d037d088 3077 hppa64_cannot_fetch_register);
dda83cd7 3078 break;
3ff7cf9e 3079 default:
dda83cd7
SM
3080 internal_error (__FILE__, __LINE__, _("Unsupported address size: %d"),
3081 tdep->bytes_per_address);
3ff7cf9e
JB
3082 }
3083
3ff7cf9e 3084 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
3ff7cf9e 3085 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
e6e68f1f 3086
8e8b2dba
MC
3087 /* The following gdbarch vector elements are the same in both ILP32
3088 and LP64, but might show differences some day. */
3089 set_gdbarch_long_long_bit (gdbarch, 64);
3090 set_gdbarch_long_double_bit (gdbarch, 128);
8da61cc4 3091 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
8e8b2dba 3092
3ff7cf9e
JB
3093 /* The following gdbarch vector elements do not depend on the address
3094 size, or in any other gdbarch element previously set. */
60383d10 3095 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
c9cf6e20
MG
3096 set_gdbarch_stack_frame_destroyed_p (gdbarch,
3097 hppa_stack_frame_destroyed_p);
a2a84a72 3098 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
eded0a31
AC
3099 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
3100 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
85ddcc70 3101 set_gdbarch_addr_bits_remove (gdbarch, hppa_addr_bits_remove);
60383d10 3102 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
cc72850f
MK
3103 set_gdbarch_read_pc (gdbarch, hppa_read_pc);
3104 set_gdbarch_write_pc (gdbarch, hppa_write_pc);
60383d10 3105
143985b7
AF
3106 /* Helper for function argument information. */
3107 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
3108
3a3bc038
AC
3109 /* When a hardware watchpoint triggers, we'll move the inferior past
3110 it by removing all eventpoints; stepping past the instruction
3111 that caused the trigger; reinserting eventpoints; and checking
3112 whether any watched location changed. */
3113 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
3114
5979bc46 3115 /* Inferior function call methods. */
fca7aa43 3116 switch (tdep->bytes_per_address)
5979bc46 3117 {
fca7aa43
AC
3118 case 4:
3119 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
3120 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
d49771ef 3121 set_gdbarch_convert_from_func_ptr_addr
dda83cd7 3122 (gdbarch, hppa32_convert_from_func_ptr_addr);
fca7aa43
AC
3123 break;
3124 case 8:
782eae8b
AC
3125 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
3126 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
fca7aa43 3127 break;
782eae8b 3128 default:
e2e0b3e5 3129 internal_error (__FILE__, __LINE__, _("bad switch"));
fad850b2
AC
3130 }
3131
3132 /* Struct return methods. */
fca7aa43 3133 switch (tdep->bytes_per_address)
fad850b2 3134 {
fca7aa43
AC
3135 case 4:
3136 set_gdbarch_return_value (gdbarch, hppa32_return_value);
3137 break;
3138 case 8:
782eae8b 3139 set_gdbarch_return_value (gdbarch, hppa64_return_value);
f5f907e2 3140 break;
fca7aa43 3141 default:
e2e0b3e5 3142 internal_error (__FILE__, __LINE__, _("bad switch"));
e963316f 3143 }
7f07c5b6 3144
04180708
YQ
3145 set_gdbarch_breakpoint_kind_from_pc (gdbarch, hppa_breakpoint::kind_from_pc);
3146 set_gdbarch_sw_breakpoint_from_kind (gdbarch, hppa_breakpoint::bp_from_kind);
7f07c5b6 3147 set_gdbarch_pseudo_register_read (gdbarch, hppa_pseudo_register_read);
85f4f2d8 3148
5979bc46 3149 /* Frame unwind methods. */
782eae8b 3150 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
7f07c5b6 3151
50306a9d
RC
3152 /* Hook in ABI-specific overrides, if they have been registered. */
3153 gdbarch_init_osabi (info, gdbarch);
3154
7f07c5b6 3155 /* Hook in the default unwinders. */
227e86ad
JB
3156 frame_unwind_append_unwinder (gdbarch, &hppa_stub_frame_unwind);
3157 frame_unwind_append_unwinder (gdbarch, &hppa_frame_unwind);
3158 frame_unwind_append_unwinder (gdbarch, &hppa_fallback_frame_unwind);
5979bc46 3159
e6e68f1f
JB
3160 return gdbarch;
3161}
3162
3163static void
464963c9 3164hppa_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
e6e68f1f 3165{
464963c9 3166 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fdd72f95
RC
3167
3168 fprintf_unfiltered (file, "bytes_per_address = %d\n",
dda83cd7 3169 tdep->bytes_per_address);
fdd72f95 3170 fprintf_unfiltered (file, "elf = %s\n", tdep->is_elf ? "yes" : "no");
e6e68f1f
JB
3171}
3172
6c265988 3173void _initialize_hppa_tdep ();
4facf7e8 3174void
6c265988 3175_initialize_hppa_tdep ()
4facf7e8 3176{
e6e68f1f 3177 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
4facf7e8
JB
3178
3179 add_cmd ("unwind", class_maintenance, unwind_command,
1a966eab 3180 _("Print unwind table entry at given address."),
4facf7e8
JB
3181 &maintenanceprintlist);
3182
1777feb0 3183 /* Debug this files internals. */
7915a72c
AC
3184 add_setshow_boolean_cmd ("hppa", class_maintenance, &hppa_debug, _("\
3185Set whether hppa target specific debugging information should be displayed."),
3186 _("\
3187Show whether hppa target specific debugging information is displayed."), _("\
4a302917
RC
3188This flag controls whether hppa target specific debugging information is\n\
3189displayed. This information is particularly useful for debugging frame\n\
7915a72c 3190unwinding problems."),
2c5b56ce 3191 NULL,
7915a72c 3192 NULL, /* FIXME: i18n: hppa debug flag is %s. */
2c5b56ce 3193 &setdebuglist, &showdebuglist);
4facf7e8 3194}