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a80b95ba 1/* Darwin support for GDB, the GNU debugger.
7b6bb8da 2 Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2008, 2009, 2010, 2011
a80b95ba
TG
3 Free Software Foundation, Inc.
4
5 Contributed by Apple Computer, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "symfile.h"
27#include "symtab.h"
28#include "objfiles.h"
29#include "gdbcmd.h"
30#include "regcache.h"
31#include "gdb_assert.h"
32#include "i386-tdep.h"
a80b95ba
TG
33#include "i387-tdep.h"
34#include "gdbarch.h"
35#include "arch-utils.h"
acdb24a9 36#include "gdbcore.h"
a80b95ba
TG
37
38#include "darwin-nat.h"
39#include "i386-darwin-tdep.h"
40
5cd226f2
TG
41#ifdef BFD64
42#include "amd64-nat.h"
46187dff 43#include "amd64-tdep.h"
5cd226f2
TG
44#include "amd64-darwin-tdep.h"
45#endif
46
a80b95ba
TG
47/* Read register values from the inferior process.
48 If REGNO is -1, do this for all registers.
49 Otherwise, REGNO specifies which register (so we can save time). */
50static void
28439f5e
PA
51i386_darwin_fetch_inferior_registers (struct target_ops *ops,
52 struct regcache *regcache, int regno)
a80b95ba
TG
53{
54 thread_t current_thread = ptid_get_tid (inferior_ptid);
55 int fetched = 0;
56 struct gdbarch *gdbarch = get_regcache_arch (regcache);
57
5cd226f2 58#ifdef BFD64
a80b95ba
TG
59 if (gdbarch_ptr_bit (gdbarch) == 64)
60 {
61 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
62 {
63 x86_thread_state_t gp_regs;
64 unsigned int gp_count = x86_THREAD_STATE_COUNT;
65 kern_return_t ret;
66
67 ret = thread_get_state
68 (current_thread, x86_THREAD_STATE, (thread_state_t) & gp_regs,
69 &gp_count);
70 if (ret != KERN_SUCCESS)
71 {
1777feb0
MS
72 printf_unfiltered (_("Error calling thread_get_state for "
73 "GP registers for thread 0x%ulx"),
74 current_thread);
a80b95ba
TG
75 MACH_CHECK_ERROR (ret);
76 }
77 amd64_supply_native_gregset (regcache, &gp_regs.uts, -1);
78 fetched++;
79 }
80
81 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
82 {
83 x86_float_state_t fp_regs;
84 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
85 kern_return_t ret;
86
87 ret = thread_get_state
88 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
89 &fp_count);
90 if (ret != KERN_SUCCESS)
91 {
1777feb0
MS
92 printf_unfiltered (_("Error calling thread_get_state for "
93 "float registers for thread 0x%ulx"),
94 current_thread);
a80b95ba
TG
95 MACH_CHECK_ERROR (ret);
96 }
46187dff 97 amd64_supply_fxsave (regcache, -1, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
98 fetched++;
99 }
100 }
101 else
5cd226f2 102#endif
a80b95ba
TG
103 {
104 if (regno == -1 || regno < I386_NUM_GREGS)
105 {
106 i386_thread_state_t gp_regs;
107 unsigned int gp_count = i386_THREAD_STATE_COUNT;
108 kern_return_t ret;
109 int i;
110
111 ret = thread_get_state
112 (current_thread, i386_THREAD_STATE, (thread_state_t) & gp_regs,
113 &gp_count);
114 if (ret != KERN_SUCCESS)
115 {
1777feb0
MS
116 printf_unfiltered (_("Error calling thread_get_state for "
117 "GP registers for thread 0x%ulx"),
118 current_thread);
a80b95ba
TG
119 MACH_CHECK_ERROR (ret);
120 }
121 for (i = 0; i < I386_NUM_GREGS; i++)
122 regcache_raw_supply
123 (regcache, i,
124 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
125
126 fetched++;
127 }
128
129 if (regno == -1
130 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
131 {
132 i386_float_state_t fp_regs;
133 unsigned int fp_count = i386_FLOAT_STATE_COUNT;
134 kern_return_t ret;
135
136 ret = thread_get_state
137 (current_thread, i386_FLOAT_STATE, (thread_state_t) & fp_regs,
138 &fp_count);
139 if (ret != KERN_SUCCESS)
140 {
1777feb0
MS
141 printf_unfiltered (_("Error calling thread_get_state for "
142 "float registers for thread 0x%ulx"),
143 current_thread);
a80b95ba
TG
144 MACH_CHECK_ERROR (ret);
145 }
146 i387_supply_fxsave (regcache, -1, &fp_regs.__fpu_fcw);
147 fetched++;
148 }
149 }
150
151 if (! fetched)
152 {
153 warning (_("unknown register %d"), regno);
154 regcache_raw_supply (regcache, regno, NULL);
155 }
156}
157
158/* Store our register values back into the inferior.
159 If REGNO is -1, do this for all registers.
160 Otherwise, REGNO specifies which register (so we can save time). */
161
162static void
28439f5e
PA
163i386_darwin_store_inferior_registers (struct target_ops *ops,
164 struct regcache *regcache, int regno)
a80b95ba
TG
165{
166 thread_t current_thread = ptid_get_tid (inferior_ptid);
167 struct gdbarch *gdbarch = get_regcache_arch (regcache);
168
5cd226f2 169#ifdef BFD64
a80b95ba
TG
170 if (gdbarch_ptr_bit (gdbarch) == 64)
171 {
172 if (regno == -1 || amd64_native_gregset_supplies_p (gdbarch, regno))
173 {
174 x86_thread_state_t gp_regs;
175 kern_return_t ret;
176 unsigned int gp_count = x86_THREAD_STATE_COUNT;
177
178 ret = thread_get_state
179 (current_thread, x86_THREAD_STATE, (thread_state_t) &gp_regs,
180 &gp_count);
181 MACH_CHECK_ERROR (ret);
182 gdb_assert (gp_regs.tsh.flavor == x86_THREAD_STATE64);
183 gdb_assert (gp_regs.tsh.count == x86_THREAD_STATE64_COUNT);
184
185 amd64_collect_native_gregset (regcache, &gp_regs.uts, regno);
186
187 ret = thread_set_state (current_thread, x86_THREAD_STATE,
188 (thread_state_t) &gp_regs,
189 x86_THREAD_STATE_COUNT);
190 MACH_CHECK_ERROR (ret);
191 }
192
193 if (regno == -1 || !amd64_native_gregset_supplies_p (gdbarch, regno))
194 {
195 x86_float_state_t fp_regs;
196 kern_return_t ret;
197 unsigned int fp_count = x86_FLOAT_STATE_COUNT;
198
199 ret = thread_get_state
200 (current_thread, x86_FLOAT_STATE, (thread_state_t) & fp_regs,
201 &fp_count);
202 MACH_CHECK_ERROR (ret);
203 gdb_assert (fp_regs.fsh.flavor == x86_FLOAT_STATE64);
204 gdb_assert (fp_regs.fsh.count == x86_FLOAT_STATE64_COUNT);
205
46187dff 206 amd64_collect_fxsave (regcache, regno, &fp_regs.ufs.fs64.__fpu_fcw);
a80b95ba
TG
207
208 ret = thread_set_state (current_thread, x86_FLOAT_STATE,
209 (thread_state_t) & fp_regs,
210 x86_FLOAT_STATE_COUNT);
211 MACH_CHECK_ERROR (ret);
212 }
213 }
214 else
5cd226f2 215#endif
a80b95ba
TG
216 {
217 if (regno == -1 || regno < I386_NUM_GREGS)
218 {
219 i386_thread_state_t gp_regs;
220 kern_return_t ret;
221 unsigned int gp_count = i386_THREAD_STATE_COUNT;
222 int i;
223
224 ret = thread_get_state
225 (current_thread, i386_THREAD_STATE, (thread_state_t) & gp_regs,
226 &gp_count);
227 MACH_CHECK_ERROR (ret);
228
229 for (i = 0; i < I386_NUM_GREGS; i++)
230 if (regno == -1 || regno == i)
231 regcache_raw_collect
232 (regcache, i,
233 (char *)&gp_regs + i386_darwin_thread_state_reg_offset[i]);
234
235 ret = thread_set_state (current_thread, i386_THREAD_STATE,
236 (thread_state_t) & gp_regs,
237 i386_THREAD_STATE_COUNT);
238 MACH_CHECK_ERROR (ret);
239 }
240
241 if (regno == -1
242 || (regno >= I386_ST0_REGNUM && regno < I386_SSE_NUM_REGS))
243 {
244 i386_float_state_t fp_regs;
245 unsigned int fp_count = i386_FLOAT_STATE_COUNT;
246 kern_return_t ret;
247
248 ret = thread_get_state
249 (current_thread, i386_FLOAT_STATE, (thread_state_t) & fp_regs,
250 &fp_count);
251 MACH_CHECK_ERROR (ret);
252
253 i387_collect_fxsave (regcache, regno, &fp_regs.__fpu_fcw);
254
255 ret = thread_set_state (current_thread, i386_FLOAT_STATE,
256 (thread_state_t) & fp_regs,
257 i386_FLOAT_STATE_COUNT);
258 MACH_CHECK_ERROR (ret);
259 }
260 }
261}
262
263
264/* Support for debug registers, boosted mostly from i386-linux-nat.c. */
265
266#ifndef DR_FIRSTADDR
267#define DR_FIRSTADDR 0
268#endif
269
270#ifndef DR_LASTADDR
271#define DR_LASTADDR 3
272#endif
273
274#ifndef DR_STATUS
275#define DR_STATUS 6
276#endif
277
278#ifndef DR_CONTROL
279#define DR_CONTROL 7
280#endif
281
282
283static void
284i386_darwin_dr_set (int regnum, uint32_t value)
285{
286 int current_pid;
287 thread_t current_thread;
288 x86_debug_state_t dr_regs;
289 kern_return_t ret;
290 unsigned int dr_count = x86_DEBUG_STATE_COUNT;
291
292 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
293
294 current_thread = ptid_get_tid (inferior_ptid);
295
296 dr_regs.dsh.flavor = x86_DEBUG_STATE32;
297 dr_regs.dsh.count = x86_DEBUG_STATE32_COUNT;
298 dr_count = x86_DEBUG_STATE_COUNT;
299 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
300 (thread_state_t) &dr_regs, &dr_count);
301
302 if (ret != KERN_SUCCESS)
303 {
1777feb0
MS
304 printf_unfiltered (_("Error reading debug registers "
305 "thread 0x%x via thread_get_state\n"),
306 (int) current_thread);
a80b95ba
TG
307 MACH_CHECK_ERROR (ret);
308 }
309
310 switch (regnum)
311 {
312 case 0:
313 dr_regs.uds.ds32.__dr0 = value;
314 break;
315 case 1:
316 dr_regs.uds.ds32.__dr1 = value;
317 break;
318 case 2:
319 dr_regs.uds.ds32.__dr2 = value;
320 break;
321 case 3:
322 dr_regs.uds.ds32.__dr3 = value;
323 break;
324 case 4:
325 dr_regs.uds.ds32.__dr4 = value;
326 break;
327 case 5:
328 dr_regs.uds.ds32.__dr5 = value;
329 break;
330 case 6:
331 dr_regs.uds.ds32.__dr6 = value;
332 break;
333 case 7:
334 dr_regs.uds.ds32.__dr7 = value;
335 break;
336 }
337
338 ret = thread_set_state (current_thread, x86_DEBUG_STATE,
339 (thread_state_t) &dr_regs, dr_count);
340
341 if (ret != KERN_SUCCESS)
342 {
1777feb0
MS
343 printf_unfiltered (_("Error writing debug registers "
344 "thread 0x%x via thread_get_state\n"),
345 (int) current_thread);
a80b95ba
TG
346 MACH_CHECK_ERROR (ret);
347 }
348}
349
350static uint32_t
351i386_darwin_dr_get (int regnum)
352{
353 thread_t current_thread;
354 x86_debug_state_t dr_regs;
355 kern_return_t ret;
356 unsigned int dr_count = x86_DEBUG_STATE_COUNT;
357
358 gdb_assert (regnum >= 0 && regnum <= DR_CONTROL);
359
360 current_thread = ptid_get_tid (inferior_ptid);
361
362 dr_regs.dsh.flavor = x86_DEBUG_STATE32;
363 dr_regs.dsh.count = x86_DEBUG_STATE32_COUNT;
364 dr_count = x86_DEBUG_STATE_COUNT;
365 ret = thread_get_state (current_thread, x86_DEBUG_STATE,
366 (thread_state_t) &dr_regs, &dr_count);
367
368 if (ret != KERN_SUCCESS)
369 {
1777feb0
MS
370 printf_unfiltered (_("Error reading debug registers "
371 "thread 0x%x via thread_get_state\n"),
372 (int) current_thread);
a80b95ba
TG
373 MACH_CHECK_ERROR (ret);
374 }
375
376 switch (regnum)
377 {
378 case 0:
379 return dr_regs.uds.ds32.__dr0;
380 case 1:
381 return dr_regs.uds.ds32.__dr1;
382 case 2:
383 return dr_regs.uds.ds32.__dr2;
384 case 3:
385 return dr_regs.uds.ds32.__dr3;
386 case 4:
387 return dr_regs.uds.ds32.__dr4;
388 case 5:
389 return dr_regs.uds.ds32.__dr5;
390 case 6:
391 return dr_regs.uds.ds32.__dr6;
392 case 7:
393 return dr_regs.uds.ds32.__dr7;
394 default:
395 return -1;
396 }
397}
398
399void
400i386_darwin_dr_set_control (unsigned long control)
401{
402 i386_darwin_dr_set (DR_CONTROL, control);
403}
404
405void
406i386_darwin_dr_set_addr (int regnum, CORE_ADDR addr)
407{
408 gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
409
410 i386_darwin_dr_set (DR_FIRSTADDR + regnum, addr);
411}
412
413void
414i386_darwin_dr_reset_addr (int regnum)
415{
416 gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
417
418 i386_darwin_dr_set (DR_FIRSTADDR + regnum, 0L);
419}
420
421unsigned long
422i386_darwin_dr_get_status (void)
423{
424 return i386_darwin_dr_get (DR_STATUS);
425}
426
427void
428darwin_check_osabi (darwin_inferior *inf, thread_t thread)
429{
a97b0ac8 430 if (gdbarch_osabi (target_gdbarch) == GDB_OSABI_UNKNOWN)
a80b95ba
TG
431 {
432 /* Attaching to a process. Let's figure out what kind it is. */
433 x86_thread_state_t gp_regs;
434 struct gdbarch_info info;
435 unsigned int gp_count = x86_THREAD_STATE_COUNT;
436 kern_return_t ret;
437
438 ret = thread_get_state (thread, x86_THREAD_STATE,
439 (thread_state_t) &gp_regs, &gp_count);
440 if (ret != KERN_SUCCESS)
441 {
442 MACH_CHECK_ERROR (ret);
443 return;
444 }
445
446 gdbarch_info_init (&info);
447 gdbarch_info_fill (&info);
a97b0ac8 448 info.byte_order = gdbarch_byte_order (target_gdbarch);
a80b95ba
TG
449 info.osabi = GDB_OSABI_DARWIN;
450 if (gp_regs.tsh.flavor == x86_THREAD_STATE64)
451 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
452 bfd_mach_x86_64);
453 else
454 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
455 bfd_mach_i386_i386);
456 gdbarch_update_p (info);
457 }
458}
459
460#define X86_EFLAGS_T 0x100UL
461
acdb24a9
TG
462/* Returning from a signal trampoline is done by calling a
463 special system call (sigreturn). This system call
464 restores the registers that were saved when the signal was
465 raised, including %eflags/%rflags. That means that single-stepping
466 won't work. Instead, we'll have to modify the signal context
467 that's about to be restored, and set the trace flag there. */
468
469static int
470i386_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
471{
e17a4113 472 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch);
acdb24a9
TG
473 static const gdb_byte darwin_syscall[] = { 0xcd, 0x80 }; /* int 0x80 */
474 gdb_byte buf[sizeof (darwin_syscall)];
475
476 /* Check if PC is at a sigreturn system call. */
477 if (target_read_memory (regs->uts.ts32.__eip, buf, sizeof (buf)) == 0
478 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
479 && regs->uts.ts32.__eax == 0xb8 /* SYS_sigreturn */)
480 {
481 ULONGEST uctx_addr;
482 ULONGEST mctx_addr;
483 ULONGEST flags_addr;
484 unsigned int eflags;
485
e17a4113
UW
486 uctx_addr = read_memory_unsigned_integer
487 (regs->uts.ts32.__esp + 4, 4, byte_order);
488 mctx_addr = read_memory_unsigned_integer
489 (uctx_addr + 28, 4, byte_order);
acdb24a9
TG
490
491 flags_addr = mctx_addr + 12 + 9 * 4;
492 read_memory (flags_addr, (gdb_byte *) &eflags, 4);
493 eflags |= X86_EFLAGS_T;
494 write_memory (flags_addr, (gdb_byte *) &eflags, 4);
495
496 return 1;
497 }
498 return 0;
499}
500
5cd226f2 501#ifdef BFD64
acdb24a9
TG
502static int
503amd64_darwin_sstep_at_sigreturn (x86_thread_state_t *regs)
504{
e17a4113 505 enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch);
acdb24a9
TG
506 static const gdb_byte darwin_syscall[] = { 0x0f, 0x05 }; /* syscall */
507 gdb_byte buf[sizeof (darwin_syscall)];
508
509 /* Check if PC is at a sigreturn system call. */
510 if (target_read_memory (regs->uts.ts64.__rip, buf, sizeof (buf)) == 0
511 && memcmp (buf, darwin_syscall, sizeof (darwin_syscall)) == 0
512 && (regs->uts.ts64.__rax & 0xffffffff) == 0x20000b8 /* SYS_sigreturn */)
513 {
514 ULONGEST mctx_addr;
515 ULONGEST flags_addr;
516 unsigned int rflags;
517
e17a4113
UW
518 mctx_addr = read_memory_unsigned_integer
519 (regs->uts.ts64.__rdi + 48, 8, byte_order);
acdb24a9
TG
520 flags_addr = mctx_addr + 16 + 17 * 8;
521
522 /* AMD64 is little endian. */
523 read_memory (flags_addr, (gdb_byte *) &rflags, 4);
524 rflags |= X86_EFLAGS_T;
525 write_memory (flags_addr, (gdb_byte *) &rflags, 4);
526
527 return 1;
528 }
529 return 0;
530}
5cd226f2 531#endif
acdb24a9 532
a80b95ba
TG
533void
534darwin_set_sstep (thread_t thread, int enable)
535{
536 x86_thread_state_t regs;
537 unsigned int count = x86_THREAD_STATE_COUNT;
538 kern_return_t kret;
539
540 kret = thread_get_state (thread, x86_THREAD_STATE,
541 (thread_state_t) &regs, &count);
542 if (kret != KERN_SUCCESS)
543 {
544 printf_unfiltered (_("darwin_set_sstep: error %x, thread=%x\n"),
545 kret, thread);
546 return;
547 }
acdb24a9 548
a80b95ba
TG
549 switch (regs.tsh.flavor)
550 {
551 case x86_THREAD_STATE32:
552 {
553 __uint32_t bit = enable ? X86_EFLAGS_T : 0;
554
acdb24a9
TG
555 if (enable && i386_darwin_sstep_at_sigreturn (&regs))
556 return;
a80b95ba
TG
557 if ((regs.uts.ts32.__eflags & X86_EFLAGS_T) == bit)
558 return;
1777feb0
MS
559 regs.uts.ts32.__eflags
560 = (regs.uts.ts32.__eflags & ~X86_EFLAGS_T) | bit;
a80b95ba
TG
561 kret = thread_set_state (thread, x86_THREAD_STATE,
562 (thread_state_t) &regs, count);
563 MACH_CHECK_ERROR (kret);
564 }
565 break;
5cd226f2 566#ifdef BFD64
a80b95ba
TG
567 case x86_THREAD_STATE64:
568 {
569 __uint64_t bit = enable ? X86_EFLAGS_T : 0;
570
acdb24a9
TG
571 if (enable && amd64_darwin_sstep_at_sigreturn (&regs))
572 return;
a80b95ba
TG
573 if ((regs.uts.ts64.__rflags & X86_EFLAGS_T) == bit)
574 return;
1777feb0
MS
575 regs.uts.ts64.__rflags
576 = (regs.uts.ts64.__rflags & ~X86_EFLAGS_T) | bit;
a80b95ba
TG
577 kret = thread_set_state (thread, x86_THREAD_STATE,
578 (thread_state_t) &regs, count);
579 MACH_CHECK_ERROR (kret);
580 }
581 break;
5cd226f2 582#endif
a80b95ba 583 default:
b37520b6 584 error (_("darwin_set_sstep: unknown flavour: %d"), regs.tsh.flavor);
a80b95ba
TG
585 }
586}
587
588void
589darwin_complete_target (struct target_ops *target)
590{
5cd226f2 591#ifdef BFD64
a80b95ba
TG
592 amd64_native_gregset64_reg_offset = amd64_darwin_thread_state_reg_offset;
593 amd64_native_gregset64_num_regs = amd64_darwin_thread_state_num_regs;
594 amd64_native_gregset32_reg_offset = i386_darwin_thread_state_reg_offset;
595 amd64_native_gregset32_num_regs = i386_darwin_thread_state_num_regs;
5cd226f2 596#endif
a80b95ba
TG
597
598 target->to_fetch_registers = i386_darwin_fetch_inferior_registers;
599 target->to_store_registers = i386_darwin_store_inferior_registers;
600}