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Obsolete NEWS and ISI systems (along with a few redundant m68k targets).
[thirdparty/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c 1/* Intel 386 target-dependent stuff.
b6ba6518
KB
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
c906108c
SS
4 Free Software Foundation, Inc.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdb_string.h"
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
28#include "target.h"
29#include "floatformat.h"
30#include "symtab.h"
31#include "gdbcmd.h"
32#include "command.h"
b4a20239 33#include "arch-utils.h"
4e052eda 34#include "regcache.h"
c906108c 35
917317f4
JM
36/* i386_register_byte[i] is the offset into the register file of the
37 start of register number i. We initialize this from
38 i386_register_raw_size. */
39int i386_register_byte[MAX_NUM_REGS];
40
ceb4951f
JB
41/* i386_register_raw_size[i] is the number of bytes of storage in
42 GDB's register array occupied by register i. */
917317f4
JM
43int i386_register_raw_size[MAX_NUM_REGS] = {
44 4, 4, 4, 4,
45 4, 4, 4, 4,
46 4, 4, 4, 4,
47 4, 4, 4, 4,
48 10, 10, 10, 10,
49 10, 10, 10, 10,
50 4, 4, 4, 4,
51 4, 4, 4, 4,
52 16, 16, 16, 16,
53 16, 16, 16, 16,
54 4
55};
56
57/* i386_register_virtual_size[i] is the size in bytes of the virtual
58 type of register i. */
59int i386_register_virtual_size[MAX_NUM_REGS];
fc338970 60\f
917317f4 61
fc338970
MK
62/* This is the variable that is set with "set disassembly-flavor", and
63 its legitimate values. */
53904c9e
AC
64static const char att_flavor[] = "att";
65static const char intel_flavor[] = "intel";
66static const char *valid_flavors[] =
c5aa993b 67{
c906108c
SS
68 att_flavor,
69 intel_flavor,
70 NULL
71};
53904c9e 72static const char *disassembly_flavor = att_flavor;
c906108c 73
fc338970
MK
74/* This is used to keep the bfd arch_info in sync with the disassembly
75 flavor. */
a14ed312
KB
76static void set_disassembly_flavor_sfunc (char *, int,
77 struct cmd_list_element *);
78static void set_disassembly_flavor (void);
fc338970
MK
79\f
80
81/* Stdio style buffering was used to minimize calls to ptrace, but
82 this buffering did not take into account that the code section
83 being accessed may not be an even number of buffers long (even if
84 the buffer is only sizeof(int) long). In cases where the code
85 section size happened to be a non-integral number of buffers long,
86 attempting to read the last buffer would fail. Simply using
87 target_read_memory and ignoring errors, rather than read_memory, is
88 not the correct solution, since legitimate access errors would then
89 be totally ignored. To properly handle this situation and continue
90 to use buffering would require that this code be able to determine
91 the minimum code section size granularity (not the alignment of the
92 section itself, since the actual failing case that pointed out this
93 problem had a section alignment of 4 but was not a multiple of 4
94 bytes long), on a target by target basis, and then adjust it's
95 buffer size accordingly. This is messy, but potentially feasible.
96 It probably needs the bfd library's help and support. For now, the
97 buffer size is set to 1. (FIXME -fnf) */
98
99#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
c906108c
SS
100static CORE_ADDR codestream_next_addr;
101static CORE_ADDR codestream_addr;
102static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
103static int codestream_off;
104static int codestream_cnt;
105
106#define codestream_tell() (codestream_addr + codestream_off)
fc338970
MK
107#define codestream_peek() \
108 (codestream_cnt == 0 ? \
109 codestream_fill(1) : codestream_buf[codestream_off])
110#define codestream_get() \
111 (codestream_cnt-- == 0 ? \
112 codestream_fill(0) : codestream_buf[codestream_off++])
c906108c 113
c5aa993b 114static unsigned char
fba45db2 115codestream_fill (int peek_flag)
c906108c
SS
116{
117 codestream_addr = codestream_next_addr;
118 codestream_next_addr += CODESTREAM_BUFSIZ;
119 codestream_off = 0;
120 codestream_cnt = CODESTREAM_BUFSIZ;
121 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 122
c906108c 123 if (peek_flag)
c5aa993b 124 return (codestream_peek ());
c906108c 125 else
c5aa993b 126 return (codestream_get ());
c906108c
SS
127}
128
129static void
fba45db2 130codestream_seek (CORE_ADDR place)
c906108c
SS
131{
132 codestream_next_addr = place / CODESTREAM_BUFSIZ;
133 codestream_next_addr *= CODESTREAM_BUFSIZ;
134 codestream_cnt = 0;
135 codestream_fill (1);
c5aa993b 136 while (codestream_tell () != place)
c906108c
SS
137 codestream_get ();
138}
139
140static void
fba45db2 141codestream_read (unsigned char *buf, int count)
c906108c
SS
142{
143 unsigned char *p;
144 int i;
145 p = buf;
146 for (i = 0; i < count; i++)
147 *p++ = codestream_get ();
148}
fc338970 149\f
c906108c 150
fc338970 151/* If the next instruction is a jump, move to its target. */
c906108c
SS
152
153static void
fba45db2 154i386_follow_jump (void)
c906108c
SS
155{
156 unsigned char buf[4];
157 long delta;
158
159 int data16;
160 CORE_ADDR pos;
161
162 pos = codestream_tell ();
163
164 data16 = 0;
165 if (codestream_peek () == 0x66)
166 {
167 codestream_get ();
168 data16 = 1;
169 }
170
171 switch (codestream_get ())
172 {
173 case 0xe9:
fc338970 174 /* Relative jump: if data16 == 0, disp32, else disp16. */
c906108c
SS
175 if (data16)
176 {
177 codestream_read (buf, 2);
178 delta = extract_signed_integer (buf, 2);
179
fc338970
MK
180 /* Include the size of the jmp instruction (including the
181 0x66 prefix). */
c5aa993b 182 pos += delta + 4;
c906108c
SS
183 }
184 else
185 {
186 codestream_read (buf, 4);
187 delta = extract_signed_integer (buf, 4);
188
189 pos += delta + 5;
190 }
191 break;
192 case 0xeb:
fc338970 193 /* Relative jump, disp8 (ignore data16). */
c906108c
SS
194 codestream_read (buf, 1);
195 /* Sign-extend it. */
196 delta = extract_signed_integer (buf, 1);
197
198 pos += delta + 2;
199 break;
200 }
201 codestream_seek (pos);
202}
203
fc338970
MK
204/* Find & return the amount a local space allocated, and advance the
205 codestream to the first register push (if any).
206
207 If the entry sequence doesn't make sense, return -1, and leave
208 codestream pointer at a random spot. */
c906108c
SS
209
210static long
fba45db2 211i386_get_frame_setup (CORE_ADDR pc)
c906108c
SS
212{
213 unsigned char op;
214
215 codestream_seek (pc);
216
217 i386_follow_jump ();
218
219 op = codestream_get ();
220
221 if (op == 0x58) /* popl %eax */
222 {
fc338970
MK
223 /* This function must start with
224
225 popl %eax 0x58
226 xchgl %eax, (%esp) 0x87 0x04 0x24
227 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
228
229 (the System V compiler puts out the second `xchg'
230 instruction, and the assembler doesn't try to optimize it, so
231 the 'sib' form gets generated). This sequence is used to get
232 the address of the return buffer for a function that returns
233 a structure. */
c906108c
SS
234 int pos;
235 unsigned char buf[4];
fc338970
MK
236 static unsigned char proto1[3] = { 0x87, 0x04, 0x24 };
237 static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
238
c906108c
SS
239 pos = codestream_tell ();
240 codestream_read (buf, 4);
241 if (memcmp (buf, proto1, 3) == 0)
242 pos += 3;
243 else if (memcmp (buf, proto2, 4) == 0)
244 pos += 4;
245
246 codestream_seek (pos);
fc338970 247 op = codestream_get (); /* Update next opcode. */
c906108c
SS
248 }
249
250 if (op == 0x68 || op == 0x6a)
251 {
fc338970
MK
252 /* This function may start with
253
254 pushl constant
255 call _probe
256 addl $4, %esp
257
258 followed by
259
260 pushl %ebp
261
262 etc. */
c906108c
SS
263 int pos;
264 unsigned char buf[8];
265
fc338970 266 /* Skip past the `pushl' instruction; it has either a one-byte
c906108c
SS
267 or a four-byte operand, depending on the opcode. */
268 pos = codestream_tell ();
269 if (op == 0x68)
270 pos += 4;
271 else
272 pos += 1;
273 codestream_seek (pos);
274
fc338970
MK
275 /* Read the following 8 bytes, which should be "call _probe" (6
276 bytes) followed by "addl $4,%esp" (2 bytes). */
c906108c
SS
277 codestream_read (buf, sizeof (buf));
278 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
279 pos += sizeof (buf);
280 codestream_seek (pos);
fc338970 281 op = codestream_get (); /* Update next opcode. */
c906108c
SS
282 }
283
284 if (op == 0x55) /* pushl %ebp */
c5aa993b 285 {
fc338970 286 /* Check for "movl %esp, %ebp" -- can be written in two ways. */
c906108c
SS
287 switch (codestream_get ())
288 {
289 case 0x8b:
290 if (codestream_get () != 0xec)
fc338970 291 return -1;
c906108c
SS
292 break;
293 case 0x89:
294 if (codestream_get () != 0xe5)
fc338970 295 return -1;
c906108c
SS
296 break;
297 default:
fc338970 298 return -1;
c906108c 299 }
fc338970
MK
300 /* Check for stack adjustment
301
302 subl $XXX, %esp
303
304 NOTE: You can't subtract a 16 bit immediate from a 32 bit
305 reg, so we don't have to worry about a data16 prefix. */
c906108c
SS
306 op = codestream_peek ();
307 if (op == 0x83)
308 {
fc338970 309 /* `subl' with 8 bit immediate. */
c906108c
SS
310 codestream_get ();
311 if (codestream_get () != 0xec)
fc338970 312 /* Some instruction starting with 0x83 other than `subl'. */
c906108c
SS
313 {
314 codestream_seek (codestream_tell () - 2);
315 return 0;
316 }
fc338970
MK
317 /* `subl' with signed byte immediate (though it wouldn't
318 make sense to be negative). */
c5aa993b 319 return (codestream_get ());
c906108c
SS
320 }
321 else if (op == 0x81)
322 {
323 char buf[4];
fc338970 324 /* Maybe it is `subl' with a 32 bit immedediate. */
c5aa993b 325 codestream_get ();
c906108c 326 if (codestream_get () != 0xec)
fc338970 327 /* Some instruction starting with 0x81 other than `subl'. */
c906108c
SS
328 {
329 codestream_seek (codestream_tell () - 2);
330 return 0;
331 }
fc338970 332 /* It is `subl' with a 32 bit immediate. */
c5aa993b 333 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
334 return extract_signed_integer (buf, 4);
335 }
336 else
337 {
fc338970 338 return 0;
c906108c
SS
339 }
340 }
341 else if (op == 0xc8)
342 {
343 char buf[2];
fc338970 344 /* `enter' with 16 bit unsigned immediate. */
c5aa993b 345 codestream_read ((unsigned char *) buf, 2);
fc338970 346 codestream_get (); /* Flush final byte of enter instruction. */
c906108c
SS
347 return extract_unsigned_integer (buf, 2);
348 }
349 return (-1);
350}
351
c833a37e
MK
352/* Return the chain-pointer for FRAME. In the case of the i386, the
353 frame's nominal address is the address of a 4-byte word containing
354 the calling frame's address. */
355
356CORE_ADDR
357i386_frame_chain (struct frame_info *frame)
358{
359 if (frame->signal_handler_caller)
360 return frame->frame;
361
362 if (! inside_entry_file (frame->pc))
363 return read_memory_unsigned_integer (frame->frame, 4);
364
365 return 0;
366}
367
c906108c
SS
368/* Return number of args passed to a frame.
369 Can return -1, meaning no way to tell. */
370
371int
fba45db2 372i386_frame_num_args (struct frame_info *fi)
c906108c
SS
373{
374#if 1
375 return -1;
376#else
377 /* This loses because not only might the compiler not be popping the
fc338970
MK
378 args right after the function call, it might be popping args from
379 both this call and a previous one, and we would say there are
380 more args than there really are. */
c906108c 381
c5aa993b
JM
382 int retpc;
383 unsigned char op;
c906108c
SS
384 struct frame_info *pfi;
385
fc338970 386 /* On the i386, the instruction following the call could be:
c906108c
SS
387 popl %ecx - one arg
388 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
fc338970 389 anything else - zero args. */
c906108c
SS
390
391 int frameless;
392
392a587b 393 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c 394 if (frameless)
fc338970
MK
395 /* In the absence of a frame pointer, GDB doesn't get correct
396 values for nameless arguments. Return -1, so it doesn't print
397 any nameless arguments. */
c906108c
SS
398 return -1;
399
c5aa993b 400 pfi = get_prev_frame (fi);
c906108c
SS
401 if (pfi == 0)
402 {
fc338970
MK
403 /* NOTE: This can happen if we are looking at the frame for
404 main, because FRAME_CHAIN_VALID won't let us go into start.
405 If we have debugging symbols, that's not really a big deal;
406 it just means it will only show as many arguments to main as
407 are declared. */
c906108c
SS
408 return -1;
409 }
410 else
411 {
c5aa993b
JM
412 retpc = pfi->pc;
413 op = read_memory_integer (retpc, 1);
fc338970 414 if (op == 0x59) /* pop %ecx */
c5aa993b 415 return 1;
c906108c
SS
416 else if (op == 0x83)
417 {
c5aa993b
JM
418 op = read_memory_integer (retpc + 1, 1);
419 if (op == 0xc4)
420 /* addl $<signed imm 8 bits>, %esp */
421 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
422 else
423 return 0;
424 }
fc338970
MK
425 else if (op == 0x81) /* `add' with 32 bit immediate. */
426 {
c5aa993b
JM
427 op = read_memory_integer (retpc + 1, 1);
428 if (op == 0xc4)
429 /* addl $<imm 32>, %esp */
430 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
431 else
432 return 0;
433 }
434 else
435 {
436 return 0;
437 }
438 }
439#endif
440}
441
fc338970
MK
442/* Parse the first few instructions the function to see what registers
443 were stored.
444
445 We handle these cases:
446
447 The startup sequence can be at the start of the function, or the
448 function can start with a branch to startup code at the end.
449
450 %ebp can be set up with either the 'enter' instruction, or "pushl
451 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
452 once used in the System V compiler).
453
454 Local space is allocated just below the saved %ebp by either the
455 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
456 bit unsigned argument for space to allocate, and the 'addl'
457 instruction could have either a signed byte, or 32 bit immediate.
458
459 Next, the registers used by this function are pushed. With the
460 System V compiler they will always be in the order: %edi, %esi,
461 %ebx (and sometimes a harmless bug causes it to also save but not
462 restore %eax); however, the code below is willing to see the pushes
463 in any order, and will handle up to 8 of them.
464
465 If the setup sequence is at the end of the function, then the next
466 instruction will be a branch back to the start. */
c906108c
SS
467
468void
fba45db2 469i386_frame_init_saved_regs (struct frame_info *fip)
c906108c
SS
470{
471 long locals = -1;
472 unsigned char op;
473 CORE_ADDR dummy_bottom;
fc338970 474 CORE_ADDR addr;
c906108c
SS
475 CORE_ADDR pc;
476 int i;
c5aa993b 477
1211c4e4
AC
478 if (fip->saved_regs)
479 return;
480
481 frame_saved_regs_zalloc (fip);
c5aa993b 482
fc338970
MK
483 /* If the frame is the end of a dummy, compute where the beginning
484 would be. */
c906108c 485 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 486
fc338970 487 /* Check if the PC points in the stack, in a dummy frame. */
c5aa993b 488 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c 489 {
fc338970
MK
490 /* All registers were saved by push_call_dummy. */
491 addr = fip->frame;
c5aa993b 492 for (i = 0; i < NUM_REGS; i++)
c906108c 493 {
fc338970
MK
494 addr -= REGISTER_RAW_SIZE (i);
495 fip->saved_regs[i] = addr;
c906108c
SS
496 }
497 return;
498 }
c5aa993b 499
c906108c
SS
500 pc = get_pc_function_start (fip->pc);
501 if (pc != 0)
502 locals = i386_get_frame_setup (pc);
c5aa993b
JM
503
504 if (locals >= 0)
c906108c 505 {
fc338970 506 addr = fip->frame - 4 - locals;
c5aa993b 507 for (i = 0; i < 8; i++)
c906108c
SS
508 {
509 op = codestream_get ();
510 if (op < 0x50 || op > 0x57)
511 break;
512#ifdef I386_REGNO_TO_SYMMETRY
513 /* Dynix uses different internal numbering. Ick. */
fc338970 514 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr;
c906108c 515#else
fc338970 516 fip->saved_regs[op - 0x50] = addr;
c906108c 517#endif
fc338970 518 addr -= 4;
c906108c
SS
519 }
520 }
c5aa993b 521
1211c4e4
AC
522 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
523 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
524}
525
fc338970 526/* Return PC of first real instruction. */
c906108c
SS
527
528int
fba45db2 529i386_skip_prologue (int pc)
c906108c
SS
530{
531 unsigned char op;
532 int i;
c5aa993b 533 static unsigned char pic_pat[6] =
fc338970
MK
534 { 0xe8, 0, 0, 0, 0, /* call 0x0 */
535 0x5b, /* popl %ebx */
c5aa993b 536 };
c906108c 537 CORE_ADDR pos;
c5aa993b 538
c906108c
SS
539 if (i386_get_frame_setup (pc) < 0)
540 return (pc);
c5aa993b 541
fc338970
MK
542 /* Found valid frame setup -- codestream now points to start of push
543 instructions for saving registers. */
c5aa993b 544
fc338970 545 /* Skip over register saves. */
c906108c
SS
546 for (i = 0; i < 8; i++)
547 {
548 op = codestream_peek ();
fc338970 549 /* Break if not `pushl' instrunction. */
c5aa993b 550 if (op < 0x50 || op > 0x57)
c906108c
SS
551 break;
552 codestream_get ();
553 }
554
fc338970
MK
555 /* The native cc on SVR4 in -K PIC mode inserts the following code
556 to get the address of the global offset table (GOT) into register
557 %ebx
558
559 call 0x0
560 popl %ebx
561 movl %ebx,x(%ebp) (optional)
562 addl y,%ebx
563
c906108c
SS
564 This code is with the rest of the prologue (at the end of the
565 function), so we have to skip it to get to the first real
566 instruction at the start of the function. */
c5aa993b 567
c906108c
SS
568 pos = codestream_tell ();
569 for (i = 0; i < 6; i++)
570 {
571 op = codestream_get ();
c5aa993b 572 if (pic_pat[i] != op)
c906108c
SS
573 break;
574 }
575 if (i == 6)
576 {
577 unsigned char buf[4];
578 long delta = 6;
579
580 op = codestream_get ();
c5aa993b 581 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
582 {
583 op = codestream_get ();
fc338970 584 if (op == 0x5d) /* One byte offset from %ebp. */
c906108c
SS
585 {
586 delta += 3;
587 codestream_read (buf, 1);
588 }
fc338970 589 else if (op == 0x9d) /* Four byte offset from %ebp. */
c906108c
SS
590 {
591 delta += 6;
592 codestream_read (buf, 4);
593 }
fc338970 594 else /* Unexpected instruction. */
c5aa993b
JM
595 delta = -1;
596 op = codestream_get ();
c906108c 597 }
c5aa993b
JM
598 /* addl y,%ebx */
599 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 600 {
c5aa993b 601 pos += delta + 6;
c906108c
SS
602 }
603 }
604 codestream_seek (pos);
c5aa993b 605
c906108c 606 i386_follow_jump ();
c5aa993b 607
c906108c
SS
608 return (codestream_tell ());
609}
610
611void
fba45db2 612i386_push_dummy_frame (void)
c906108c
SS
613{
614 CORE_ADDR sp = read_register (SP_REGNUM);
615 int regnum;
616 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 617
c906108c
SS
618 sp = push_word (sp, read_register (PC_REGNUM));
619 sp = push_word (sp, read_register (FP_REGNUM));
620 write_register (FP_REGNUM, sp);
621 for (regnum = 0; regnum < NUM_REGS; regnum++)
622 {
623 read_register_gen (regnum, regbuf);
624 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
625 }
626 write_register (SP_REGNUM, sp);
627}
628
a7769679
MK
629/* Insert the (relative) function address into the call sequence
630 stored at DYMMY. */
631
632void
633i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
634 value_ptr *args, struct type *type, int gcc_p)
635{
636 int from, to, delta, loc;
637
638 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
639 from = loc + 5;
640 to = (int)(fun);
641 delta = to - from;
642
643 *((char *)(dummy) + 1) = (delta & 0xff);
644 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
645 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
646 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
647}
648
c906108c 649void
fba45db2 650i386_pop_frame (void)
c906108c
SS
651{
652 struct frame_info *frame = get_current_frame ();
653 CORE_ADDR fp;
654 int regnum;
c906108c 655 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 656
c906108c 657 fp = FRAME_FP (frame);
1211c4e4
AC
658 i386_frame_init_saved_regs (frame);
659
c5aa993b 660 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c 661 {
fc338970
MK
662 CORE_ADDR addr;
663 addr = frame->saved_regs[regnum];
664 if (addr)
c906108c 665 {
fc338970 666 read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum));
c906108c
SS
667 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
668 REGISTER_RAW_SIZE (regnum));
669 }
670 }
671 write_register (FP_REGNUM, read_memory_integer (fp, 4));
672 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
673 write_register (SP_REGNUM, fp + 8);
674 flush_cached_frames ();
675}
fc338970 676\f
c906108c
SS
677
678#ifdef GET_LONGJMP_TARGET
679
fc338970
MK
680/* Figure out where the longjmp will land. Slurp the args out of the
681 stack. We expect the first arg to be a pointer to the jmp_buf
682 structure from which we extract the pc (JB_PC) that we will land
683 at. The pc is copied into PC. This routine returns true on
684 success. */
c906108c
SS
685
686int
fba45db2 687get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
688{
689 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
690 CORE_ADDR sp, jb_addr;
691
692 sp = read_register (SP_REGNUM);
693
fc338970 694 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */
c906108c
SS
695 buf,
696 TARGET_PTR_BIT / TARGET_CHAR_BIT))
697 return 0;
698
699 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
700
701 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
702 TARGET_PTR_BIT / TARGET_CHAR_BIT))
703 return 0;
704
705 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
706
707 return 1;
708}
709
710#endif /* GET_LONGJMP_TARGET */
fc338970 711\f
c906108c 712
22f8ba57
MK
713CORE_ADDR
714i386_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
715 int struct_return, CORE_ADDR struct_addr)
716{
717 sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr);
718
719 if (struct_return)
720 {
721 char buf[4];
722
723 sp -= 4;
724 store_address (buf, 4, struct_addr);
725 write_memory (sp, buf, 4);
726 }
727
728 return sp;
729}
730
731void
732i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
733{
734 /* Do nothing. Everything was already done by i386_push_arguments. */
735}
736
1a309862
MK
737/* These registers are used for returning integers (and on some
738 targets also for returning `struct' and `union' values when their
ef9dff19 739 size and alignment match an integer type). */
1a309862
MK
740#define LOW_RETURN_REGNUM 0 /* %eax */
741#define HIGH_RETURN_REGNUM 2 /* %edx */
742
743/* Extract from an array REGBUF containing the (raw) register state, a
744 function return value of TYPE, and copy that, in virtual format,
745 into VALBUF. */
746
c906108c 747void
1a309862 748i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 749{
1a309862
MK
750 int len = TYPE_LENGTH (type);
751
1e8d0a7b
MK
752 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
753 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
754 {
755 i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf);
756 return;
757 }
1e8d0a7b
MK
758
759 if (TYPE_CODE (type) == TYPE_CODE_FLT)
c906108c 760 {
1a309862
MK
761 if (NUM_FREGS == 0)
762 {
763 warning ("Cannot find floating-point return value.");
764 memset (valbuf, 0, len);
ef9dff19 765 return;
1a309862
MK
766 }
767
768 /* Floating-point return values can be found in %st(0). */
769 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
770 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
771 {
772 /* Copy straight over, but take care of the padding. */
773 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
774 FPU_REG_RAW_SIZE);
775 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
776 }
777 else
778 {
779 /* Convert the extended floating-point number found in
780 %st(0) to the desired type. This is probably not exactly
781 how it would happen on the target itself, but it is the
782 best we can do. */
783 DOUBLEST val;
784 floatformat_to_doublest (&floatformat_i387_ext,
785 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
786 store_floating (valbuf, TYPE_LENGTH (type), val);
787 }
c906108c
SS
788 }
789 else
c5aa993b 790 {
d4f3574e
SS
791 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
792 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
793
794 if (len <= low_size)
1a309862 795 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
796 else if (len <= (low_size + high_size))
797 {
798 memcpy (valbuf,
1a309862 799 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 800 memcpy (valbuf + low_size,
1a309862 801 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
802 }
803 else
8e65ff28
AC
804 internal_error (__FILE__, __LINE__,
805 "Cannot extract return value of %d bytes long.", len);
c906108c
SS
806 }
807}
808
ef9dff19
MK
809/* Write into the appropriate registers a function return value stored
810 in VALBUF of type TYPE, given in virtual format. */
811
812void
813i386_store_return_value (struct type *type, char *valbuf)
814{
815 int len = TYPE_LENGTH (type);
816
1e8d0a7b
MK
817 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
818 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
819 {
820 i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf);
821 return;
822 }
1e8d0a7b
MK
823
824 if (TYPE_CODE (type) == TYPE_CODE_FLT)
ef9dff19
MK
825 {
826 if (NUM_FREGS == 0)
827 {
828 warning ("Cannot set floating-point return value.");
829 return;
830 }
831
832 /* Floating-point return values can be found in %st(0). */
833 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
834 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
835 {
836 /* Copy straight over. */
837 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
838 FPU_REG_RAW_SIZE);
839 }
840 else
841 {
842 char buf[FPU_REG_RAW_SIZE];
843 DOUBLEST val;
844
845 /* Convert the value found in VALBUF to the extended
846 floating point format used by the FPU. This is probably
847 not exactly how it would happen on the target itself, but
848 it is the best we can do. */
849 val = extract_floating (valbuf, TYPE_LENGTH (type));
850 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
851 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
852 FPU_REG_RAW_SIZE);
853 }
854 }
855 else
856 {
857 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
858 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
859
860 if (len <= low_size)
861 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
862 else if (len <= (low_size + high_size))
863 {
864 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
865 valbuf, low_size);
866 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
867 valbuf + low_size, len - low_size);
868 }
869 else
8e65ff28
AC
870 internal_error (__FILE__, __LINE__,
871 "Cannot store return value of %d bytes long.", len);
ef9dff19
MK
872 }
873}
f7af9647
MK
874
875/* Extract from an array REGBUF containing the (raw) register state
876 the address in which a function should return its structure value,
877 as a CORE_ADDR. */
878
879CORE_ADDR
880i386_extract_struct_value_address (char *regbuf)
881{
882 return extract_address (&regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)],
883 REGISTER_RAW_SIZE (LOW_RETURN_REGNUM));
884}
fc338970 885\f
ef9dff19 886
ac27f131
MK
887/* Convert data from raw format for register REGNUM in buffer FROM to
888 virtual format with type TYPE in buffer TO. In principle both
889 formats are identical except that the virtual format has two extra
890 bytes appended that aren't used. We set these to zero. */
891
892void
893i386_register_convert_to_virtual (int regnum, struct type *type,
894 char *from, char *to)
895{
896 /* Copy straight over, but take care of the padding. */
897 memcpy (to, from, FPU_REG_RAW_SIZE);
898 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
899}
900
901/* Convert data from virtual format with type TYPE in buffer FROM to
902 raw format for register REGNUM in buffer TO. Simply omit the two
903 unused bytes. */
904
905void
906i386_register_convert_to_raw (struct type *type, int regnum,
907 char *from, char *to)
908{
909 memcpy (to, from, FPU_REG_RAW_SIZE);
910}
ac27f131 911\f
fc338970 912
c906108c 913#ifdef I386V4_SIGTRAMP_SAVED_PC
fc338970
MK
914/* Get saved user PC for sigtramp from the pushed ucontext on the
915 stack for all three variants of SVR4 sigtramps. */
c906108c
SS
916
917CORE_ADDR
fba45db2 918i386v4_sigtramp_saved_pc (struct frame_info *frame)
c906108c
SS
919{
920 CORE_ADDR saved_pc_offset = 4;
921 char *name = NULL;
922
923 find_pc_partial_function (frame->pc, &name, NULL, NULL);
924 if (name)
925 {
926 if (STREQ (name, "_sigreturn"))
927 saved_pc_offset = 132 + 14 * 4;
928 else if (STREQ (name, "_sigacthandler"))
929 saved_pc_offset = 80 + 14 * 4;
930 else if (STREQ (name, "sigvechandler"))
931 saved_pc_offset = 120 + 14 * 4;
932 }
933
934 if (frame->next)
935 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
936 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
937}
938#endif /* I386V4_SIGTRAMP_SAVED_PC */
fc338970 939\f
a0b3c4fd 940
c906108c 941#ifdef STATIC_TRANSFORM_NAME
fc338970
MK
942/* SunPRO encodes the static variables. This is not related to C++
943 mangling, it is done for C too. */
c906108c
SS
944
945char *
fba45db2 946sunpro_static_transform_name (char *name)
c906108c
SS
947{
948 char *p;
949 if (IS_STATIC_TRANSFORM_NAME (name))
950 {
fc338970
MK
951 /* For file-local statics there will be a period, a bunch of
952 junk (the contents of which match a string given in the
c5aa993b
JM
953 N_OPT), a period and the name. For function-local statics
954 there will be a bunch of junk (which seems to change the
955 second character from 'A' to 'B'), a period, the name of the
956 function, and the name. So just skip everything before the
957 last period. */
c906108c
SS
958 p = strrchr (name, '.');
959 if (p != NULL)
960 name = p + 1;
961 }
962 return name;
963}
964#endif /* STATIC_TRANSFORM_NAME */
fc338970 965\f
c906108c 966
fc338970 967/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
c906108c
SS
968
969CORE_ADDR
fba45db2 970skip_trampoline_code (CORE_ADDR pc, char *name)
c906108c 971{
fc338970 972 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 973 {
c5aa993b 974 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 975 struct minimal_symbol *indsym =
fc338970 976 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
c5aa993b 977 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 978
c5aa993b 979 if (symname)
c906108c 980 {
c5aa993b
JM
981 if (strncmp (symname, "__imp_", 6) == 0
982 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
983 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
984 }
985 }
fc338970 986 return 0; /* Not a trampoline. */
c906108c 987}
fc338970
MK
988\f
989
990/* We have two flavours of disassembly. The machinery on this page
991 deals with switching between those. */
c906108c
SS
992
993static int
fba45db2 994gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
995{
996 if (disassembly_flavor == att_flavor)
997 return print_insn_i386_att (memaddr, info);
998 else if (disassembly_flavor == intel_flavor)
999 return print_insn_i386_intel (memaddr, info);
fc338970
MK
1000 /* Never reached -- disassembly_flavour is always either att_flavor
1001 or intel_flavor. */
e1e9e218 1002 internal_error (__FILE__, __LINE__, "failed internal consistency check");
7a292a7a
SS
1003}
1004
fc338970
MK
1005/* If the disassembly mode is intel, we have to also switch the bfd
1006 mach_type. This function is run in the set disassembly_flavor
7a292a7a
SS
1007 command, and does that. */
1008
1009static void
fba45db2
KB
1010set_disassembly_flavor_sfunc (char *args, int from_tty,
1011 struct cmd_list_element *c)
7a292a7a
SS
1012{
1013 set_disassembly_flavor ();
7a292a7a
SS
1014}
1015
1016static void
fba45db2 1017set_disassembly_flavor (void)
7a292a7a
SS
1018{
1019 if (disassembly_flavor == att_flavor)
1020 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
1021 else if (disassembly_flavor == intel_flavor)
fc338970
MK
1022 set_architecture_from_arch_mach (bfd_arch_i386,
1023 bfd_mach_i386_i386_intel_syntax);
c906108c 1024}
fc338970 1025\f
2acceee2 1026
28e9e0f0
MK
1027/* Provide a prototype to silence -Wmissing-prototypes. */
1028void _initialize_i386_tdep (void);
1029
c906108c 1030void
fba45db2 1031_initialize_i386_tdep (void)
c906108c 1032{
917317f4
JM
1033 /* Initialize the table saying where each register starts in the
1034 register file. */
1035 {
1036 int i, offset;
1037
1038 offset = 0;
1039 for (i = 0; i < MAX_NUM_REGS; i++)
1040 {
1041 i386_register_byte[i] = offset;
1042 offset += i386_register_raw_size[i];
1043 }
1044 }
1045
1046 /* Initialize the table of virtual register sizes. */
1047 {
1048 int i;
1049
1050 for (i = 0; i < MAX_NUM_REGS; i++)
1051 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1052 }
c5aa993b 1053
c906108c
SS
1054 tm_print_insn = gdb_print_insn_i386;
1055 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1056
fc338970 1057 /* Add the variable that controls the disassembly flavor. */
917317f4
JM
1058 {
1059 struct cmd_list_element *new_cmd;
7a292a7a 1060
917317f4
JM
1061 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1062 valid_flavors,
1ed2a135 1063 &disassembly_flavor,
fc338970
MK
1064 "\
1065Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1066and the default value is \"att\".",
917317f4
JM
1067 &setlist);
1068 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1069 add_show_from_set (new_cmd, &showlist);
1070 }
c5aa993b 1071
7a292a7a 1072 /* Finally, initialize the disassembly flavor to the default given
fc338970 1073 in the disassembly_flavor variable. */
7a292a7a 1074 set_disassembly_flavor ();
c906108c 1075}