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c906108c
SS
1/* Intel 386 target-dependent stuff.
2 Copyright (C) 1988, 1989, 1991, 1994, 1995, 1996, 1998
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "gdb_string.h"
24#include "frame.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "target.h"
28#include "floatformat.h"
29#include "symtab.h"
30#include "gdbcmd.h"
31#include "command.h"
32
33static long i386_get_frame_setup PARAMS ((CORE_ADDR));
34
35static void i386_follow_jump PARAMS ((void));
36
37static void codestream_read PARAMS ((unsigned char *, int));
38
39static void codestream_seek PARAMS ((CORE_ADDR));
40
41static unsigned char codestream_fill PARAMS ((int));
42
43CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
44
45static int gdb_print_insn_i386 (bfd_vma, disassemble_info *);
46
47void _initialize_i386_tdep PARAMS ((void));
48
49/* This is the variable the is set with "set disassembly-flavor",
c5aa993b 50 and its legitimate values. */
c906108c
SS
51static char att_flavor[] = "att";
52static char intel_flavor[] = "intel";
c5aa993b
JM
53static char *valid_flavors[] =
54{
c906108c
SS
55 att_flavor,
56 intel_flavor,
57 NULL
58};
59static char *disassembly_flavor = att_flavor;
60
d4f3574e
SS
61static void i386_print_register PARAMS ((char *, int, int));
62
7a292a7a
SS
63/* This is used to keep the bfd arch_info in sync with the disassembly flavor. */
64static void set_disassembly_flavor_sfunc PARAMS ((char *, int, struct cmd_list_element *));
d4f3574e 65static void set_disassembly_flavor PARAMS ((void));
7a292a7a 66
c906108c
SS
67/* Stdio style buffering was used to minimize calls to ptrace, but this
68 buffering did not take into account that the code section being accessed
69 may not be an even number of buffers long (even if the buffer is only
70 sizeof(int) long). In cases where the code section size happened to
71 be a non-integral number of buffers long, attempting to read the last
72 buffer would fail. Simply using target_read_memory and ignoring errors,
73 rather than read_memory, is not the correct solution, since legitimate
74 access errors would then be totally ignored. To properly handle this
75 situation and continue to use buffering would require that this code
76 be able to determine the minimum code section size granularity (not the
77 alignment of the section itself, since the actual failing case that
78 pointed out this problem had a section alignment of 4 but was not a
79 multiple of 4 bytes long), on a target by target basis, and then
80 adjust it's buffer size accordingly. This is messy, but potentially
81 feasible. It probably needs the bfd library's help and support. For
82 now, the buffer size is set to 1. (FIXME -fnf) */
83
84#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
85static CORE_ADDR codestream_next_addr;
86static CORE_ADDR codestream_addr;
87static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
88static int codestream_off;
89static int codestream_cnt;
90
91#define codestream_tell() (codestream_addr + codestream_off)
92#define codestream_peek() (codestream_cnt == 0 ? \
93 codestream_fill(1): codestream_buf[codestream_off])
94#define codestream_get() (codestream_cnt-- == 0 ? \
95 codestream_fill(0) : codestream_buf[codestream_off++])
96
c5aa993b 97static unsigned char
c906108c 98codestream_fill (peek_flag)
c5aa993b 99 int peek_flag;
c906108c
SS
100{
101 codestream_addr = codestream_next_addr;
102 codestream_next_addr += CODESTREAM_BUFSIZ;
103 codestream_off = 0;
104 codestream_cnt = CODESTREAM_BUFSIZ;
105 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 106
c906108c 107 if (peek_flag)
c5aa993b 108 return (codestream_peek ());
c906108c 109 else
c5aa993b 110 return (codestream_get ());
c906108c
SS
111}
112
113static void
114codestream_seek (place)
c5aa993b 115 CORE_ADDR place;
c906108c
SS
116{
117 codestream_next_addr = place / CODESTREAM_BUFSIZ;
118 codestream_next_addr *= CODESTREAM_BUFSIZ;
119 codestream_cnt = 0;
120 codestream_fill (1);
c5aa993b 121 while (codestream_tell () != place)
c906108c
SS
122 codestream_get ();
123}
124
125static void
126codestream_read (buf, count)
127 unsigned char *buf;
128 int count;
129{
130 unsigned char *p;
131 int i;
132 p = buf;
133 for (i = 0; i < count; i++)
134 *p++ = codestream_get ();
135}
136
137/* next instruction is a jump, move to target */
138
139static void
140i386_follow_jump ()
141{
142 unsigned char buf[4];
143 long delta;
144
145 int data16;
146 CORE_ADDR pos;
147
148 pos = codestream_tell ();
149
150 data16 = 0;
151 if (codestream_peek () == 0x66)
152 {
153 codestream_get ();
154 data16 = 1;
155 }
156
157 switch (codestream_get ())
158 {
159 case 0xe9:
160 /* relative jump: if data16 == 0, disp32, else disp16 */
161 if (data16)
162 {
163 codestream_read (buf, 2);
164 delta = extract_signed_integer (buf, 2);
165
166 /* include size of jmp inst (including the 0x66 prefix). */
c5aa993b 167 pos += delta + 4;
c906108c
SS
168 }
169 else
170 {
171 codestream_read (buf, 4);
172 delta = extract_signed_integer (buf, 4);
173
174 pos += delta + 5;
175 }
176 break;
177 case 0xeb:
178 /* relative jump, disp8 (ignore data16) */
179 codestream_read (buf, 1);
180 /* Sign-extend it. */
181 delta = extract_signed_integer (buf, 1);
182
183 pos += delta + 2;
184 break;
185 }
186 codestream_seek (pos);
187}
188
189/*
190 * find & return amound a local space allocated, and advance codestream to
191 * first register push (if any)
192 *
193 * if entry sequence doesn't make sense, return -1, and leave
194 * codestream pointer random
195 */
196
197static long
198i386_get_frame_setup (pc)
199 CORE_ADDR pc;
200{
201 unsigned char op;
202
203 codestream_seek (pc);
204
205 i386_follow_jump ();
206
207 op = codestream_get ();
208
209 if (op == 0x58) /* popl %eax */
210 {
211 /*
212 * this function must start with
213 *
c5aa993b 214 * popl %eax 0x58
c906108c
SS
215 * xchgl %eax, (%esp) 0x87 0x04 0x24
216 * or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
217 *
218 * (the system 5 compiler puts out the second xchg
219 * inst, and the assembler doesn't try to optimize it,
220 * so the 'sib' form gets generated)
221 *
222 * this sequence is used to get the address of the return
223 * buffer for a function that returns a structure
224 */
225 int pos;
226 unsigned char buf[4];
c5aa993b
JM
227 static unsigned char proto1[3] =
228 {0x87, 0x04, 0x24};
229 static unsigned char proto2[4] =
230 {0x87, 0x44, 0x24, 0x00};
c906108c
SS
231 pos = codestream_tell ();
232 codestream_read (buf, 4);
233 if (memcmp (buf, proto1, 3) == 0)
234 pos += 3;
235 else if (memcmp (buf, proto2, 4) == 0)
236 pos += 4;
237
238 codestream_seek (pos);
c5aa993b 239 op = codestream_get (); /* update next opcode */
c906108c
SS
240 }
241
242 if (op == 0x68 || op == 0x6a)
243 {
244 /*
245 * this function may start with
246 *
247 * pushl constant
248 * call _probe
249 * addl $4, %esp
250 * followed by
251 * pushl %ebp
252 * etc.
253 */
254 int pos;
255 unsigned char buf[8];
256
257 /* Skip past the pushl instruction; it has either a one-byte
258 or a four-byte operand, depending on the opcode. */
259 pos = codestream_tell ();
260 if (op == 0x68)
261 pos += 4;
262 else
263 pos += 1;
264 codestream_seek (pos);
265
266 /* Read the following 8 bytes, which should be "call _probe" (6 bytes)
267 followed by "addl $4,%esp" (2 bytes). */
268 codestream_read (buf, sizeof (buf));
269 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
270 pos += sizeof (buf);
271 codestream_seek (pos);
c5aa993b 272 op = codestream_get (); /* update next opcode */
c906108c
SS
273 }
274
275 if (op == 0x55) /* pushl %ebp */
c5aa993b 276 {
c906108c
SS
277 /* check for movl %esp, %ebp - can be written two ways */
278 switch (codestream_get ())
279 {
280 case 0x8b:
281 if (codestream_get () != 0xec)
282 return (-1);
283 break;
284 case 0x89:
285 if (codestream_get () != 0xe5)
286 return (-1);
287 break;
288 default:
289 return (-1);
290 }
291 /* check for stack adjustment
c5aa993b 292
c906108c
SS
293 * subl $XXX, %esp
294 *
295 * note: you can't subtract a 16 bit immediate
296 * from a 32 bit reg, so we don't have to worry
297 * about a data16 prefix
298 */
299 op = codestream_peek ();
300 if (op == 0x83)
301 {
302 /* subl with 8 bit immed */
303 codestream_get ();
304 if (codestream_get () != 0xec)
305 /* Some instruction starting with 0x83 other than subl. */
306 {
307 codestream_seek (codestream_tell () - 2);
308 return 0;
309 }
310 /* subl with signed byte immediate
311 * (though it wouldn't make sense to be negative)
312 */
c5aa993b 313 return (codestream_get ());
c906108c
SS
314 }
315 else if (op == 0x81)
316 {
317 char buf[4];
318 /* Maybe it is subl with 32 bit immedediate. */
c5aa993b 319 codestream_get ();
c906108c
SS
320 if (codestream_get () != 0xec)
321 /* Some instruction starting with 0x81 other than subl. */
322 {
323 codestream_seek (codestream_tell () - 2);
324 return 0;
325 }
326 /* It is subl with 32 bit immediate. */
c5aa993b 327 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
328 return extract_signed_integer (buf, 4);
329 }
330 else
331 {
332 return (0);
333 }
334 }
335 else if (op == 0xc8)
336 {
337 char buf[2];
338 /* enter instruction: arg is 16 bit unsigned immed */
c5aa993b
JM
339 codestream_read ((unsigned char *) buf, 2);
340 codestream_get (); /* flush final byte of enter instruction */
c906108c
SS
341 return extract_unsigned_integer (buf, 2);
342 }
343 return (-1);
344}
345
346/* Return number of args passed to a frame.
347 Can return -1, meaning no way to tell. */
348
349int
350i386_frame_num_args (fi)
351 struct frame_info *fi;
352{
353#if 1
354 return -1;
355#else
356 /* This loses because not only might the compiler not be popping the
357 args right after the function call, it might be popping args from both
358 this call and a previous one, and we would say there are more args
359 than there really are. */
360
c5aa993b
JM
361 int retpc;
362 unsigned char op;
c906108c
SS
363 struct frame_info *pfi;
364
365 /* on the 386, the instruction following the call could be:
366 popl %ecx - one arg
367 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
368 anything else - zero args */
369
370 int frameless;
371
392a587b 372 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c
SS
373 if (frameless)
374 /* In the absence of a frame pointer, GDB doesn't get correct values
375 for nameless arguments. Return -1, so it doesn't print any
376 nameless arguments. */
377 return -1;
378
c5aa993b 379 pfi = get_prev_frame (fi);
c906108c
SS
380 if (pfi == 0)
381 {
382 /* Note: this can happen if we are looking at the frame for
c5aa993b
JM
383 main, because FRAME_CHAIN_VALID won't let us go into
384 start. If we have debugging symbols, that's not really
385 a big deal; it just means it will only show as many arguments
386 to main as are declared. */
c906108c
SS
387 return -1;
388 }
389 else
390 {
c5aa993b
JM
391 retpc = pfi->pc;
392 op = read_memory_integer (retpc, 1);
393 if (op == 0x59)
394 /* pop %ecx */
395 return 1;
c906108c
SS
396 else if (op == 0x83)
397 {
c5aa993b
JM
398 op = read_memory_integer (retpc + 1, 1);
399 if (op == 0xc4)
400 /* addl $<signed imm 8 bits>, %esp */
401 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
402 else
403 return 0;
404 }
405 else if (op == 0x81)
c5aa993b
JM
406 { /* add with 32 bit immediate */
407 op = read_memory_integer (retpc + 1, 1);
408 if (op == 0xc4)
409 /* addl $<imm 32>, %esp */
410 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
411 else
412 return 0;
413 }
414 else
415 {
416 return 0;
417 }
418 }
419#endif
420}
421
422/*
423 * parse the first few instructions of the function to see
424 * what registers were stored.
425 *
426 * We handle these cases:
427 *
428 * The startup sequence can be at the start of the function,
429 * or the function can start with a branch to startup code at the end.
430 *
431 * %ebp can be set up with either the 'enter' instruction, or
432 * 'pushl %ebp, movl %esp, %ebp' (enter is too slow to be useful,
433 * but was once used in the sys5 compiler)
434 *
435 * Local space is allocated just below the saved %ebp by either the
436 * 'enter' instruction, or by 'subl $<size>, %esp'. 'enter' has
437 * a 16 bit unsigned argument for space to allocate, and the
438 * 'addl' instruction could have either a signed byte, or
439 * 32 bit immediate.
440 *
441 * Next, the registers used by this function are pushed. In
442 * the sys5 compiler they will always be in the order: %edi, %esi, %ebx
443 * (and sometimes a harmless bug causes it to also save but not restore %eax);
444 * however, the code below is willing to see the pushes in any order,
445 * and will handle up to 8 of them.
446 *
447 * If the setup sequence is at the end of the function, then the
448 * next instruction will be a branch back to the start.
449 */
450
451void
452i386_frame_find_saved_regs (fip, fsrp)
453 struct frame_info *fip;
454 struct frame_saved_regs *fsrp;
455{
456 long locals = -1;
457 unsigned char op;
458 CORE_ADDR dummy_bottom;
459 CORE_ADDR adr;
460 CORE_ADDR pc;
461 int i;
c5aa993b 462
c906108c 463 memset (fsrp, 0, sizeof *fsrp);
c5aa993b 464
c906108c
SS
465 /* if frame is the end of a dummy, compute where the
466 * beginning would be
467 */
468 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 469
c906108c 470 /* check if the PC is in the stack, in a dummy frame */
c5aa993b 471 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c
SS
472 {
473 /* all regs were saved by push_call_dummy () */
474 adr = fip->frame;
c5aa993b 475 for (i = 0; i < NUM_REGS; i++)
c906108c
SS
476 {
477 adr -= REGISTER_RAW_SIZE (i);
478 fsrp->regs[i] = adr;
479 }
480 return;
481 }
c5aa993b 482
c906108c
SS
483 pc = get_pc_function_start (fip->pc);
484 if (pc != 0)
485 locals = i386_get_frame_setup (pc);
c5aa993b
JM
486
487 if (locals >= 0)
c906108c
SS
488 {
489 adr = fip->frame - 4 - locals;
c5aa993b 490 for (i = 0; i < 8; i++)
c906108c
SS
491 {
492 op = codestream_get ();
493 if (op < 0x50 || op > 0x57)
494 break;
495#ifdef I386_REGNO_TO_SYMMETRY
496 /* Dynix uses different internal numbering. Ick. */
c5aa993b 497 fsrp->regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = adr;
c906108c
SS
498#else
499 fsrp->regs[op - 0x50] = adr;
500#endif
501 adr -= 4;
502 }
503 }
c5aa993b 504
c906108c
SS
505 fsrp->regs[PC_REGNUM] = fip->frame + 4;
506 fsrp->regs[FP_REGNUM] = fip->frame;
507}
508
509/* return pc of first real instruction */
510
511int
512i386_skip_prologue (pc)
513 int pc;
514{
515 unsigned char op;
516 int i;
c5aa993b
JM
517 static unsigned char pic_pat[6] =
518 {0xe8, 0, 0, 0, 0, /* call 0x0 */
519 0x5b, /* popl %ebx */
520 };
c906108c 521 CORE_ADDR pos;
c5aa993b 522
c906108c
SS
523 if (i386_get_frame_setup (pc) < 0)
524 return (pc);
c5aa993b 525
c906108c
SS
526 /* found valid frame setup - codestream now points to
527 * start of push instructions for saving registers
528 */
c5aa993b 529
c906108c
SS
530 /* skip over register saves */
531 for (i = 0; i < 8; i++)
532 {
533 op = codestream_peek ();
534 /* break if not pushl inst */
c5aa993b 535 if (op < 0x50 || op > 0x57)
c906108c
SS
536 break;
537 codestream_get ();
538 }
539
540 /* The native cc on SVR4 in -K PIC mode inserts the following code to get
541 the address of the global offset table (GOT) into register %ebx.
c5aa993b
JM
542 call 0x0
543 popl %ebx
544 movl %ebx,x(%ebp) (optional)
545 addl y,%ebx
c906108c
SS
546 This code is with the rest of the prologue (at the end of the
547 function), so we have to skip it to get to the first real
548 instruction at the start of the function. */
c5aa993b 549
c906108c
SS
550 pos = codestream_tell ();
551 for (i = 0; i < 6; i++)
552 {
553 op = codestream_get ();
c5aa993b 554 if (pic_pat[i] != op)
c906108c
SS
555 break;
556 }
557 if (i == 6)
558 {
559 unsigned char buf[4];
560 long delta = 6;
561
562 op = codestream_get ();
c5aa993b 563 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
564 {
565 op = codestream_get ();
c5aa993b 566 if (op == 0x5d) /* one byte offset from %ebp */
c906108c
SS
567 {
568 delta += 3;
569 codestream_read (buf, 1);
570 }
c5aa993b 571 else if (op == 0x9d) /* four byte offset from %ebp */
c906108c
SS
572 {
573 delta += 6;
574 codestream_read (buf, 4);
575 }
c5aa993b
JM
576 else /* unexpected instruction */
577 delta = -1;
578 op = codestream_get ();
c906108c 579 }
c5aa993b
JM
580 /* addl y,%ebx */
581 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 582 {
c5aa993b 583 pos += delta + 6;
c906108c
SS
584 }
585 }
586 codestream_seek (pos);
c5aa993b 587
c906108c 588 i386_follow_jump ();
c5aa993b 589
c906108c
SS
590 return (codestream_tell ());
591}
592
593void
594i386_push_dummy_frame ()
595{
596 CORE_ADDR sp = read_register (SP_REGNUM);
597 int regnum;
598 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 599
c906108c
SS
600 sp = push_word (sp, read_register (PC_REGNUM));
601 sp = push_word (sp, read_register (FP_REGNUM));
602 write_register (FP_REGNUM, sp);
603 for (regnum = 0; regnum < NUM_REGS; regnum++)
604 {
605 read_register_gen (regnum, regbuf);
606 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
607 }
608 write_register (SP_REGNUM, sp);
609}
610
611void
612i386_pop_frame ()
613{
614 struct frame_info *frame = get_current_frame ();
615 CORE_ADDR fp;
616 int regnum;
617 struct frame_saved_regs fsr;
618 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 619
c906108c
SS
620 fp = FRAME_FP (frame);
621 get_frame_saved_regs (frame, &fsr);
c5aa993b 622 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c
SS
623 {
624 CORE_ADDR adr;
625 adr = fsr.regs[regnum];
626 if (adr)
627 {
628 read_memory (adr, regbuf, REGISTER_RAW_SIZE (regnum));
629 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
630 REGISTER_RAW_SIZE (regnum));
631 }
632 }
633 write_register (FP_REGNUM, read_memory_integer (fp, 4));
634 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
635 write_register (SP_REGNUM, fp + 8);
636 flush_cached_frames ();
637}
638
639#ifdef GET_LONGJMP_TARGET
640
641/* Figure out where the longjmp will land. Slurp the args out of the stack.
642 We expect the first arg to be a pointer to the jmp_buf structure from which
643 we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
644 This routine returns true on success. */
645
646int
c5aa993b 647get_longjmp_target (pc)
c906108c
SS
648 CORE_ADDR *pc;
649{
650 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
651 CORE_ADDR sp, jb_addr;
652
653 sp = read_register (SP_REGNUM);
654
c5aa993b 655 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack */
c906108c
SS
656 buf,
657 TARGET_PTR_BIT / TARGET_CHAR_BIT))
658 return 0;
659
660 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
661
662 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
663 TARGET_PTR_BIT / TARGET_CHAR_BIT))
664 return 0;
665
666 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
667
668 return 1;
669}
670
671#endif /* GET_LONGJMP_TARGET */
672
673void
c5aa993b 674i386_extract_return_value (type, regbuf, valbuf)
c906108c
SS
675 struct type *type;
676 char regbuf[REGISTER_BYTES];
677 char *valbuf;
678{
d4f3574e
SS
679 /* On AIX and i386 GNU/Linux, floating point values are returned in
680 floating point registers. */
681#if defined(I386_AIX_TARGET) || defined(I386_GNULINUX_TARGET)
c5aa993b 682 if (TYPE_CODE_FLT == TYPE_CODE (type))
c906108c
SS
683 {
684 double d;
685 /* 387 %st(0), gcc uses this */
686 floatformat_to_double (&floatformat_i387_ext,
d4f3574e 687 &regbuf[REGISTER_BYTE(FPDATA_REGNUM)],
c906108c
SS
688 &d);
689 store_floating (valbuf, TYPE_LENGTH (type), d);
690 }
691 else
d4f3574e 692#endif /* I386_AIX_TARGET || I386_GNULINUX_TARGET*/
c5aa993b 693 {
d4f3574e
SS
694 int len = TYPE_LENGTH (type);
695 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
696 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
697
698 if (len <= low_size)
699 memcpy (valbuf, regbuf + REGISTER_BYTE (LOW_RETURN_REGNUM), len);
700 else if (len <= (low_size + high_size))
701 {
702 memcpy (valbuf,
703 regbuf + REGISTER_BYTE (LOW_RETURN_REGNUM),
704 low_size);
705 memcpy (valbuf + low_size,
706 regbuf + REGISTER_BYTE (HIGH_RETURN_REGNUM),
707 len - low_size);
708 }
709 else
710 error ("GDB bug: i386-tdep.c (i386_extract_return_value): Don't know how to find a return value %d bytes long", len);
c906108c
SS
711 }
712}
713
714#ifdef I386V4_SIGTRAMP_SAVED_PC
715/* Get saved user PC for sigtramp from the pushed ucontext on the stack
716 for all three variants of SVR4 sigtramps. */
717
718CORE_ADDR
719i386v4_sigtramp_saved_pc (frame)
720 struct frame_info *frame;
721{
722 CORE_ADDR saved_pc_offset = 4;
723 char *name = NULL;
724
725 find_pc_partial_function (frame->pc, &name, NULL, NULL);
726 if (name)
727 {
728 if (STREQ (name, "_sigreturn"))
729 saved_pc_offset = 132 + 14 * 4;
730 else if (STREQ (name, "_sigacthandler"))
731 saved_pc_offset = 80 + 14 * 4;
732 else if (STREQ (name, "sigvechandler"))
733 saved_pc_offset = 120 + 14 * 4;
734 }
735
736 if (frame->next)
737 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
738 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
739}
740#endif /* I386V4_SIGTRAMP_SAVED_PC */
741
a0b3c4fd
JM
742#ifdef I386_LINUX_SIGTRAMP
743
744/* When the i386 Linux kernel calls a signal handler, the return
745 address points to a bit of code on the stack. This function
746 returns whether the PC appears to be within this bit of code.
747
748 The instruction sequence is
749 pop %eax
750 mov $0x77,%eax
751 int $0x80
752 or 0x58 0xb8 0x77 0x00 0x00 0x00 0xcd 0x80.
753
754 Checking for the code sequence should be somewhat reliable, because
755 the effect is to call the system call sigreturn. This is unlikely
756 to occur anywhere other than a signal trampoline.
757
758 It kind of sucks that we have to read memory from the process in
759 order to identify a signal trampoline, but there doesn't seem to be
760 any other way. The IN_SIGTRAMP macro in tm-linux.h arranges to
761 only call us if no function name could be identified, which should
762 be the case since the code is on the stack. */
763
764#define LINUX_SIGTRAMP_INSN0 (0x58) /* pop %eax */
765#define LINUX_SIGTRAMP_OFFSET0 (0)
766#define LINUX_SIGTRAMP_INSN1 (0xb8) /* mov $NNNN,%eax */
767#define LINUX_SIGTRAMP_OFFSET1 (1)
768#define LINUX_SIGTRAMP_INSN2 (0xcd) /* int */
769#define LINUX_SIGTRAMP_OFFSET2 (6)
770
771static const unsigned char linux_sigtramp_code[] =
772{
773 LINUX_SIGTRAMP_INSN0, /* pop %eax */
774 LINUX_SIGTRAMP_INSN1, 0x77, 0x00, 0x00, 0x00, /* mov $0x77,%eax */
775 LINUX_SIGTRAMP_INSN2, 0x80 /* int $0x80 */
776};
777
778#define LINUX_SIGTRAMP_LEN (sizeof linux_sigtramp_code)
779
780/* If PC is in a sigtramp routine, return the address of the start of
781 the routine. Otherwise, return 0. */
782
783static CORE_ADDR
784i386_linux_sigtramp_start (pc)
785 CORE_ADDR pc;
786{
787 unsigned char buf[LINUX_SIGTRAMP_LEN];
788
789 /* We only recognize a signal trampoline if PC is at the start of
790 one of the three instructions. We optimize for finding the PC at
791 the start, as will be the case when the trampoline is not the
792 first frame on the stack. We assume that in the case where the
793 PC is not at the start of the instruction sequence, there will be
794 a few trailing readable bytes on the stack. */
795
796 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
797 return 0;
798
799 if (buf[0] != LINUX_SIGTRAMP_INSN0)
800 {
801 int adjust;
802
803 switch (buf[0])
804 {
805 case LINUX_SIGTRAMP_INSN1:
806 adjust = LINUX_SIGTRAMP_OFFSET1;
807 break;
808 case LINUX_SIGTRAMP_INSN2:
809 adjust = LINUX_SIGTRAMP_OFFSET2;
810 break;
811 default:
812 return 0;
813 }
814
815 pc -= adjust;
816
817 if (read_memory_nobpt (pc, (char *) buf, LINUX_SIGTRAMP_LEN) != 0)
818 return 0;
819 }
820
821 if (memcmp (buf, linux_sigtramp_code, LINUX_SIGTRAMP_LEN) != 0)
822 return 0;
823
824 return pc;
825}
826
827/* Return whether PC is in a Linux sigtramp routine. */
828
829int
830i386_linux_sigtramp (pc)
831 CORE_ADDR pc;
832{
833 return i386_linux_sigtramp_start (pc) != 0;
834}
835
836/* Assuming FRAME is for a Linux sigtramp routine, return the saved
837 program counter. The Linux kernel will set up a sigcontext
838 structure immediately before the sigtramp routine on the stack. */
839
840CORE_ADDR
841i386_linux_sigtramp_saved_pc (frame)
842 struct frame_info *frame;
843{
844 CORE_ADDR pc;
845
846 pc = i386_linux_sigtramp_start (frame->pc);
847 if (pc == 0)
848 error ("i386_linux_sigtramp_saved_pc called when no sigtramp");
849 return read_memory_integer ((pc
850 - LINUX_SIGCONTEXT_SIZE
851 + LINUX_SIGCONTEXT_PC_OFFSET),
852 4);
853}
854
855/* Assuming FRAME is for a Linux sigtramp routine, return the saved
856 stack pointer. The Linux kernel will set up a sigcontext structure
857 immediately before the sigtramp routine on the stack. */
858
859CORE_ADDR
860i386_linux_sigtramp_saved_sp (frame)
861 struct frame_info *frame;
862{
863 CORE_ADDR pc;
864
865 pc = i386_linux_sigtramp_start (frame->pc);
866 if (pc == 0)
867 error ("i386_linux_sigtramp_saved_sp called when no sigtramp");
868 return read_memory_integer ((pc
869 - LINUX_SIGCONTEXT_SIZE
870 + LINUX_SIGCONTEXT_SP_OFFSET),
871 4);
872}
873
874#endif /* I386_LINUX_SIGTRAMP */
875
c906108c
SS
876#ifdef STATIC_TRANSFORM_NAME
877/* SunPRO encodes the static variables. This is not related to C++ mangling,
878 it is done for C too. */
879
880char *
881sunpro_static_transform_name (name)
882 char *name;
883{
884 char *p;
885 if (IS_STATIC_TRANSFORM_NAME (name))
886 {
887 /* For file-local statics there will be a period, a bunch
c5aa993b
JM
888 of junk (the contents of which match a string given in the
889 N_OPT), a period and the name. For function-local statics
890 there will be a bunch of junk (which seems to change the
891 second character from 'A' to 'B'), a period, the name of the
892 function, and the name. So just skip everything before the
893 last period. */
c906108c
SS
894 p = strrchr (name, '.');
895 if (p != NULL)
896 name = p + 1;
897 }
898 return name;
899}
900#endif /* STATIC_TRANSFORM_NAME */
901
902
903
904/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
905
906CORE_ADDR
907skip_trampoline_code (pc, name)
908 CORE_ADDR pc;
909 char *name;
910{
c5aa993b 911 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 912 {
c5aa993b 913 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 914 struct minimal_symbol *indsym =
c5aa993b
JM
915 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
916 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 917
c5aa993b 918 if (symname)
c906108c 919 {
c5aa993b
JM
920 if (strncmp (symname, "__imp_", 6) == 0
921 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
922 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
923 }
924 }
925 return 0; /* not a trampoline */
926}
927
928static int
929gdb_print_insn_i386 (memaddr, info)
930 bfd_vma memaddr;
c5aa993b 931 disassemble_info *info;
c906108c
SS
932{
933 if (disassembly_flavor == att_flavor)
934 return print_insn_i386_att (memaddr, info);
935 else if (disassembly_flavor == intel_flavor)
936 return print_insn_i386_intel (memaddr, info);
7a292a7a
SS
937 /* Never reached - disassembly_flavour is always either att_flavor
938 or intel_flavor */
939 abort ();
940}
941
942/* If the disassembly mode is intel, we have to also switch the
943 bfd mach_type. This function is run in the set disassembly_flavor
944 command, and does that. */
945
946static void
947set_disassembly_flavor_sfunc (args, from_tty, c)
948 char *args;
949 int from_tty;
950 struct cmd_list_element *c;
951{
952 set_disassembly_flavor ();
7a292a7a
SS
953}
954
955static void
956set_disassembly_flavor ()
957{
958 if (disassembly_flavor == att_flavor)
959 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
960 else if (disassembly_flavor == intel_flavor)
961 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386_intel_syntax);
c906108c
SS
962}
963
d4f3574e
SS
964/* Print the register regnum, or all registers if regnum is -1 */
965
966void
967i386_do_registers_info (regnum, fpregs)
968 int regnum;
969 int fpregs;
970{
971 char raw_regs [REGISTER_BYTES];
972 int i;
973
974 for (i = 0; i < NUM_REGS; i++)
975 read_relative_register_raw_bytes (i, raw_regs + REGISTER_BYTE (i));
976
977 if (regnum < FPSTART_REGNUM)
978 i386_print_register (raw_regs, regnum, fpregs);
979 else
980 i387_print_register (raw_regs, regnum);
981}
982
983static void
984i386_print_register (raw_regs, regnum, fpregs)
985 char *raw_regs;
986 int regnum;
987 int fpregs;
988{
989 int i;
990 long val;
991 char string[12];
992
993 for (i = 0; i < FPSTART_REGNUM; i++)
994 {
995 if ((regnum != -1) && (i != regnum))
996 continue;
997
998 val = extract_signed_integer (raw_regs + REGISTER_BYTE (i), 4);
999
1000 sprintf(string, "0x%x", val);
1001 printf_filtered ("%8.8s: %10.10s %11d\n", REGISTER_NAME(i), string, val);
1002 }
1003
1004 if ((regnum == -1) && fpregs)
1005 for (i = FPSTART_REGNUM; i < FPEND_REGNUM; i++)
1006 i387_print_register (raw_regs, i);
1007}
1008
c906108c
SS
1009void
1010_initialize_i386_tdep ()
1011{
7a292a7a 1012 struct cmd_list_element *new_cmd;
c5aa993b 1013
c906108c
SS
1014 tm_print_insn = gdb_print_insn_i386;
1015 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1016
1017 /* Add the variable that controls the disassembly flavor */
7a292a7a
SS
1018
1019 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
c5aa993b
JM
1020 valid_flavors,
1021 (char *) &disassembly_flavor,
1022 "Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1023and the default value is \"att\".",
c5aa993b 1024 &setlist);
7a292a7a 1025 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
c5aa993b
JM
1026 add_show_from_set (new_cmd, &showlist);
1027
7a292a7a
SS
1028 /* Finally, initialize the disassembly flavor to the default given
1029 in the disassembly_flavor variable */
c906108c 1030
7a292a7a 1031 set_disassembly_flavor ();
c5aa993b 1032
c906108c 1033}