]>
Commit | Line | Data |
---|---|---|
7b112f9c JT |
1 | /* Target-dependent code for PowerPC systems using the SVR4 ABI |
2 | for GDB, the GNU debugger. | |
3 | ||
213516ef | 4 | Copyright (C) 2000-2023 Free Software Foundation, Inc. |
7b112f9c JT |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
7b112f9c JT |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
7b112f9c JT |
20 | |
21 | #include "defs.h" | |
22 | #include "gdbcore.h" | |
23 | #include "inferior.h" | |
24 | #include "regcache.h" | |
25 | #include "value.h" | |
7b112f9c | 26 | #include "ppc-tdep.h" |
6066c3de | 27 | #include "target.h" |
0a90bcdd | 28 | #include "objfiles.h" |
7d9b040b | 29 | #include "infcall.h" |
54fcddd0 | 30 | #include "dwarf2.h" |
a0eda3df | 31 | #include "dwarf2/loc.h" |
3b2ca824 | 32 | #include "target-float.h" |
325fac50 | 33 | #include <algorithm> |
7b112f9c | 34 | |
88aed45e UW |
35 | |
36 | /* Check whether FTPYE is a (pointer to) function type that should use | |
37 | the OpenCL vector ABI. */ | |
38 | ||
39 | static int | |
40 | ppc_sysv_use_opencl_abi (struct type *ftype) | |
41 | { | |
42 | ftype = check_typedef (ftype); | |
43 | ||
78134374 | 44 | if (ftype->code () == TYPE_CODE_PTR) |
27710edb | 45 | ftype = check_typedef (ftype->target_type ()); |
88aed45e | 46 | |
78134374 | 47 | return (ftype->code () == TYPE_CODE_FUNC |
88aed45e UW |
48 | && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL); |
49 | } | |
50 | ||
0df8b418 | 51 | /* Pass the arguments in either registers, or in the stack. Using the |
7b112f9c JT |
52 | ppc sysv ABI, the first eight words of the argument list (that might |
53 | be less than eight parameters if some parameters occupy more than one | |
54 | word) are passed in r3..r10 registers. float and double parameters are | |
0df8b418 MS |
55 | passed in fpr's, in addition to that. Rest of the parameters if any |
56 | are passed in user stack. | |
7b112f9c JT |
57 | |
58 | If the function is returning a structure, then the return address is passed | |
85102364 | 59 | in r3, then the first 7 words of the parameters can be passed in registers, |
0df8b418 | 60 | starting from r4. */ |
7b112f9c JT |
61 | |
62 | CORE_ADDR | |
7d9b040b | 63 | ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
77b2b6d4 AC |
64 | struct regcache *regcache, CORE_ADDR bp_addr, |
65 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
66 | function_call_return_method return_method, |
67 | CORE_ADDR struct_addr) | |
7b112f9c | 68 | { |
08106042 | 69 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e17a4113 | 70 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
88aed45e | 71 | int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function)); |
fb4443d8 | 72 | ULONGEST saved_sp; |
68856ea3 AC |
73 | int argspace = 0; /* 0 is an initial wrong guess. */ |
74 | int write_pass; | |
7b112f9c | 75 | |
b14d30e1 JM |
76 | gdb_assert (tdep->wordsize == 4); |
77 | ||
40a6adc1 | 78 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 79 | &saved_sp); |
fb4443d8 | 80 | |
68856ea3 | 81 | /* Go through the argument list twice. |
7b112f9c | 82 | |
68856ea3 AC |
83 | Pass 1: Figure out how much new stack space is required for |
84 | arguments and pushed values. Unlike the PowerOpen ABI, the SysV | |
85 | ABI doesn't reserve any extra space for parameters which are put | |
86 | in registers, but does always push structures and then pass their | |
87 | address. | |
7a41266b | 88 | |
68856ea3 AC |
89 | Pass 2: Replay the same computation but this time also write the |
90 | values out to the target. */ | |
7b112f9c | 91 | |
68856ea3 AC |
92 | for (write_pass = 0; write_pass < 2; write_pass++) |
93 | { | |
94 | int argno; | |
95 | /* Next available floating point register for float and double | |
dda83cd7 | 96 | arguments. */ |
68856ea3 AC |
97 | int freg = 1; |
98 | /* Next available general register for non-float, non-vector | |
dda83cd7 | 99 | arguments. */ |
68856ea3 AC |
100 | int greg = 3; |
101 | /* Next available vector register for vector arguments. */ | |
102 | int vreg = 2; | |
103 | /* Arguments start above the "LR save word" and "Back chain". */ | |
104 | int argoffset = 2 * tdep->wordsize; | |
105 | /* Structures start after the arguments. */ | |
106 | int structoffset = argoffset + argspace; | |
107 | ||
108 | /* If the function is returning a `struct', then the first word | |
dda83cd7 SM |
109 | (which will be passed in r3) is used for struct return |
110 | address. In that case we should advance one word and start | |
111 | from r4 register to copy parameters. */ | |
cf84fa6b | 112 | if (return_method == return_method_struct) |
7b112f9c | 113 | { |
68856ea3 AC |
114 | if (write_pass) |
115 | regcache_cooked_write_signed (regcache, | |
116 | tdep->ppc_gp0_regnum + greg, | |
117 | struct_addr); | |
118 | greg++; | |
7b112f9c | 119 | } |
68856ea3 AC |
120 | |
121 | for (argno = 0; argno < nargs; argno++) | |
7b112f9c | 122 | { |
68856ea3 | 123 | struct value *arg = args[argno]; |
df407dfe | 124 | struct type *type = check_typedef (value_type (arg)); |
df86565b | 125 | int len = type->length (); |
50888e42 | 126 | const bfd_byte *val = value_contents (arg).data (); |
68856ea3 | 127 | |
78134374 | 128 | if (type->code () == TYPE_CODE_FLT && len <= 8 |
55eddb0f | 129 | && !tdep->soft_float) |
7b112f9c | 130 | { |
68856ea3 | 131 | /* Floating point value converted to "double" then |
dda83cd7 SM |
132 | passed in an FP register, when the registers run out, |
133 | 8 byte aligned stack is used. */ | |
68856ea3 AC |
134 | if (freg <= 8) |
135 | { | |
136 | if (write_pass) | |
137 | { | |
138 | /* Always store the floating point value using | |
dda83cd7 | 139 | the register's floating-point format. */ |
0f068fb5 | 140 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
68856ea3 | 141 | struct type *regtype |
366f009f | 142 | = register_type (gdbarch, tdep->ppc_fp0_regnum + freg); |
3b2ca824 | 143 | target_float_convert (val, type, regval, regtype); |
b66f5587 SM |
144 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, |
145 | regval); | |
68856ea3 AC |
146 | } |
147 | freg++; | |
148 | } | |
7b112f9c JT |
149 | else |
150 | { | |
f964a756 MK |
151 | /* The SysV ABI tells us to convert floats to |
152 | doubles before writing them to an 8 byte aligned | |
153 | stack location. Unfortunately GCC does not do | |
154 | that, and stores floats into 4 byte aligned | |
155 | locations without converting them to doubles. | |
156 | Since there is no know compiler that actually | |
157 | follows the ABI here, we implement the GCC | |
158 | convention. */ | |
159 | ||
160 | /* Align to 4 bytes or 8 bytes depending on the type of | |
161 | the argument (float or double). */ | |
162 | argoffset = align_up (argoffset, len); | |
68856ea3 | 163 | if (write_pass) |
68856ea3 | 164 | write_memory (sp + argoffset, val, len); |
f964a756 | 165 | argoffset += len; |
7b112f9c JT |
166 | } |
167 | } | |
78134374 | 168 | else if (type->code () == TYPE_CODE_FLT |
b14d30e1 JM |
169 | && len == 16 |
170 | && !tdep->soft_float | |
40a6adc1 | 171 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
172 | == floatformats_ibm_long_double)) |
173 | { | |
174 | /* IBM long double passed in two FP registers if | |
175 | available, otherwise 8-byte aligned stack. */ | |
176 | if (freg <= 7) | |
177 | { | |
178 | if (write_pass) | |
179 | { | |
b66f5587 SM |
180 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val); |
181 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1, | |
182 | val + 8); | |
b14d30e1 JM |
183 | } |
184 | freg += 2; | |
185 | } | |
186 | else | |
187 | { | |
188 | argoffset = align_up (argoffset, 8); | |
189 | if (write_pass) | |
190 | write_memory (sp + argoffset, val, len); | |
191 | argoffset += 16; | |
192 | } | |
193 | } | |
55eddb0f | 194 | else if (len == 8 |
78134374 SM |
195 | && (type->code () == TYPE_CODE_INT /* long long */ |
196 | || type->code () == TYPE_CODE_FLT /* double */ | |
197 | || (type->code () == TYPE_CODE_DECFLOAT | |
00fbcec4 | 198 | && tdep->soft_float))) |
7b112f9c | 199 | { |
00fbcec4 | 200 | /* "long long" or soft-float "double" or "_Decimal64" |
dda83cd7 SM |
201 | passed in an odd/even register pair with the low |
202 | addressed word in the odd register and the high | |
203 | addressed word in the even register, or when the | |
204 | registers run out an 8 byte aligned stack | |
205 | location. */ | |
68856ea3 AC |
206 | if (greg > 9) |
207 | { | |
208 | /* Just in case GREG was 10. */ | |
209 | greg = 11; | |
210 | argoffset = align_up (argoffset, 8); | |
211 | if (write_pass) | |
212 | write_memory (sp + argoffset, val, len); | |
213 | argoffset += 8; | |
214 | } | |
68856ea3 AC |
215 | else |
216 | { | |
217 | /* Must start on an odd register - r3/r4 etc. */ | |
218 | if ((greg & 1) == 0) | |
219 | greg++; | |
220 | if (write_pass) | |
221 | { | |
b66f5587 SM |
222 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0, |
223 | val + 0); | |
224 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1, | |
225 | val + 4); | |
68856ea3 AC |
226 | } |
227 | greg += 2; | |
228 | } | |
7b112f9c | 229 | } |
00fbcec4 | 230 | else if (len == 16 |
78134374 | 231 | && ((type->code () == TYPE_CODE_FLT |
00fbcec4 JM |
232 | && (gdbarch_long_double_format (gdbarch) |
233 | == floatformats_ibm_long_double)) | |
78134374 | 234 | || (type->code () == TYPE_CODE_DECFLOAT |
00fbcec4 | 235 | && tdep->soft_float))) |
b14d30e1 | 236 | { |
00fbcec4 JM |
237 | /* Soft-float IBM long double or _Decimal128 passed in |
238 | four consecutive registers, or on the stack. The | |
239 | registers are not necessarily odd/even pairs. */ | |
b14d30e1 JM |
240 | if (greg > 7) |
241 | { | |
242 | greg = 11; | |
243 | argoffset = align_up (argoffset, 8); | |
244 | if (write_pass) | |
245 | write_memory (sp + argoffset, val, len); | |
246 | argoffset += 16; | |
247 | } | |
248 | else | |
249 | { | |
250 | if (write_pass) | |
251 | { | |
b66f5587 SM |
252 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0, |
253 | val + 0); | |
254 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1, | |
255 | val + 4); | |
256 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 2, | |
257 | val + 8); | |
258 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 3, | |
259 | val + 12); | |
b14d30e1 JM |
260 | } |
261 | greg += 4; | |
262 | } | |
263 | } | |
78134374 | 264 | else if (type->code () == TYPE_CODE_DECFLOAT && len <= 8 |
1300a2f4 TJB |
265 | && !tdep->soft_float) |
266 | { | |
267 | /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can | |
dda83cd7 | 268 | end up in memory. */ |
1300a2f4 TJB |
269 | |
270 | if (freg <= 8) | |
271 | { | |
272 | if (write_pass) | |
273 | { | |
0f068fb5 | 274 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
1300a2f4 TJB |
275 | const gdb_byte *p; |
276 | ||
277 | /* 32-bit decimal floats are right aligned in the | |
278 | doubleword. */ | |
df86565b | 279 | if (type->length () == 4) |
01add95b SM |
280 | { |
281 | memcpy (regval + 4, val, 4); | |
282 | p = regval; | |
283 | } | |
1300a2f4 TJB |
284 | else |
285 | p = val; | |
286 | ||
b66f5587 | 287 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, p); |
1300a2f4 TJB |
288 | } |
289 | ||
290 | freg++; | |
291 | } | |
292 | else | |
293 | { | |
294 | argoffset = align_up (argoffset, len); | |
295 | ||
296 | if (write_pass) | |
297 | /* Write value in the stack's parameter save area. */ | |
298 | write_memory (sp + argoffset, val, len); | |
299 | ||
300 | argoffset += len; | |
301 | } | |
302 | } | |
78134374 | 303 | else if (type->code () == TYPE_CODE_DECFLOAT && len == 16 |
1300a2f4 TJB |
304 | && !tdep->soft_float) |
305 | { | |
306 | /* 128-bit decimal floats go in f2 .. f7, always in even/odd | |
307 | pairs. They can end up in memory, using two doublewords. */ | |
308 | ||
309 | if (freg <= 6) | |
310 | { | |
311 | /* Make sure freg is even. */ | |
312 | freg += freg & 1; | |
313 | ||
314 | if (write_pass) | |
315 | { | |
b66f5587 SM |
316 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val); |
317 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1, | |
318 | val + 8); | |
1300a2f4 TJB |
319 | } |
320 | } | |
321 | else | |
322 | { | |
323 | argoffset = align_up (argoffset, 8); | |
324 | ||
325 | if (write_pass) | |
326 | write_memory (sp + argoffset, val, 16); | |
327 | ||
328 | argoffset += 16; | |
329 | } | |
330 | ||
331 | /* If a 128-bit decimal float goes to the stack because only f7 | |
dda83cd7 | 332 | and f8 are free (thus there's no even/odd register pair |
1300a2f4 TJB |
333 | available), these registers should be marked as occupied. |
334 | Hence we increase freg even when writing to memory. */ | |
335 | freg += 2; | |
336 | } | |
54fcddd0 | 337 | else if (len < 16 |
78134374 | 338 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 339 | && type->is_vector () |
54fcddd0 UW |
340 | && opencl_abi) |
341 | { | |
342 | /* OpenCL vectors shorter than 16 bytes are passed as if | |
343 | a series of independent scalars. */ | |
27710edb | 344 | struct type *eltype = check_typedef (type->target_type ()); |
df86565b | 345 | int i, nelt = type->length () / eltype->length (); |
54fcddd0 UW |
346 | |
347 | for (i = 0; i < nelt; i++) | |
348 | { | |
df86565b | 349 | const gdb_byte *elval = val + i * eltype->length (); |
54fcddd0 | 350 | |
78134374 | 351 | if (eltype->code () == TYPE_CODE_FLT && !tdep->soft_float) |
54fcddd0 UW |
352 | { |
353 | if (freg <= 8) | |
354 | { | |
355 | if (write_pass) | |
356 | { | |
357 | int regnum = tdep->ppc_fp0_regnum + freg; | |
0f068fb5 | 358 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
54fcddd0 UW |
359 | struct type *regtype |
360 | = register_type (gdbarch, regnum); | |
3b2ca824 UW |
361 | target_float_convert (elval, eltype, |
362 | regval, regtype); | |
b66f5587 | 363 | regcache->cooked_write (regnum, regval); |
54fcddd0 UW |
364 | } |
365 | freg++; | |
366 | } | |
367 | else | |
368 | { | |
369 | argoffset = align_up (argoffset, len); | |
370 | if (write_pass) | |
371 | write_memory (sp + argoffset, val, len); | |
372 | argoffset += len; | |
373 | } | |
374 | } | |
df86565b | 375 | else if (eltype->length () == 8) |
54fcddd0 UW |
376 | { |
377 | if (greg > 9) | |
378 | { | |
379 | /* Just in case GREG was 10. */ | |
380 | greg = 11; | |
381 | argoffset = align_up (argoffset, 8); | |
382 | if (write_pass) | |
383 | write_memory (sp + argoffset, elval, | |
df86565b | 384 | eltype->length ()); |
54fcddd0 UW |
385 | argoffset += 8; |
386 | } | |
387 | else | |
388 | { | |
389 | /* Must start on an odd register - r3/r4 etc. */ | |
390 | if ((greg & 1) == 0) | |
391 | greg++; | |
392 | if (write_pass) | |
393 | { | |
394 | int regnum = tdep->ppc_gp0_regnum + greg; | |
b66f5587 SM |
395 | regcache->cooked_write (regnum + 0, elval + 0); |
396 | regcache->cooked_write (regnum + 1, elval + 4); | |
54fcddd0 UW |
397 | } |
398 | greg += 2; | |
399 | } | |
400 | } | |
401 | else | |
402 | { | |
0f068fb5 | 403 | gdb_byte word[PPC_MAX_REGISTER_SIZE]; |
54fcddd0 UW |
404 | store_unsigned_integer (word, tdep->wordsize, byte_order, |
405 | unpack_long (eltype, elval)); | |
406 | ||
407 | if (greg <= 10) | |
408 | { | |
409 | if (write_pass) | |
b66f5587 SM |
410 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg, |
411 | word); | |
54fcddd0 UW |
412 | greg++; |
413 | } | |
414 | else | |
415 | { | |
416 | argoffset = align_up (argoffset, tdep->wordsize); | |
417 | if (write_pass) | |
418 | write_memory (sp + argoffset, word, tdep->wordsize); | |
419 | argoffset += tdep->wordsize; | |
420 | } | |
421 | } | |
422 | } | |
423 | } | |
424 | else if (len >= 16 | |
78134374 | 425 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 426 | && type->is_vector () |
54fcddd0 UW |
427 | && opencl_abi) |
428 | { | |
429 | /* OpenCL vectors 16 bytes or longer are passed as if | |
430 | a series of AltiVec vectors. */ | |
431 | int i; | |
432 | ||
433 | for (i = 0; i < len / 16; i++) | |
434 | { | |
435 | const gdb_byte *elval = val + i * 16; | |
436 | ||
437 | if (vreg <= 13) | |
438 | { | |
439 | if (write_pass) | |
b66f5587 SM |
440 | regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, |
441 | elval); | |
54fcddd0 UW |
442 | vreg++; |
443 | } | |
444 | else | |
445 | { | |
446 | argoffset = align_up (argoffset, 16); | |
447 | if (write_pass) | |
448 | write_memory (sp + argoffset, elval, 16); | |
449 | argoffset += 16; | |
450 | } | |
451 | } | |
452 | } | |
68856ea3 | 453 | else if (len == 16 |
ebbac168 CL |
454 | && ((type->code () == TYPE_CODE_ARRAY |
455 | && type->is_vector () | |
456 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
457 | || (type->code () == TYPE_CODE_FLT | |
458 | && (gdbarch_long_double_format (gdbarch) | |
459 | == floatformats_ieee_quad)))) | |
7b112f9c | 460 | { |
68856ea3 | 461 | /* Vector parameter passed in an Altivec register, or |
ebbac168 CL |
462 | when that runs out, 16 byte aligned stack location. |
463 | IEEE FLOAT 128-bit also passes parameters in vector | |
464 | registers. */ | |
7b112f9c JT |
465 | if (vreg <= 13) |
466 | { | |
68856ea3 | 467 | if (write_pass) |
b66f5587 | 468 | regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val); |
7b112f9c JT |
469 | vreg++; |
470 | } | |
471 | else | |
472 | { | |
68856ea3 AC |
473 | argoffset = align_up (argoffset, 16); |
474 | if (write_pass) | |
475 | write_memory (sp + argoffset, val, 16); | |
7b112f9c JT |
476 | argoffset += 16; |
477 | } | |
478 | } | |
944fcfab | 479 | else if (len == 8 |
78134374 | 480 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 481 | && type->is_vector () |
55eddb0f | 482 | && tdep->vector_abi == POWERPC_VEC_SPE) |
944fcfab | 483 | { |
68856ea3 | 484 | /* Vector parameter passed in an e500 register, or when |
dda83cd7 SM |
485 | that runs out, 8 byte aligned stack location. Note |
486 | that since e500 vector and general purpose registers | |
487 | both map onto the same underlying register set, a | |
488 | "greg" and not a "vreg" is consumed here. A cooked | |
489 | write stores the value in the correct locations | |
490 | within the raw register cache. */ | |
944fcfab AC |
491 | if (greg <= 10) |
492 | { | |
68856ea3 | 493 | if (write_pass) |
b66f5587 | 494 | regcache->cooked_write (tdep->ppc_ev0_regnum + greg, val); |
944fcfab AC |
495 | greg++; |
496 | } | |
497 | else | |
498 | { | |
68856ea3 AC |
499 | argoffset = align_up (argoffset, 8); |
500 | if (write_pass) | |
501 | write_memory (sp + argoffset, val, 8); | |
944fcfab AC |
502 | argoffset += 8; |
503 | } | |
504 | } | |
68856ea3 AC |
505 | else |
506 | { | |
507 | /* Reduce the parameter down to something that fits in a | |
dda83cd7 | 508 | "word". */ |
0f068fb5 AH |
509 | gdb_byte word[PPC_MAX_REGISTER_SIZE]; |
510 | memset (word, 0, PPC_MAX_REGISTER_SIZE); | |
68856ea3 | 511 | if (len > tdep->wordsize |
78134374 SM |
512 | || type->code () == TYPE_CODE_STRUCT |
513 | || type->code () == TYPE_CODE_UNION) | |
68856ea3 | 514 | { |
55eddb0f | 515 | /* Structs and large values are put in an |
0df8b418 | 516 | aligned stack slot ... */ |
78134374 | 517 | if (type->code () == TYPE_CODE_ARRAY |
bd63c870 | 518 | && type->is_vector () |
55eddb0f DJ |
519 | && len >= 16) |
520 | structoffset = align_up (structoffset, 16); | |
521 | else | |
522 | structoffset = align_up (structoffset, 8); | |
523 | ||
68856ea3 AC |
524 | if (write_pass) |
525 | write_memory (sp + structoffset, val, len); | |
526 | /* ... and then a "word" pointing to that address is | |
944fcfab | 527 | passed as the parameter. */ |
e17a4113 | 528 | store_unsigned_integer (word, tdep->wordsize, byte_order, |
68856ea3 AC |
529 | sp + structoffset); |
530 | structoffset += len; | |
531 | } | |
78134374 | 532 | else if (type->code () == TYPE_CODE_INT) |
68856ea3 | 533 | /* Sign or zero extend the "int" into a "word". */ |
e17a4113 | 534 | store_unsigned_integer (word, tdep->wordsize, byte_order, |
68856ea3 AC |
535 | unpack_long (type, val)); |
536 | else | |
537 | /* Always goes in the low address. */ | |
538 | memcpy (word, val, len); | |
539 | /* Store that "word" in a register, or on the stack. | |
dda83cd7 | 540 | The words have "4" byte alignment. */ |
68856ea3 AC |
541 | if (greg <= 10) |
542 | { | |
543 | if (write_pass) | |
b66f5587 | 544 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg, word); |
68856ea3 AC |
545 | greg++; |
546 | } | |
547 | else | |
548 | { | |
549 | argoffset = align_up (argoffset, tdep->wordsize); | |
550 | if (write_pass) | |
551 | write_memory (sp + argoffset, word, tdep->wordsize); | |
552 | argoffset += tdep->wordsize; | |
553 | } | |
554 | } | |
555 | } | |
556 | ||
557 | /* Compute the actual stack space requirements. */ | |
558 | if (!write_pass) | |
559 | { | |
560 | /* Remember the amount of space needed by the arguments. */ | |
561 | argspace = argoffset; | |
562 | /* Allocate space for both the arguments and the structures. */ | |
563 | sp -= (argoffset + structoffset); | |
564 | /* Ensure that the stack is still 16 byte aligned. */ | |
565 | sp = align_down (sp, 16); | |
566 | } | |
65ada037 MK |
567 | |
568 | /* The psABI says that "A caller of a function that takes a | |
569 | variable argument list shall set condition register bit 6 to | |
570 | 1 if it passes one or more arguments in the floating-point | |
0df8b418 | 571 | registers. It is strongly recommended that the caller set the |
65ada037 MK |
572 | bit to 0 otherwise..." Doing this for normal functions too |
573 | shouldn't hurt. */ | |
574 | if (write_pass) | |
575 | { | |
576 | ULONGEST cr; | |
577 | ||
578 | regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr); | |
579 | if (freg > 1) | |
580 | cr |= 0x02000000; | |
581 | else | |
582 | cr &= ~0x02000000; | |
583 | regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr); | |
584 | } | |
7b112f9c JT |
585 | } |
586 | ||
68856ea3 | 587 | /* Update %sp. */ |
40a6adc1 | 588 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
68856ea3 AC |
589 | |
590 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
e17a4113 | 591 | write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp); |
68856ea3 | 592 | |
e56a0ecc AC |
593 | /* Point the inferior function call's return address at the dummy's |
594 | breakpoint. */ | |
68856ea3 | 595 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); |
e56a0ecc | 596 | |
7b112f9c JT |
597 | return sp; |
598 | } | |
599 | ||
e765b44c | 600 | /* Handle the return-value conventions for Decimal Floating Point values. */ |
f486487f | 601 | static enum return_value_convention |
1300a2f4 TJB |
602 | get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype, |
603 | struct regcache *regcache, gdb_byte *readbuf, | |
604 | const gdb_byte *writebuf) | |
605 | { | |
08106042 | 606 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
1300a2f4 | 607 | |
78134374 | 608 | gdb_assert (valtype->code () == TYPE_CODE_DECFLOAT); |
1300a2f4 TJB |
609 | |
610 | /* 32-bit and 64-bit decimal floats in f1. */ | |
df86565b | 611 | if (valtype->length () <= 8) |
1300a2f4 TJB |
612 | { |
613 | if (writebuf != NULL) | |
614 | { | |
0f068fb5 | 615 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
1300a2f4 TJB |
616 | const gdb_byte *p; |
617 | ||
618 | /* 32-bit decimal float is right aligned in the doubleword. */ | |
df86565b | 619 | if (valtype->length () == 4) |
1300a2f4 TJB |
620 | { |
621 | memcpy (regval + 4, writebuf, 4); | |
622 | p = regval; | |
623 | } | |
624 | else | |
625 | p = writebuf; | |
626 | ||
b66f5587 | 627 | regcache->cooked_write (tdep->ppc_fp0_regnum + 1, p); |
1300a2f4 TJB |
628 | } |
629 | if (readbuf != NULL) | |
630 | { | |
dca08e1f | 631 | regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf); |
1300a2f4 TJB |
632 | |
633 | /* Left align 32-bit decimal float. */ | |
df86565b | 634 | if (valtype->length () == 4) |
1300a2f4 TJB |
635 | memcpy (readbuf, readbuf + 4, 4); |
636 | } | |
637 | } | |
638 | /* 128-bit decimal floats in f2,f3. */ | |
df86565b | 639 | else if (valtype->length () == 16) |
1300a2f4 TJB |
640 | { |
641 | if (writebuf != NULL || readbuf != NULL) | |
642 | { | |
643 | int i; | |
644 | ||
645 | for (i = 0; i < 2; i++) | |
646 | { | |
647 | if (writebuf != NULL) | |
b66f5587 SM |
648 | regcache->cooked_write (tdep->ppc_fp0_regnum + 2 + i, |
649 | writebuf + i * 8); | |
1300a2f4 | 650 | if (readbuf != NULL) |
dca08e1f SM |
651 | regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i, |
652 | readbuf + i * 8); | |
1300a2f4 TJB |
653 | } |
654 | } | |
655 | } | |
656 | else | |
657 | /* Can't happen. */ | |
f34652de | 658 | internal_error (_("Unknown decimal float size.")); |
1300a2f4 TJB |
659 | |
660 | return RETURN_VALUE_REGISTER_CONVENTION; | |
661 | } | |
662 | ||
e754ae69 AC |
663 | /* Handle the return-value conventions specified by the SysV 32-bit |
664 | PowerPC ABI (including all the supplements): | |
665 | ||
666 | no floating-point: floating-point values returned using 32-bit | |
667 | general-purpose registers. | |
668 | ||
669 | Altivec: 128-bit vectors returned using vector registers. | |
670 | ||
671 | e500: 64-bit vectors returned using the full full 64 bit EV | |
672 | register, floating-point values returned using 32-bit | |
673 | general-purpose registers. | |
674 | ||
675 | GCC (broken): Small struct values right (instead of left) aligned | |
676 | when returned in general-purpose registers. */ | |
677 | ||
678 | static enum return_value_convention | |
54fcddd0 UW |
679 | do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type, |
680 | struct type *type, struct regcache *regcache, | |
681 | gdb_byte *readbuf, const gdb_byte *writebuf, | |
682 | int broken_gcc) | |
e754ae69 | 683 | { |
08106042 | 684 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e17a4113 | 685 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
88aed45e | 686 | int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0; |
54fcddd0 | 687 | |
e754ae69 | 688 | gdb_assert (tdep->wordsize == 4); |
54fcddd0 | 689 | |
78134374 | 690 | if (type->code () == TYPE_CODE_FLT |
df86565b | 691 | && type->length () <= 8 |
55eddb0f | 692 | && !tdep->soft_float) |
e754ae69 | 693 | { |
963e2bb7 | 694 | if (readbuf) |
e754ae69 AC |
695 | { |
696 | /* Floats and doubles stored in "f1". Convert the value to | |
697 | the required type. */ | |
0f068fb5 | 698 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
366f009f | 699 | struct type *regtype = register_type (gdbarch, |
dda83cd7 | 700 | tdep->ppc_fp0_regnum + 1); |
dca08e1f | 701 | regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval); |
3b2ca824 | 702 | target_float_convert (regval, regtype, readbuf, type); |
e754ae69 | 703 | } |
963e2bb7 | 704 | if (writebuf) |
e754ae69 AC |
705 | { |
706 | /* Floats and doubles stored in "f1". Convert the value to | |
707 | the register's "double" type. */ | |
0f068fb5 | 708 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
366f009f | 709 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
3b2ca824 | 710 | target_float_convert (writebuf, type, regval, regtype); |
b66f5587 | 711 | regcache->cooked_write (tdep->ppc_fp0_regnum + 1, regval); |
e754ae69 AC |
712 | } |
713 | return RETURN_VALUE_REGISTER_CONVENTION; | |
714 | } | |
78134374 | 715 | if (type->code () == TYPE_CODE_FLT |
df86565b | 716 | && type->length () == 16 |
b14d30e1 | 717 | && !tdep->soft_float |
0df8b418 MS |
718 | && (gdbarch_long_double_format (gdbarch) |
719 | == floatformats_ibm_long_double)) | |
b14d30e1 JM |
720 | { |
721 | /* IBM long double stored in f1 and f2. */ | |
722 | if (readbuf) | |
723 | { | |
dca08e1f SM |
724 | regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf); |
725 | regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8); | |
b14d30e1 JM |
726 | } |
727 | if (writebuf) | |
728 | { | |
b66f5587 SM |
729 | regcache->cooked_write (tdep->ppc_fp0_regnum + 1, writebuf); |
730 | regcache->cooked_write (tdep->ppc_fp0_regnum + 2, writebuf + 8); | |
b14d30e1 JM |
731 | } |
732 | return RETURN_VALUE_REGISTER_CONVENTION; | |
733 | } | |
df86565b | 734 | if (type->length () == 16 |
78134374 | 735 | && ((type->code () == TYPE_CODE_FLT |
0df8b418 MS |
736 | && (gdbarch_long_double_format (gdbarch) |
737 | == floatformats_ibm_long_double)) | |
78134374 | 738 | || (type->code () == TYPE_CODE_DECFLOAT && tdep->soft_float))) |
b14d30e1 | 739 | { |
00fbcec4 JM |
740 | /* Soft-float IBM long double or _Decimal128 stored in r3, r4, |
741 | r5, r6. */ | |
b14d30e1 JM |
742 | if (readbuf) |
743 | { | |
dca08e1f SM |
744 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf); |
745 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4); | |
746 | regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8); | |
747 | regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12); | |
b14d30e1 JM |
748 | } |
749 | if (writebuf) | |
750 | { | |
b66f5587 SM |
751 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf); |
752 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4); | |
753 | regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8); | |
754 | regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12); | |
b14d30e1 JM |
755 | } |
756 | return RETURN_VALUE_REGISTER_CONVENTION; | |
757 | } | |
df86565b SM |
758 | if ((type->code () == TYPE_CODE_INT && type->length () == 8) |
759 | || (type->code () == TYPE_CODE_FLT && type->length () == 8) | |
760 | || (type->code () == TYPE_CODE_DECFLOAT && type->length () == 8 | |
00fbcec4 | 761 | && tdep->soft_float)) |
e754ae69 | 762 | { |
963e2bb7 | 763 | if (readbuf) |
e754ae69 | 764 | { |
00fbcec4 JM |
765 | /* A long long, double or _Decimal64 stored in the 32 bit |
766 | r3/r4. */ | |
dca08e1f SM |
767 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0); |
768 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4); | |
e754ae69 | 769 | } |
963e2bb7 | 770 | if (writebuf) |
e754ae69 | 771 | { |
00fbcec4 JM |
772 | /* A long long, double or _Decimal64 stored in the 32 bit |
773 | r3/r4. */ | |
b66f5587 SM |
774 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0); |
775 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4); | |
e754ae69 AC |
776 | } |
777 | return RETURN_VALUE_REGISTER_CONVENTION; | |
778 | } | |
78134374 | 779 | if (type->code () == TYPE_CODE_DECFLOAT && !tdep->soft_float) |
1300a2f4 TJB |
780 | return get_decimal_float_return_value (gdbarch, type, regcache, readbuf, |
781 | writebuf); | |
78134374 SM |
782 | else if ((type->code () == TYPE_CODE_INT |
783 | || type->code () == TYPE_CODE_CHAR | |
784 | || type->code () == TYPE_CODE_BOOL | |
785 | || type->code () == TYPE_CODE_PTR | |
aa006118 | 786 | || TYPE_IS_REFERENCE (type) |
78134374 | 787 | || type->code () == TYPE_CODE_ENUM) |
df86565b | 788 | && type->length () <= tdep->wordsize) |
e754ae69 | 789 | { |
963e2bb7 | 790 | if (readbuf) |
e754ae69 AC |
791 | { |
792 | /* Some sort of integer stored in r3. Since TYPE isn't | |
793 | bigger than the register, sign extension isn't a problem | |
794 | - just do everything unsigned. */ | |
795 | ULONGEST regval; | |
796 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
797 | ®val); | |
df86565b | 798 | store_unsigned_integer (readbuf, type->length (), byte_order, |
e17a4113 | 799 | regval); |
e754ae69 | 800 | } |
963e2bb7 | 801 | if (writebuf) |
e754ae69 AC |
802 | { |
803 | /* Some sort of integer stored in r3. Use unpack_long since | |
804 | that should handle any required sign extension. */ | |
805 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 806 | unpack_long (type, writebuf)); |
e754ae69 AC |
807 | } |
808 | return RETURN_VALUE_REGISTER_CONVENTION; | |
809 | } | |
54fcddd0 UW |
810 | /* OpenCL vectors < 16 bytes are returned as distinct |
811 | scalars in f1..f2 or r3..r10. */ | |
78134374 | 812 | if (type->code () == TYPE_CODE_ARRAY |
bd63c870 | 813 | && type->is_vector () |
df86565b | 814 | && type->length () < 16 |
54fcddd0 UW |
815 | && opencl_abi) |
816 | { | |
27710edb | 817 | struct type *eltype = check_typedef (type->target_type ()); |
df86565b | 818 | int i, nelt = type->length () / eltype->length (); |
54fcddd0 UW |
819 | |
820 | for (i = 0; i < nelt; i++) | |
821 | { | |
df86565b | 822 | int offset = i * eltype->length (); |
54fcddd0 | 823 | |
78134374 | 824 | if (eltype->code () == TYPE_CODE_FLT) |
54fcddd0 UW |
825 | { |
826 | int regnum = tdep->ppc_fp0_regnum + 1 + i; | |
0f068fb5 | 827 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
54fcddd0 UW |
828 | struct type *regtype = register_type (gdbarch, regnum); |
829 | ||
830 | if (writebuf != NULL) | |
831 | { | |
3b2ca824 UW |
832 | target_float_convert (writebuf + offset, eltype, |
833 | regval, regtype); | |
b66f5587 | 834 | regcache->cooked_write (regnum, regval); |
54fcddd0 UW |
835 | } |
836 | if (readbuf != NULL) | |
837 | { | |
dca08e1f | 838 | regcache->cooked_read (regnum, regval); |
3b2ca824 UW |
839 | target_float_convert (regval, regtype, |
840 | readbuf + offset, eltype); | |
54fcddd0 UW |
841 | } |
842 | } | |
843 | else | |
844 | { | |
845 | int regnum = tdep->ppc_gp0_regnum + 3 + i; | |
846 | ULONGEST regval; | |
847 | ||
848 | if (writebuf != NULL) | |
849 | { | |
850 | regval = unpack_long (eltype, writebuf + offset); | |
851 | regcache_cooked_write_unsigned (regcache, regnum, regval); | |
852 | } | |
853 | if (readbuf != NULL) | |
854 | { | |
855 | regcache_cooked_read_unsigned (regcache, regnum, ®val); | |
856 | store_unsigned_integer (readbuf + offset, | |
df86565b | 857 | eltype->length (), byte_order, |
54fcddd0 UW |
858 | regval); |
859 | } | |
860 | } | |
861 | } | |
862 | ||
863 | return RETURN_VALUE_REGISTER_CONVENTION; | |
864 | } | |
865 | /* OpenCL vectors >= 16 bytes are returned in v2..v9. */ | |
78134374 | 866 | if (type->code () == TYPE_CODE_ARRAY |
bd63c870 | 867 | && type->is_vector () |
df86565b | 868 | && type->length () >= 16 |
54fcddd0 UW |
869 | && opencl_abi) |
870 | { | |
df86565b | 871 | int n_regs = type->length () / 16; |
54fcddd0 UW |
872 | int i; |
873 | ||
874 | for (i = 0; i < n_regs; i++) | |
875 | { | |
876 | int offset = i * 16; | |
877 | int regnum = tdep->ppc_vr0_regnum + 2 + i; | |
878 | ||
879 | if (writebuf != NULL) | |
b66f5587 | 880 | regcache->cooked_write (regnum, writebuf + offset); |
54fcddd0 | 881 | if (readbuf != NULL) |
dca08e1f | 882 | regcache->cooked_read (regnum, readbuf + offset); |
54fcddd0 UW |
883 | } |
884 | ||
885 | return RETURN_VALUE_REGISTER_CONVENTION; | |
886 | } | |
df86565b | 887 | if (type->length () == 16 |
78134374 | 888 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 889 | && type->is_vector () |
55eddb0f | 890 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) |
e754ae69 | 891 | { |
963e2bb7 | 892 | if (readbuf) |
e754ae69 AC |
893 | { |
894 | /* Altivec places the return value in "v2". */ | |
dca08e1f | 895 | regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf); |
e754ae69 | 896 | } |
963e2bb7 | 897 | if (writebuf) |
e754ae69 AC |
898 | { |
899 | /* Altivec places the return value in "v2". */ | |
b66f5587 | 900 | regcache->cooked_write (tdep->ppc_vr0_regnum + 2, writebuf); |
e754ae69 AC |
901 | } |
902 | return RETURN_VALUE_REGISTER_CONVENTION; | |
903 | } | |
df86565b | 904 | if (type->length () == 16 |
78134374 | 905 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 906 | && type->is_vector () |
55eddb0f DJ |
907 | && tdep->vector_abi == POWERPC_VEC_GENERIC) |
908 | { | |
909 | /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6. | |
910 | GCC without AltiVec returns them in memory, but it warns about | |
911 | ABI risks in that case; we don't try to support it. */ | |
912 | if (readbuf) | |
913 | { | |
dca08e1f SM |
914 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0); |
915 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4); | |
916 | regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8); | |
917 | regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12); | |
55eddb0f DJ |
918 | } |
919 | if (writebuf) | |
920 | { | |
b66f5587 SM |
921 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0); |
922 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4); | |
923 | regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8); | |
924 | regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12); | |
55eddb0f DJ |
925 | } |
926 | return RETURN_VALUE_REGISTER_CONVENTION; | |
927 | } | |
df86565b | 928 | if (type->length () == 8 |
78134374 | 929 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 930 | && type->is_vector () |
55eddb0f | 931 | && tdep->vector_abi == POWERPC_VEC_SPE) |
e754ae69 AC |
932 | { |
933 | /* The e500 ABI places return values for the 64-bit DSP types | |
934 | (__ev64_opaque__) in r3. However, in GDB-speak, ev3 | |
935 | corresponds to the entire r3 value for e500, whereas GDB's r3 | |
936 | only corresponds to the least significant 32-bits. So place | |
937 | the 64-bit DSP type's value in ev3. */ | |
963e2bb7 | 938 | if (readbuf) |
dca08e1f | 939 | regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf); |
963e2bb7 | 940 | if (writebuf) |
b66f5587 | 941 | regcache->cooked_write (tdep->ppc_ev0_regnum + 3, writebuf); |
e754ae69 AC |
942 | return RETURN_VALUE_REGISTER_CONVENTION; |
943 | } | |
df86565b | 944 | if (broken_gcc && type->length () <= 8) |
e754ae69 | 945 | { |
61bf9ae0 MK |
946 | /* GCC screwed up for structures or unions whose size is less |
947 | than or equal to 8 bytes.. Instead of left-aligning, it | |
948 | right-aligns the data into the buffer formed by r3, r4. */ | |
0f068fb5 | 949 | gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2]; |
df86565b | 950 | int len = type->length (); |
61bf9ae0 MK |
951 | int offset = (2 * tdep->wordsize - len) % tdep->wordsize; |
952 | ||
963e2bb7 | 953 | if (readbuf) |
e754ae69 | 954 | { |
dca08e1f SM |
955 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, |
956 | regvals + 0 * tdep->wordsize); | |
61bf9ae0 | 957 | if (len > tdep->wordsize) |
dca08e1f SM |
958 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, |
959 | regvals + 1 * tdep->wordsize); | |
61bf9ae0 | 960 | memcpy (readbuf, regvals + offset, len); |
e754ae69 | 961 | } |
963e2bb7 | 962 | if (writebuf) |
e754ae69 | 963 | { |
61bf9ae0 MK |
964 | memset (regvals, 0, sizeof regvals); |
965 | memcpy (regvals + offset, writebuf, len); | |
b66f5587 SM |
966 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, |
967 | regvals + 0 * tdep->wordsize); | |
61bf9ae0 | 968 | if (len > tdep->wordsize) |
b66f5587 SM |
969 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, |
970 | regvals + 1 * tdep->wordsize); | |
e754ae69 | 971 | } |
61bf9ae0 | 972 | |
e754ae69 AC |
973 | return RETURN_VALUE_REGISTER_CONVENTION; |
974 | } | |
df86565b | 975 | if (type->length () <= 8) |
e754ae69 | 976 | { |
963e2bb7 | 977 | if (readbuf) |
e754ae69 AC |
978 | { |
979 | /* This matches SVr4 PPC, it does not match GCC. */ | |
980 | /* The value is right-padded to 8 bytes and then loaded, as | |
981 | two "words", into r3/r4. */ | |
0f068fb5 | 982 | gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2]; |
dca08e1f SM |
983 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, |
984 | regvals + 0 * tdep->wordsize); | |
df86565b | 985 | if (type->length () > tdep->wordsize) |
dca08e1f SM |
986 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, |
987 | regvals + 1 * tdep->wordsize); | |
df86565b | 988 | memcpy (readbuf, regvals, type->length ()); |
e754ae69 | 989 | } |
963e2bb7 | 990 | if (writebuf) |
e754ae69 AC |
991 | { |
992 | /* This matches SVr4 PPC, it does not match GCC. */ | |
993 | /* The value is padded out to 8 bytes and then loaded, as | |
994 | two "words" into r3/r4. */ | |
0f068fb5 | 995 | gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2]; |
e754ae69 | 996 | memset (regvals, 0, sizeof regvals); |
df86565b | 997 | memcpy (regvals, writebuf, type->length ()); |
b66f5587 SM |
998 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, |
999 | regvals + 0 * tdep->wordsize); | |
df86565b | 1000 | if (type->length () > tdep->wordsize) |
b66f5587 SM |
1001 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, |
1002 | regvals + 1 * tdep->wordsize); | |
e754ae69 AC |
1003 | } |
1004 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1005 | } | |
1006 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1007 | } | |
1008 | ||
05580c65 | 1009 | enum return_value_convention |
6a3a010b | 1010 | ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
1011 | struct type *valtype, struct regcache *regcache, |
1012 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
e754ae69 | 1013 | { |
6a3a010b MR |
1014 | return do_ppc_sysv_return_value (gdbarch, |
1015 | function ? value_type (function) : NULL, | |
1016 | valtype, regcache, readbuf, writebuf, 0); | |
e754ae69 AC |
1017 | } |
1018 | ||
05580c65 | 1019 | enum return_value_convention |
963e2bb7 | 1020 | ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, |
6a3a010b | 1021 | struct value *function, |
963e2bb7 AC |
1022 | struct type *valtype, |
1023 | struct regcache *regcache, | |
50fd1280 | 1024 | gdb_byte *readbuf, const gdb_byte *writebuf) |
e754ae69 | 1025 | { |
6a3a010b MR |
1026 | return do_ppc_sysv_return_value (gdbarch, |
1027 | function ? value_type (function) : NULL, | |
1028 | valtype, regcache, readbuf, writebuf, 1); | |
944fcfab | 1029 | } |
afd48b75 | 1030 | |
b6e1c027 AC |
1031 | /* The helper function for 64-bit SYSV push_dummy_call. Converts the |
1032 | function's code address back into the function's descriptor | |
1033 | address. | |
1034 | ||
1035 | Find a value for the TOC register. Every symbol should have both | |
1036 | ".FN" and "FN" in the minimal symbol table. "FN" points at the | |
1037 | FN's descriptor, while ".FN" points at the entry point (which | |
1038 | matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the | |
1039 | FN's descriptor address (while at the same time being careful to | |
1040 | find "FN" in the same object file as ".FN"). */ | |
1041 | ||
1042 | static int | |
1043 | convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr) | |
1044 | { | |
1045 | struct obj_section *dot_fn_section; | |
7cbd4a93 | 1046 | struct bound_minimal_symbol dot_fn; |
3b7344d5 | 1047 | struct bound_minimal_symbol fn; |
7cbd4a93 | 1048 | |
b6e1c027 AC |
1049 | /* Find the minimal symbol that corresponds to CODE_ADDR (should |
1050 | have a name of the form ".FN"). */ | |
1051 | dot_fn = lookup_minimal_symbol_by_pc (code_addr); | |
c9d95fa3 | 1052 | if (dot_fn.minsym == NULL || dot_fn.minsym->linkage_name ()[0] != '.') |
b6e1c027 AC |
1053 | return 0; |
1054 | /* Get the section that contains CODE_ADDR. Need this for the | |
1055 | "objfile" that it contains. */ | |
1056 | dot_fn_section = find_pc_section (code_addr); | |
1057 | if (dot_fn_section == NULL || dot_fn_section->objfile == NULL) | |
1058 | return 0; | |
1059 | /* Now find the corresponding "FN" (dropping ".") minimal symbol's | |
1060 | address. Only look for the minimal symbol in ".FN"'s object file | |
1061 | - avoids problems when two object files (i.e., shared libraries) | |
1062 | contain a minimal symbol with the same name. */ | |
c9d95fa3 | 1063 | fn = lookup_minimal_symbol (dot_fn.minsym->linkage_name () + 1, NULL, |
b6e1c027 | 1064 | dot_fn_section->objfile); |
3b7344d5 | 1065 | if (fn.minsym == NULL) |
b6e1c027 AC |
1066 | return 0; |
1067 | /* Found a descriptor. */ | |
4aeddc50 | 1068 | (*desc_addr) = fn.value_address (); |
b6e1c027 AC |
1069 | return 1; |
1070 | } | |
1071 | ||
cc0e89c5 UW |
1072 | /* Walk down the type tree of TYPE counting consecutive base elements. |
1073 | If *FIELD_TYPE is NULL, then set it to the first valid floating point | |
1074 | or vector type. If a non-floating point or vector type is found, or | |
1075 | if a floating point or vector type that doesn't match a non-NULL | |
1076 | *FIELD_TYPE is found, then return -1, otherwise return the count in the | |
1077 | sub-tree. */ | |
1078 | ||
1079 | static LONGEST | |
1080 | ppc64_aggregate_candidate (struct type *type, | |
1081 | struct type **field_type) | |
1082 | { | |
1083 | type = check_typedef (type); | |
1084 | ||
78134374 | 1085 | switch (type->code ()) |
cc0e89c5 UW |
1086 | { |
1087 | case TYPE_CODE_FLT: | |
1088 | case TYPE_CODE_DECFLOAT: | |
1089 | if (!*field_type) | |
1090 | *field_type = type; | |
78134374 | 1091 | if ((*field_type)->code () == type->code () |
df86565b | 1092 | && (*field_type)->length () == type->length ()) |
cc0e89c5 UW |
1093 | return 1; |
1094 | break; | |
1095 | ||
1096 | case TYPE_CODE_COMPLEX: | |
27710edb | 1097 | type = type->target_type (); |
78134374 SM |
1098 | if (type->code () == TYPE_CODE_FLT |
1099 | || type->code () == TYPE_CODE_DECFLOAT) | |
cc0e89c5 UW |
1100 | { |
1101 | if (!*field_type) | |
1102 | *field_type = type; | |
78134374 | 1103 | if ((*field_type)->code () == type->code () |
df86565b | 1104 | && (*field_type)->length () == type->length ()) |
cc0e89c5 UW |
1105 | return 2; |
1106 | } | |
1107 | break; | |
1108 | ||
1109 | case TYPE_CODE_ARRAY: | |
bd63c870 | 1110 | if (type->is_vector ()) |
cc0e89c5 UW |
1111 | { |
1112 | if (!*field_type) | |
1113 | *field_type = type; | |
78134374 | 1114 | if ((*field_type)->code () == type->code () |
df86565b | 1115 | && (*field_type)->length () == type->length ()) |
cc0e89c5 UW |
1116 | return 1; |
1117 | } | |
1118 | else | |
1119 | { | |
1120 | LONGEST count, low_bound, high_bound; | |
1121 | ||
1122 | count = ppc64_aggregate_candidate | |
27710edb | 1123 | (type->target_type (), field_type); |
cc0e89c5 UW |
1124 | if (count == -1) |
1125 | return -1; | |
1126 | ||
1127 | if (!get_array_bounds (type, &low_bound, &high_bound)) | |
1128 | return -1; | |
1129 | count *= high_bound - low_bound; | |
1130 | ||
1131 | /* There must be no padding. */ | |
1132 | if (count == 0) | |
df86565b SM |
1133 | return type->length () == 0 ? 0 : -1; |
1134 | else if (type->length () != count * (*field_type)->length ()) | |
cc0e89c5 UW |
1135 | return -1; |
1136 | ||
1137 | return count; | |
1138 | } | |
1139 | break; | |
1140 | ||
1141 | case TYPE_CODE_STRUCT: | |
1142 | case TYPE_CODE_UNION: | |
1143 | { | |
1144 | LONGEST count = 0; | |
1145 | int i; | |
1146 | ||
1f704f76 | 1147 | for (i = 0; i < type->num_fields (); i++) |
cc0e89c5 UW |
1148 | { |
1149 | LONGEST sub_count; | |
1150 | ||
ceacbf6e | 1151 | if (field_is_static (&type->field (i))) |
cc0e89c5 UW |
1152 | continue; |
1153 | ||
1154 | sub_count = ppc64_aggregate_candidate | |
940da03e | 1155 | (type->field (i).type (), field_type); |
cc0e89c5 UW |
1156 | if (sub_count == -1) |
1157 | return -1; | |
1158 | ||
78134374 | 1159 | if (type->code () == TYPE_CODE_STRUCT) |
cc0e89c5 UW |
1160 | count += sub_count; |
1161 | else | |
325fac50 | 1162 | count = std::max (count, sub_count); |
cc0e89c5 UW |
1163 | } |
1164 | ||
1165 | /* There must be no padding. */ | |
1166 | if (count == 0) | |
df86565b SM |
1167 | return type->length () == 0 ? 0 : -1; |
1168 | else if (type->length () != count * (*field_type)->length ()) | |
cc0e89c5 UW |
1169 | return -1; |
1170 | ||
1171 | return count; | |
1172 | } | |
1173 | break; | |
1174 | ||
1175 | default: | |
1176 | break; | |
1177 | } | |
1178 | ||
1179 | return -1; | |
1180 | } | |
1181 | ||
1182 | /* If an argument of type TYPE is a homogeneous float or vector aggregate | |
1183 | that shall be passed in FP/vector registers according to the ELFv2 ABI, | |
1184 | return the homogeneous element type in *ELT_TYPE and the number of | |
1185 | elements in *N_ELTS, and return non-zero. Otherwise, return zero. */ | |
1186 | ||
1187 | static int | |
1188 | ppc64_elfv2_abi_homogeneous_aggregate (struct type *type, | |
ebbac168 CL |
1189 | struct type **elt_type, int *n_elts, |
1190 | struct gdbarch *gdbarch) | |
cc0e89c5 UW |
1191 | { |
1192 | /* Complex types at the top level are treated separately. However, | |
1193 | complex types can be elements of homogeneous aggregates. */ | |
78134374 SM |
1194 | if (type->code () == TYPE_CODE_STRUCT |
1195 | || type->code () == TYPE_CODE_UNION | |
bd63c870 | 1196 | || (type->code () == TYPE_CODE_ARRAY && !type->is_vector ())) |
cc0e89c5 UW |
1197 | { |
1198 | struct type *field_type = NULL; | |
1199 | LONGEST field_count = ppc64_aggregate_candidate (type, &field_type); | |
1200 | ||
1201 | if (field_count > 0) | |
1202 | { | |
ebbac168 CL |
1203 | int n_regs; |
1204 | ||
1205 | if (field_type->code () == TYPE_CODE_FLT | |
1206 | && (gdbarch_long_double_format (gdbarch) | |
1207 | == floatformats_ieee_quad)) | |
1208 | /* IEEE Float 128-bit uses one vector register. */ | |
1209 | n_regs = 1; | |
1210 | ||
1211 | else if (field_type->code () == TYPE_CODE_FLT | |
1212 | || field_type->code () == TYPE_CODE_DECFLOAT) | |
df86565b | 1213 | n_regs = (field_type->length () + 7) >> 3; |
ebbac168 CL |
1214 | |
1215 | else | |
1216 | n_regs = 1; | |
cc0e89c5 UW |
1217 | |
1218 | /* The ELFv2 ABI allows homogeneous aggregates to occupy | |
1219 | up to 8 registers. */ | |
1220 | if (field_count * n_regs <= 8) | |
1221 | { | |
1222 | if (elt_type) | |
1223 | *elt_type = field_type; | |
1224 | if (n_elts) | |
1225 | *n_elts = (int) field_count; | |
1226 | /* Note that field_count is LONGEST since it may hold the size | |
1227 | of an array, while *n_elts is int since its value is bounded | |
1228 | by the number of registers used for argument passing. The | |
1229 | cast cannot overflow due to the bounds checking above. */ | |
1230 | return 1; | |
1231 | } | |
1232 | } | |
1233 | } | |
1234 | ||
1235 | return 0; | |
1236 | } | |
1237 | ||
e765b44c UW |
1238 | /* Structure holding the next argument position. */ |
1239 | struct ppc64_sysv_argpos | |
1240 | { | |
1241 | /* Register cache holding argument registers. If this is NULL, | |
1242 | we only simulate argument processing without actually updating | |
1243 | any registers or memory. */ | |
1244 | struct regcache *regcache; | |
1245 | /* Next available general-purpose argument register. */ | |
1246 | int greg; | |
1247 | /* Next available floating-point argument register. */ | |
1248 | int freg; | |
1249 | /* Next available vector argument register. */ | |
1250 | int vreg; | |
1251 | /* The address, at which the next general purpose parameter | |
1252 | (integer, struct, float, vector, ...) should be saved. */ | |
1253 | CORE_ADDR gparam; | |
1254 | /* The address, at which the next by-reference parameter | |
1255 | (non-Altivec vector, variably-sized type) should be saved. */ | |
1256 | CORE_ADDR refparam; | |
1257 | }; | |
1258 | ||
1259 | /* VAL is a value of length LEN. Store it into the argument area on the | |
1260 | stack and load it into the corresponding general-purpose registers | |
1261 | required by the ABI, and update ARGPOS. | |
1262 | ||
1263 | If ALIGN is nonzero, it specifies the minimum alignment required | |
1264 | for the on-stack copy of the argument. */ | |
d81e75c0 | 1265 | |
e765b44c UW |
1266 | static void |
1267 | ppc64_sysv_abi_push_val (struct gdbarch *gdbarch, | |
1268 | const bfd_byte *val, int len, int align, | |
1269 | struct ppc64_sysv_argpos *argpos) | |
1270 | { | |
08106042 | 1271 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1272 | int offset = 0; |
1273 | ||
1274 | /* Enforce alignment of stack location, if requested. */ | |
1275 | if (align > tdep->wordsize) | |
1276 | { | |
1277 | CORE_ADDR aligned_gparam = align_up (argpos->gparam, align); | |
1278 | ||
1279 | argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize; | |
1280 | argpos->gparam = aligned_gparam; | |
1281 | } | |
1282 | ||
1283 | /* The ABI (version 1.9) specifies that values smaller than one | |
1284 | doubleword are right-aligned and those larger are left-aligned. | |
1285 | GCC versions before 3.4 implemented this incorrectly; see | |
1286 | <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */ | |
d63167af UW |
1287 | if (len < tdep->wordsize |
1288 | && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
e765b44c UW |
1289 | offset = tdep->wordsize - len; |
1290 | ||
1291 | if (argpos->regcache) | |
1292 | write_memory (argpos->gparam + offset, val, len); | |
1293 | argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize); | |
1294 | ||
1295 | while (len >= tdep->wordsize) | |
1296 | { | |
1297 | if (argpos->regcache && argpos->greg <= 10) | |
b66f5587 SM |
1298 | argpos->regcache->cooked_write (tdep->ppc_gp0_regnum + argpos->greg, |
1299 | val); | |
e765b44c UW |
1300 | argpos->greg++; |
1301 | len -= tdep->wordsize; | |
1302 | val += tdep->wordsize; | |
1303 | } | |
1304 | ||
1305 | if (len > 0) | |
1306 | { | |
1307 | if (argpos->regcache && argpos->greg <= 10) | |
e4c4a59b SM |
1308 | argpos->regcache->cooked_write_part |
1309 | (tdep->ppc_gp0_regnum + argpos->greg, offset, len, val); | |
e765b44c UW |
1310 | argpos->greg++; |
1311 | } | |
1312 | } | |
1313 | ||
1314 | /* The same as ppc64_sysv_abi_push_val, but using a single-word integer | |
1315 | value VAL as argument. */ | |
d81e75c0 TD |
1316 | |
1317 | static void | |
e765b44c UW |
1318 | ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val, |
1319 | struct ppc64_sysv_argpos *argpos) | |
d81e75c0 | 1320 | { |
08106042 | 1321 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c | 1322 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
0f068fb5 | 1323 | gdb_byte buf[PPC_MAX_REGISTER_SIZE]; |
d81e75c0 | 1324 | |
e765b44c UW |
1325 | if (argpos->regcache) |
1326 | store_unsigned_integer (buf, tdep->wordsize, byte_order, val); | |
1327 | ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos); | |
1328 | } | |
1329 | ||
1330 | /* VAL is a value of TYPE, a (binary or decimal) floating-point type. | |
1331 | Load it into a floating-point register if required by the ABI, | |
1332 | and update ARGPOS. */ | |
1333 | ||
1334 | static void | |
1335 | ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch, | |
1336 | struct type *type, const bfd_byte *val, | |
1337 | struct ppc64_sysv_argpos *argpos) | |
1338 | { | |
08106042 | 1339 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1340 | if (tdep->soft_float) |
1341 | return; | |
1342 | ||
df86565b | 1343 | if (type->length () <= 8 |
78134374 | 1344 | && type->code () == TYPE_CODE_FLT) |
d81e75c0 | 1345 | { |
e765b44c | 1346 | /* Floats and doubles go in f1 .. f13. 32-bit floats are converted |
24b21115 | 1347 | to double first. */ |
e765b44c UW |
1348 | if (argpos->regcache && argpos->freg <= 13) |
1349 | { | |
1350 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; | |
1351 | struct type *regtype = register_type (gdbarch, regnum); | |
0f068fb5 | 1352 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
d81e75c0 | 1353 | |
3b2ca824 | 1354 | target_float_convert (val, type, regval, regtype); |
b66f5587 | 1355 | argpos->regcache->cooked_write (regnum, regval); |
e765b44c | 1356 | } |
d81e75c0 | 1357 | |
e765b44c UW |
1358 | argpos->freg++; |
1359 | } | |
df86565b | 1360 | else if (type->length () <= 8 |
78134374 | 1361 | && type->code () == TYPE_CODE_DECFLOAT) |
e765b44c UW |
1362 | { |
1363 | /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are | |
1364 | placed in the least significant word. */ | |
1365 | if (argpos->regcache && argpos->freg <= 13) | |
1366 | { | |
1367 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; | |
5b757e5d UW |
1368 | int offset = 0; |
1369 | ||
1370 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
df86565b | 1371 | offset = 8 - type->length (); |
d81e75c0 | 1372 | |
e4c4a59b | 1373 | argpos->regcache->cooked_write_part (regnum, offset, |
df86565b | 1374 | type->length (), val); |
e765b44c | 1375 | } |
d81e75c0 | 1376 | |
e765b44c UW |
1377 | argpos->freg++; |
1378 | } | |
df86565b | 1379 | else if (type->length () == 16 |
78134374 | 1380 | && type->code () == TYPE_CODE_FLT |
e765b44c UW |
1381 | && (gdbarch_long_double_format (gdbarch) |
1382 | == floatformats_ibm_long_double)) | |
1383 | { | |
1384 | /* IBM long double stored in two consecutive FPRs. */ | |
1385 | if (argpos->regcache && argpos->freg <= 13) | |
d81e75c0 | 1386 | { |
e765b44c UW |
1387 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; |
1388 | ||
b66f5587 | 1389 | argpos->regcache->cooked_write (regnum, val); |
e765b44c | 1390 | if (argpos->freg <= 12) |
b66f5587 | 1391 | argpos->regcache->cooked_write (regnum + 1, val + 8); |
d81e75c0 | 1392 | } |
d81e75c0 | 1393 | |
e765b44c UW |
1394 | argpos->freg += 2; |
1395 | } | |
df86565b | 1396 | else if (type->length () == 16 |
78134374 | 1397 | && type->code () == TYPE_CODE_DECFLOAT) |
e765b44c UW |
1398 | { |
1399 | /* 128-bit decimal floating-point values are stored in and even/odd | |
1400 | pair of FPRs, with the even FPR holding the most significant half. */ | |
1401 | argpos->freg += argpos->freg & 1; | |
d81e75c0 | 1402 | |
e765b44c | 1403 | if (argpos->regcache && argpos->freg <= 12) |
d81e75c0 | 1404 | { |
e765b44c | 1405 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; |
0ff3e01f UW |
1406 | int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0; |
1407 | int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8; | |
d81e75c0 | 1408 | |
b66f5587 SM |
1409 | argpos->regcache->cooked_write (regnum, val + hipart); |
1410 | argpos->regcache->cooked_write (regnum + 1, val + lopart); | |
d81e75c0 | 1411 | } |
e765b44c UW |
1412 | |
1413 | argpos->freg += 2; | |
d81e75c0 | 1414 | } |
e765b44c UW |
1415 | } |
1416 | ||
1417 | /* VAL is a value of AltiVec vector type. Load it into a vector register | |
1418 | if required by the ABI, and update ARGPOS. */ | |
1419 | ||
1420 | static void | |
1421 | ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val, | |
1422 | struct ppc64_sysv_argpos *argpos) | |
1423 | { | |
08106042 | 1424 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1425 | |
1426 | if (argpos->regcache && argpos->vreg <= 13) | |
b66f5587 | 1427 | argpos->regcache->cooked_write (tdep->ppc_vr0_regnum + argpos->vreg, val); |
e765b44c UW |
1428 | |
1429 | argpos->vreg++; | |
1430 | } | |
1431 | ||
1432 | /* VAL is a value of TYPE. Load it into memory and/or registers | |
1433 | as required by the ABI, and update ARGPOS. */ | |
1434 | ||
1435 | static void | |
1436 | ppc64_sysv_abi_push_param (struct gdbarch *gdbarch, | |
1437 | struct type *type, const bfd_byte *val, | |
1438 | struct ppc64_sysv_argpos *argpos) | |
1439 | { | |
08106042 | 1440 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c | 1441 | |
78134374 | 1442 | if (type->code () == TYPE_CODE_FLT |
df86565b | 1443 | && type->length () == 16 |
ebbac168 CL |
1444 | && (gdbarch_long_double_format (gdbarch) |
1445 | == floatformats_ieee_quad)) | |
1446 | { | |
1447 | /* IEEE FLOAT128, args in vector registers. */ | |
df86565b | 1448 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), 16, argpos); |
ebbac168 CL |
1449 | ppc64_sysv_abi_push_vreg (gdbarch, val, argpos); |
1450 | } | |
1451 | else if (type->code () == TYPE_CODE_FLT | |
1452 | || type->code () == TYPE_CODE_DECFLOAT) | |
e765b44c UW |
1453 | { |
1454 | /* Floating-point scalars are passed in floating-point registers. */ | |
df86565b | 1455 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), 0, argpos); |
e765b44c UW |
1456 | ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos); |
1457 | } | |
bd63c870 | 1458 | else if (type->code () == TYPE_CODE_ARRAY && type->is_vector () |
e765b44c | 1459 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC |
df86565b | 1460 | && type->length () == 16) |
e765b44c UW |
1461 | { |
1462 | /* AltiVec vectors are passed aligned, and in vector registers. */ | |
df86565b | 1463 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), 16, argpos); |
e765b44c UW |
1464 | ppc64_sysv_abi_push_vreg (gdbarch, val, argpos); |
1465 | } | |
bd63c870 | 1466 | else if (type->code () == TYPE_CODE_ARRAY && type->is_vector () |
df86565b | 1467 | && type->length () >= 16) |
d81e75c0 | 1468 | { |
e765b44c UW |
1469 | /* Non-Altivec vectors are passed by reference. */ |
1470 | ||
1471 | /* Copy value onto the stack ... */ | |
1472 | CORE_ADDR addr = align_up (argpos->refparam, 16); | |
1473 | if (argpos->regcache) | |
df86565b SM |
1474 | write_memory (addr, val, type->length ()); |
1475 | argpos->refparam = align_up (addr + type->length (), tdep->wordsize); | |
e765b44c UW |
1476 | |
1477 | /* ... and pass a pointer to the copy as parameter. */ | |
1478 | ppc64_sysv_abi_push_integer (gdbarch, addr, argpos); | |
1479 | } | |
78134374 SM |
1480 | else if ((type->code () == TYPE_CODE_INT |
1481 | || type->code () == TYPE_CODE_ENUM | |
1482 | || type->code () == TYPE_CODE_BOOL | |
1483 | || type->code () == TYPE_CODE_CHAR | |
1484 | || type->code () == TYPE_CODE_PTR | |
aa006118 | 1485 | || TYPE_IS_REFERENCE (type)) |
df86565b | 1486 | && type->length () <= tdep->wordsize) |
e765b44c UW |
1487 | { |
1488 | ULONGEST word = 0; | |
1489 | ||
1490 | if (argpos->regcache) | |
d81e75c0 | 1491 | { |
e765b44c UW |
1492 | /* Sign extend the value, then store it unsigned. */ |
1493 | word = unpack_long (type, val); | |
1494 | ||
1495 | /* Convert any function code addresses into descriptors. */ | |
d4094b6a | 1496 | if (tdep->elf_abi == POWERPC_ELF_V1 |
78134374 SM |
1497 | && (type->code () == TYPE_CODE_PTR |
1498 | || type->code () == TYPE_CODE_REF)) | |
e765b44c UW |
1499 | { |
1500 | struct type *target_type | |
27710edb | 1501 | = check_typedef (type->target_type ()); |
e765b44c | 1502 | |
78134374 SM |
1503 | if (target_type->code () == TYPE_CODE_FUNC |
1504 | || target_type->code () == TYPE_CODE_METHOD) | |
e765b44c UW |
1505 | { |
1506 | CORE_ADDR desc = word; | |
1507 | ||
1508 | convert_code_addr_to_desc_addr (word, &desc); | |
1509 | word = desc; | |
1510 | } | |
1511 | } | |
d81e75c0 | 1512 | } |
e765b44c UW |
1513 | |
1514 | ppc64_sysv_abi_push_integer (gdbarch, word, argpos); | |
1515 | } | |
1516 | else | |
1517 | { | |
ff84aaf3 TV |
1518 | /* Align == 0 is correct for ppc64_sysv_abi_push_freg, |
1519 | Align == 16 is correct for ppc64_sysv_abi_push_vreg. | |
1520 | Default to 0. */ | |
1521 | int align = 0; | |
e765b44c UW |
1522 | |
1523 | /* The ABI (version 1.9) specifies that structs containing a | |
1524 | single floating-point value, at any level of nesting of | |
1525 | single-member structs, are passed in floating-point registers. */ | |
78134374 | 1526 | if (type->code () == TYPE_CODE_STRUCT |
ebbac168 | 1527 | && type->num_fields () == 1 && tdep->elf_abi == POWERPC_ELF_V1) |
d81e75c0 | 1528 | { |
78134374 | 1529 | while (type->code () == TYPE_CODE_STRUCT |
1f704f76 | 1530 | && type->num_fields () == 1) |
940da03e | 1531 | type = check_typedef (type->field (0).type ()); |
e765b44c | 1532 | |
ebbac168 CL |
1533 | if (type->code () == TYPE_CODE_FLT) { |
1534 | /* Handle the case of 128-bit floats for both IEEE and IBM long double | |
1535 | formats. */ | |
df86565b | 1536 | if (type->length () == 16 |
ebbac168 CL |
1537 | && (gdbarch_long_double_format (gdbarch) |
1538 | == floatformats_ieee_quad)) | |
ff84aaf3 TV |
1539 | { |
1540 | ppc64_sysv_abi_push_vreg (gdbarch, val, argpos); | |
1541 | align = 16; | |
1542 | } | |
ebbac168 CL |
1543 | else |
1544 | ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos); | |
1545 | } | |
d81e75c0 | 1546 | } |
cc0e89c5 UW |
1547 | |
1548 | /* In the ELFv2 ABI, homogeneous floating-point or vector | |
1549 | aggregates are passed in a series of registers. */ | |
1550 | if (tdep->elf_abi == POWERPC_ELF_V2) | |
1551 | { | |
1552 | struct type *eltype; | |
1553 | int i, nelt; | |
1554 | ||
ebbac168 CL |
1555 | if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt, |
1556 | gdbarch)) | |
cc0e89c5 UW |
1557 | for (i = 0; i < nelt; i++) |
1558 | { | |
df86565b | 1559 | const gdb_byte *elval = val + i * eltype->length (); |
cc0e89c5 | 1560 | |
78134374 | 1561 | if (eltype->code () == TYPE_CODE_FLT |
df86565b | 1562 | && eltype->length () == 16 |
ebbac168 CL |
1563 | && (gdbarch_long_double_format (gdbarch) |
1564 | == floatformats_ieee_quad)) | |
1565 | /* IEEE FLOAT128, args in vector registers. */ | |
ff84aaf3 TV |
1566 | { |
1567 | ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos); | |
1568 | align = 16; | |
1569 | } | |
ebbac168 CL |
1570 | else if (eltype->code () == TYPE_CODE_FLT |
1571 | || eltype->code () == TYPE_CODE_DECFLOAT) | |
1572 | /* IBM long double and all other floats and decfloats, args | |
1573 | are in a pair of floating point registers. */ | |
cc0e89c5 | 1574 | ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos); |
78134374 | 1575 | else if (eltype->code () == TYPE_CODE_ARRAY |
bd63c870 | 1576 | && eltype->is_vector () |
cc0e89c5 | 1577 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC |
df86565b | 1578 | && eltype->length () == 16) |
ff84aaf3 TV |
1579 | { |
1580 | ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos); | |
1581 | align = 16; | |
1582 | } | |
cc0e89c5 UW |
1583 | } |
1584 | } | |
ff84aaf3 | 1585 | |
df86565b | 1586 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), align, argpos); |
d81e75c0 TD |
1587 | } |
1588 | } | |
1589 | ||
0df8b418 | 1590 | /* Pass the arguments in either registers, or in the stack. Using the |
8be9034a AC |
1591 | ppc 64 bit SysV ABI. |
1592 | ||
1593 | This implements a dumbed down version of the ABI. It always writes | |
1594 | values to memory, GPR and FPR, even when not necessary. Doing this | |
0df8b418 | 1595 | greatly simplifies the logic. */ |
8be9034a AC |
1596 | |
1597 | CORE_ADDR | |
0df8b418 MS |
1598 | ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, |
1599 | struct value *function, | |
8be9034a AC |
1600 | struct regcache *regcache, CORE_ADDR bp_addr, |
1601 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
1602 | function_call_return_method return_method, |
1603 | CORE_ADDR struct_addr) | |
8be9034a | 1604 | { |
7d9b040b | 1605 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
08106042 | 1606 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e17a4113 | 1607 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
88aed45e | 1608 | int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function)); |
fb4443d8 | 1609 | ULONGEST back_chain; |
8be9034a AC |
1610 | /* See for-loop comment below. */ |
1611 | int write_pass; | |
24e9cda0 UW |
1612 | /* Size of the by-reference parameter copy region, the final value is |
1613 | computed in the for-loop below. */ | |
1614 | LONGEST refparam_size = 0; | |
8be9034a AC |
1615 | /* Size of the general parameter region, the final value is computed |
1616 | in the for-loop below. */ | |
1617 | LONGEST gparam_size = 0; | |
1618 | /* Kevin writes ... I don't mind seeing tdep->wordsize used in the | |
0df8b418 | 1619 | calls to align_up(), align_down(), etc. because this makes it |
8be9034a AC |
1620 | easier to reuse this code (in a copy/paste sense) in the future, |
1621 | but it is a 64-bit ABI and asserting that the wordsize is 8 bytes | |
1622 | at some point makes it easier to verify that this function is | |
1623 | correct without having to do a non-local analysis to figure out | |
1624 | the possible values of tdep->wordsize. */ | |
1625 | gdb_assert (tdep->wordsize == 8); | |
1626 | ||
55eddb0f DJ |
1627 | /* This function exists to support a calling convention that |
1628 | requires floating-point registers. It shouldn't be used on | |
1629 | processors that lack them. */ | |
1630 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
1631 | ||
fb4443d8 UW |
1632 | /* By this stage in the proceedings, SP has been decremented by "red |
1633 | zone size" + "struct return size". Fetch the stack-pointer from | |
1634 | before this and use that as the BACK_CHAIN. */ | |
40a6adc1 | 1635 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 1636 | &back_chain); |
fb4443d8 | 1637 | |
8be9034a AC |
1638 | /* Go through the argument list twice. |
1639 | ||
1640 | Pass 1: Compute the function call's stack space and register | |
1641 | requirements. | |
1642 | ||
1643 | Pass 2: Replay the same computation but this time also write the | |
1644 | values out to the target. */ | |
1645 | ||
1646 | for (write_pass = 0; write_pass < 2; write_pass++) | |
1647 | { | |
1648 | int argno; | |
e765b44c UW |
1649 | |
1650 | struct ppc64_sysv_argpos argpos; | |
1651 | argpos.greg = 3; | |
1652 | argpos.freg = 1; | |
1653 | argpos.vreg = 2; | |
8be9034a AC |
1654 | |
1655 | if (!write_pass) | |
1656 | { | |
24e9cda0 UW |
1657 | /* During the first pass, GPARAM and REFPARAM are more like |
1658 | offsets (start address zero) than addresses. That way | |
1659 | they accumulate the total stack space each region | |
1660 | requires. */ | |
e765b44c UW |
1661 | argpos.regcache = NULL; |
1662 | argpos.gparam = 0; | |
1663 | argpos.refparam = 0; | |
8be9034a AC |
1664 | } |
1665 | else | |
1666 | { | |
24e9cda0 UW |
1667 | /* Decrement the stack pointer making space for the Altivec |
1668 | and general on-stack parameters. Set refparam and gparam | |
1669 | to their corresponding regions. */ | |
e765b44c UW |
1670 | argpos.regcache = regcache; |
1671 | argpos.refparam = align_down (sp - refparam_size, 16); | |
1672 | argpos.gparam = align_down (argpos.refparam - gparam_size, 16); | |
52f548e4 UW |
1673 | /* Add in space for the TOC, link editor double word (v1 only), |
1674 | compiler double word (v1 only), LR save area, CR save area, | |
1675 | and backchain. */ | |
1676 | if (tdep->elf_abi == POWERPC_ELF_V1) | |
1677 | sp = align_down (argpos.gparam - 48, 16); | |
1678 | else | |
1679 | sp = align_down (argpos.gparam - 32, 16); | |
8be9034a AC |
1680 | } |
1681 | ||
1682 | /* If the function is returning a `struct', then there is an | |
dda83cd7 SM |
1683 | extra hidden parameter (which will be passed in r3) |
1684 | containing the address of that struct.. In that case we | |
1685 | should advance one word and start from r4 register to copy | |
1686 | parameters. This also consumes one on-stack parameter slot. */ | |
cf84fa6b | 1687 | if (return_method == return_method_struct) |
e765b44c | 1688 | ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos); |
8be9034a AC |
1689 | |
1690 | for (argno = 0; argno < nargs; argno++) | |
1691 | { | |
1692 | struct value *arg = args[argno]; | |
df407dfe | 1693 | struct type *type = check_typedef (value_type (arg)); |
50888e42 | 1694 | const bfd_byte *val = value_contents (arg).data (); |
ce0451ad | 1695 | |
78134374 | 1696 | if (type->code () == TYPE_CODE_COMPLEX) |
8be9034a | 1697 | { |
e765b44c | 1698 | /* Complex types are passed as if two independent scalars. */ |
27710edb | 1699 | struct type *eltype = check_typedef (type->target_type ()); |
1300a2f4 | 1700 | |
e765b44c UW |
1701 | ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos); |
1702 | ppc64_sysv_abi_push_param (gdbarch, eltype, | |
df86565b | 1703 | val + eltype->length (), &argpos); |
1300a2f4 | 1704 | } |
bd63c870 | 1705 | else if (type->code () == TYPE_CODE_ARRAY && type->is_vector () |
54fcddd0 UW |
1706 | && opencl_abi) |
1707 | { | |
1708 | /* OpenCL vectors shorter than 16 bytes are passed as if | |
e765b44c UW |
1709 | a series of independent scalars; OpenCL vectors 16 bytes |
1710 | or longer are passed as if a series of AltiVec vectors. */ | |
1711 | struct type *eltype; | |
1712 | int i, nelt; | |
54fcddd0 | 1713 | |
df86565b | 1714 | if (type->length () < 16) |
27710edb | 1715 | eltype = check_typedef (type->target_type ()); |
e765b44c UW |
1716 | else |
1717 | eltype = register_type (gdbarch, tdep->ppc_vr0_regnum); | |
1718 | ||
df86565b | 1719 | nelt = type->length () / eltype->length (); |
54fcddd0 UW |
1720 | for (i = 0; i < nelt; i++) |
1721 | { | |
df86565b | 1722 | const gdb_byte *elval = val + i * eltype->length (); |
54fcddd0 | 1723 | |
e765b44c | 1724 | ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos); |
8be9034a | 1725 | } |
8be9034a AC |
1726 | } |
1727 | else | |
1728 | { | |
e765b44c UW |
1729 | /* All other types are passed as single arguments. */ |
1730 | ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos); | |
8be9034a AC |
1731 | } |
1732 | } | |
1733 | ||
1734 | if (!write_pass) | |
1735 | { | |
24e9cda0 | 1736 | /* Save the true region sizes ready for the second pass. */ |
e765b44c | 1737 | refparam_size = argpos.refparam; |
24e9cda0 | 1738 | /* Make certain that the general parameter save area is at |
8be9034a | 1739 | least the minimum 8 registers (or doublewords) in size. */ |
e765b44c | 1740 | if (argpos.greg < 8) |
8be9034a AC |
1741 | gparam_size = 8 * tdep->wordsize; |
1742 | else | |
e765b44c | 1743 | gparam_size = argpos.gparam; |
8be9034a AC |
1744 | } |
1745 | } | |
1746 | ||
1747 | /* Update %sp. */ | |
40a6adc1 | 1748 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
8be9034a AC |
1749 | |
1750 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
e17a4113 | 1751 | write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain); |
8be9034a AC |
1752 | |
1753 | /* Point the inferior function call's return address at the dummy's | |
1754 | breakpoint. */ | |
1755 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); | |
1756 | ||
d4094b6a UW |
1757 | /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use |
1758 | that to find the TOC. If we're calling via a function pointer, | |
1759 | the pointer itself identifies the descriptor. */ | |
1760 | if (tdep->elf_abi == POWERPC_ELF_V1) | |
1761 | { | |
1762 | struct type *ftype = check_typedef (value_type (function)); | |
1763 | CORE_ADDR desc_addr = value_as_address (function); | |
1764 | ||
78134374 | 1765 | if (ftype->code () == TYPE_CODE_PTR |
d4094b6a UW |
1766 | || convert_code_addr_to_desc_addr (func_addr, &desc_addr)) |
1767 | { | |
1768 | /* The TOC is the second double word in the descriptor. */ | |
1769 | CORE_ADDR toc = | |
1770 | read_memory_unsigned_integer (desc_addr + tdep->wordsize, | |
1771 | tdep->wordsize, byte_order); | |
1772 | ||
1773 | regcache_cooked_write_unsigned (regcache, | |
1774 | tdep->ppc_gp0_regnum + 2, toc); | |
1775 | } | |
1776 | } | |
1777 | ||
1778 | /* In the ELFv2 ABI, we need to pass the target address in r12 since | |
1779 | we may be calling a global entry point. */ | |
1780 | if (tdep->elf_abi == POWERPC_ELF_V2) | |
1781 | regcache_cooked_write_unsigned (regcache, | |
1782 | tdep->ppc_gp0_regnum + 12, func_addr); | |
8be9034a AC |
1783 | |
1784 | return sp; | |
1785 | } | |
1786 | ||
e765b44c UW |
1787 | /* Subroutine of ppc64_sysv_abi_return_value that handles "base" types: |
1788 | integer, floating-point, and AltiVec vector types. | |
afd48b75 | 1789 | |
e765b44c UW |
1790 | This routine also handles components of aggregate return types; |
1791 | INDEX describes which part of the aggregate is to be handled. | |
afd48b75 | 1792 | |
e765b44c UW |
1793 | Returns true if VALTYPE is some such base type that could be handled, |
1794 | false otherwise. */ | |
1795 | static int | |
1796 | ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype, | |
1797 | struct regcache *regcache, gdb_byte *readbuf, | |
1798 | const gdb_byte *writebuf, int index) | |
afd48b75 | 1799 | { |
08106042 | 1800 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
16796152 | 1801 | |
e765b44c | 1802 | /* Integers live in GPRs starting at r3. */ |
78134374 SM |
1803 | if ((valtype->code () == TYPE_CODE_INT |
1804 | || valtype->code () == TYPE_CODE_ENUM | |
1805 | || valtype->code () == TYPE_CODE_CHAR | |
9a73e1ca JB |
1806 | || valtype->code () == TYPE_CODE_BOOL |
1807 | || valtype->code () == TYPE_CODE_RANGE | |
1808 | || is_fixed_point_type (valtype)) | |
df86565b | 1809 | && valtype->length () <= 8) |
afd48b75 | 1810 | { |
e765b44c UW |
1811 | int regnum = tdep->ppc_gp0_regnum + 3 + index; |
1812 | ||
963e2bb7 | 1813 | if (writebuf != NULL) |
afd48b75 | 1814 | { |
9a73e1ca JB |
1815 | LONGEST return_val; |
1816 | ||
1817 | if (is_fixed_point_type (valtype)) | |
1818 | { | |
1819 | /* Fixed point type values need to be returned unscaled. */ | |
1820 | gdb_mpz unscaled; | |
1821 | ||
e5783467 | 1822 | unscaled.read (gdb::make_array_view (writebuf, |
df86565b | 1823 | valtype->length ()), |
9a73e1ca JB |
1824 | type_byte_order (valtype), |
1825 | valtype->is_unsigned ()); | |
1826 | return_val = unscaled.as_integer<LONGEST> (); | |
1827 | } | |
1828 | else | |
1829 | return_val = unpack_long (valtype, writebuf); | |
1830 | ||
afd48b75 | 1831 | /* Be careful to sign extend the value. */ |
9a73e1ca | 1832 | regcache_cooked_write_unsigned (regcache, regnum, return_val); |
afd48b75 | 1833 | } |
963e2bb7 | 1834 | if (readbuf != NULL) |
afd48b75 | 1835 | { |
e765b44c | 1836 | /* Extract the integer from GPR. Since this is truncating the |
afd48b75 AC |
1837 | value, there isn't a sign extension problem. */ |
1838 | ULONGEST regval; | |
e765b44c UW |
1839 | |
1840 | regcache_cooked_read_unsigned (regcache, regnum, ®val); | |
df86565b | 1841 | store_unsigned_integer (readbuf, valtype->length (), |
e765b44c | 1842 | gdbarch_byte_order (gdbarch), regval); |
afd48b75 | 1843 | } |
e765b44c | 1844 | return 1; |
afd48b75 | 1845 | } |
e765b44c UW |
1846 | |
1847 | /* Floats and doubles go in f1 .. f13. 32-bit floats are converted | |
1848 | to double first. */ | |
df86565b | 1849 | if (valtype->length () <= 8 |
78134374 | 1850 | && valtype->code () == TYPE_CODE_FLT) |
afd48b75 | 1851 | { |
e765b44c UW |
1852 | int regnum = tdep->ppc_fp0_regnum + 1 + index; |
1853 | struct type *regtype = register_type (gdbarch, regnum); | |
0f068fb5 | 1854 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
e765b44c | 1855 | |
963e2bb7 | 1856 | if (writebuf != NULL) |
e765b44c | 1857 | { |
3b2ca824 | 1858 | target_float_convert (writebuf, valtype, regval, regtype); |
b66f5587 | 1859 | regcache->cooked_write (regnum, regval); |
e765b44c | 1860 | } |
963e2bb7 | 1861 | if (readbuf != NULL) |
e765b44c | 1862 | { |
dca08e1f | 1863 | regcache->cooked_read (regnum, regval); |
3b2ca824 | 1864 | target_float_convert (regval, regtype, readbuf, valtype); |
e765b44c UW |
1865 | } |
1866 | return 1; | |
afd48b75 | 1867 | } |
54fcddd0 | 1868 | |
e765b44c UW |
1869 | /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are |
1870 | placed in the least significant word. */ | |
df86565b | 1871 | if (valtype->length () <= 8 |
78134374 | 1872 | && valtype->code () == TYPE_CODE_DECFLOAT) |
e765b44c UW |
1873 | { |
1874 | int regnum = tdep->ppc_fp0_regnum + 1 + index; | |
5b757e5d UW |
1875 | int offset = 0; |
1876 | ||
1877 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
df86565b | 1878 | offset = 8 - valtype->length (); |
54fcddd0 | 1879 | |
e765b44c | 1880 | if (writebuf != NULL) |
df86565b | 1881 | regcache->cooked_write_part (regnum, offset, valtype->length (), |
e4c4a59b | 1882 | writebuf); |
e765b44c | 1883 | if (readbuf != NULL) |
df86565b | 1884 | regcache->cooked_read_part (regnum, offset, valtype->length (), |
73bb0000 | 1885 | readbuf); |
e765b44c UW |
1886 | return 1; |
1887 | } | |
54fcddd0 | 1888 | |
e765b44c | 1889 | /* IBM long double stored in two consecutive FPRs. */ |
df86565b | 1890 | if (valtype->length () == 16 |
78134374 | 1891 | && valtype->code () == TYPE_CODE_FLT |
e765b44c UW |
1892 | && (gdbarch_long_double_format (gdbarch) |
1893 | == floatformats_ibm_long_double)) | |
1894 | { | |
1895 | int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index; | |
54fcddd0 | 1896 | |
e765b44c UW |
1897 | if (writebuf != NULL) |
1898 | { | |
b66f5587 SM |
1899 | regcache->cooked_write (regnum, writebuf); |
1900 | regcache->cooked_write (regnum + 1, writebuf + 8); | |
54fcddd0 | 1901 | } |
e765b44c UW |
1902 | if (readbuf != NULL) |
1903 | { | |
dca08e1f SM |
1904 | regcache->cooked_read (regnum, readbuf); |
1905 | regcache->cooked_read (regnum + 1, readbuf + 8); | |
e765b44c UW |
1906 | } |
1907 | return 1; | |
54fcddd0 | 1908 | } |
e765b44c UW |
1909 | |
1910 | /* 128-bit decimal floating-point values are stored in an even/odd | |
1911 | pair of FPRs, with the even FPR holding the most significant half. */ | |
df86565b | 1912 | if (valtype->length () == 16 |
78134374 | 1913 | && valtype->code () == TYPE_CODE_DECFLOAT) |
54fcddd0 | 1914 | { |
e765b44c | 1915 | int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index; |
0ff3e01f UW |
1916 | int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0; |
1917 | int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8; | |
54fcddd0 | 1918 | |
e765b44c | 1919 | if (writebuf != NULL) |
54fcddd0 | 1920 | { |
b66f5587 SM |
1921 | regcache->cooked_write (regnum, writebuf + hipart); |
1922 | regcache->cooked_write (regnum + 1, writebuf + lopart); | |
54fcddd0 | 1923 | } |
e765b44c UW |
1924 | if (readbuf != NULL) |
1925 | { | |
dca08e1f SM |
1926 | regcache->cooked_read (regnum, readbuf + hipart); |
1927 | regcache->cooked_read (regnum + 1, readbuf + lopart); | |
e765b44c UW |
1928 | } |
1929 | return 1; | |
54fcddd0 | 1930 | } |
e765b44c | 1931 | |
ebbac168 CL |
1932 | /* AltiVec vectors are returned in VRs starting at v2. |
1933 | IEEE FLOAT 128-bit are stored in vector register. */ | |
1934 | ||
df86565b | 1935 | if (valtype->length () == 16 |
ebbac168 CL |
1936 | && ((valtype->code () == TYPE_CODE_ARRAY |
1937 | && valtype->is_vector () | |
1938 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
1939 | || (valtype->code () == TYPE_CODE_FLT | |
1940 | && (gdbarch_long_double_format (gdbarch) | |
1941 | == floatformats_ieee_quad)))) | |
afd48b75 | 1942 | { |
e765b44c UW |
1943 | int regnum = tdep->ppc_vr0_regnum + 2 + index; |
1944 | ||
1945 | if (writebuf != NULL) | |
b66f5587 | 1946 | regcache->cooked_write (regnum, writebuf); |
e765b44c | 1947 | if (readbuf != NULL) |
dca08e1f | 1948 | regcache->cooked_read (regnum, readbuf); |
e765b44c | 1949 | return 1; |
afd48b75 | 1950 | } |
e765b44c | 1951 | |
a1da2672 | 1952 | /* Short vectors are returned in GPRs starting at r3. */ |
df86565b | 1953 | if (valtype->length () <= 8 |
bd63c870 | 1954 | && valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector ()) |
a1da2672 UW |
1955 | { |
1956 | int regnum = tdep->ppc_gp0_regnum + 3 + index; | |
1957 | int offset = 0; | |
1958 | ||
1959 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
df86565b | 1960 | offset = 8 - valtype->length (); |
a1da2672 UW |
1961 | |
1962 | if (writebuf != NULL) | |
df86565b | 1963 | regcache->cooked_write_part (regnum, offset, valtype->length (), |
e4c4a59b | 1964 | writebuf); |
a1da2672 | 1965 | if (readbuf != NULL) |
df86565b | 1966 | regcache->cooked_read_part (regnum, offset, valtype->length (), |
73bb0000 | 1967 | readbuf); |
a1da2672 UW |
1968 | return 1; |
1969 | } | |
1970 | ||
e765b44c UW |
1971 | return 0; |
1972 | } | |
1973 | ||
1974 | /* The 64 bit ABI return value convention. | |
1975 | ||
1976 | Return non-zero if the return-value is stored in a register, return | |
1977 | 0 if the return-value is instead stored on the stack (a.k.a., | |
1978 | struct return convention). | |
1979 | ||
1980 | For a return-value stored in a register: when WRITEBUF is non-NULL, | |
1981 | copy the buffer to the corresponding register return-value location | |
1982 | location; when READBUF is non-NULL, fill the buffer from the | |
1983 | corresponding register return-value location. */ | |
1984 | enum return_value_convention | |
1985 | ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function, | |
1986 | struct type *valtype, struct regcache *regcache, | |
1987 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
1988 | { | |
08106042 | 1989 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1990 | struct type *func_type = function ? value_type (function) : NULL; |
1991 | int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0; | |
1992 | struct type *eltype; | |
b926417a | 1993 | int nelt, ok; |
e765b44c UW |
1994 | |
1995 | /* This function exists to support a calling convention that | |
1996 | requires floating-point registers. It shouldn't be used on | |
1997 | processors that lack them. */ | |
1998 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
1999 | ||
2000 | /* Complex types are returned as if two independent scalars. */ | |
78134374 | 2001 | if (valtype->code () == TYPE_CODE_COMPLEX) |
afd48b75 | 2002 | { |
27710edb | 2003 | eltype = check_typedef (valtype->target_type ()); |
e765b44c | 2004 | |
b926417a | 2005 | for (int i = 0; i < 2; i++) |
afd48b75 | 2006 | { |
e765b44c UW |
2007 | ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache, |
2008 | readbuf, writebuf, i); | |
2009 | gdb_assert (ok); | |
2010 | ||
2011 | if (readbuf) | |
df86565b | 2012 | readbuf += eltype->length (); |
e765b44c | 2013 | if (writebuf) |
df86565b | 2014 | writebuf += eltype->length (); |
afd48b75 AC |
2015 | } |
2016 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2017 | } | |
e765b44c UW |
2018 | |
2019 | /* OpenCL vectors shorter than 16 bytes are returned as if | |
2020 | a series of independent scalars; OpenCL vectors 16 bytes | |
2021 | or longer are returned as if a series of AltiVec vectors. */ | |
bd63c870 | 2022 | if (valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector () |
e765b44c | 2023 | && opencl_abi) |
afd48b75 | 2024 | { |
df86565b | 2025 | if (valtype->length () < 16) |
27710edb | 2026 | eltype = check_typedef (valtype->target_type ()); |
e765b44c UW |
2027 | else |
2028 | eltype = register_type (gdbarch, tdep->ppc_vr0_regnum); | |
2029 | ||
df86565b | 2030 | nelt = valtype->length () / eltype->length (); |
b926417a | 2031 | for (int i = 0; i < nelt; i++) |
afd48b75 | 2032 | { |
e765b44c UW |
2033 | ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache, |
2034 | readbuf, writebuf, i); | |
2035 | gdb_assert (ok); | |
2036 | ||
2037 | if (readbuf) | |
df86565b | 2038 | readbuf += eltype->length (); |
e765b44c | 2039 | if (writebuf) |
df86565b | 2040 | writebuf += eltype->length (); |
afd48b75 AC |
2041 | } |
2042 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2043 | } | |
e765b44c UW |
2044 | |
2045 | /* All pointers live in r3. */ | |
78134374 | 2046 | if (valtype->code () == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype)) |
afd48b75 | 2047 | { |
e765b44c UW |
2048 | int regnum = tdep->ppc_gp0_regnum + 3; |
2049 | ||
2050 | if (writebuf != NULL) | |
b66f5587 | 2051 | regcache->cooked_write (regnum, writebuf); |
e765b44c | 2052 | if (readbuf != NULL) |
dca08e1f | 2053 | regcache->cooked_read (regnum, readbuf); |
afd48b75 AC |
2054 | return RETURN_VALUE_REGISTER_CONVENTION; |
2055 | } | |
e765b44c UW |
2056 | |
2057 | /* Small character arrays are returned, right justified, in r3. */ | |
78134374 | 2058 | if (valtype->code () == TYPE_CODE_ARRAY |
bd63c870 | 2059 | && !valtype->is_vector () |
df86565b | 2060 | && valtype->length () <= 8 |
27710edb | 2061 | && valtype->target_type ()->code () == TYPE_CODE_INT |
df86565b | 2062 | && valtype->target_type ()->length () == 1) |
e765b44c UW |
2063 | { |
2064 | int regnum = tdep->ppc_gp0_regnum + 3; | |
df86565b | 2065 | int offset = (register_size (gdbarch, regnum) - valtype->length ()); |
e765b44c UW |
2066 | |
2067 | if (writebuf != NULL) | |
df86565b | 2068 | regcache->cooked_write_part (regnum, offset, valtype->length (), |
e4c4a59b | 2069 | writebuf); |
e765b44c | 2070 | if (readbuf != NULL) |
df86565b | 2071 | regcache->cooked_read_part (regnum, offset, valtype->length (), |
73bb0000 | 2072 | readbuf); |
e765b44c UW |
2073 | return RETURN_VALUE_REGISTER_CONVENTION; |
2074 | } | |
2075 | ||
cc0e89c5 UW |
2076 | /* In the ELFv2 ABI, homogeneous floating-point or vector |
2077 | aggregates are returned in registers. */ | |
2078 | if (tdep->elf_abi == POWERPC_ELF_V2 | |
ebbac168 CL |
2079 | && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt, |
2080 | gdbarch) | |
78134374 SM |
2081 | && (eltype->code () == TYPE_CODE_FLT |
2082 | || eltype->code () == TYPE_CODE_DECFLOAT | |
2083 | || (eltype->code () == TYPE_CODE_ARRAY | |
bd63c870 | 2084 | && eltype->is_vector () |
a1da2672 | 2085 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC |
df86565b | 2086 | && eltype->length () == 16))) |
cc0e89c5 | 2087 | { |
b926417a | 2088 | for (int i = 0; i < nelt; i++) |
cc0e89c5 UW |
2089 | { |
2090 | ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache, | |
2091 | readbuf, writebuf, i); | |
2092 | gdb_assert (ok); | |
2093 | ||
2094 | if (readbuf) | |
df86565b | 2095 | readbuf += eltype->length (); |
cc0e89c5 | 2096 | if (writebuf) |
df86565b | 2097 | writebuf += eltype->length (); |
cc0e89c5 UW |
2098 | } |
2099 | ||
2100 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2101 | } | |
2102 | ||
24b27e5e CL |
2103 | if (!language_pass_by_reference (valtype).trivially_copyable |
2104 | && valtype->code () == TYPE_CODE_STRUCT) | |
2105 | return RETURN_VALUE_STRUCT_CONVENTION; | |
2106 | ||
cc0e89c5 UW |
2107 | /* In the ELFv2 ABI, aggregate types of up to 16 bytes are |
2108 | returned in registers r3:r4. */ | |
2109 | if (tdep->elf_abi == POWERPC_ELF_V2 | |
df86565b | 2110 | && valtype->length () <= 16 |
78134374 SM |
2111 | && (valtype->code () == TYPE_CODE_STRUCT |
2112 | || valtype->code () == TYPE_CODE_UNION | |
2113 | || (valtype->code () == TYPE_CODE_ARRAY | |
bd63c870 | 2114 | && !valtype->is_vector ()))) |
cc0e89c5 | 2115 | { |
df86565b | 2116 | int n_regs = ((valtype->length () + tdep->wordsize - 1) |
cc0e89c5 | 2117 | / tdep->wordsize); |
cc0e89c5 | 2118 | |
b926417a | 2119 | for (int i = 0; i < n_regs; i++) |
cc0e89c5 | 2120 | { |
0f068fb5 | 2121 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
cc0e89c5 UW |
2122 | int regnum = tdep->ppc_gp0_regnum + 3 + i; |
2123 | int offset = i * tdep->wordsize; | |
df86565b | 2124 | int len = valtype->length () - offset; |
cc0e89c5 UW |
2125 | |
2126 | if (len > tdep->wordsize) | |
2127 | len = tdep->wordsize; | |
2128 | ||
2129 | if (writebuf != NULL) | |
2130 | { | |
2131 | memset (regval, 0, sizeof regval); | |
2132 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG | |
2133 | && offset == 0) | |
2134 | memcpy (regval + tdep->wordsize - len, writebuf, len); | |
2135 | else | |
2136 | memcpy (regval, writebuf + offset, len); | |
b66f5587 | 2137 | regcache->cooked_write (regnum, regval); |
cc0e89c5 UW |
2138 | } |
2139 | if (readbuf != NULL) | |
2140 | { | |
dca08e1f | 2141 | regcache->cooked_read (regnum, regval); |
cc0e89c5 UW |
2142 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG |
2143 | && offset == 0) | |
2144 | memcpy (readbuf, regval + tdep->wordsize - len, len); | |
2145 | else | |
2146 | memcpy (readbuf + offset, regval, len); | |
2147 | } | |
2148 | } | |
2149 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2150 | } | |
2151 | ||
e765b44c UW |
2152 | /* Handle plain base types. */ |
2153 | if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache, | |
2154 | readbuf, writebuf, 0)) | |
2155 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2156 | ||
afd48b75 AC |
2157 | return RETURN_VALUE_STRUCT_CONVENTION; |
2158 | } | |
2159 | ||
53fd08b6 TT |
2160 | CORE_ADDR |
2161 | ppc64_sysv_get_return_buf_addr (struct type *val_type, | |
2162 | frame_info_ptr cur_frame) | |
a0eda3df CL |
2163 | { |
2164 | /* The PowerPC ABI specifies aggregates that are not returned by value | |
2165 | are returned in a storage buffer provided by the caller. The | |
2166 | address of the storage buffer is provided as a hidden first input | |
53fd08b6 | 2167 | argument in register r3. The PowerPC ABI does not guarantee that |
a0eda3df CL |
2168 | register r3 will not be changed while executing the function. Hence, it |
2169 | cannot be assumed that r3 will still contain the address of the storage | |
2170 | buffer when execution reaches the end of the function. | |
2171 | ||
2172 | This function attempts to determine the value of r3 on entry to the | |
2173 | function using the DW_OP_entry_value DWARF entries. This requires | |
2174 | compiling the user program with -fvar-tracking to resolve the | |
2175 | DW_TAG_call_sites in the binary file. */ | |
2176 | ||
2177 | union call_site_parameter_u kind_u; | |
2178 | enum call_site_parameter_kind kind; | |
2179 | CORE_ADDR return_val = 0; | |
2180 | ||
2181 | kind_u.dwarf_reg = 3; /* First passed arg/return value is in r3. */ | |
2182 | kind = CALL_SITE_PARAMETER_DWARF_REG; | |
2183 | ||
2184 | /* val_type is the type of the return value. Need the pointer type | |
2185 | to the return value. */ | |
2186 | val_type = lookup_pointer_type (val_type); | |
2187 | ||
2188 | try | |
2189 | { | |
2190 | return_val = value_as_address (value_of_dwarf_reg_entry (val_type, | |
2191 | cur_frame, | |
2192 | kind, kind_u)); | |
2193 | } | |
2194 | catch (const gdb_exception_error &e) | |
2195 | { | |
2196 | warning ("Cannot determine the function return value.\n" | |
2197 | "Try compiling with -fvar-tracking."); | |
2198 | } | |
2199 | return return_val; | |
2200 | } |