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7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
e2882c85 4 Copyright (C) 2000-2018 Free Software Foundation, Inc.
7b112f9c
JT
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
7b112f9c
JT
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
7b112f9c
JT
20
21#include "defs.h"
22#include "gdbcore.h"
23#include "inferior.h"
24#include "regcache.h"
25#include "value.h"
7b112f9c 26#include "ppc-tdep.h"
6066c3de 27#include "target.h"
0a90bcdd 28#include "objfiles.h"
7d9b040b 29#include "infcall.h"
54fcddd0 30#include "dwarf2.h"
3b2ca824 31#include "target-float.h"
325fac50 32#include <algorithm>
7b112f9c 33
88aed45e
UW
34
35/* Check whether FTPYE is a (pointer to) function type that should use
36 the OpenCL vector ABI. */
37
38static int
39ppc_sysv_use_opencl_abi (struct type *ftype)
40{
41 ftype = check_typedef (ftype);
42
43 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
44 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
45
46 return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
47 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
48}
49
0df8b418 50/* Pass the arguments in either registers, or in the stack. Using the
7b112f9c
JT
51 ppc sysv ABI, the first eight words of the argument list (that might
52 be less than eight parameters if some parameters occupy more than one
53 word) are passed in r3..r10 registers. float and double parameters are
0df8b418
MS
54 passed in fpr's, in addition to that. Rest of the parameters if any
55 are passed in user stack.
7b112f9c
JT
56
57 If the function is returning a structure, then the return address is passed
58 in r3, then the first 7 words of the parametes can be passed in registers,
0df8b418 59 starting from r4. */
7b112f9c
JT
60
61CORE_ADDR
7d9b040b 62ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
63 struct regcache *regcache, CORE_ADDR bp_addr,
64 int nargs, struct value **args, CORE_ADDR sp,
65 int struct_return, CORE_ADDR struct_addr)
7b112f9c 66{
40a6adc1 67 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 68 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 69 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 70 ULONGEST saved_sp;
68856ea3
AC
71 int argspace = 0; /* 0 is an initial wrong guess. */
72 int write_pass;
7b112f9c 73
b14d30e1
JM
74 gdb_assert (tdep->wordsize == 4);
75
40a6adc1 76 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 77 &saved_sp);
fb4443d8 78
68856ea3 79 /* Go through the argument list twice.
7b112f9c 80
68856ea3
AC
81 Pass 1: Figure out how much new stack space is required for
82 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
83 ABI doesn't reserve any extra space for parameters which are put
84 in registers, but does always push structures and then pass their
85 address.
7a41266b 86
68856ea3
AC
87 Pass 2: Replay the same computation but this time also write the
88 values out to the target. */
7b112f9c 89
68856ea3
AC
90 for (write_pass = 0; write_pass < 2; write_pass++)
91 {
92 int argno;
93 /* Next available floating point register for float and double
94 arguments. */
95 int freg = 1;
96 /* Next available general register for non-float, non-vector
97 arguments. */
98 int greg = 3;
99 /* Next available vector register for vector arguments. */
100 int vreg = 2;
101 /* Arguments start above the "LR save word" and "Back chain". */
102 int argoffset = 2 * tdep->wordsize;
103 /* Structures start after the arguments. */
104 int structoffset = argoffset + argspace;
105
106 /* If the function is returning a `struct', then the first word
944fcfab
AC
107 (which will be passed in r3) is used for struct return
108 address. In that case we should advance one word and start
109 from r4 register to copy parameters. */
68856ea3 110 if (struct_return)
7b112f9c 111 {
68856ea3
AC
112 if (write_pass)
113 regcache_cooked_write_signed (regcache,
114 tdep->ppc_gp0_regnum + greg,
115 struct_addr);
116 greg++;
7b112f9c 117 }
68856ea3
AC
118
119 for (argno = 0; argno < nargs; argno++)
7b112f9c 120 {
68856ea3 121 struct value *arg = args[argno];
df407dfe 122 struct type *type = check_typedef (value_type (arg));
68856ea3 123 int len = TYPE_LENGTH (type);
0fd88904 124 const bfd_byte *val = value_contents (arg);
68856ea3 125
55eddb0f
DJ
126 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
127 && !tdep->soft_float)
7b112f9c 128 {
68856ea3 129 /* Floating point value converted to "double" then
944fcfab
AC
130 passed in an FP register, when the registers run out,
131 8 byte aligned stack is used. */
68856ea3
AC
132 if (freg <= 8)
133 {
134 if (write_pass)
135 {
136 /* Always store the floating point value using
944fcfab 137 the register's floating-point format. */
0f068fb5 138 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
68856ea3 139 struct type *regtype
366f009f 140 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
3b2ca824 141 target_float_convert (val, type, regval, regtype);
366f009f
JB
142 regcache_cooked_write (regcache,
143 tdep->ppc_fp0_regnum + freg,
68856ea3
AC
144 regval);
145 }
146 freg++;
147 }
7b112f9c
JT
148 else
149 {
f964a756
MK
150 /* The SysV ABI tells us to convert floats to
151 doubles before writing them to an 8 byte aligned
152 stack location. Unfortunately GCC does not do
153 that, and stores floats into 4 byte aligned
154 locations without converting them to doubles.
155 Since there is no know compiler that actually
156 follows the ABI here, we implement the GCC
157 convention. */
158
159 /* Align to 4 bytes or 8 bytes depending on the type of
160 the argument (float or double). */
161 argoffset = align_up (argoffset, len);
68856ea3 162 if (write_pass)
68856ea3 163 write_memory (sp + argoffset, val, len);
f964a756 164 argoffset += len;
7b112f9c
JT
165 }
166 }
b14d30e1
JM
167 else if (TYPE_CODE (type) == TYPE_CODE_FLT
168 && len == 16
169 && !tdep->soft_float
40a6adc1 170 && (gdbarch_long_double_format (gdbarch)
b14d30e1
JM
171 == floatformats_ibm_long_double))
172 {
173 /* IBM long double passed in two FP registers if
174 available, otherwise 8-byte aligned stack. */
175 if (freg <= 7)
176 {
177 if (write_pass)
178 {
179 regcache_cooked_write (regcache,
180 tdep->ppc_fp0_regnum + freg,
181 val);
182 regcache_cooked_write (regcache,
183 tdep->ppc_fp0_regnum + freg + 1,
184 val + 8);
185 }
186 freg += 2;
187 }
188 else
189 {
190 argoffset = align_up (argoffset, 8);
191 if (write_pass)
192 write_memory (sp + argoffset, val, len);
193 argoffset += 16;
194 }
195 }
55eddb0f
DJ
196 else if (len == 8
197 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
00fbcec4
JM
198 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
199 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
200 && tdep->soft_float)))
7b112f9c 201 {
00fbcec4
JM
202 /* "long long" or soft-float "double" or "_Decimal64"
203 passed in an odd/even register pair with the low
204 addressed word in the odd register and the high
205 addressed word in the even register, or when the
206 registers run out an 8 byte aligned stack
207 location. */
68856ea3
AC
208 if (greg > 9)
209 {
210 /* Just in case GREG was 10. */
211 greg = 11;
212 argoffset = align_up (argoffset, 8);
213 if (write_pass)
214 write_memory (sp + argoffset, val, len);
215 argoffset += 8;
216 }
68856ea3
AC
217 else
218 {
219 /* Must start on an odd register - r3/r4 etc. */
220 if ((greg & 1) == 0)
221 greg++;
222 if (write_pass)
223 {
224 regcache_cooked_write (regcache,
225 tdep->ppc_gp0_regnum + greg + 0,
226 val + 0);
227 regcache_cooked_write (regcache,
228 tdep->ppc_gp0_regnum + greg + 1,
229 val + 4);
230 }
231 greg += 2;
232 }
7b112f9c 233 }
00fbcec4
JM
234 else if (len == 16
235 && ((TYPE_CODE (type) == TYPE_CODE_FLT
236 && (gdbarch_long_double_format (gdbarch)
237 == floatformats_ibm_long_double))
238 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
239 && tdep->soft_float)))
b14d30e1 240 {
00fbcec4
JM
241 /* Soft-float IBM long double or _Decimal128 passed in
242 four consecutive registers, or on the stack. The
243 registers are not necessarily odd/even pairs. */
b14d30e1
JM
244 if (greg > 7)
245 {
246 greg = 11;
247 argoffset = align_up (argoffset, 8);
248 if (write_pass)
249 write_memory (sp + argoffset, val, len);
250 argoffset += 16;
251 }
252 else
253 {
254 if (write_pass)
255 {
256 regcache_cooked_write (regcache,
257 tdep->ppc_gp0_regnum + greg + 0,
258 val + 0);
259 regcache_cooked_write (regcache,
260 tdep->ppc_gp0_regnum + greg + 1,
261 val + 4);
262 regcache_cooked_write (regcache,
263 tdep->ppc_gp0_regnum + greg + 2,
264 val + 8);
265 regcache_cooked_write (regcache,
266 tdep->ppc_gp0_regnum + greg + 3,
267 val + 12);
268 }
269 greg += 4;
270 }
271 }
1300a2f4
TJB
272 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
273 && !tdep->soft_float)
274 {
275 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
276 end up in memory. */
277
278 if (freg <= 8)
279 {
280 if (write_pass)
281 {
0f068fb5 282 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
283 const gdb_byte *p;
284
285 /* 32-bit decimal floats are right aligned in the
286 doubleword. */
287 if (TYPE_LENGTH (type) == 4)
288 {
289 memcpy (regval + 4, val, 4);
290 p = regval;
291 }
292 else
293 p = val;
294
295 regcache_cooked_write (regcache,
296 tdep->ppc_fp0_regnum + freg, p);
297 }
298
299 freg++;
300 }
301 else
302 {
303 argoffset = align_up (argoffset, len);
304
305 if (write_pass)
306 /* Write value in the stack's parameter save area. */
307 write_memory (sp + argoffset, val, len);
308
309 argoffset += len;
310 }
311 }
312 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
313 && !tdep->soft_float)
314 {
315 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
316 pairs. They can end up in memory, using two doublewords. */
317
318 if (freg <= 6)
319 {
320 /* Make sure freg is even. */
321 freg += freg & 1;
322
323 if (write_pass)
324 {
325 regcache_cooked_write (regcache,
326 tdep->ppc_fp0_regnum + freg, val);
327 regcache_cooked_write (regcache,
328 tdep->ppc_fp0_regnum + freg + 1, val + 8);
329 }
330 }
331 else
332 {
333 argoffset = align_up (argoffset, 8);
334
335 if (write_pass)
336 write_memory (sp + argoffset, val, 16);
337
338 argoffset += 16;
339 }
340
341 /* If a 128-bit decimal float goes to the stack because only f7
342 and f8 are free (thus there's no even/odd register pair
343 available), these registers should be marked as occupied.
344 Hence we increase freg even when writing to memory. */
345 freg += 2;
346 }
54fcddd0
UW
347 else if (len < 16
348 && TYPE_CODE (type) == TYPE_CODE_ARRAY
349 && TYPE_VECTOR (type)
350 && opencl_abi)
351 {
352 /* OpenCL vectors shorter than 16 bytes are passed as if
353 a series of independent scalars. */
354 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
355 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
356
357 for (i = 0; i < nelt; i++)
358 {
359 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
360
361 if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
362 {
363 if (freg <= 8)
364 {
365 if (write_pass)
366 {
367 int regnum = tdep->ppc_fp0_regnum + freg;
0f068fb5 368 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
369 struct type *regtype
370 = register_type (gdbarch, regnum);
3b2ca824
UW
371 target_float_convert (elval, eltype,
372 regval, regtype);
54fcddd0
UW
373 regcache_cooked_write (regcache, regnum, regval);
374 }
375 freg++;
376 }
377 else
378 {
379 argoffset = align_up (argoffset, len);
380 if (write_pass)
381 write_memory (sp + argoffset, val, len);
382 argoffset += len;
383 }
384 }
385 else if (TYPE_LENGTH (eltype) == 8)
386 {
387 if (greg > 9)
388 {
389 /* Just in case GREG was 10. */
390 greg = 11;
391 argoffset = align_up (argoffset, 8);
392 if (write_pass)
393 write_memory (sp + argoffset, elval,
394 TYPE_LENGTH (eltype));
395 argoffset += 8;
396 }
397 else
398 {
399 /* Must start on an odd register - r3/r4 etc. */
400 if ((greg & 1) == 0)
401 greg++;
402 if (write_pass)
403 {
404 int regnum = tdep->ppc_gp0_regnum + greg;
405 regcache_cooked_write (regcache,
406 regnum + 0, elval + 0);
407 regcache_cooked_write (regcache,
408 regnum + 1, elval + 4);
409 }
410 greg += 2;
411 }
412 }
413 else
414 {
0f068fb5 415 gdb_byte word[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
416 store_unsigned_integer (word, tdep->wordsize, byte_order,
417 unpack_long (eltype, elval));
418
419 if (greg <= 10)
420 {
421 if (write_pass)
422 regcache_cooked_write (regcache,
423 tdep->ppc_gp0_regnum + greg,
424 word);
425 greg++;
426 }
427 else
428 {
429 argoffset = align_up (argoffset, tdep->wordsize);
430 if (write_pass)
431 write_memory (sp + argoffset, word, tdep->wordsize);
432 argoffset += tdep->wordsize;
433 }
434 }
435 }
436 }
437 else if (len >= 16
438 && TYPE_CODE (type) == TYPE_CODE_ARRAY
439 && TYPE_VECTOR (type)
440 && opencl_abi)
441 {
442 /* OpenCL vectors 16 bytes or longer are passed as if
443 a series of AltiVec vectors. */
444 int i;
445
446 for (i = 0; i < len / 16; i++)
447 {
448 const gdb_byte *elval = val + i * 16;
449
450 if (vreg <= 13)
451 {
452 if (write_pass)
453 regcache_cooked_write (regcache,
454 tdep->ppc_vr0_regnum + vreg,
455 elval);
456 vreg++;
457 }
458 else
459 {
460 argoffset = align_up (argoffset, 16);
461 if (write_pass)
462 write_memory (sp + argoffset, elval, 16);
463 argoffset += 16;
464 }
465 }
466 }
68856ea3
AC
467 else if (len == 16
468 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
469 && TYPE_VECTOR (type)
470 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
7b112f9c 471 {
68856ea3 472 /* Vector parameter passed in an Altivec register, or
944fcfab 473 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
474 if (vreg <= 13)
475 {
68856ea3 476 if (write_pass)
9c9acae0 477 regcache_cooked_write (regcache,
944fcfab 478 tdep->ppc_vr0_regnum + vreg, val);
7b112f9c
JT
479 vreg++;
480 }
481 else
482 {
68856ea3
AC
483 argoffset = align_up (argoffset, 16);
484 if (write_pass)
485 write_memory (sp + argoffset, val, 16);
7b112f9c
JT
486 argoffset += 16;
487 }
488 }
944fcfab 489 else if (len == 8
0a613259 490 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
491 && TYPE_VECTOR (type)
492 && tdep->vector_abi == POWERPC_VEC_SPE)
944fcfab 493 {
68856ea3 494 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
495 that runs out, 8 byte aligned stack location. Note
496 that since e500 vector and general purpose registers
497 both map onto the same underlying register set, a
498 "greg" and not a "vreg" is consumed here. A cooked
499 write stores the value in the correct locations
500 within the raw register cache. */
501 if (greg <= 10)
502 {
68856ea3 503 if (write_pass)
9c9acae0 504 regcache_cooked_write (regcache,
944fcfab
AC
505 tdep->ppc_ev0_regnum + greg, val);
506 greg++;
507 }
508 else
509 {
68856ea3
AC
510 argoffset = align_up (argoffset, 8);
511 if (write_pass)
512 write_memory (sp + argoffset, val, 8);
944fcfab
AC
513 argoffset += 8;
514 }
515 }
68856ea3
AC
516 else
517 {
518 /* Reduce the parameter down to something that fits in a
944fcfab 519 "word". */
0f068fb5
AH
520 gdb_byte word[PPC_MAX_REGISTER_SIZE];
521 memset (word, 0, PPC_MAX_REGISTER_SIZE);
68856ea3
AC
522 if (len > tdep->wordsize
523 || TYPE_CODE (type) == TYPE_CODE_STRUCT
524 || TYPE_CODE (type) == TYPE_CODE_UNION)
525 {
55eddb0f 526 /* Structs and large values are put in an
0df8b418 527 aligned stack slot ... */
55eddb0f
DJ
528 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
529 && TYPE_VECTOR (type)
530 && len >= 16)
531 structoffset = align_up (structoffset, 16);
532 else
533 structoffset = align_up (structoffset, 8);
534
68856ea3
AC
535 if (write_pass)
536 write_memory (sp + structoffset, val, len);
537 /* ... and then a "word" pointing to that address is
944fcfab 538 passed as the parameter. */
e17a4113 539 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
540 sp + structoffset);
541 structoffset += len;
542 }
543 else if (TYPE_CODE (type) == TYPE_CODE_INT)
544 /* Sign or zero extend the "int" into a "word". */
e17a4113 545 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
546 unpack_long (type, val));
547 else
548 /* Always goes in the low address. */
549 memcpy (word, val, len);
550 /* Store that "word" in a register, or on the stack.
944fcfab 551 The words have "4" byte alignment. */
68856ea3
AC
552 if (greg <= 10)
553 {
554 if (write_pass)
555 regcache_cooked_write (regcache,
944fcfab 556 tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
557 greg++;
558 }
559 else
560 {
561 argoffset = align_up (argoffset, tdep->wordsize);
562 if (write_pass)
563 write_memory (sp + argoffset, word, tdep->wordsize);
564 argoffset += tdep->wordsize;
565 }
566 }
567 }
568
569 /* Compute the actual stack space requirements. */
570 if (!write_pass)
571 {
572 /* Remember the amount of space needed by the arguments. */
573 argspace = argoffset;
574 /* Allocate space for both the arguments and the structures. */
575 sp -= (argoffset + structoffset);
576 /* Ensure that the stack is still 16 byte aligned. */
577 sp = align_down (sp, 16);
578 }
65ada037
MK
579
580 /* The psABI says that "A caller of a function that takes a
581 variable argument list shall set condition register bit 6 to
582 1 if it passes one or more arguments in the floating-point
0df8b418 583 registers. It is strongly recommended that the caller set the
65ada037
MK
584 bit to 0 otherwise..." Doing this for normal functions too
585 shouldn't hurt. */
586 if (write_pass)
587 {
588 ULONGEST cr;
589
590 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
591 if (freg > 1)
592 cr |= 0x02000000;
593 else
594 cr &= ~0x02000000;
595 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
596 }
7b112f9c
JT
597 }
598
68856ea3 599 /* Update %sp. */
40a6adc1 600 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
68856ea3
AC
601
602 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 603 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
68856ea3 604
e56a0ecc
AC
605 /* Point the inferior function call's return address at the dummy's
606 breakpoint. */
68856ea3 607 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 608
7b112f9c
JT
609 return sp;
610}
611
e765b44c 612/* Handle the return-value conventions for Decimal Floating Point values. */
f486487f 613static enum return_value_convention
1300a2f4
TJB
614get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
615 struct regcache *regcache, gdb_byte *readbuf,
616 const gdb_byte *writebuf)
617{
618 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
619
620 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
621
622 /* 32-bit and 64-bit decimal floats in f1. */
623 if (TYPE_LENGTH (valtype) <= 8)
624 {
625 if (writebuf != NULL)
626 {
0f068fb5 627 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
628 const gdb_byte *p;
629
630 /* 32-bit decimal float is right aligned in the doubleword. */
631 if (TYPE_LENGTH (valtype) == 4)
632 {
633 memcpy (regval + 4, writebuf, 4);
634 p = regval;
635 }
636 else
637 p = writebuf;
638
639 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
640 }
641 if (readbuf != NULL)
642 {
643 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
644
645 /* Left align 32-bit decimal float. */
646 if (TYPE_LENGTH (valtype) == 4)
647 memcpy (readbuf, readbuf + 4, 4);
648 }
649 }
650 /* 128-bit decimal floats in f2,f3. */
651 else if (TYPE_LENGTH (valtype) == 16)
652 {
653 if (writebuf != NULL || readbuf != NULL)
654 {
655 int i;
656
657 for (i = 0; i < 2; i++)
658 {
659 if (writebuf != NULL)
660 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
661 writebuf + i * 8);
662 if (readbuf != NULL)
663 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
664 readbuf + i * 8);
665 }
666 }
667 }
668 else
669 /* Can't happen. */
9b20d036 670 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
1300a2f4
TJB
671
672 return RETURN_VALUE_REGISTER_CONVENTION;
673}
674
e754ae69
AC
675/* Handle the return-value conventions specified by the SysV 32-bit
676 PowerPC ABI (including all the supplements):
677
678 no floating-point: floating-point values returned using 32-bit
679 general-purpose registers.
680
681 Altivec: 128-bit vectors returned using vector registers.
682
683 e500: 64-bit vectors returned using the full full 64 bit EV
684 register, floating-point values returned using 32-bit
685 general-purpose registers.
686
687 GCC (broken): Small struct values right (instead of left) aligned
688 when returned in general-purpose registers. */
689
690static enum return_value_convention
54fcddd0
UW
691do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
692 struct type *type, struct regcache *regcache,
693 gdb_byte *readbuf, const gdb_byte *writebuf,
694 int broken_gcc)
e754ae69 695{
05580c65 696 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 697 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 698 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
54fcddd0 699
e754ae69 700 gdb_assert (tdep->wordsize == 4);
54fcddd0 701
e754ae69
AC
702 if (TYPE_CODE (type) == TYPE_CODE_FLT
703 && TYPE_LENGTH (type) <= 8
55eddb0f 704 && !tdep->soft_float)
e754ae69 705 {
963e2bb7 706 if (readbuf)
e754ae69
AC
707 {
708 /* Floats and doubles stored in "f1". Convert the value to
709 the required type. */
0f068fb5 710 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f
JB
711 struct type *regtype = register_type (gdbarch,
712 tdep->ppc_fp0_regnum + 1);
713 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
3b2ca824 714 target_float_convert (regval, regtype, readbuf, type);
e754ae69 715 }
963e2bb7 716 if (writebuf)
e754ae69
AC
717 {
718 /* Floats and doubles stored in "f1". Convert the value to
719 the register's "double" type. */
0f068fb5 720 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f 721 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
3b2ca824 722 target_float_convert (writebuf, type, regval, regtype);
366f009f 723 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
724 }
725 return RETURN_VALUE_REGISTER_CONVENTION;
726 }
b14d30e1
JM
727 if (TYPE_CODE (type) == TYPE_CODE_FLT
728 && TYPE_LENGTH (type) == 16
729 && !tdep->soft_float
0df8b418
MS
730 && (gdbarch_long_double_format (gdbarch)
731 == floatformats_ibm_long_double))
b14d30e1
JM
732 {
733 /* IBM long double stored in f1 and f2. */
734 if (readbuf)
735 {
736 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
737 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
738 readbuf + 8);
739 }
740 if (writebuf)
741 {
742 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
743 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
744 writebuf + 8);
745 }
746 return RETURN_VALUE_REGISTER_CONVENTION;
747 }
00fbcec4
JM
748 if (TYPE_LENGTH (type) == 16
749 && ((TYPE_CODE (type) == TYPE_CODE_FLT
0df8b418
MS
750 && (gdbarch_long_double_format (gdbarch)
751 == floatformats_ibm_long_double))
00fbcec4 752 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
b14d30e1 753 {
00fbcec4
JM
754 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
755 r5, r6. */
b14d30e1
JM
756 if (readbuf)
757 {
758 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
759 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
760 readbuf + 4);
761 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
762 readbuf + 8);
763 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
764 readbuf + 12);
765 }
766 if (writebuf)
767 {
768 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
769 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
770 writebuf + 4);
771 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
772 writebuf + 8);
773 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
774 writebuf + 12);
775 }
776 return RETURN_VALUE_REGISTER_CONVENTION;
777 }
e754ae69 778 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
00fbcec4
JM
779 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
780 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
781 && tdep->soft_float))
e754ae69 782 {
963e2bb7 783 if (readbuf)
e754ae69 784 {
00fbcec4
JM
785 /* A long long, double or _Decimal64 stored in the 32 bit
786 r3/r4. */
e754ae69 787 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
55eddb0f 788 readbuf + 0);
e754ae69 789 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
55eddb0f 790 readbuf + 4);
e754ae69 791 }
963e2bb7 792 if (writebuf)
e754ae69 793 {
00fbcec4
JM
794 /* A long long, double or _Decimal64 stored in the 32 bit
795 r3/r4. */
e754ae69 796 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
55eddb0f 797 writebuf + 0);
e754ae69 798 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
55eddb0f 799 writebuf + 4);
e754ae69
AC
800 }
801 return RETURN_VALUE_REGISTER_CONVENTION;
802 }
1300a2f4
TJB
803 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
804 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
805 writebuf);
f0027ce2
DJ
806 else if ((TYPE_CODE (type) == TYPE_CODE_INT
807 || TYPE_CODE (type) == TYPE_CODE_CHAR
808 || TYPE_CODE (type) == TYPE_CODE_BOOL
809 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 810 || TYPE_IS_REFERENCE (type)
f0027ce2
DJ
811 || TYPE_CODE (type) == TYPE_CODE_ENUM)
812 && TYPE_LENGTH (type) <= tdep->wordsize)
e754ae69 813 {
963e2bb7 814 if (readbuf)
e754ae69
AC
815 {
816 /* Some sort of integer stored in r3. Since TYPE isn't
817 bigger than the register, sign extension isn't a problem
818 - just do everything unsigned. */
819 ULONGEST regval;
820 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
821 &regval);
e17a4113
UW
822 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
823 regval);
e754ae69 824 }
963e2bb7 825 if (writebuf)
e754ae69
AC
826 {
827 /* Some sort of integer stored in r3. Use unpack_long since
828 that should handle any required sign extension. */
829 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 830 unpack_long (type, writebuf));
e754ae69
AC
831 }
832 return RETURN_VALUE_REGISTER_CONVENTION;
833 }
54fcddd0
UW
834 /* OpenCL vectors < 16 bytes are returned as distinct
835 scalars in f1..f2 or r3..r10. */
836 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
837 && TYPE_VECTOR (type)
838 && TYPE_LENGTH (type) < 16
839 && opencl_abi)
840 {
841 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
842 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
843
844 for (i = 0; i < nelt; i++)
845 {
846 int offset = i * TYPE_LENGTH (eltype);
847
848 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
849 {
850 int regnum = tdep->ppc_fp0_regnum + 1 + i;
0f068fb5 851 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
852 struct type *regtype = register_type (gdbarch, regnum);
853
854 if (writebuf != NULL)
855 {
3b2ca824
UW
856 target_float_convert (writebuf + offset, eltype,
857 regval, regtype);
54fcddd0
UW
858 regcache_cooked_write (regcache, regnum, regval);
859 }
860 if (readbuf != NULL)
861 {
862 regcache_cooked_read (regcache, regnum, regval);
3b2ca824
UW
863 target_float_convert (regval, regtype,
864 readbuf + offset, eltype);
54fcddd0
UW
865 }
866 }
867 else
868 {
869 int regnum = tdep->ppc_gp0_regnum + 3 + i;
870 ULONGEST regval;
871
872 if (writebuf != NULL)
873 {
874 regval = unpack_long (eltype, writebuf + offset);
875 regcache_cooked_write_unsigned (regcache, regnum, regval);
876 }
877 if (readbuf != NULL)
878 {
879 regcache_cooked_read_unsigned (regcache, regnum, &regval);
880 store_unsigned_integer (readbuf + offset,
881 TYPE_LENGTH (eltype), byte_order,
882 regval);
883 }
884 }
885 }
886
887 return RETURN_VALUE_REGISTER_CONVENTION;
888 }
889 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
890 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
891 && TYPE_VECTOR (type)
892 && TYPE_LENGTH (type) >= 16
893 && opencl_abi)
894 {
895 int n_regs = TYPE_LENGTH (type) / 16;
896 int i;
897
898 for (i = 0; i < n_regs; i++)
899 {
900 int offset = i * 16;
901 int regnum = tdep->ppc_vr0_regnum + 2 + i;
902
903 if (writebuf != NULL)
904 regcache_cooked_write (regcache, regnum, writebuf + offset);
905 if (readbuf != NULL)
906 regcache_cooked_read (regcache, regnum, readbuf + offset);
907 }
908
909 return RETURN_VALUE_REGISTER_CONVENTION;
910 }
e754ae69
AC
911 if (TYPE_LENGTH (type) == 16
912 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
913 && TYPE_VECTOR (type)
914 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
e754ae69 915 {
963e2bb7 916 if (readbuf)
e754ae69
AC
917 {
918 /* Altivec places the return value in "v2". */
963e2bb7 919 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 920 }
963e2bb7 921 if (writebuf)
e754ae69
AC
922 {
923 /* Altivec places the return value in "v2". */
963e2bb7 924 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
925 }
926 return RETURN_VALUE_REGISTER_CONVENTION;
927 }
55eddb0f
DJ
928 if (TYPE_LENGTH (type) == 16
929 && TYPE_CODE (type) == TYPE_CODE_ARRAY
930 && TYPE_VECTOR (type)
931 && tdep->vector_abi == POWERPC_VEC_GENERIC)
932 {
933 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
934 GCC without AltiVec returns them in memory, but it warns about
935 ABI risks in that case; we don't try to support it. */
936 if (readbuf)
937 {
938 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
939 readbuf + 0);
940 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
941 readbuf + 4);
942 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
943 readbuf + 8);
944 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
945 readbuf + 12);
946 }
947 if (writebuf)
948 {
949 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
950 writebuf + 0);
951 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
952 writebuf + 4);
953 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
954 writebuf + 8);
955 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
956 writebuf + 12);
957 }
958 return RETURN_VALUE_REGISTER_CONVENTION;
959 }
e754ae69
AC
960 if (TYPE_LENGTH (type) == 8
961 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
962 && TYPE_VECTOR (type)
963 && tdep->vector_abi == POWERPC_VEC_SPE)
e754ae69
AC
964 {
965 /* The e500 ABI places return values for the 64-bit DSP types
966 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
967 corresponds to the entire r3 value for e500, whereas GDB's r3
968 only corresponds to the least significant 32-bits. So place
969 the 64-bit DSP type's value in ev3. */
963e2bb7
AC
970 if (readbuf)
971 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
972 if (writebuf)
973 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
974 return RETURN_VALUE_REGISTER_CONVENTION;
975 }
976 if (broken_gcc && TYPE_LENGTH (type) <= 8)
977 {
61bf9ae0
MK
978 /* GCC screwed up for structures or unions whose size is less
979 than or equal to 8 bytes.. Instead of left-aligning, it
980 right-aligns the data into the buffer formed by r3, r4. */
0f068fb5 981 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
61bf9ae0
MK
982 int len = TYPE_LENGTH (type);
983 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
984
963e2bb7 985 if (readbuf)
e754ae69 986 {
61bf9ae0
MK
987 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
988 regvals + 0 * tdep->wordsize);
989 if (len > tdep->wordsize)
990 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
991 regvals + 1 * tdep->wordsize);
992 memcpy (readbuf, regvals + offset, len);
e754ae69 993 }
963e2bb7 994 if (writebuf)
e754ae69 995 {
61bf9ae0
MK
996 memset (regvals, 0, sizeof regvals);
997 memcpy (regvals + offset, writebuf, len);
998 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
999 regvals + 0 * tdep->wordsize);
1000 if (len > tdep->wordsize)
1001 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1002 regvals + 1 * tdep->wordsize);
e754ae69 1003 }
61bf9ae0 1004
e754ae69
AC
1005 return RETURN_VALUE_REGISTER_CONVENTION;
1006 }
1007 if (TYPE_LENGTH (type) <= 8)
1008 {
963e2bb7 1009 if (readbuf)
e754ae69
AC
1010 {
1011 /* This matches SVr4 PPC, it does not match GCC. */
1012 /* The value is right-padded to 8 bytes and then loaded, as
1013 two "words", into r3/r4. */
0f068fb5 1014 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
e754ae69
AC
1015 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
1016 regvals + 0 * tdep->wordsize);
1017 if (TYPE_LENGTH (type) > tdep->wordsize)
1018 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
1019 regvals + 1 * tdep->wordsize);
963e2bb7 1020 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 1021 }
963e2bb7 1022 if (writebuf)
e754ae69
AC
1023 {
1024 /* This matches SVr4 PPC, it does not match GCC. */
1025 /* The value is padded out to 8 bytes and then loaded, as
1026 two "words" into r3/r4. */
0f068fb5 1027 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
e754ae69 1028 memset (regvals, 0, sizeof regvals);
963e2bb7 1029 memcpy (regvals, writebuf, TYPE_LENGTH (type));
e754ae69
AC
1030 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
1031 regvals + 0 * tdep->wordsize);
1032 if (TYPE_LENGTH (type) > tdep->wordsize)
1033 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
1034 regvals + 1 * tdep->wordsize);
1035 }
1036 return RETURN_VALUE_REGISTER_CONVENTION;
1037 }
1038 return RETURN_VALUE_STRUCT_CONVENTION;
1039}
1040
05580c65 1041enum return_value_convention
6a3a010b 1042ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
1043 struct type *valtype, struct regcache *regcache,
1044 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1045{
6a3a010b
MR
1046 return do_ppc_sysv_return_value (gdbarch,
1047 function ? value_type (function) : NULL,
1048 valtype, regcache, readbuf, writebuf, 0);
e754ae69
AC
1049}
1050
05580c65 1051enum return_value_convention
963e2bb7 1052ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
6a3a010b 1053 struct value *function,
963e2bb7
AC
1054 struct type *valtype,
1055 struct regcache *regcache,
50fd1280 1056 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1057{
6a3a010b
MR
1058 return do_ppc_sysv_return_value (gdbarch,
1059 function ? value_type (function) : NULL,
1060 valtype, regcache, readbuf, writebuf, 1);
944fcfab 1061}
afd48b75 1062
b6e1c027
AC
1063/* The helper function for 64-bit SYSV push_dummy_call. Converts the
1064 function's code address back into the function's descriptor
1065 address.
1066
1067 Find a value for the TOC register. Every symbol should have both
1068 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1069 FN's descriptor, while ".FN" points at the entry point (which
1070 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1071 FN's descriptor address (while at the same time being careful to
1072 find "FN" in the same object file as ".FN"). */
1073
1074static int
1075convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1076{
1077 struct obj_section *dot_fn_section;
7cbd4a93 1078 struct bound_minimal_symbol dot_fn;
3b7344d5 1079 struct bound_minimal_symbol fn;
7cbd4a93 1080
b6e1c027
AC
1081 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1082 have a name of the form ".FN"). */
1083 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
efd66ac6 1084 if (dot_fn.minsym == NULL || MSYMBOL_LINKAGE_NAME (dot_fn.minsym)[0] != '.')
b6e1c027
AC
1085 return 0;
1086 /* Get the section that contains CODE_ADDR. Need this for the
1087 "objfile" that it contains. */
1088 dot_fn_section = find_pc_section (code_addr);
1089 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1090 return 0;
1091 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1092 address. Only look for the minimal symbol in ".FN"'s object file
1093 - avoids problems when two object files (i.e., shared libraries)
1094 contain a minimal symbol with the same name. */
efd66ac6 1095 fn = lookup_minimal_symbol (MSYMBOL_LINKAGE_NAME (dot_fn.minsym) + 1, NULL,
b6e1c027 1096 dot_fn_section->objfile);
3b7344d5 1097 if (fn.minsym == NULL)
b6e1c027
AC
1098 return 0;
1099 /* Found a descriptor. */
77e371c0 1100 (*desc_addr) = BMSYMBOL_VALUE_ADDRESS (fn);
b6e1c027
AC
1101 return 1;
1102}
1103
cc0e89c5
UW
1104/* Walk down the type tree of TYPE counting consecutive base elements.
1105 If *FIELD_TYPE is NULL, then set it to the first valid floating point
1106 or vector type. If a non-floating point or vector type is found, or
1107 if a floating point or vector type that doesn't match a non-NULL
1108 *FIELD_TYPE is found, then return -1, otherwise return the count in the
1109 sub-tree. */
1110
1111static LONGEST
1112ppc64_aggregate_candidate (struct type *type,
1113 struct type **field_type)
1114{
1115 type = check_typedef (type);
1116
1117 switch (TYPE_CODE (type))
1118 {
1119 case TYPE_CODE_FLT:
1120 case TYPE_CODE_DECFLOAT:
1121 if (!*field_type)
1122 *field_type = type;
1123 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1124 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1125 return 1;
1126 break;
1127
1128 case TYPE_CODE_COMPLEX:
1129 type = TYPE_TARGET_TYPE (type);
1130 if (TYPE_CODE (type) == TYPE_CODE_FLT
1131 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1132 {
1133 if (!*field_type)
1134 *field_type = type;
1135 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1136 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1137 return 2;
1138 }
1139 break;
1140
1141 case TYPE_CODE_ARRAY:
1142 if (TYPE_VECTOR (type))
1143 {
1144 if (!*field_type)
1145 *field_type = type;
1146 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1147 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1148 return 1;
1149 }
1150 else
1151 {
1152 LONGEST count, low_bound, high_bound;
1153
1154 count = ppc64_aggregate_candidate
1155 (TYPE_TARGET_TYPE (type), field_type);
1156 if (count == -1)
1157 return -1;
1158
1159 if (!get_array_bounds (type, &low_bound, &high_bound))
1160 return -1;
1161 count *= high_bound - low_bound;
1162
1163 /* There must be no padding. */
1164 if (count == 0)
1165 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1166 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1167 return -1;
1168
1169 return count;
1170 }
1171 break;
1172
1173 case TYPE_CODE_STRUCT:
1174 case TYPE_CODE_UNION:
1175 {
1176 LONGEST count = 0;
1177 int i;
1178
1179 for (i = 0; i < TYPE_NFIELDS (type); i++)
1180 {
1181 LONGEST sub_count;
1182
1183 if (field_is_static (&TYPE_FIELD (type, i)))
1184 continue;
1185
1186 sub_count = ppc64_aggregate_candidate
1187 (TYPE_FIELD_TYPE (type, i), field_type);
1188 if (sub_count == -1)
1189 return -1;
1190
1191 if (TYPE_CODE (type) == TYPE_CODE_STRUCT)
1192 count += sub_count;
1193 else
325fac50 1194 count = std::max (count, sub_count);
cc0e89c5
UW
1195 }
1196
1197 /* There must be no padding. */
1198 if (count == 0)
1199 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1200 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1201 return -1;
1202
1203 return count;
1204 }
1205 break;
1206
1207 default:
1208 break;
1209 }
1210
1211 return -1;
1212}
1213
1214/* If an argument of type TYPE is a homogeneous float or vector aggregate
1215 that shall be passed in FP/vector registers according to the ELFv2 ABI,
1216 return the homogeneous element type in *ELT_TYPE and the number of
1217 elements in *N_ELTS, and return non-zero. Otherwise, return zero. */
1218
1219static int
1220ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
1221 struct type **elt_type, int *n_elts)
1222{
1223 /* Complex types at the top level are treated separately. However,
1224 complex types can be elements of homogeneous aggregates. */
1225 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1226 || TYPE_CODE (type) == TYPE_CODE_UNION
1227 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && !TYPE_VECTOR (type)))
1228 {
1229 struct type *field_type = NULL;
1230 LONGEST field_count = ppc64_aggregate_candidate (type, &field_type);
1231
1232 if (field_count > 0)
1233 {
1234 int n_regs = ((TYPE_CODE (field_type) == TYPE_CODE_FLT
1235 || TYPE_CODE (field_type) == TYPE_CODE_DECFLOAT)?
1236 (TYPE_LENGTH (field_type) + 7) >> 3 : 1);
1237
1238 /* The ELFv2 ABI allows homogeneous aggregates to occupy
1239 up to 8 registers. */
1240 if (field_count * n_regs <= 8)
1241 {
1242 if (elt_type)
1243 *elt_type = field_type;
1244 if (n_elts)
1245 *n_elts = (int) field_count;
1246 /* Note that field_count is LONGEST since it may hold the size
1247 of an array, while *n_elts is int since its value is bounded
1248 by the number of registers used for argument passing. The
1249 cast cannot overflow due to the bounds checking above. */
1250 return 1;
1251 }
1252 }
1253 }
1254
1255 return 0;
1256}
1257
e765b44c
UW
1258/* Structure holding the next argument position. */
1259struct ppc64_sysv_argpos
1260 {
1261 /* Register cache holding argument registers. If this is NULL,
1262 we only simulate argument processing without actually updating
1263 any registers or memory. */
1264 struct regcache *regcache;
1265 /* Next available general-purpose argument register. */
1266 int greg;
1267 /* Next available floating-point argument register. */
1268 int freg;
1269 /* Next available vector argument register. */
1270 int vreg;
1271 /* The address, at which the next general purpose parameter
1272 (integer, struct, float, vector, ...) should be saved. */
1273 CORE_ADDR gparam;
1274 /* The address, at which the next by-reference parameter
1275 (non-Altivec vector, variably-sized type) should be saved. */
1276 CORE_ADDR refparam;
1277 };
1278
1279/* VAL is a value of length LEN. Store it into the argument area on the
1280 stack and load it into the corresponding general-purpose registers
1281 required by the ABI, and update ARGPOS.
1282
1283 If ALIGN is nonzero, it specifies the minimum alignment required
1284 for the on-stack copy of the argument. */
d81e75c0 1285
e765b44c
UW
1286static void
1287ppc64_sysv_abi_push_val (struct gdbarch *gdbarch,
1288 const bfd_byte *val, int len, int align,
1289 struct ppc64_sysv_argpos *argpos)
1290{
1291 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1292 int offset = 0;
1293
1294 /* Enforce alignment of stack location, if requested. */
1295 if (align > tdep->wordsize)
1296 {
1297 CORE_ADDR aligned_gparam = align_up (argpos->gparam, align);
1298
1299 argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize;
1300 argpos->gparam = aligned_gparam;
1301 }
1302
1303 /* The ABI (version 1.9) specifies that values smaller than one
1304 doubleword are right-aligned and those larger are left-aligned.
1305 GCC versions before 3.4 implemented this incorrectly; see
1306 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
d63167af
UW
1307 if (len < tdep->wordsize
1308 && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
e765b44c
UW
1309 offset = tdep->wordsize - len;
1310
1311 if (argpos->regcache)
1312 write_memory (argpos->gparam + offset, val, len);
1313 argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize);
1314
1315 while (len >= tdep->wordsize)
1316 {
1317 if (argpos->regcache && argpos->greg <= 10)
1318 regcache_cooked_write (argpos->regcache,
1319 tdep->ppc_gp0_regnum + argpos->greg, val);
1320 argpos->greg++;
1321 len -= tdep->wordsize;
1322 val += tdep->wordsize;
1323 }
1324
1325 if (len > 0)
1326 {
1327 if (argpos->regcache && argpos->greg <= 10)
1328 regcache_cooked_write_part (argpos->regcache,
1329 tdep->ppc_gp0_regnum + argpos->greg,
1330 offset, len, val);
1331 argpos->greg++;
1332 }
1333}
1334
1335/* The same as ppc64_sysv_abi_push_val, but using a single-word integer
1336 value VAL as argument. */
d81e75c0
TD
1337
1338static void
e765b44c
UW
1339ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val,
1340 struct ppc64_sysv_argpos *argpos)
d81e75c0 1341{
e765b44c
UW
1342 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1343 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0f068fb5 1344 gdb_byte buf[PPC_MAX_REGISTER_SIZE];
d81e75c0 1345
e765b44c
UW
1346 if (argpos->regcache)
1347 store_unsigned_integer (buf, tdep->wordsize, byte_order, val);
1348 ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos);
1349}
1350
1351/* VAL is a value of TYPE, a (binary or decimal) floating-point type.
1352 Load it into a floating-point register if required by the ABI,
1353 and update ARGPOS. */
1354
1355static void
1356ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch,
1357 struct type *type, const bfd_byte *val,
1358 struct ppc64_sysv_argpos *argpos)
1359{
1360 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1361 if (tdep->soft_float)
1362 return;
1363
1364 if (TYPE_LENGTH (type) <= 8
1365 && TYPE_CODE (type) == TYPE_CODE_FLT)
d81e75c0 1366 {
e765b44c
UW
1367 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1368 to double first. */
1369 if (argpos->regcache && argpos->freg <= 13)
1370 {
1371 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1372 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1373 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
d81e75c0 1374
3b2ca824 1375 target_float_convert (val, type, regval, regtype);
e765b44c
UW
1376 regcache_cooked_write (argpos->regcache, regnum, regval);
1377 }
d81e75c0 1378
e765b44c
UW
1379 argpos->freg++;
1380 }
1381 else if (TYPE_LENGTH (type) <= 8
1382 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1383 {
1384 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1385 placed in the least significant word. */
1386 if (argpos->regcache && argpos->freg <= 13)
1387 {
1388 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
5b757e5d
UW
1389 int offset = 0;
1390
1391 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1392 offset = 8 - TYPE_LENGTH (type);
d81e75c0 1393
e765b44c
UW
1394 regcache_cooked_write_part (argpos->regcache, regnum,
1395 offset, TYPE_LENGTH (type), val);
1396 }
d81e75c0 1397
e765b44c
UW
1398 argpos->freg++;
1399 }
1400 else if (TYPE_LENGTH (type) == 16
1401 && TYPE_CODE (type) == TYPE_CODE_FLT
1402 && (gdbarch_long_double_format (gdbarch)
1403 == floatformats_ibm_long_double))
1404 {
1405 /* IBM long double stored in two consecutive FPRs. */
1406 if (argpos->regcache && argpos->freg <= 13)
d81e75c0 1407 {
e765b44c
UW
1408 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1409
1410 regcache_cooked_write (argpos->regcache, regnum, val);
1411 if (argpos->freg <= 12)
1412 regcache_cooked_write (argpos->regcache, regnum + 1, val + 8);
d81e75c0 1413 }
d81e75c0 1414
e765b44c
UW
1415 argpos->freg += 2;
1416 }
1417 else if (TYPE_LENGTH (type) == 16
1418 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1419 {
1420 /* 128-bit decimal floating-point values are stored in and even/odd
1421 pair of FPRs, with the even FPR holding the most significant half. */
1422 argpos->freg += argpos->freg & 1;
d81e75c0 1423
e765b44c 1424 if (argpos->regcache && argpos->freg <= 12)
d81e75c0 1425 {
e765b44c 1426 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
0ff3e01f
UW
1427 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1428 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
d81e75c0 1429
0ff3e01f
UW
1430 regcache_cooked_write (argpos->regcache, regnum, val + hipart);
1431 regcache_cooked_write (argpos->regcache, regnum + 1, val + lopart);
d81e75c0 1432 }
e765b44c
UW
1433
1434 argpos->freg += 2;
d81e75c0 1435 }
e765b44c
UW
1436}
1437
1438/* VAL is a value of AltiVec vector type. Load it into a vector register
1439 if required by the ABI, and update ARGPOS. */
1440
1441static void
1442ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val,
1443 struct ppc64_sysv_argpos *argpos)
1444{
1445 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1446
1447 if (argpos->regcache && argpos->vreg <= 13)
1448 regcache_cooked_write (argpos->regcache,
1449 tdep->ppc_vr0_regnum + argpos->vreg, val);
1450
1451 argpos->vreg++;
1452}
1453
1454/* VAL is a value of TYPE. Load it into memory and/or registers
1455 as required by the ABI, and update ARGPOS. */
1456
1457static void
1458ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
1459 struct type *type, const bfd_byte *val,
1460 struct ppc64_sysv_argpos *argpos)
1461{
1462 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1463
1464 if (TYPE_CODE (type) == TYPE_CODE_FLT
1465 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1466 {
1467 /* Floating-point scalars are passed in floating-point registers. */
1468 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1469 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1470 }
1471 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1472 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1473 && TYPE_LENGTH (type) == 16)
1474 {
1475 /* AltiVec vectors are passed aligned, and in vector registers. */
1476 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 16, argpos);
1477 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1478 }
1479 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1480 && TYPE_LENGTH (type) >= 16)
d81e75c0 1481 {
e765b44c
UW
1482 /* Non-Altivec vectors are passed by reference. */
1483
1484 /* Copy value onto the stack ... */
1485 CORE_ADDR addr = align_up (argpos->refparam, 16);
1486 if (argpos->regcache)
1487 write_memory (addr, val, TYPE_LENGTH (type));
1488 argpos->refparam = align_up (addr + TYPE_LENGTH (type), tdep->wordsize);
1489
1490 /* ... and pass a pointer to the copy as parameter. */
1491 ppc64_sysv_abi_push_integer (gdbarch, addr, argpos);
1492 }
1493 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1494 || TYPE_CODE (type) == TYPE_CODE_ENUM
1495 || TYPE_CODE (type) == TYPE_CODE_BOOL
1496 || TYPE_CODE (type) == TYPE_CODE_CHAR
1497 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 1498 || TYPE_IS_REFERENCE (type))
e765b44c
UW
1499 && TYPE_LENGTH (type) <= tdep->wordsize)
1500 {
1501 ULONGEST word = 0;
1502
1503 if (argpos->regcache)
d81e75c0 1504 {
e765b44c
UW
1505 /* Sign extend the value, then store it unsigned. */
1506 word = unpack_long (type, val);
1507
1508 /* Convert any function code addresses into descriptors. */
d4094b6a
UW
1509 if (tdep->elf_abi == POWERPC_ELF_V1
1510 && (TYPE_CODE (type) == TYPE_CODE_PTR
1511 || TYPE_CODE (type) == TYPE_CODE_REF))
e765b44c
UW
1512 {
1513 struct type *target_type
1514 = check_typedef (TYPE_TARGET_TYPE (type));
1515
1516 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1517 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1518 {
1519 CORE_ADDR desc = word;
1520
1521 convert_code_addr_to_desc_addr (word, &desc);
1522 word = desc;
1523 }
1524 }
d81e75c0 1525 }
e765b44c
UW
1526
1527 ppc64_sysv_abi_push_integer (gdbarch, word, argpos);
1528 }
1529 else
1530 {
1531 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1532
1533 /* The ABI (version 1.9) specifies that structs containing a
1534 single floating-point value, at any level of nesting of
1535 single-member structs, are passed in floating-point registers. */
1536 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1537 && TYPE_NFIELDS (type) == 1)
d81e75c0 1538 {
e765b44c
UW
1539 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1540 && TYPE_NFIELDS (type) == 1)
1541 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1542
1543 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1544 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
d81e75c0 1545 }
cc0e89c5
UW
1546
1547 /* In the ELFv2 ABI, homogeneous floating-point or vector
1548 aggregates are passed in a series of registers. */
1549 if (tdep->elf_abi == POWERPC_ELF_V2)
1550 {
1551 struct type *eltype;
1552 int i, nelt;
1553
1554 if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt))
1555 for (i = 0; i < nelt; i++)
1556 {
1557 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1558
1559 if (TYPE_CODE (eltype) == TYPE_CODE_FLT
1560 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT)
1561 ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos);
1562 else if (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
1563 && TYPE_VECTOR (eltype)
1564 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1565 && TYPE_LENGTH (eltype) == 16)
1566 ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
1567 }
1568 }
d81e75c0
TD
1569 }
1570}
1571
0df8b418 1572/* Pass the arguments in either registers, or in the stack. Using the
8be9034a
AC
1573 ppc 64 bit SysV ABI.
1574
1575 This implements a dumbed down version of the ABI. It always writes
1576 values to memory, GPR and FPR, even when not necessary. Doing this
0df8b418 1577 greatly simplifies the logic. */
8be9034a
AC
1578
1579CORE_ADDR
0df8b418
MS
1580ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1581 struct value *function,
8be9034a
AC
1582 struct regcache *regcache, CORE_ADDR bp_addr,
1583 int nargs, struct value **args, CORE_ADDR sp,
1584 int struct_return, CORE_ADDR struct_addr)
1585{
7d9b040b 1586 CORE_ADDR func_addr = find_function_addr (function, NULL);
40a6adc1 1587 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 1588 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 1589 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 1590 ULONGEST back_chain;
8be9034a
AC
1591 /* See for-loop comment below. */
1592 int write_pass;
24e9cda0
UW
1593 /* Size of the by-reference parameter copy region, the final value is
1594 computed in the for-loop below. */
1595 LONGEST refparam_size = 0;
8be9034a
AC
1596 /* Size of the general parameter region, the final value is computed
1597 in the for-loop below. */
1598 LONGEST gparam_size = 0;
1599 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
0df8b418 1600 calls to align_up(), align_down(), etc. because this makes it
8be9034a
AC
1601 easier to reuse this code (in a copy/paste sense) in the future,
1602 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1603 at some point makes it easier to verify that this function is
1604 correct without having to do a non-local analysis to figure out
1605 the possible values of tdep->wordsize. */
1606 gdb_assert (tdep->wordsize == 8);
1607
55eddb0f
DJ
1608 /* This function exists to support a calling convention that
1609 requires floating-point registers. It shouldn't be used on
1610 processors that lack them. */
1611 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1612
fb4443d8
UW
1613 /* By this stage in the proceedings, SP has been decremented by "red
1614 zone size" + "struct return size". Fetch the stack-pointer from
1615 before this and use that as the BACK_CHAIN. */
40a6adc1 1616 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 1617 &back_chain);
fb4443d8 1618
8be9034a
AC
1619 /* Go through the argument list twice.
1620
1621 Pass 1: Compute the function call's stack space and register
1622 requirements.
1623
1624 Pass 2: Replay the same computation but this time also write the
1625 values out to the target. */
1626
1627 for (write_pass = 0; write_pass < 2; write_pass++)
1628 {
1629 int argno;
e765b44c
UW
1630
1631 struct ppc64_sysv_argpos argpos;
1632 argpos.greg = 3;
1633 argpos.freg = 1;
1634 argpos.vreg = 2;
8be9034a
AC
1635
1636 if (!write_pass)
1637 {
24e9cda0
UW
1638 /* During the first pass, GPARAM and REFPARAM are more like
1639 offsets (start address zero) than addresses. That way
1640 they accumulate the total stack space each region
1641 requires. */
e765b44c
UW
1642 argpos.regcache = NULL;
1643 argpos.gparam = 0;
1644 argpos.refparam = 0;
8be9034a
AC
1645 }
1646 else
1647 {
24e9cda0
UW
1648 /* Decrement the stack pointer making space for the Altivec
1649 and general on-stack parameters. Set refparam and gparam
1650 to their corresponding regions. */
e765b44c
UW
1651 argpos.regcache = regcache;
1652 argpos.refparam = align_down (sp - refparam_size, 16);
1653 argpos.gparam = align_down (argpos.refparam - gparam_size, 16);
52f548e4
UW
1654 /* Add in space for the TOC, link editor double word (v1 only),
1655 compiler double word (v1 only), LR save area, CR save area,
1656 and backchain. */
1657 if (tdep->elf_abi == POWERPC_ELF_V1)
1658 sp = align_down (argpos.gparam - 48, 16);
1659 else
1660 sp = align_down (argpos.gparam - 32, 16);
8be9034a
AC
1661 }
1662
1663 /* If the function is returning a `struct', then there is an
1664 extra hidden parameter (which will be passed in r3)
1665 containing the address of that struct.. In that case we
1666 should advance one word and start from r4 register to copy
1667 parameters. This also consumes one on-stack parameter slot. */
1668 if (struct_return)
e765b44c 1669 ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos);
8be9034a
AC
1670
1671 for (argno = 0; argno < nargs; argno++)
1672 {
1673 struct value *arg = args[argno];
df407dfe 1674 struct type *type = check_typedef (value_type (arg));
0fd88904 1675 const bfd_byte *val = value_contents (arg);
ce0451ad 1676
e765b44c 1677 if (TYPE_CODE (type) == TYPE_CODE_COMPLEX)
8be9034a 1678 {
e765b44c
UW
1679 /* Complex types are passed as if two independent scalars. */
1680 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1300a2f4 1681
e765b44c
UW
1682 ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos);
1683 ppc64_sysv_abi_push_param (gdbarch, eltype,
1684 val + TYPE_LENGTH (eltype), &argpos);
1300a2f4 1685 }
e765b44c 1686 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
54fcddd0
UW
1687 && opencl_abi)
1688 {
1689 /* OpenCL vectors shorter than 16 bytes are passed as if
e765b44c
UW
1690 a series of independent scalars; OpenCL vectors 16 bytes
1691 or longer are passed as if a series of AltiVec vectors. */
1692 struct type *eltype;
1693 int i, nelt;
54fcddd0 1694
e765b44c
UW
1695 if (TYPE_LENGTH (type) < 16)
1696 eltype = check_typedef (TYPE_TARGET_TYPE (type));
1697 else
1698 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1699
1700 nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
54fcddd0
UW
1701 for (i = 0; i < nelt; i++)
1702 {
1703 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1704
e765b44c 1705 ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos);
8be9034a 1706 }
8be9034a
AC
1707 }
1708 else
1709 {
e765b44c
UW
1710 /* All other types are passed as single arguments. */
1711 ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos);
8be9034a
AC
1712 }
1713 }
1714
1715 if (!write_pass)
1716 {
24e9cda0 1717 /* Save the true region sizes ready for the second pass. */
e765b44c 1718 refparam_size = argpos.refparam;
24e9cda0 1719 /* Make certain that the general parameter save area is at
8be9034a 1720 least the minimum 8 registers (or doublewords) in size. */
e765b44c 1721 if (argpos.greg < 8)
8be9034a
AC
1722 gparam_size = 8 * tdep->wordsize;
1723 else
e765b44c 1724 gparam_size = argpos.gparam;
8be9034a
AC
1725 }
1726 }
1727
1728 /* Update %sp. */
40a6adc1 1729 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
8be9034a
AC
1730
1731 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 1732 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
8be9034a
AC
1733
1734 /* Point the inferior function call's return address at the dummy's
1735 breakpoint. */
1736 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1737
d4094b6a
UW
1738 /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use
1739 that to find the TOC. If we're calling via a function pointer,
1740 the pointer itself identifies the descriptor. */
1741 if (tdep->elf_abi == POWERPC_ELF_V1)
1742 {
1743 struct type *ftype = check_typedef (value_type (function));
1744 CORE_ADDR desc_addr = value_as_address (function);
1745
1746 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1747 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1748 {
1749 /* The TOC is the second double word in the descriptor. */
1750 CORE_ADDR toc =
1751 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1752 tdep->wordsize, byte_order);
1753
1754 regcache_cooked_write_unsigned (regcache,
1755 tdep->ppc_gp0_regnum + 2, toc);
1756 }
1757 }
1758
1759 /* In the ELFv2 ABI, we need to pass the target address in r12 since
1760 we may be calling a global entry point. */
1761 if (tdep->elf_abi == POWERPC_ELF_V2)
1762 regcache_cooked_write_unsigned (regcache,
1763 tdep->ppc_gp0_regnum + 12, func_addr);
8be9034a
AC
1764
1765 return sp;
1766}
1767
e765b44c
UW
1768/* Subroutine of ppc64_sysv_abi_return_value that handles "base" types:
1769 integer, floating-point, and AltiVec vector types.
afd48b75 1770
e765b44c
UW
1771 This routine also handles components of aggregate return types;
1772 INDEX describes which part of the aggregate is to be handled.
afd48b75 1773
e765b44c
UW
1774 Returns true if VALTYPE is some such base type that could be handled,
1775 false otherwise. */
1776static int
1777ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
1778 struct regcache *regcache, gdb_byte *readbuf,
1779 const gdb_byte *writebuf, int index)
afd48b75 1780{
05580c65 1781 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152 1782
e765b44c 1783 /* Integers live in GPRs starting at r3. */
b6e1c027 1784 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
93d4208d
UW
1785 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1786 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1787 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
b6e1c027 1788 && TYPE_LENGTH (valtype) <= 8)
afd48b75 1789 {
e765b44c
UW
1790 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1791
963e2bb7 1792 if (writebuf != NULL)
afd48b75
AC
1793 {
1794 /* Be careful to sign extend the value. */
e765b44c 1795 regcache_cooked_write_unsigned (regcache, regnum,
963e2bb7 1796 unpack_long (valtype, writebuf));
afd48b75 1797 }
963e2bb7 1798 if (readbuf != NULL)
afd48b75 1799 {
e765b44c 1800 /* Extract the integer from GPR. Since this is truncating the
afd48b75
AC
1801 value, there isn't a sign extension problem. */
1802 ULONGEST regval;
e765b44c
UW
1803
1804 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1805 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype),
1806 gdbarch_byte_order (gdbarch), regval);
afd48b75 1807 }
e765b44c 1808 return 1;
afd48b75 1809 }
e765b44c
UW
1810
1811 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1812 to double first. */
1813 if (TYPE_LENGTH (valtype) <= 8
1814 && TYPE_CODE (valtype) == TYPE_CODE_FLT)
afd48b75 1815 {
e765b44c
UW
1816 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1817 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1818 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
e765b44c 1819
963e2bb7 1820 if (writebuf != NULL)
e765b44c 1821 {
3b2ca824 1822 target_float_convert (writebuf, valtype, regval, regtype);
e765b44c
UW
1823 regcache_cooked_write (regcache, regnum, regval);
1824 }
963e2bb7 1825 if (readbuf != NULL)
e765b44c
UW
1826 {
1827 regcache_cooked_read (regcache, regnum, regval);
3b2ca824 1828 target_float_convert (regval, regtype, readbuf, valtype);
e765b44c
UW
1829 }
1830 return 1;
afd48b75 1831 }
54fcddd0 1832
e765b44c
UW
1833 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1834 placed in the least significant word. */
1835 if (TYPE_LENGTH (valtype) <= 8
1836 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1837 {
1838 int regnum = tdep->ppc_fp0_regnum + 1 + index;
5b757e5d
UW
1839 int offset = 0;
1840
1841 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1842 offset = 8 - TYPE_LENGTH (valtype);
54fcddd0 1843
e765b44c
UW
1844 if (writebuf != NULL)
1845 regcache_cooked_write_part (regcache, regnum,
1846 offset, TYPE_LENGTH (valtype), writebuf);
1847 if (readbuf != NULL)
1848 regcache_cooked_read_part (regcache, regnum,
1849 offset, TYPE_LENGTH (valtype), readbuf);
1850 return 1;
1851 }
54fcddd0 1852
e765b44c
UW
1853 /* IBM long double stored in two consecutive FPRs. */
1854 if (TYPE_LENGTH (valtype) == 16
1855 && TYPE_CODE (valtype) == TYPE_CODE_FLT
1856 && (gdbarch_long_double_format (gdbarch)
1857 == floatformats_ibm_long_double))
1858 {
1859 int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index;
54fcddd0 1860
e765b44c
UW
1861 if (writebuf != NULL)
1862 {
1863 regcache_cooked_write (regcache, regnum, writebuf);
1864 regcache_cooked_write (regcache, regnum + 1, writebuf + 8);
54fcddd0 1865 }
e765b44c
UW
1866 if (readbuf != NULL)
1867 {
1868 regcache_cooked_read (regcache, regnum, readbuf);
1869 regcache_cooked_read (regcache, regnum + 1, readbuf + 8);
1870 }
1871 return 1;
54fcddd0 1872 }
e765b44c
UW
1873
1874 /* 128-bit decimal floating-point values are stored in an even/odd
1875 pair of FPRs, with the even FPR holding the most significant half. */
1876 if (TYPE_LENGTH (valtype) == 16
1877 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
54fcddd0 1878 {
e765b44c 1879 int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index;
0ff3e01f
UW
1880 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1881 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
54fcddd0 1882
e765b44c 1883 if (writebuf != NULL)
54fcddd0 1884 {
0ff3e01f
UW
1885 regcache_cooked_write (regcache, regnum, writebuf + hipart);
1886 regcache_cooked_write (regcache, regnum + 1, writebuf + lopart);
54fcddd0 1887 }
e765b44c
UW
1888 if (readbuf != NULL)
1889 {
0ff3e01f
UW
1890 regcache_cooked_read (regcache, regnum, readbuf + hipart);
1891 regcache_cooked_read (regcache, regnum + 1, readbuf + lopart);
e765b44c
UW
1892 }
1893 return 1;
54fcddd0 1894 }
e765b44c
UW
1895
1896 /* AltiVec vectors are returned in VRs starting at v2. */
a1da2672
UW
1897 if (TYPE_LENGTH (valtype) == 16
1898 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
e765b44c 1899 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
afd48b75 1900 {
e765b44c
UW
1901 int regnum = tdep->ppc_vr0_regnum + 2 + index;
1902
1903 if (writebuf != NULL)
1904 regcache_cooked_write (regcache, regnum, writebuf);
1905 if (readbuf != NULL)
1906 regcache_cooked_read (regcache, regnum, readbuf);
1907 return 1;
afd48b75 1908 }
e765b44c 1909
a1da2672
UW
1910 /* Short vectors are returned in GPRs starting at r3. */
1911 if (TYPE_LENGTH (valtype) <= 8
1912 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype))
1913 {
1914 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1915 int offset = 0;
1916
1917 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1918 offset = 8 - TYPE_LENGTH (valtype);
1919
1920 if (writebuf != NULL)
1921 regcache_cooked_write_part (regcache, regnum,
1922 offset, TYPE_LENGTH (valtype), writebuf);
1923 if (readbuf != NULL)
1924 regcache_cooked_read_part (regcache, regnum,
1925 offset, TYPE_LENGTH (valtype), readbuf);
1926 return 1;
1927 }
1928
e765b44c
UW
1929 return 0;
1930}
1931
1932/* The 64 bit ABI return value convention.
1933
1934 Return non-zero if the return-value is stored in a register, return
1935 0 if the return-value is instead stored on the stack (a.k.a.,
1936 struct return convention).
1937
1938 For a return-value stored in a register: when WRITEBUF is non-NULL,
1939 copy the buffer to the corresponding register return-value location
1940 location; when READBUF is non-NULL, fill the buffer from the
1941 corresponding register return-value location. */
1942enum return_value_convention
1943ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1944 struct type *valtype, struct regcache *regcache,
1945 gdb_byte *readbuf, const gdb_byte *writebuf)
1946{
1947 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1948 struct type *func_type = function ? value_type (function) : NULL;
1949 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1950 struct type *eltype;
1951 int nelt, i, ok;
1952
1953 /* This function exists to support a calling convention that
1954 requires floating-point registers. It shouldn't be used on
1955 processors that lack them. */
1956 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1957
1958 /* Complex types are returned as if two independent scalars. */
1959 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX)
afd48b75 1960 {
e765b44c
UW
1961 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1962
1963 for (i = 0; i < 2; i++)
afd48b75 1964 {
e765b44c
UW
1965 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1966 readbuf, writebuf, i);
1967 gdb_assert (ok);
1968
1969 if (readbuf)
1970 readbuf += TYPE_LENGTH (eltype);
1971 if (writebuf)
1972 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1973 }
1974 return RETURN_VALUE_REGISTER_CONVENTION;
1975 }
e765b44c
UW
1976
1977 /* OpenCL vectors shorter than 16 bytes are returned as if
1978 a series of independent scalars; OpenCL vectors 16 bytes
1979 or longer are returned as if a series of AltiVec vectors. */
1980 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
1981 && opencl_abi)
afd48b75 1982 {
e765b44c
UW
1983 if (TYPE_LENGTH (valtype) < 16)
1984 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1985 else
1986 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1987
1988 nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
1989 for (i = 0; i < nelt; i++)
afd48b75 1990 {
e765b44c
UW
1991 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1992 readbuf, writebuf, i);
1993 gdb_assert (ok);
1994
1995 if (readbuf)
1996 readbuf += TYPE_LENGTH (eltype);
1997 if (writebuf)
1998 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1999 }
2000 return RETURN_VALUE_REGISTER_CONVENTION;
2001 }
e765b44c
UW
2002
2003 /* All pointers live in r3. */
aa006118 2004 if (TYPE_CODE (valtype) == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype))
afd48b75 2005 {
e765b44c
UW
2006 int regnum = tdep->ppc_gp0_regnum + 3;
2007
2008 if (writebuf != NULL)
2009 regcache_cooked_write (regcache, regnum, writebuf);
2010 if (readbuf != NULL)
2011 regcache_cooked_read (regcache, regnum, readbuf);
afd48b75
AC
2012 return RETURN_VALUE_REGISTER_CONVENTION;
2013 }
e765b44c
UW
2014
2015 /* Small character arrays are returned, right justified, in r3. */
2016 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
a1da2672 2017 && !TYPE_VECTOR (valtype)
e765b44c
UW
2018 && TYPE_LENGTH (valtype) <= 8
2019 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
2020 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
2021 {
2022 int regnum = tdep->ppc_gp0_regnum + 3;
2023 int offset = (register_size (gdbarch, regnum) - TYPE_LENGTH (valtype));
2024
2025 if (writebuf != NULL)
2026 regcache_cooked_write_part (regcache, regnum,
2027 offset, TYPE_LENGTH (valtype), writebuf);
2028 if (readbuf != NULL)
2029 regcache_cooked_read_part (regcache, regnum,
2030 offset, TYPE_LENGTH (valtype), readbuf);
2031 return RETURN_VALUE_REGISTER_CONVENTION;
2032 }
2033
cc0e89c5
UW
2034 /* In the ELFv2 ABI, homogeneous floating-point or vector
2035 aggregates are returned in registers. */
2036 if (tdep->elf_abi == POWERPC_ELF_V2
a1da2672
UW
2037 && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt)
2038 && (TYPE_CODE (eltype) == TYPE_CODE_FLT
2039 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT
2040 || (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
2041 && TYPE_VECTOR (eltype)
2042 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
2043 && TYPE_LENGTH (eltype) == 16)))
cc0e89c5
UW
2044 {
2045 for (i = 0; i < nelt; i++)
2046 {
2047 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
2048 readbuf, writebuf, i);
2049 gdb_assert (ok);
2050
2051 if (readbuf)
2052 readbuf += TYPE_LENGTH (eltype);
2053 if (writebuf)
2054 writebuf += TYPE_LENGTH (eltype);
2055 }
2056
2057 return RETURN_VALUE_REGISTER_CONVENTION;
2058 }
2059
2060 /* In the ELFv2 ABI, aggregate types of up to 16 bytes are
2061 returned in registers r3:r4. */
2062 if (tdep->elf_abi == POWERPC_ELF_V2
2063 && TYPE_LENGTH (valtype) <= 16
2064 && (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
2065 || TYPE_CODE (valtype) == TYPE_CODE_UNION
2066 || (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
2067 && !TYPE_VECTOR (valtype))))
2068 {
2069 int n_regs = ((TYPE_LENGTH (valtype) + tdep->wordsize - 1)
2070 / tdep->wordsize);
2071 int i;
2072
2073 for (i = 0; i < n_regs; i++)
2074 {
0f068fb5 2075 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
cc0e89c5
UW
2076 int regnum = tdep->ppc_gp0_regnum + 3 + i;
2077 int offset = i * tdep->wordsize;
2078 int len = TYPE_LENGTH (valtype) - offset;
2079
2080 if (len > tdep->wordsize)
2081 len = tdep->wordsize;
2082
2083 if (writebuf != NULL)
2084 {
2085 memset (regval, 0, sizeof regval);
2086 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2087 && offset == 0)
2088 memcpy (regval + tdep->wordsize - len, writebuf, len);
2089 else
2090 memcpy (regval, writebuf + offset, len);
2091 regcache_cooked_write (regcache, regnum, regval);
2092 }
2093 if (readbuf != NULL)
2094 {
2095 regcache_cooked_read (regcache, regnum, regval);
2096 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2097 && offset == 0)
2098 memcpy (readbuf, regval + tdep->wordsize - len, len);
2099 else
2100 memcpy (readbuf + offset, regval, len);
2101 }
2102 }
2103 return RETURN_VALUE_REGISTER_CONVENTION;
2104 }
2105
e765b44c
UW
2106 /* Handle plain base types. */
2107 if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache,
2108 readbuf, writebuf, 0))
2109 return RETURN_VALUE_REGISTER_CONVENTION;
2110
afd48b75
AC
2111 return RETURN_VALUE_STRUCT_CONVENTION;
2112}
2113