[thirdparty/binutils-gdb.git] / gdb / sparc-nat.c

/* Functions specific to running gdb native on a SPARC running SunOS4.
   Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.

This file is part of GDB.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include "defs.h"
#include "inferior.h"
#include "target.h"
#include "gdbcore.h"

#include <signal.h>
#include <sys/ptrace.h>
#include <sys/wait.h>
#ifdef __linux__
#include <asm/reg.h>
#else
#include <machine/reg.h>
#endif
#include <sys/user.h>

/* We don't store all registers immediately when requested, since they
   get sent over in large chunks anyway.  Instead, we accumulate most
   of the changes and send them over once.  "deferred_stores" keeps
   track of which sets of registers we have locally-changed copies of,
   so we only need send the groups that have changed.  */

#define	INT_REGS	1
#define	STACK_REGS	2
#define	FP_REGS		4

static void
fetch_core_registers PARAMS ((char *, unsigned int, int, CORE_ADDR));

/* Fetch one or more registers from the inferior.  REGNO == -1 to get
   them all.  We actually fetch more than requested, when convenient,
   marking them as valid so we won't fetch them again.  */

void
fetch_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int i;

  /* We should never be called with deferred stores, because a prerequisite
     for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh.  */
  if (deferred_stores) abort();

  DO_DEFERRED_STORES;

  /* Global and Out regs are fetched directly, as well as the control
     registers.  If we're getting one of the in or local regs,
     and the stack pointer has not yet been fetched,
     we have to do that first, since they're found in memory relative
     to the stack pointer.  */
  if (regno < O7_REGNUM  /* including -1 */
      || regno >= Y_REGNUM
      || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
    {
      if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_getregs");
      
      registers[REGISTER_BYTE (0)] = 0;
      memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	      15 * REGISTER_RAW_SIZE (G0_REGNUM));
      *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; 
      *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
      *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
      *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;

      for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	register_valid[i] = 1;
      register_valid[Y_REGNUM] = 1;
      register_valid[PS_REGNUM] = 1;
      register_valid[PC_REGNUM] = 1;
      register_valid[NPC_REGNUM] = 1;
      /* If we don't set these valid, read_register_bytes() rereads
	 all the regs every time it is called!  FIXME.  */
      register_valid[WIM_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[TBR_REGNUM] = 1;	/* Not true yet, FIXME */
      register_valid[CPS_REGNUM] = 1;	/* Not true yet, FIXME */
    }

  /* Floating point registers */
  if (regno == -1 ||
      regno == FPS_REGNUM ||
      (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
    {
      if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_fp_registers,
		       0))
	    perror("ptrace_getfpregs");
      memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	      sizeof inferior_fp_registers.fpu_fr);
      memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
	     &inferior_fp_registers.Fpu_fsr,
	     sizeof (FPU_FSR_TYPE));
      for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	register_valid[i] = 1;
      register_valid[FPS_REGNUM] = 1;
    }

  /* These regs are saved on the stack by the kernel.  Only read them
     all (16 ptrace calls!) if we really need them.  */
  if (regno == -1)
    {
      target_read_memory (*(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)],
		          &registers[REGISTER_BYTE (L0_REGNUM)],
			  16*REGISTER_RAW_SIZE (L0_REGNUM));
      for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	register_valid[i] = 1;
    }
  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
    {
      CORE_ADDR sp = *(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)];
      i = REGISTER_BYTE (regno);
      if (register_valid[regno])
	printf_unfiltered("register %d valid and read\n", regno);
      target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
			  &registers[i], REGISTER_RAW_SIZE (regno));
      register_valid[regno] = 1;
    }
}

/* Store our register values back into the inferior.
   If REGNO is -1, do this for all registers.
   Otherwise, REGNO specifies which register (so we can save time).  */

void
store_inferior_registers (regno)
     int regno;
{
  struct regs inferior_registers;
  struct fp_status inferior_fp_registers;
  int wanna_store = INT_REGS + STACK_REGS + FP_REGS;

  /* First decide which pieces of machine-state we need to modify.  
     Default for regno == -1 case is all pieces.  */
  if (regno >= 0)
    if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
      {
	wanna_store = FP_REGS;
      }
    else 
      {
	if (regno == SP_REGNUM)
	  wanna_store = INT_REGS + STACK_REGS;
	else if (regno < L0_REGNUM || regno > I7_REGNUM)
	  wanna_store = INT_REGS;
	else if (regno == FPS_REGNUM)
	  wanna_store = FP_REGS;
	else
	  wanna_store = STACK_REGS;
      }

  /* See if we're forcing the stores to happen now, or deferring. */
  if (regno == -2)
    {
      wanna_store = deferred_stores;
      deferred_stores = 0;
    }
  else
    {
      if (wanna_store == STACK_REGS)
	{
	  /* Fall through and just store one stack reg.  If we deferred
	     it, we'd have to store them all, or remember more info.  */
	}
      else
	{
	  deferred_stores |= wanna_store;
	  return;
	}
    }

  if (wanna_store & STACK_REGS)
    {
      CORE_ADDR sp = *(CORE_ADDR *)&registers[REGISTER_BYTE (SP_REGNUM)];

      if (regno < 0 || regno == SP_REGNUM)
	{
	  if (!register_valid[L0_REGNUM+5]) abort();
	  target_write_memory (sp, 
			       &registers[REGISTER_BYTE (L0_REGNUM)],
			       16*REGISTER_RAW_SIZE (L0_REGNUM));
	}
      else
	{
	  if (!register_valid[regno]) abort();
	  target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
			       &registers[REGISTER_BYTE (regno)],
			       REGISTER_RAW_SIZE (regno));
	}
	
    }

  if (wanna_store & INT_REGS)
    {
      if (!register_valid[G1_REGNUM]) abort();

      memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	      15 * REGISTER_RAW_SIZE (G1_REGNUM));

      inferior_registers.r_ps =
	*(int *)&registers[REGISTER_BYTE (PS_REGNUM)];
      inferior_registers.r_pc =
	*(int *)&registers[REGISTER_BYTE (PC_REGNUM)];
      inferior_registers.r_npc =
	*(int *)&registers[REGISTER_BYTE (NPC_REGNUM)];
      inferior_registers.r_y =
	*(int *)&registers[REGISTER_BYTE (Y_REGNUM)];

      if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
	perror("ptrace_setregs");
    }

  if (wanna_store & FP_REGS)
    {
      if (!register_valid[FP0_REGNUM+9]) abort();
      memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
	      sizeof inferior_fp_registers.fpu_fr);
      memcpy (&inferior_fp_registers.Fpu_fsr, 
	      &registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
      if (0 !=
	 ptrace (PTRACE_SETFPREGS, inferior_pid,
		 (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	 perror("ptrace_setfpregs");
    }
}


static void
fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
  char *core_reg_sect;
  unsigned core_reg_size;
  int which;
  CORE_ADDR ignore;	/* reg addr, unused in this version */
{

  if (which == 0) {

    /* Integer registers */

#define gregs ((struct regs *)core_reg_sect)
    /* G0 *always* holds 0.  */
    *(int *)&registers[REGISTER_BYTE (0)] = 0;

    /* The globals and output registers.  */
    memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, 
	    15 * REGISTER_RAW_SIZE (G1_REGNUM));
    *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
    *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
    *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
    *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;

    /* My best guess at where to get the locals and input
       registers is exactly where they usually are, right above
       the stack pointer.  If the core dump was caused by a bus error
       from blowing away the stack pointer (as is possible) then this
       won't work, but it's worth the try. */
    {
      int sp;

      sp = *(int *)&registers[REGISTER_BYTE (SP_REGNUM)];
      if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)], 
			  16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	{
	  /* fprintf_unfiltered so user can still use gdb */
	  fprintf_unfiltered (gdb_stderr,
		   "Couldn't read input and local registers from core file\n");
	}
    }
  } else if (which == 2) {

    /* Floating point registers */

#define fpuregs  ((struct fpu *) core_reg_sect)
    if (core_reg_size >= sizeof (struct fpu))
      {
	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
		sizeof (fpuregs->fpu_regs));
	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
		sizeof (FPU_FSR_TYPE));
      }
    else
      fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
  }
}

int
kernel_u_size ()
{
  return (sizeof (struct user));
}

\f
/* Register that we are able to handle sparc core file formats.
   FIXME: is this really bfd_target_unknown_flavour? */

static struct core_fns sparc_core_fns =
{
  bfd_target_unknown_flavour,
  fetch_core_registers,
  NULL
};

void
_initialize_core_sparc ()
{
  add_core_fns (&sparc_core_fns);
}
Commit	Line	Data
2ba6182b	1	/* Functions specific to running gdb native on a SPARC running SunOS4.
7531f36e	2	Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
dfc82617 RP	3
	4	This file is part of GDB.
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
6c9638b4	18	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
dfc82617 RP	19
	20	#include "defs.h"
	21	#include "inferior.h"
	22	#include "target.h"
3730a0ed	23	#include "gdbcore.h"
dfc82617 RP	24
	25	#include <signal.h>
	26	#include <sys/ptrace.h>
	27	#include <sys/wait.h>
6cc922a9 JM	28	#ifdef __linux__
	29	#include <asm/reg.h>
	30	#else
dfc82617	31	#include <machine/reg.h>
6cc922a9	32	#endif
7531f36e	33	#include <sys/user.h>
dfc82617 RP	34
	35	/* We don't store all registers immediately when requested, since they
	36	get sent over in large chunks anyway. Instead, we accumulate most
	37	of the changes and send them over once. "deferred_stores" keeps
	38	track of which sets of registers we have locally-changed copies of,
	39	so we only need send the groups that have changed. */
	40
	41	#define INT_REGS 1
	42	#define STACK_REGS 2
	43	#define FP_REGS 4
	44
b607efe7	45	static void
948a9d92	46	fetch_core_registers PARAMS ((char *, unsigned int, int, CORE_ADDR));
b607efe7	47
dfc82617 RP	48	/* Fetch one or more registers from the inferior. REGNO == -1 to get
	49	them all. We actually fetch more than requested, when convenient,
	50	marking them as valid so we won't fetch them again. */
	51
	52	void
	53	fetch_inferior_registers (regno)
	54	int regno;
	55	{
	56	struct regs inferior_registers;
	57	struct fp_status inferior_fp_registers;
	58	int i;
	59
	60	/* We should never be called with deferred stores, because a prerequisite
	61	for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */
	62	if (deferred_stores) abort();
	63
	64	DO_DEFERRED_STORES;
	65
	66	/* Global and Out regs are fetched directly, as well as the control
	67	registers. If we're getting one of the in or local regs,
	68	and the stack pointer has not yet been fetched,
	69	we have to do that first, since they're found in memory relative
	70	to the stack pointer. */
	71	if (regno < O7_REGNUM /* including -1 */
	72	\|\| regno >= Y_REGNUM
	73	\|\| (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
	74	{
	75	if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
	76	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	77	perror("ptrace_getregs");
	78
	79	registers[REGISTER_BYTE (0)] = 0;
	80	memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
	81	15 * REGISTER_RAW_SIZE (G0_REGNUM));
	82	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
	83	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
	84	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
	85	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
	86
	87	for (i = G0_REGNUM; i <= O7_REGNUM; i++)
	88	register_valid[i] = 1;
	89	register_valid[Y_REGNUM] = 1;
	90	register_valid[PS_REGNUM] = 1;
	91	register_valid[PC_REGNUM] = 1;
	92	register_valid[NPC_REGNUM] = 1;
	93	/* If we don't set these valid, read_register_bytes() rereads
	94	all the regs every time it is called! FIXME. */
	95	register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */
	96	register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */
dfc82617 RP	97	register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */
	98	}
	99
	100	/* Floating point registers */
2ba6182b JG	101	if (regno == -1 \|\|
	102	regno == FPS_REGNUM \|\|
	103	(regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
dfc82617 RP	104	{
	105	if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
	106	(PTRACE_ARG3_TYPE) &inferior_fp_registers,
	107	0))
	108	perror("ptrace_getfpregs");
	109	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
	110	sizeof inferior_fp_registers.fpu_fr);
c369b6a3	111	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
ade40d31	112	&inferior_fp_registers.Fpu_fsr,
c369b6a3	113	sizeof (FPU_FSR_TYPE));
dfc82617 RP	114	for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
	115	register_valid[i] = 1;
	116	register_valid[FPS_REGNUM] = 1;
	117	}
	118
	119	/* These regs are saved on the stack by the kernel. Only read them
	120	all (16 ptrace calls!) if we really need them. */
	121	if (regno == -1)
	122	{
4c681116	123	target_read_memory ((CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)],
dfc82617	124	&registers[REGISTER_BYTE (L0_REGNUM)],
4c681116	125	16*REGISTER_RAW_SIZE (L0_REGNUM));
dfc82617 RP	126	for (i = L0_REGNUM; i <= I7_REGNUM; i++)
	127	register_valid[i] = 1;
	128	}
	129	else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
	130	{
	131	CORE_ADDR sp = (CORE_ADDR)&registers[REGISTER_BYTE (SP_REGNUM)];
	132	i = REGISTER_BYTE (regno);
	133	if (register_valid[regno])
199b2450	134	printf_unfiltered("register %d valid and read\n", regno);
4c681116 SG	135	target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
4c681116 SG	136	&registers[i], REGISTER_RAW_SIZE (regno));
dfc82617 RP	137	register_valid[regno] = 1;
	138	}
	139	}
	140
	141	/* Store our register values back into the inferior.
	142	If REGNO is -1, do this for all registers.
	143	Otherwise, REGNO specifies which register (so we can save time). */
	144
	145	void
	146	store_inferior_registers (regno)
	147	int regno;
	148	{
	149	struct regs inferior_registers;
	150	struct fp_status inferior_fp_registers;
	151	int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
	152
	153	/* First decide which pieces of machine-state we need to modify.
	154	Default for regno == -1 case is all pieces. */
	155	if (regno >= 0)
	156	if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
	157	{
	158	wanna_store = FP_REGS;
	159	}
	160	else
	161	{
	162	if (regno == SP_REGNUM)
	163	wanna_store = INT_REGS + STACK_REGS;
	164	else if (regno < L0_REGNUM \|\| regno > I7_REGNUM)
	165	wanna_store = INT_REGS;
2ba6182b JG	166	else if (regno == FPS_REGNUM)
2ba6182b JG	167	wanna_store = FP_REGS;
dfc82617 RP	168	else
	169	wanna_store = STACK_REGS;
	170	}
	171
	172	/* See if we're forcing the stores to happen now, or deferring. */
	173	if (regno == -2)
	174	{
	175	wanna_store = deferred_stores;
	176	deferred_stores = 0;
	177	}
	178	else
	179	{
	180	if (wanna_store == STACK_REGS)
	181	{
	182	/* Fall through and just store one stack reg. If we deferred
	183	it, we'd have to store them all, or remember more info. */
	184	}
	185	else
	186	{
	187	deferred_stores \|= wanna_store;
	188	return;
	189	}
	190	}
	191
	192	if (wanna_store & STACK_REGS)
	193	{
	194	CORE_ADDR sp = (CORE_ADDR )&registers[REGISTER_BYTE (SP_REGNUM)];
	195
	196	if (regno < 0 \|\| regno == SP_REGNUM)
	197	{
	198	if (!register_valid[L0_REGNUM+5]) abort();
4c681116 SG	199	target_write_memory (sp,
	200	&registers[REGISTER_BYTE (L0_REGNUM)],
	201	16*REGISTER_RAW_SIZE (L0_REGNUM));
dfc82617 RP	202	}
	203	else
	204	{
	205	if (!register_valid[regno]) abort();
4c681116 SG	206	target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
	207	&registers[REGISTER_BYTE (regno)],
	208	REGISTER_RAW_SIZE (regno));
dfc82617 RP	209	}
	210
	211	}
	212
	213	if (wanna_store & INT_REGS)
	214	{
	215	if (!register_valid[G1_REGNUM]) abort();
	216
	217	memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
	218	15 * REGISTER_RAW_SIZE (G1_REGNUM));
	219
	220	inferior_registers.r_ps =
	221	(int )&registers[REGISTER_BYTE (PS_REGNUM)];
	222	inferior_registers.r_pc =
	223	(int )&registers[REGISTER_BYTE (PC_REGNUM)];
	224	inferior_registers.r_npc =
	225	(int )&registers[REGISTER_BYTE (NPC_REGNUM)];
	226	inferior_registers.r_y =
	227	(int )&registers[REGISTER_BYTE (Y_REGNUM)];
	228
	229	if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
	230	(PTRACE_ARG3_TYPE) &inferior_registers, 0))
	231	perror("ptrace_setregs");
	232	}
	233
	234	if (wanna_store & FP_REGS)
	235	{
	236	if (!register_valid[FP0_REGNUM+9]) abort();
	237	memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
	238	sizeof inferior_fp_registers.fpu_fr);
c369b6a3	239	memcpy (&inferior_fp_registers.Fpu_fsr,
dfc82617	240	&registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
dfc82617 RP	241	if (0 !=
	242	ptrace (PTRACE_SETFPREGS, inferior_pid,
	243	(PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
	244	perror("ptrace_setfpregs");
	245	}
	246	}
	247
	248
a1df8e78	249	static void
dfc82617 RP	250	fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
	251	char *core_reg_sect;
	252	unsigned core_reg_size;
	253	int which;
948a9d92	254	CORE_ADDR ignore; /* reg addr, unused in this version */
dfc82617 RP	255	{
	256
	257	if (which == 0) {
	258
	259	/* Integer registers */
	260
	261	#define gregs ((struct regs *)core_reg_sect)
	262	/* G0 always holds 0. */
	263	(int )&registers[REGISTER_BYTE (0)] = 0;
	264
	265	/* The globals and output registers. */
	266	memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
	267	15 * REGISTER_RAW_SIZE (G1_REGNUM));
	268	(int )&registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
	269	(int )&registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
	270	(int )&registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
	271	(int )&registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
	272
	273	/* My best guess at where to get the locals and input
	274	registers is exactly where they usually are, right above
	275	the stack pointer. If the core dump was caused by a bus error
	276	from blowing away the stack pointer (as is possible) then this
	277	won't work, but it's worth the try. */
	278	{
	279	int sp;
	280
	281	sp = (int )&registers[REGISTER_BYTE (SP_REGNUM)];
	282	if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
	283	16 * REGISTER_RAW_SIZE (L0_REGNUM)))
	284	{
199b2450 TL	285	/* fprintf_unfiltered so user can still use gdb */
199b2450 TL	286	fprintf_unfiltered (gdb_stderr,
dfc82617 RP	287	"Couldn't read input and local registers from core file\n");
	288	}
	289	}
	290	} else if (which == 2) {
	291
	292	/* Floating point registers */
	293
	294	#define fpuregs ((struct fpu *) core_reg_sect)
	295	if (core_reg_size >= sizeof (struct fpu))
	296	{
	297	memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
	298	sizeof (fpuregs->fpu_regs));
	299	memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
	300	sizeof (FPU_FSR_TYPE));
	301	}
	302	else
199b2450	303	fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
dfc82617 RP	304	}
	305	}
	306
7531f36e FF	307	int
	308	kernel_u_size ()
	309	{
	310	return (sizeof (struct user));
	311	}
a1df8e78 FF	312
	313	\f
	314	/* Register that we are able to handle sparc core file formats.
	315	FIXME: is this really bfd_target_unknown_flavour? */
	316
	317	static struct core_fns sparc_core_fns =
	318	{
	319	bfd_target_unknown_flavour,
	320	fetch_core_registers,
	321	NULL
	322	};
	323
	324	void
	325	_initialize_core_sparc ()
	326	{
	327	add_core_fns (&sparc_core_fns);
	328	}