]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/testsuite/gdb.arch/vsx-vsr-float28.exp
gdb/testsuite: remove use of then keyword from gdb.arch/*.exp
[thirdparty/binutils-gdb.git] / gdb / testsuite / gdb.arch / vsx-vsr-float28.exp
CommitLineData
4a94e368 1# Copyright (C) 2008-2022 Free Software Foundation, Inc.
6ba4cb84
CL
2#
3# This program is free software; you can redistribute it and/or modify
4# it under the terms of the GNU General Public License as published by
5# the Free Software Foundation; either version 3 of the License, or
6# (at your option) any later version.
7#
8# This program is distributed in the hope that it will be useful,
9# but WITHOUT ANY WARRANTY; without even the implied warranty of
10# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11# GNU General Public License for more details.
12#
13# You should have received a copy of the GNU General Public License
14# along with this program. If not, see <http://www.gnu.org/licenses/>.
15#
16
17#
18# Test the vsr registers print values in float128 bit format.
19#
20
21
75b6f386 22if {![istarget "powerpc*"] || [skip_vsx_tests]} {
6ba4cb84
CL
23 verbose "Skipping vsr float128 field tests."
24 return
25}
26
27standard_testfile
28
29set compile_flags {debug nowarnings quiet}
6ba4cb84
CL
30if [test_compiler_info gcc*] {
31 set compile_flags "$compile_flags additional_flags=-maltivec additional_flags=-mabi=altivec"
32} elseif [test_compiler_info xlc*] {
33 set compile_flags "$compile_flags additional_flags=-qaltivec"
34} else {
35 warning "unknown compiler"
36 return -1
37}
38
39if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } {
40 untested "failed to compile"
41 return -1
42}
43
44gdb_start
45gdb_reinitialize_dir $srcdir/$subdir
46gdb_load ${binfile}
47
48# Run to `main' where we begin our tests.
49
75b6f386 50if {![runto_main]} {
6ba4cb84
CL
51 return 0
52}
53
54set endianness [get_endianness]
55
56# Data sets used throughout the test
57
58set vector_field ".*float128 = -2.25,.*"
59
60# The vsx registers now contain a 128-bit floating point field. The following tests
61# setting a vsr register with a 128-bit floating point value and then printing the
62# register contents using the float format to verify the value is correctly printed
63# as a 128-bit value.
64
65# the following corresponds to a 128-bit float value of -2.25
66if {$endianness == "big"} {
67 gdb_test_no_output "set \$vs1.v4_int32\[3\] = 0x0"
68 gdb_test_no_output "set \$vs1.v4_int32\[2\] = 0x0"
69 gdb_test_no_output "set \$vs1.v4_int32\[1\] = 0x0"
70 gdb_test_no_output "set \$vs1.v4_int32\[0\] = 0xc0002000"
71} else {
72 gdb_test_no_output "set \$vs1.v4_int32\[0\] = 0x0"
73 gdb_test_no_output "set \$vs1.v4_int32\[1\] = 0x0"
74 gdb_test_no_output "set \$vs1.v4_int32\[2\] = 0x0"
75 gdb_test_no_output "set \$vs1.v4_int32\[3\] = 0xc0002000"
76}
77
78# check the contents of the register
79gdb_test "p/f \$vs1" "$vector_field"
80
81gdb_exit
82
83
84