]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/coff/sh.h
Update year range in copyright notice of binutils files
[thirdparty/binutils-gdb.git] / include / coff / sh.h
CommitLineData
c2dcd04e 1/* coff information for Renesas SH
4f1d9bd8 2
250d07de 3 Copyright (C) 2000-2021 Free Software Foundation, Inc.
4f1d9bd8
NC
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
e4e42b45 7 the Free Software Foundation; either version 3 of the License, or
4f1d9bd8
NC
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
e4e42b45
NC
17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
18 MA 02110-1301, USA. */
252b5132 19
4f1d9bd8
NC
20#ifdef COFF_WITH_PE
21#define L_LNNO_SIZE 2
22#else
23#define L_LNNO_SIZE 4
24#endif
25#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
26#include "coff/external.h"
252b5132
RH
27
28#define SH_ARCH_MAGIC_BIG 0x0500
29#define SH_ARCH_MAGIC_LITTLE 0x0550 /* Little endian SH */
056350c6 30#define SH_ARCH_MAGIC_WINCE 0x01a2 /* Windows CE - little endian */
5e671ea1 31#define SH_PE_MAGIC 0x010b
252b5132 32
252b5132 33#define SHBADMAG(x) \
4f1d9bd8
NC
34 (((x).f_magic != SH_ARCH_MAGIC_BIG) && \
35 ((x).f_magic != SH_ARCH_MAGIC_WINCE) && \
36 ((x).f_magic != SH_ARCH_MAGIC_LITTLE))
252b5132 37
056350c6
NC
38/* Define some NT default values. */
39/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
40#define NT_SECTION_ALIGNMENT 0x1000
41#define NT_FILE_ALIGNMENT 0x200
42#define NT_DEF_RESERVE 0x100000
43#define NT_DEF_COMMIT 0x1000
252b5132 44
252b5132
RH
45/********************** RELOCATION DIRECTIVES **********************/
46
47/* The external reloc has an offset field, because some of the reloc
48 types on the h8 don't have room in the instruction for the entire
4f1d9bd8 49 offset - eg the strange jump and high page addressing modes. */
252b5132 50
056350c6 51#ifndef COFF_WITH_PE
4f1d9bd8
NC
52struct external_reloc
53{
252b5132
RH
54 char r_vaddr[4];
55 char r_symndx[4];
56 char r_offset[4];
57 char r_type[2];
58 char r_stuff[2];
59};
056350c6 60#else
4f1d9bd8
NC
61struct external_reloc
62{
056350c6
NC
63 char r_vaddr[4];
64 char r_symndx[4];
65 char r_type[2];
66};
67#endif
252b5132 68
252b5132 69#define RELOC struct external_reloc
056350c6
NC
70#ifdef COFF_WITH_PE
71#define RELSZ 10
72#else
252b5132 73#define RELSZ 16
056350c6 74#endif
252b5132
RH
75
76/* SH relocation types. Not all of these are actually used. */
77
78#define R_SH_UNUSED 0 /* only used internally */
056350c6 79#define R_SH_IMM32CE 2 /* 32 bit immediate for WinCE */
252b5132
RH
80#define R_SH_PCREL8 3 /* 8 bit pcrel */
81#define R_SH_PCREL16 4 /* 16 bit pcrel */
82#define R_SH_HIGH8 5 /* high 8 bits of 24 bit address */
83#define R_SH_LOW16 7 /* low 16 bits of 24 bit immediate */
84#define R_SH_IMM24 6 /* 24 bit immediate */
85#define R_SH_PCDISP8BY4 9 /* PC rel 8 bits *4 +ve */
86#define R_SH_PCDISP8BY2 10 /* PC rel 8 bits *2 +ve */
87#define R_SH_PCDISP8 11 /* 8 bit branch */
88#define R_SH_PCDISP 12 /* 12 bit branch */
89#define R_SH_IMM32 14 /* 32 bit immediate */
90#define R_SH_IMM8 16 /* 8 bit immediate */
056350c6 91#define R_SH_IMAGEBASE 16 /* Windows CE */
252b5132
RH
92#define R_SH_IMM8BY2 17 /* 8 bit immediate *2 */
93#define R_SH_IMM8BY4 18 /* 8 bit immediate *4 */
94#define R_SH_IMM4 19 /* 4 bit immediate */
95#define R_SH_IMM4BY2 20 /* 4 bit immediate *2 */
96#define R_SH_IMM4BY4 21 /* 4 bit immediate *4 */
97#define R_SH_PCRELIMM8BY2 22 /* PC rel 8 bits *2 unsigned */
98#define R_SH_PCRELIMM8BY4 23 /* PC rel 8 bits *4 unsigned */
99#define R_SH_IMM16 24 /* 16 bit immediate */
100
101/* The switch table reloc types are used for relaxing. They are
102 generated for expressions such as
103 .word L1 - L2
104 The r_offset field holds the difference between the reloc address
105 and L2. */
106#define R_SH_SWITCH8 33 /* 8 bit switch table entry */
107#define R_SH_SWITCH16 25 /* 16 bit switch table entry */
108#define R_SH_SWITCH32 26 /* 32 bit switch table entry */
109
110/* The USES reloc type is used for relaxing. The compiler will
111 generate .uses pseudo-ops when it finds a function call which it
112 can relax. The r_offset field of the USES reloc holds the PC
113 relative offset to the instruction which loads the register used in
114 the function call. */
115#define R_SH_USES 27 /* .uses pseudo-op */
116
117/* The COUNT reloc type is used for relaxing. The assembler will
118 generate COUNT relocs for addresses referred to by the register
119 loads associated with USES relocs. The r_offset field of the COUNT
120 reloc holds the number of times the address is referenced in the
121 object file. */
122#define R_SH_COUNT 28 /* Count of constant pool uses */
123
124/* The ALIGN reloc type is used for relaxing. The r_offset field is
125 the power of two to which subsequent portions of the object file
126 must be aligned. */
127#define R_SH_ALIGN 29 /* .align pseudo-op */
128
129/* The CODE and DATA reloc types are used for aligning load and store
130 instructions. The assembler will generate a CODE reloc before a
131 block of instructions. It will generate a DATA reloc before data.
132 A section should be processed assuming it contains data, unless a
133 CODE reloc is seen. The only relevant pieces of information in the
134 CODE and DATA relocs are the section and the address. The symbol
135 and offset are meaningless. */
136#define R_SH_CODE 30 /* start of code */
137#define R_SH_DATA 31 /* start of data */
138
139/* The LABEL reloc type is used for aligning load and store
140 instructions. The assembler will generate a LABEL reloc for each
141 label within a block of instructions. This permits the linker to
142 avoid swapping instructions which are the targets of branches. */
143#define R_SH_LABEL 32 /* label */
144
145/* NB: R_SH_SWITCH8 is 33 */
015551fc
JR
146
147#define R_SH_LOOP_START 34
148#define R_SH_LOOP_END 35