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Add support for msp430.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
2469cfa2
NC
12002-12-24 Dmitry Diky <diwil@mail.ru>
2
3 * msp430.h: New file. Defines msp430 opcodes.
4
3badd465
NC
52002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
6
7 * h8300.h: Added some more pseudo opcodes for system call
8 processing.
9
640c0ccd
CD
102002-12-19 Chris Demetriou <cgd@broadcom.com>
11
12 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
13 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
14 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
15 (OP_OP_SDC2, OP_OP_SDC3): Define.
16
9bd1915f
AM
172002-12-16 Alan Modra <amodra@bigpond.net.au>
18
3f2a9fb7
AM
19 * hppa.h (completer_chars): #if 0 out.
20
9bd1915f
AM
21 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
22 "default_args".
23 (struct not_wot): Constify "args".
24 (struct not): Constify "name".
25 (numopcodes): Delete.
26 (endop): Delete.
27
0e073f4c
AM
282002-12-13 Alan Modra <amodra@bigpond.net.au>
29
30 * pj.h (pj_opc_info_t): Add union.
31
c10d9d8f
JW
322002-12-04 David Mosberger <davidm@hpl.hp.com>
33
34 * ia64.h: Fix copyright message.
35 (IA64_OPND_AR_CSD): New operand kind.
36
a823923b
RH
372002-12-03 Richard Henderson <rth@redhat.com>
38
39 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
40
4fdf0a75
AM
412002-12-03 Alan Modra <amodra@bigpond.net.au>
42
43 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
44 Constify "leaf" and "multi".
45
53cc2791
KD
462002-11-19 Klee Dienes <kdienes@apple.com>
47
48 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
49 fields.
50 (h8_opcodes). Modify initializer and initializer macros to no
51 longer initialize the removed fields.
52
5dec9182
SS
532002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
54
55 * tic4x.h (c4x_insts): Fixed LDHI constraint
56
a3e64b75
KD
572002-11-18 Klee Dienes <kdienes@apple.com>
58
59 * h8300.h (h8_opcode): Remove 'length' field.
60 (h8_opcodes): Mark as 'const' (both the declaration and
61 definition). Modify initializer and initializer macros to no
62 longer initialize the length field.
63
84037f8c
KD
642002-11-18 Klee Dienes <kdienes@apple.com>
65
66 * arc.h (arc_ext_opcodes): Declare as extern.
67 (arc_ext_operands): Declare as extern.
68 * i860.h (i860_opcodes): Declare as const.
69
eb128449
SS
702002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
71
72 * tic4x.h: File reordering. Added enhanced opcodes.
73
742002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
75
76 * tic4x.h: Major rewrite of entire file. Define instruction
77 classes, and put each instruction into a class.
78
792002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
80
81 * tic4x.h: Added new opcodes and corrected some bugs. Add support
82 for new DSP types.
83
ea6a213a
AM
842002-10-14 Alan Modra <amodra@bigpond.net.au>
85
86 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
87
701b80cd 882002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
89 Ken Raeburn <raeburn@cygnus.com>
90 Aldy Hernandez <aldyh@redhat.com>
91 Eric Christopher <echristo@redhat.com>
92 Richard Sandiford <rsandifo@redhat.com>
93
94 * mips.h: Update comment for new opcodes.
95 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
96 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
97 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
98 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
99 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
100 Don't match CPU_R4111 with INSN_4100.
101
0449635d
EZ
1022002-08-19 Elena Zannoni <ezannoni@redhat.com>
103
104 From matthew green <mrg@redhat.com>
105
106 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
107 instructions.
108 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
109 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
110 e500x2 Integer select, branch locking, performance monitor,
111 cache locking and machine check APUs, respectively.
112 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
113 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
114
030ad53b
SC
1152002-08-13 Stephane Carrez <stcarrez@nerim.fr>
116
117 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
118 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
119 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
120 memory banks.
121 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
122
aec421e0
TS
1232002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
124
125 * mips.h (INSN_MIPS16): New define.
126
cd61ebfe
AM
1272002-07-08 Alan Modra <amodra@bigpond.net.au>
128
129 * i386.h: Remove IgnoreSize from movsx and movzx.
130
92007e40
AM
1312002-06-08 Alan Modra <amodra@bigpond.net.au>
132
133 * a29k.h: Replace CONST with const.
134 (CONST): Don't define.
135 * convex.h: Replace CONST with const.
136 (CONST): Don't define.
137 * dlx.h: Replace CONST with const.
138 * or32.h (CONST): Don't define.
139
deec1734
CD
1402002-05-30 Chris G. Demetriou <cgd@broadcom.com>
141
142 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
143 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
144 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
145 (INSN_MDMX): New constants, for MDMX support.
146 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
147
d172d4ba
NC
1482002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
149
150 * dlx.h: New file.
151
b3f7d5fd
AM
1522002-05-25 Alan Modra <amodra@bigpond.net.au>
153
154 * ia64.h: Use #include "" instead of <> for local header files.
155 * sparc.h: Likewise.
156
771c7ce4
TS
1572002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
158
159 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
160
b9c9142c
AV
1612002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
162
163 * h8300.h: Corrected defs of all control regs
164 and eepmov instr.
165
cd47f4f1
AM
1662002-04-11 Alan Modra <amodra@bigpond.net.au>
167
168 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 169 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 170
1f25f5d3
CD
1712002-03-15 Chris G. Demetriou <cgd@broadcom.com>
172
173 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
174 instructions.
175 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
176 may be passed along with the ISA bitmask.
177
e4b29ec6
AM
1782002-03-05 Paul Koning <pkoning@equallogic.com>
179
180 * pdp11.h: Add format codes for float instruction formats.
181
eea5c83f
AM
1822002-02-25 Alan Modra <amodra@bigpond.net.au>
183
184 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
185
5a8b245c
JH
186Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
187
188 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
189
85a33fe2
JH
190Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
191
192 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
193 (xchg): Fix.
194 (in, out): Disable 64bit operands.
195 (call, jmp): Avoid REX prefixes.
196 (jcxz): Prohibit in 64bit mode
197 (jrcxz, loop): Add 64bit variants.
198 (movq): Fix patterns.
199 (movmskps, pextrw, pinstrw): Add 64bit variants.
200
3b16e843
NC
2012002-01-31 Ivan Guzvinec <ivang@opencores.org>
202
203 * or32.h: New file.
204
9a2e995d
GH
2052002-01-22 Graydon Hoare <graydon@redhat.com>
206
207 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
208 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
209
7b45c6e1
AM
2102002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
211
212 * h8300.h: Comment typo fix.
213
a09cf9bd
MG
2142002-01-03 matthew green <mrg@redhat.com>
215
216 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
217 (PPC_OPCODE_BOOKE64): Likewise.
218
1befefea
JL
219Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
220
221 * hppa.h (call, ret): Move to end of table.
222 (addb, addib): PA2.0 variants should have been PA2.0W.
223 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
224 happy.
225 (fldw, fldd, fstw, fstd, bb): Likewise.
226 (short loads/stores): Tweak format specifier slightly to keep
227 disassembler happy.
228 (indexed loads/stores): Likewise.
229 (absolute loads/stores): Likewise.
230
124ddbb2
AO
2312001-12-04 Alexandre Oliva <aoliva@redhat.com>
232
233 * d10v.h (OPERAND_NOSP): New macro.
234
9b21d49b
AO
2352001-11-29 Alexandre Oliva <aoliva@redhat.com>
236
237 * d10v.h (OPERAND_SP): New macro.
238
802a735e
AM
2392001-11-15 Alan Modra <amodra@bigpond.net.au>
240
241 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
242
6e917903
TW
2432001-11-11 Timothy Wall <twall@alum.mit.edu>
244
245 * tic54x.h: Revise opcode layout; don't really need a separate
246 structure for parallel opcodes.
247
e5470cdc
AM
2482001-11-13 Zack Weinberg <zack@codesourcery.com>
249 Alan Modra <amodra@bigpond.net.au>
250
251 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
252 accept WordReg.
253
5d84d93f
CD
2542001-11-04 Chris Demetriou <cgd@broadcom.com>
255
256 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
257
3c3bdf30
NC
2582001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
259
260 * mmix.h: New file.
261
e4432525
CD
2622001-10-18 Chris Demetriou <cgd@broadcom.com>
263
264 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
265 of the expression, to make source code merging easier.
266
8ff529d8
CD
2672001-10-17 Chris Demetriou <cgd@broadcom.com>
268
269 * mips.h: Sort coprocessor instruction argument characters
270 in comment, add a few more words of description for "H".
271
2228315b
CD
2722001-10-17 Chris Demetriou <cgd@broadcom.com>
273
274 * mips.h (INSN_SB1): New cpu-specific instruction bit.
275 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
276 if cpu is CPU_SB1.
277
f5c120c5
MG
2782001-10-17 matthew green <mrg@redhat.com>
279
280 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
281
418c1742
MG
2822001-10-12 matthew green <mrg@redhat.com>
283
0716ce0d
MG
284 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
285 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
286 instructions, respectively.
418c1742 287
6ff2f2ba
NC
2882001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
289
290 * v850.h: Remove spurious comment.
291
015cf428
NC
2922001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
293
294 * h8300.h: Fix compile time warning messages
295
847b8b31
RH
2962001-09-04 Richard Henderson <rth@redhat.com>
297
298 * alpha.h (struct alpha_operand): Pack elements into bitfields.
299
a98b9439
EC
3002001-08-31 Eric Christopher <echristo@redhat.com>
301
302 * mips.h: Remove CPU_MIPS32_4K.
303
a6959011
AM
3042001-08-27 Torbjorn Granlund <tege@swox.com>
305
306 * ppc.h (PPC_OPERAND_DS): Define.
307
d83c6548
AJ
3082001-08-25 Andreas Jaeger <aj@suse.de>
309
310 * d30v.h: Fix declaration of reg_name_cnt.
311
312 * d10v.h: Fix declaration of d10v_reg_name_cnt.
313
314 * arc.h: Add prototypes from opcodes/arc-opc.c.
315
99c14723
TS
3162001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
317
318 * mips.h (INSN_10000): Define.
319 (OPCODE_IS_MEMBER): Check for INSN_10000.
320
11b37b7b
AM
3212001-08-10 Alan Modra <amodra@one.net.au>
322
323 * ppc.h: Revert 2001-08-08.
324
3b16e843
NC
3252001-08-10 Richard Sandiford <rsandifo@redhat.com>
326
327 * mips.h (INSN_GP32): Remove.
328 (OPCODE_IS_MEMBER): Remove gp32 parameter.
329 (M_MOVE): New macro identifier.
330
0f1bac05
AM
3312001-08-08 Alan Modra <amodra@one.net.au>
332
333 1999-10-25 Torbjorn Granlund <tege@swox.com>
334 * ppc.h (struct powerpc_operand): New field `reloc'.
335
3b16e843
NC
3362001-08-01 Aldy Hernandez <aldyh@redhat.com>
337
338 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
339
3402001-07-12 Jeff Johnston <jjohnstn@redhat.com>
341
342 * cgen.h (CGEN_INSN): Add regex support.
343 (build_insn_regex): Declare.
344
81f6038f
FCE
3452001-07-11 Frank Ch. Eigler <fche@redhat.com>
346
347 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
348 (cgen_cpu_desc): Ditto.
349
32cfffe3
BE
3502001-07-07 Ben Elliston <bje@redhat.com>
351
352 * m88k.h: Clean up and reformat. Remove unused code.
353
3e890047
GK
3542001-06-14 Geoffrey Keating <geoffk@redhat.com>
355
356 * cgen.h (cgen_keyword): Add nonalpha_chars field.
357
d1cf510e
NC
3582001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
359
360 * mips.h (CPU_R12000): Define.
361
e281c457
JH
3622001-05-23 John Healy <jhealy@redhat.com>
363
364 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 365
aa5f19f2
NC
3662001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
367
368 * mips.h (INSN_ISA_MASK): Define.
369
67d6227d
AM
3702001-05-12 Alan Modra <amodra@one.net.au>
371
372 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
373 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
374 and use InvMem as these insns must have register operands.
375
992aaec9
AM
3762001-05-04 Alan Modra <amodra@one.net.au>
377
378 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
379 and pextrw to swap reg/rm assignments.
380
4ef7f0bf
HPN
3812001-04-05 Hans-Peter Nilsson <hp@axis.com>
382
383 * cris.h (enum cris_insn_version_usage): Correct comment for
384 cris_ver_v3p.
385
0f17484f
AM
3862001-03-24 Alan Modra <alan@linuxcare.com.au>
387
388 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
389 Add InvMem to first operand of "maskmovdqu".
390
7ccb5238
HPN
3912001-03-22 Hans-Peter Nilsson <hp@axis.com>
392
393 * cris.h (ADD_PC_INCR_OPCODE): New macro.
394
361bfa20
KH
3952001-03-21 Kazu Hirata <kazu@hxi.com>
396
397 * h8300.h: Fix formatting.
398
87890af0
AM
3992001-03-22 Alan Modra <alan@linuxcare.com.au>
400
401 * i386.h (i386_optab): Add paddq, psubq.
402
2e98d2de
AM
4032001-03-19 Alan Modra <alan@linuxcare.com.au>
404
405 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
406
80a523c2
NC
4072001-02-28 Igor Shevlyakov <igor@windriver.com>
408
409 * m68k.h: new defines for Coldfire V4. Update mcf to know
410 about mcf5407.
411
e135f41b
NC
4122001-02-18 lars brinkhoff <lars@nocrew.org>
413
414 * pdp11.h: New file.
415
4162001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
417
418 * i386.h (i386_optab): SSE integer converison instructions have
419 64bit versions on x86-64.
420
8eaec934
NC
4212001-02-10 Nick Clifton <nickc@redhat.com>
422
423 * mips.h: Remove extraneous whitespace. Formating change to allow
424 for future contribution.
425
a85d7ed0
NC
4262001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
427
428 * s390.h: New file.
429
0715dc88
PM
4302001-02-02 Patrick Macdonald <patrickm@redhat.com>
431
432 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
433 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
434 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
435
296bc568
AM
4362001-01-24 Karsten Keil <kkeil@suse.de>
437
438 * i386.h (i386_optab): Fix swapgs
439
1328dc98
AM
4402001-01-14 Alan Modra <alan@linuxcare.com.au>
441
442 * hppa.h: Describe new '<' and '>' operand types, and tidy
443 existing comments.
444 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
445 Remove duplicate "ldw j(s,b),x". Sort some entries.
446
e135f41b 4472001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
448
449 * i386.h (i386_optab): Fix pusha and ret templates.
450
0d2bcfaf
NC
4512001-01-11 Peter Targett <peter.targett@arccores.com>
452
453 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
454 definitions for masking cpu type.
455 (arc_ext_operand_value) New structure for storing extended
456 operands.
457 (ARC_OPERAND_*) Flags for operand values.
458
4592001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
460
461 * i386.h (pinsrw): Add.
462 (pshufw): Remove.
463 (cvttpd2dq): Fix operands.
464 (cvttps2dq): Likewise.
465 (movq2q): Rename to movdq2q.
466
079966a8
AM
4672001-01-10 Richard Schaal <richard.schaal@intel.com>
468
469 * i386.h: Correct movnti instruction.
470
8c1f9e76
JJ
4712001-01-09 Jeff Johnston <jjohnstn@redhat.com>
472
473 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
474 of operands (unsigned char or unsigned short).
475 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
476 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
477
0d2bcfaf 4782001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
479
480 * i386.h (i386_optab): Make [sml]fence template to use immext field.
481
0d2bcfaf 4822001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
483
484 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
485 introduced by Pentium4
486
0d2bcfaf 4872000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
488
489 * i386.h (i386_optab): Add "rex*" instructions;
490 add swapgs; disable jmp/call far direct instructions for
491 64bit mode; add syscall and sysret; disable registers for 0xc6
492 template. Add 'q' suffixes to extendable instructions, disable
079966a8 493 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
494 (i386_regtab): Add extended registers.
495 (*Suf): Add No_qSuf.
496 (q_Suf, wlq_Suf, bwlq_Suf): New.
497
0d2bcfaf 4982000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
499
500 * i386.h (i386_optab): Replace "Imm" with "EncImm".
501 (i386_regtab): Add flags field.
d83c6548 502
bf40d919
NC
5032000-12-12 Nick Clifton <nickc@redhat.com>
504
505 * mips.h: Fix formatting.
506
4372b673
NC
5072000-12-01 Chris Demetriou <cgd@sibyte.com>
508
509 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
510 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
511 OP_*_SYSCALL definitions.
512 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
513 19 bit wait codes.
514 (MIPS operand specifier comments): Remove 'm', add 'U' and
515 'J', and update the meaning of 'B' so that it's more general.
516
e7af610e
NC
517 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
518 INSN_ISA5): Renumber, redefine to mean the ISA at which the
519 instruction was added.
520 (INSN_ISA32): New constant.
521 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
522 Renumber to avoid new and/or renumbered INSN_* constants.
523 (INSN_MIPS32): Delete.
524 (ISA_UNKNOWN): New constant to indicate unknown ISA.
525 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
526 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 527 constants available at that ISA level.
e7af610e
NC
528 (CPU_UNKNOWN): New constant to indicate unknown CPU.
529 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
530 define it with a unique value.
531 (OPCODE_IS_MEMBER): Update for new ISA membership-related
532 constant meanings.
533
84ea6cf2 534 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 535 definitions.
84ea6cf2 536
c6c98b38
NC
537 * mips.h (CPU_SB1): New constant.
538
19f7b010
JJ
5392000-10-20 Jakub Jelinek <jakub@redhat.com>
540
541 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
542 Note that '3' is used for siam operand.
543
139368c9
JW
5442000-09-22 Jim Wilson <wilson@cygnus.com>
545
546 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
547
156c2f8b 5482000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 549
156c2f8b
NC
550 * mips.h: Use defines instead of hard-coded processor numbers.
551 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 552 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
553 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
554 CPU_4KC, CPU_4KM, CPU_4KP): Define..
555 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 556 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 557 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
558 Add 'P' to used characters.
559 Use 'H' for coprocessor select field.
156c2f8b 560 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
561 Document new arg characters and add to used characters.
562 (INSN_MIPS32): New define for MIPS32 extensions.
563 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 564
3c5ce02e
AM
5652000-09-05 Alan Modra <alan@linuxcare.com.au>
566
567 * hppa.h: Mention cz completer.
568
50b81f19
JW
5692000-08-16 Jim Wilson <wilson@cygnus.com>
570
571 * ia64.h (IA64_OPCODE_POSTINC): New.
572
fc29466d
L
5732000-08-15 H.J. Lu <hjl@gnu.org>
574
575 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
576 IgnoreSize change.
577
4f1d9bd8
NC
5782000-08-08 Jason Eckhardt <jle@cygnus.com>
579
580 * i860.h: Small formatting adjustments.
581
45ee1401
DC
5822000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
583
584 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
585 Move related opcodes closer to each other.
586 Minor changes in comments, list undefined opcodes.
587
9d551405
DB
5882000-07-26 Dave Brolley <brolley@redhat.com>
589
590 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
591
4f1d9bd8
NC
5922000-07-22 Jason Eckhardt <jle@cygnus.com>
593
594 * i860.h (btne, bte, bla): Changed these opcodes
595 to use sbroff ('r') instead of split16 ('s').
596 (J, K, L, M): New operand types for 16-bit aligned fields.
597 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
598 use I, J, K, L, M instead of just I.
599 (T, U): New operand types for split 16-bit aligned fields.
600 (st.x): Changed these opcodes to use S, T, U instead of just S.
601 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
602 exist on the i860.
603 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
604 (pfeq.ss, pfeq.dd): New opcodes.
605 (st.s): Fixed incorrect mask bits.
606 (fmlow): Fixed incorrect mask bits.
607 (fzchkl, pfzchkl): Fixed incorrect mask bits.
608 (faddz, pfaddz): Fixed incorrect mask bits.
609 (form, pform): Fixed incorrect mask bits.
610 (pfld.l): Fixed incorrect mask bits.
611 (fst.q): Fixed incorrect mask bits.
612 (all floating point opcodes): Fixed incorrect mask bits for
613 handling of dual bit.
614
c8488617
HPN
6152000-07-20 Hans-Peter Nilsson <hp@axis.com>
616
617 cris.h: New file.
618
65aa24b6
NC
6192000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
620
621 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
622 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
623 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
624 (AVR_ISA_M83): Define for ATmega83, ATmega85.
625 (espm): Remove, because ESPM removed in databook update.
626 (eicall, eijmp): Move to the end of opcode table.
627
60bcf0fa
NC
6282000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
629
630 * m68hc11.h: New file for support of Motorola 68hc11.
631
60a2978a
DC
632Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
633
634 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
635
68ab2dd9
DC
636Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
637
638 * avr.h: New file with AVR opcodes.
639
f0662e27
DL
640Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
641
642 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
643
b722f2be
AM
6442000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
645
646 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
647
f9e0cf0b
AM
6482000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
649
650 * i386.h: Use sl_FP, not sl_Suf for fild.
651
f660ee8b
FCE
6522000-05-16 Frank Ch. Eigler <fche@redhat.com>
653
654 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
655 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
656 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
657 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
658
558b0a60
AM
6592000-05-13 Alan Modra <alan@linuxcare.com.au>,
660
661 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
662
e413e4e9
AM
6632000-05-13 Alan Modra <alan@linuxcare.com.au>,
664 Alexander Sokolov <robocop@netlink.ru>
665
666 * i386.h (i386_optab): Add cpu_flags for all instructions.
667
6682000-05-13 Alan Modra <alan@linuxcare.com.au>
669
670 From Gavin Romig-Koch <gavin@cygnus.com>
671 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
672
5c84d377
TW
6732000-05-04 Timothy Wall <twall@cygnus.com>
674
675 * tic54x.h: New.
676
966f959b
C
6772000-05-03 J.T. Conklin <jtc@redback.com>
678
679 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
680 (PPC_OPERAND_VR): New operand flag for vector registers.
681
c5d05dbb
JL
6822000-05-01 Kazu Hirata <kazu@hxi.com>
683
684 * h8300.h (EOP): Add missing initializer.
685
a7fba0e0
JL
686Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
687
688 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
689 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
690 New operand types l,y,&,fe,fE,fx added to support above forms.
691 (pa_opcodes): Replaced usage of 'x' as source/target for
692 floating point double-word loads/stores with 'fx'.
693
800eeca4
JW
694Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
695 David Mosberger <davidm@hpl.hp.com>
696 Timothy Wall <twall@cygnus.com>
697 Jim Wilson <wilson@cygnus.com>
698
699 * ia64.h: New file.
700
ba23e138
NC
7012000-03-27 Nick Clifton <nickc@cygnus.com>
702
703 * d30v.h (SHORT_A1): Fix value.
704 (SHORT_AR): Renumber so that it is at the end of the list of short
705 instructions, not the end of the list of long instructions.
706
d0b47220
AM
7072000-03-26 Alan Modra <alan@linuxcare.com>
708
709 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
710 problem isn't really specific to Unixware.
711 (OLDGCC_COMPAT): Define.
712 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
713 destination %st(0).
714 Fix lots of comments.
715
866afedc
NC
7162000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
717
718 * d30v.h:
719 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
720 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
721 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
722 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
723 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
724 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
725 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
726
cc5ca5ce
AM
7272000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
728
729 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
730 fistpd without suffix.
731
68e324a2
NC
7322000-02-24 Nick Clifton <nickc@cygnus.com>
733
734 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
735 'signed_overflow_ok_p'.
736 Delete prototypes for cgen_set_flags() and cgen_get_flags().
737
60f036a2
AH
7382000-02-24 Andrew Haley <aph@cygnus.com>
739
740 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
741 (CGEN_CPU_TABLE): flags: new field.
742 Add prototypes for new functions.
d83c6548 743
9b9b5cd4
AM
7442000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
745
746 * i386.h: Add some more UNIXWARE_COMPAT comments.
747
5b93d8bb
AM
7482000-02-23 Linas Vepstas <linas@linas.org>
749
750 * i370.h: New file.
751
4f1d9bd8
NC
7522000-02-22 Chandra Chavva <cchavva@cygnus.com>
753
754 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
755 cannot be combined in parallel with ADD/SUBppp.
756
87f398dd
AH
7572000-02-22 Andrew Haley <aph@cygnus.com>
758
759 * mips.h: (OPCODE_IS_MEMBER): Add comment.
760
367c01af
AH
7611999-12-30 Andrew Haley <aph@cygnus.com>
762
9a1e79ca
AH
763 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
764 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
765 insns.
367c01af 766
add0c677
AM
7672000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
768
769 * i386.h: Qualify intel mode far call and jmp with x_Suf.
770
3138f287
AM
7711999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
772
773 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
774 indirect jumps and calls. Add FF/3 call for intel mode.
775
ccecd07b
JL
776Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
777
778 * mn10300.h: Add new operand types. Add new instruction formats.
779
b37e19e9
JL
780Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
781
782 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
783 instruction.
784
5fce5ddf
GRK
7851999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
786
787 * mips.h (INSN_ISA5): New.
788
2bd7f1f3
GRK
7891999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
790
791 * mips.h (OPCODE_IS_MEMBER): New.
792
4df2b5c5
NC
7931999-10-29 Nick Clifton <nickc@cygnus.com>
794
795 * d30v.h (SHORT_AR): Define.
796
446a06c9
MM
7971999-10-18 Michael Meissner <meissner@cygnus.com>
798
799 * alpha.h (alpha_num_opcodes): Convert to unsigned.
800 (alpha_num_operands): Ditto.
801
eca04c6a
JL
802Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
803
804 * hppa.h (pa_opcodes): Add load and store cache control to
805 instructions. Add ordered access load and store.
806
807 * hppa.h (pa_opcode): Add new entries for addb and addib.
808
809 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
810
811 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
812
c43185de
DN
813Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
814
815 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
816
ec3533da
JL
817Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
818
390f858d
JL
819 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
820 and "be" using completer prefixes.
821
8c47ebd9
JL
822 * hppa.h (pa_opcodes): Add initializers to silence compiler.
823
ec3533da
JL
824 * hppa.h: Update comments about character usage.
825
18369bea
JL
826Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
827
828 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
829 up the new fstw & bve instructions.
830
c36efdd2
JL
831Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
832
d3ffb032
JL
833 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
834 instructions.
835
c49ec3da
JL
836 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
837
5d2e7ecc
JL
838 * hppa.h (pa_opcodes): Add long offset double word load/store
839 instructions.
840
6397d1a2
JL
841 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
842 stores.
843
142f0fe0
JL
844 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
845
f5a68b45
JL
846 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
847
8235801e
JL
848 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
849
35184366
JL
850 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
851
f0bfde5e
JL
852 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
853
27bbbb58
JL
854 * hppa.h (pa_opcodes): Add support for "b,l".
855
c36efdd2
JL
856 * hppa.h (pa_opcodes): Add support for "b,gate".
857
f2727d04
JL
858Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
859
9392fb11 860 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 861 in xmpyu.
9392fb11 862
e0c52e99
JL
863 * hppa.h (pa_opcodes): Fix mask for probe and probei.
864
f2727d04
JL
865 * hppa.h (pa_opcodes): Fix mask for depwi.
866
52d836e2
JL
867Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
868
869 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
870 an explicit output argument.
871
90765e3a
JL
872Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
873
874 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
875 Add a few PA2.0 loads and store variants.
876
8340b17f
ILT
8771999-09-04 Steve Chamberlain <sac@pobox.com>
878
879 * pj.h: New file.
880
5f47d35b
AM
8811999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
882
883 * i386.h (i386_regtab): Move %st to top of table, and split off
884 other fp reg entries.
885 (i386_float_regtab): To here.
886
1c143202
JL
887Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
888
7d8fdb64
JL
889 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
890 by 'f'.
891
90927b9c
JL
892 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
893 Add supporting args.
894
1d16bf9c
JL
895 * hppa.h: Document new completers and args.
896 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
897 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
898 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
899 pmenb and pmdis.
900
96226a68
JL
901 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
902 hshr, hsub, mixh, mixw, permh.
903
5d4ba527
JL
904 * hppa.h (pa_opcodes): Change completers in instructions to
905 use 'c' prefix.
906
e9fc28c6
JL
907 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
908 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
909
1c143202
JL
910 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
911 fnegabs to use 'I' instead of 'F'.
912
9e525108
AM
9131999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
914
915 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
916 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
917 Alphabetically sort PIII insns.
918
e8da1bf1
DE
919Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
920
921 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
922
7d627258
JL
923Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
924
5696871a
JL
925 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
926 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
927
7d627258
JL
928 * hppa.h: Document 64 bit condition completers.
929
c5e52916
JL
930Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
931
932 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
933
eecb386c
AM
9341999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
935
936 * i386.h (i386_optab): Add DefaultSize modifier to all insns
937 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
938 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
939
88a380f3
JL
940Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
941 Jeff Law <law@cygnus.com>
942
943 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
944
945 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 946
d83c6548 947 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
948 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
949
145cf1f0
AM
9501999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
951
952 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
953
73826640
JL
954Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
955
956 * hppa.h (struct pa_opcode): Add new field "flags".
957 (FLAGS_STRICT): Define.
958
b65db252
JL
959Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
960 Jeff Law <law@cygnus.com>
961
f7fc668b
JL
962 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
963
964 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 965
10084519
AM
9661999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
967
968 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
969 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
970 flag to fcomi and friends.
971
cd8a80ba
JL
972Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
973
974 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 975 integer logical instructions.
cd8a80ba 976
1fca749b
ILT
9771999-05-28 Linus Nordberg <linus.nordberg@canit.se>
978
979 * m68k.h: Document new formats `E', `G', `H' and new places `N',
980 `n', `o'.
981
982 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
983 and new places `m', `M', `h'.
984
aa008907
JL
985Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
986
987 * hppa.h (pa_opcodes): Add several processor specific system
988 instructions.
989
e26b85f0
JL
990Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
991
d83c6548 992 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
993 "addb", and "addib" to be used by the disassembler.
994
c608c12e
AM
9951999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
996
997 * i386.h (ReverseModrm): Remove all occurences.
998 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
999 movmskps, pextrw, pmovmskb, maskmovq.
1000 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1001 ignore the data size prefix.
1002
1003 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1004 Mostly stolen from Doug Ledford <dledford@redhat.com>
1005
45c18104
RH
1006Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1007
1008 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1009
252b5132
RH
10101999-04-14 Doug Evans <devans@casey.cygnus.com>
1011
1012 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1013 (CGEN_ATTR_TYPE): Update.
1014 (CGEN_ATTR_MASK): Number booleans starting at 0.
1015 (CGEN_ATTR_VALUE): Update.
1016 (CGEN_INSN_ATTR): Update.
1017
1018Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1019
1020 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1021 instructions.
1022
1023Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1024
1025 * hppa.h (bb, bvb): Tweak opcode/mask.
1026
1027
10281999-03-22 Doug Evans <devans@casey.cygnus.com>
1029
1030 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1031 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1032 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1033 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1034 Delete member max_insn_size.
1035 (enum cgen_cpu_open_arg): New enum.
1036 (cpu_open): Update prototype.
1037 (cpu_open_1): Declare.
1038 (cgen_set_cpu): Delete.
1039
10401999-03-11 Doug Evans <devans@casey.cygnus.com>
1041
1042 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1043 (CGEN_OPERAND_NIL): New macro.
1044 (CGEN_OPERAND): New member `type'.
1045 (@arch@_cgen_operand_table): Delete decl.
1046 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1047 (CGEN_OPERAND_TABLE): New struct.
1048 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1049 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1050 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1051 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1052 {get,set}_{int,vma}_operand.
1053 (@arch@_cgen_cpu_open): New arg `isa'.
1054 (cgen_set_cpu): Ditto.
1055
1056Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1057
1058 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1059
10601999-02-25 Doug Evans <devans@casey.cygnus.com>
1061
1062 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1063 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1064 enum cgen_hw_type.
1065 (CGEN_HW_TABLE): New struct.
1066 (hw_table): Delete declaration.
1067 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1068 to table entry to enum.
1069 (CGEN_OPINST): Ditto.
1070 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1071
1072Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1073
1074 * alpha.h (AXP_OPCODE_EV6): New.
1075 (AXP_OPCODE_NOPAL): Include it.
1076
10771999-02-09 Doug Evans <devans@casey.cygnus.com>
1078
1079 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1080 All uses updated. New members int_insn_p, max_insn_size,
1081 parse_operand,insert_operand,extract_operand,print_operand,
1082 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1083 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1084 extract_handlers,print_handlers.
1085 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1086 (CGEN_ATTR_BOOL_OFFSET): New macro.
1087 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1088 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1089 (cgen_opcode_handler): Renamed from cgen_base.
1090 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1091 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1092 all uses updated.
1093 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1094 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1095 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1096 (CGEN_OPCODE,CGEN_IBASE): New types.
1097 (CGEN_INSN): Rewrite.
1098 (CGEN_{ASM,DIS}_HASH*): Delete.
1099 (init_opcode_table,init_ibld_table): Declare.
1100 (CGEN_INSN_ATTR): New type.
1101
1102Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1103
252b5132
RH
1104 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1105 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1106 Change *Suf definitions to include x and d suffixes.
1107 (movsx): Use w_Suf and b_Suf.
1108 (movzx): Likewise.
1109 (movs): Use bwld_Suf.
1110 (fld): Change ordering. Use sld_FP.
1111 (fild): Add Intel Syntax equivalent of fildq.
1112 (fst): Use sld_FP.
1113 (fist): Use sld_FP.
1114 (fstp): Use sld_FP. Add x_FP version.
1115 (fistp): LLongMem version for Intel Syntax.
1116 (fcom, fcomp): Use sld_FP.
1117 (fadd, fiadd, fsub): Use sld_FP.
1118 (fsubr): Use sld_FP.
1119 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1120
11211999-01-27 Doug Evans <devans@casey.cygnus.com>
1122
1123 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1124 CGEN_MODE_UINT.
1125
e135f41b 11261999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1127
1128 * hppa.h (bv): Fix mask.
1129
11301999-01-05 Doug Evans <devans@casey.cygnus.com>
1131
1132 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1133 (CGEN_ATTR): Use it.
1134 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1135 (CGEN_ATTR_TABLE): New member dfault.
1136
11371998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1138
1139 * mips.h (MIPS16_INSN_BRANCH): New.
1140
1141Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1142
1143 The following is part of a change made by Edith Epstein
d83c6548
AJ
1144 <eepstein@sophia.cygnus.com> as part of a project to merge in
1145 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1146
1147 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1148 after.
252b5132
RH
1149
1150Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1151
1152 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1153 status word instructions.
252b5132
RH
1154
11551998-11-30 Doug Evans <devans@casey.cygnus.com>
1156
1157 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1158 (struct cgen_keyword_entry): Ditto.
1159 (struct cgen_operand): Ditto.
1160 (CGEN_IFLD): New typedef, with associated access macros.
1161 (CGEN_IFMT): New typedef, with associated access macros.
1162 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1163 (CGEN_IVALUE): New typedef.
1164 (struct cgen_insn): Delete const on syntax,attrs members.
1165 `format' now points to format data. Type of `value' is now
1166 CGEN_IVALUE.
1167 (struct cgen_opcode_table): New member ifld_table.
1168
11691998-11-18 Doug Evans <devans@casey.cygnus.com>
1170
1171 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1172 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1173 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1174 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1175 (cgen_opcode_table): Update type of dis_hash fn.
1176 (extract_operand): Update type of `insn_value' arg.
1177
1178Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1179
1180 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1181
1182Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1183
1184 * mips.h (INSN_MULT): Added.
1185
1186Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1187
1188 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1189
1190Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1191
1192 * cgen.h (CGEN_INSN_INT): New typedef.
1193 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1194 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1195 (CGEN_INSN_BYTES_PTR): New typedef.
1196 (CGEN_EXTRACT_INFO): New typedef.
1197 (cgen_insert_fn,cgen_extract_fn): Update.
1198 (cgen_opcode_table): New member `insn_endian'.
1199 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1200 (insert_operand,extract_operand): Update.
1201 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1202
1203Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1204
1205 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1206 (struct CGEN_HW_ENTRY): New member `attrs'.
1207 (CGEN_HW_ATTR): New macro.
1208 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1209 (CGEN_INSN_INVALID_P): New macro.
1210
1211Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1212
1213 * hppa.h: Add "fid".
d83c6548 1214
252b5132
RH
1215Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1216
1217 From Robert Andrew Dale <rob@nb.net>
1218 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1219 (AMD_3DNOW_OPCODE): Define.
1220
1221Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1222
1223 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1224
1225Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1226
1227 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1228
1229Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1230
1231 Move all global state data into opcode table struct, and treat
1232 opcode table as something that is "opened/closed".
1233 * cgen.h (CGEN_OPCODE_DESC): New type.
1234 (all fns): New first arg of opcode table descriptor.
1235 (cgen_set_parse_operand_fn): Add prototype.
1236 (cgen_current_machine,cgen_current_endian): Delete.
1237 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1238 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1239 dis_hash_table,dis_hash_table_entries.
1240 (opcode_open,opcode_close): Add prototypes.
1241
1242 * cgen.h (cgen_insn): New element `cdx'.
1243
1244Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1245
1246 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1247
1248Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1249
1250 * mn10300.h: Add "no_match_operands" field for instructions.
1251 (MN10300_MAX_OPERANDS): Define.
1252
1253Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1254
1255 * cgen.h (cgen_macro_insn_count): Declare.
1256
1257Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1258
1259 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1260 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1261 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1262 set_{int,vma}_operand.
1263
1264Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1265
1266 * mn10300.h: Add "machine" field for instructions.
1267 (MN103, AM30): Define machine types.
d83c6548 1268
252b5132
RH
1269Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1270
1271 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1272
12731998-06-18 Ulrich Drepper <drepper@cygnus.com>
1274
1275 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1276
1277Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1278
1279 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1280 and ud2b.
1281 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1282 those that happen to be implemented on pentiums.
1283
1284Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1285
1286 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1287 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1288 with Size16|IgnoreSize or Size32|IgnoreSize.
1289
1290Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1291
1292 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1293 (REPE): Rename to REPE_PREFIX_OPCODE.
1294 (i386_regtab_end): Remove.
1295 (i386_prefixtab, i386_prefixtab_end): Remove.
1296 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1297 of md_begin.
1298 (MAX_OPCODE_SIZE): Define.
1299 (i386_optab_end): Remove.
1300 (sl_Suf): Define.
1301 (sl_FP): Use sl_Suf.
1302
1303 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1304 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1305 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1306 data32, dword, and adword prefixes.
1307 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1308 regs.
1309
1310Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1311
1312 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1313
1314 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1315 register operands, because this is a common idiom. Flag them with
1316 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1317 fdivrp because gcc erroneously generates them. Also flag with a
1318 warning.
1319
1320 * i386.h: Add suffix modifiers to most insns, and tighter operand
1321 checks in some cases. Fix a number of UnixWare compatibility
1322 issues with float insns. Merge some floating point opcodes, using
1323 new FloatMF modifier.
1324 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1325 consistency.
1326
1327 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1328 IgnoreDataSize where appropriate.
1329
1330Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1331
1332 * i386.h: (one_byte_segment_defaults): Remove.
1333 (two_byte_segment_defaults): Remove.
1334 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1335
1336Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1337
1338 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1339 (cgen_hw_lookup_by_num): Declare.
1340
1341Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1342
1343 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1344 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1345
1346Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1347
1348 * cgen.h (cgen_asm_init_parse): Delete.
1349 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1350 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1351
1352Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1353
1354 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1355 (cgen_asm_finish_insn): Update prototype.
1356 (cgen_insn): New members num, data.
1357 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1358 dis_hash, dis_hash_table_size moved to ...
1359 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1360 All uses updated. New members asm_hash_p, dis_hash_p.
1361 (CGEN_MINSN_EXPANSION): New struct.
1362 (cgen_expand_macro_insn): Declare.
1363 (cgen_macro_insn_count): Declare.
1364 (get_insn_operands): Update prototype.
1365 (lookup_get_insn_operands): Declare.
1366
1367Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1368
1369 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1370 regKludge. Add operands types for string instructions.
1371
1372Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1373
1374 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1375 table.
1376
1377Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1378
1379 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1380 for `gettext'.
1381
1382Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1383
1384 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1385 Add IsString flag to string instructions.
1386 (IS_STRING): Don't define.
1387 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1388 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1389 (SS_PREFIX_OPCODE): Define.
1390
1391Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1392
1393 * i386.h: Revert March 24 patch; no more LinearAddress.
1394
1395Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1396
1397 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1398 instructions, and instead add FWait opcode modifier. Add short
1399 form of fldenv and fstenv.
1400 (FWAIT_OPCODE): Define.
1401
1402 * i386.h (i386_optab): Change second operand constraint of `mov
1403 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1404 allow legal instructions such as `movl %gs,%esi'
1405
1406Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1407
1408 * h8300.h: Various changes to fully bracket initializers.
1409
1410Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1411
1412 * i386.h: Set LinearAddress for lidt and lgdt.
1413
1414Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1415
1416 * cgen.h (CGEN_BOOL_ATTR): New macro.
1417
1418Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1419
1420 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1421
1422Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1423
1424 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1425 (cgen_insn): Record syntax and format entries here, rather than
1426 separately.
1427
1428Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1429
1430 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1431
1432Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1433
1434 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1435 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1436 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1437
1438Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1439
1440 * cgen.h (lookup_insn): New argument alias_p.
1441
1442Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1443
1444Fix rac to accept only a0:
1445 * d10v.h (OPERAND_ACC): Split into:
1446 (OPERAND_ACC0, OPERAND_ACC1) .
1447 (OPERAND_GPR): Define.
1448
1449Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1450
1451 * cgen.h (CGEN_FIELDS): Define here.
1452 (CGEN_HW_ENTRY): New member `type'.
1453 (hw_list): Delete decl.
1454 (enum cgen_mode): Declare.
1455 (CGEN_OPERAND): New member `hw'.
1456 (enum cgen_operand_instance_type): Declare.
1457 (CGEN_OPERAND_INSTANCE): New type.
1458 (CGEN_INSN): New member `operands'.
1459 (CGEN_OPCODE_DATA): Make hw_list const.
1460 (get_insn_operands,lookup_insn): Add prototypes for.
1461
1462Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1463
1464 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1465 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1466 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1467 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1468
1469Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1470
1471 * cgen.h: Correct typo in comment end marker.
1472
1473Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1474
1475 * tic30.h: New file.
1476
5a109b67 1477Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1478
1479 * cgen.h: Add prototypes for cgen_save_fixups(),
1480 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1481 of cgen_asm_finish_insn() to return a char *.
1482
1483Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1484
1485 * cgen.h: Formatting changes to improve readability.
1486
1487Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1488
1489 * cgen.h (*): Clean up pass over `struct foo' usage.
1490 (CGEN_ATTR): Make unsigned char.
1491 (CGEN_ATTR_TYPE): Update.
1492 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1493 (cgen_base): Move member `attrs' to cgen_insn.
1494 (CGEN_KEYWORD): New member `null_entry'.
1495 (CGEN_{SYNTAX,FORMAT}): New types.
1496 (cgen_insn): Format and syntax separated from each other.
1497
1498Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1499
1500 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1501 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1502 flags_{used,set} long.
1503 (d30v_operand): Make flags field long.
1504
1505Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1506
1507 * m68k.h: Fix comment describing operand types.
1508
1509Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1510
1511 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1512 everything else after down.
1513
1514Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1515
1516 * d10v.h (OPERAND_FLAG): Split into:
1517 (OPERAND_FFLAG, OPERAND_CFLAG) .
1518
1519Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1520
1521 * mips.h (struct mips_opcode): Changed comments to reflect new
1522 field usage.
1523
1524Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1525
1526 * mips.h: Added to comments a quick-ref list of all assigned
1527 operand type characters.
1528 (OP_{MASK,SH}_PERFREG): New macros.
1529
1530Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1531
1532 * sparc.h: Add '_' and '/' for v9a asr's.
1533 Patch from David Miller <davem@vger.rutgers.edu>
1534
1535Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1536
1537 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1538 area are not available in the base model (H8/300).
1539
1540Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1541
1542 * m68k.h: Remove documentation of ` operand specifier.
1543
1544Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1545
1546 * m68k.h: Document q and v operand specifiers.
1547
1548Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1549
1550 * v850.h (struct v850_opcode): Add processors field.
1551 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1552 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1553 (PROCESSOR_V850EA): New bit constants.
1554
1555Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1556
1557 Merge changes from Martin Hunt:
1558
1559 * d30v.h: Allow up to 64 control registers. Add
1560 SHORT_A5S format.
1561
1562 * d30v.h (LONG_Db): New form for delayed branches.
1563
1564 * d30v.h: (LONG_Db): New form for repeati.
1565
1566 * d30v.h (SHORT_D2B): New form.
1567
1568 * d30v.h (SHORT_A2): New form.
1569
1570 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1571 registers are used. Needed for VLIW optimization.
1572
1573Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1574
1575 * cgen.h: Move assembler interface section
1576 up so cgen_parse_operand_result is defined for cgen_parse_address.
1577 (cgen_parse_address): Update prototype.
1578
1579Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1580
1581 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1582
1583Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1584
1585 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1586 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1587 <paubert@iram.es>.
1588
1589 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1590 <paubert@iram.es>.
1591
1592 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1593 <paubert@iram.es>.
1594
1595 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1596 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1597
1598Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1599
1600 * v850.h (V850_NOT_R0): New flag.
1601
1602Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1603
1604 * v850.h (struct v850_opcode): Remove flags field.
1605
1606Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1607
1608 * v850.h (struct v850_opcode): Add flags field.
1609 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1610 fields.
1611 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1612 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1613
1614Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1615
1616 * arc.h: New file.
1617
1618Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1619
1620 * sparc.h (sparc_opcodes): Declare as const.
1621
1622Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1623
1624 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1625 uses single or double precision floating point resources.
1626 (INSN_NO_ISA, INSN_ISA1): Define.
1627 (cpu specific INSN macros): Tweak into bitmasks outside the range
1628 of INSN_ISA field.
1629
1630Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1631
1632 * i386.h: Fix pand opcode.
1633
1634Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1635
1636 * mips.h: Widen INSN_ISA and move it to a more convenient
1637 bit position. Add INSN_3900.
1638
1639Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1640
1641 * mips.h (struct mips_opcode): added new field membership.
1642
1643Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1644
1645 * i386.h (movd): only Reg32 is allowed.
1646
1647 * i386.h: add fcomp and ud2. From Wayne Scott
1648 <wscott@ichips.intel.com>.
1649
1650Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1651
1652 * i386.h: Add MMX instructions.
1653
1654Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1655
1656 * i386.h: Remove W modifier from conditional move instructions.
1657
1658Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1659
1660 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1661 with no arguments to match that generated by the UnixWare
1662 assembler.
1663
1664Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1665
1666 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1667 (cgen_parse_operand_fn): Declare.
1668 (cgen_init_parse_operand): Declare.
1669 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1670 new argument `want'.
1671 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1672 (enum cgen_parse_operand_type): New enum.
1673
1674Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1675
1676 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1677
1678Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1679
1680 * cgen.h: New file.
1681
1682Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1683
1684 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1685 fdivrp.
1686
1687Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1688
1689 * v850.h (extract): Make unsigned.
1690
1691Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1692
1693 * i386.h: Add iclr.
1694
1695Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1696
1697 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1698 take a direction bit.
1699
1700Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1701
1702 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1703
1704Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1705
1706 * sparc.h: Include <ansidecl.h>. Update function declarations to
1707 use prototypes, and to use const when appropriate.
1708
1709Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1710
1711 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1712
1713Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1714
1715 * d10v.h: Change pre_defined_registers to
1716 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1717
1718Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1719
1720 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1721 Change mips_opcodes from const array to a pointer,
1722 and change bfd_mips_num_opcodes from const int to int,
1723 so that we can increase the size of the mips opcodes table
1724 dynamically.
1725
1726Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1727
1728 * d30v.h (FLAG_X): Remove unused flag.
1729
1730Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1731
1732 * d30v.h: New file.
1733
1734Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1735
1736 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1737 (PDS_VALUE): Macro to access value field of predefined symbols.
1738 (tic80_next_predefined_symbol): Add prototype.
1739
1740Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1741
1742 * tic80.h (tic80_symbol_to_value): Change prototype to match
1743 change in function, added class parameter.
1744
1745Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1746
1747 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1748 endmask fields, which are somewhat weird in that 0 and 32 are
1749 treated exactly the same.
1750
1751Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1752
1753 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1754 rather than a constant that is 2**X. Reorder them to put bits for
1755 operands that have symbolic names in the upper bits, so they can
1756 be packed into an int where the lower bits contain the value that
1757 corresponds to that symbolic name.
1758 (predefined_symbo): Add struct.
1759 (tic80_predefined_symbols): Declare array of translations.
1760 (tic80_num_predefined_symbols): Declare size of that array.
1761 (tic80_value_to_symbol): Declare function.
1762 (tic80_symbol_to_value): Declare function.
1763
1764Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1765
1766 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1767
1768Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1769
1770 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1771 be the destination register.
1772
1773Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1774
1775 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1776 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1777 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1778 that the opcode can have two vector instructions in a single
1779 32 bit word and we have to encode/decode both.
1780
1781Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1782
1783 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1784 TIC80_OPERAND_RELATIVE for PC relative.
1785 (TIC80_OPERAND_BASEREL): New flag bit for register
1786 base relative.
1787
1788Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1789
1790 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1791
1792Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1793
1794 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1795 ":s" modifier for scaling.
1796
1797Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1798
1799 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1800 (TIC80_OPERAND_M_LI): Ditto
1801
1802Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1803
1804 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1805 (TIC80_OPERAND_CC): New define for condition code operand.
1806 (TIC80_OPERAND_CR): New define for control register operand.
1807
1808Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1809
1810 * tic80.h (struct tic80_opcode): Name changed.
1811 (struct tic80_opcode): Remove format field.
1812 (struct tic80_operand): Add insertion and extraction functions.
1813 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1814 correct ones.
1815 (FMT_*): Ditto.
1816
1817Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1818
1819 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1820 type IV instruction offsets.
1821
1822Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1823
1824 * tic80.h: New file.
1825
1826Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1827
1828 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1829
1830Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1831
1832 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1833 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1834 * v850.h: Fix comment, v850_operand not powerpc_operand.
1835
1836Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1837
1838 * mn10200.h: Flesh out structures and definitions needed by
1839 the mn10200 assembler & disassembler.
1840
1841Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1842
1843 * mips.h: Add mips16 definitions.
1844
1845Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1846
1847 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1848
1849Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1850
1851 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1852 (MN10300_OPERAND_MEMADDR): Define.
1853
1854Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1855
1856 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1857
1858Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1859
1860 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1861
1862Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1863
1864 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1865
1866Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1867
1868 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1869
1870Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1871
1872 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1873 negative to minimize problems with shared libraries. Organize
1874 instruction subsets by AMASK extensions and PALcode
1875 implementation.
252b5132
RH
1876 (struct alpha_operand): Move flags slot for better packing.
1877
1878Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1879
1880 * v850.h (V850_OPERAND_RELAX): New operand flag.
1881
1882Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1883
1884 * mn10300.h (FMT_*): Move operand format definitions
1885 here.
1886
1887Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1888
1889 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1890
1891Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1892
1893 * mn10300.h (mn10300_opcode): Add "format" field.
1894 (MN10300_OPERAND_*): Define.
1895
1896Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1897
1898 * mn10x00.h: Delete.
1899 * mn10200.h, mn10300.h: New files.
1900
1901Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1902
1903 * mn10x00.h: New file.
1904
1905Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1906
1907 * v850.h: Add new flag to indicate this instruction uses a PC
1908 displacement.
1909
1910Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1911
1912 * h8300.h (stmac): Add missing instruction.
1913
1914Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1915
1916 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1917 field.
1918
1919Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1920
1921 * v850.h (V850_OPERAND_EP): Define.
1922
1923 * v850.h (v850_opcode): Add size field.
1924
1925Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1926
1927 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1928 to functions used to handle unusual operand encoding.
252b5132 1929 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1930 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1931
1932Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1933
1934 * v850.h (v850_operands): Add flags field.
1935 (OPERAND_REG, OPERAND_NUM): Defined.
1936
1937Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1938
1939 * v850.h: New file.
1940
1941Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1942
1943 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1944 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1945 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1946 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1947 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1948 Defined.
252b5132
RH
1949
1950Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1951
1952 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1953 a 3 bit space id instead of a 2 bit space id.
1954
1955Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1956
1957 * d10v.h: Add some additional defines to support the
d83c6548 1958 assembler in determining which operations can be done in parallel.
252b5132
RH
1959
1960Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1961
1962 * h8300.h (SN): Define.
1963 (eepmov.b): Renamed from "eepmov"
1964 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1965 with them.
1966
1967Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1968
1969 * d10v.h (OPERAND_SHIFT): New operand flag.
1970
1971Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1972
1973 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1974 signed numbers.
252b5132
RH
1975
1976Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1977
1978 * d10v.h (pd_reg): Define. Putting the definition here allows
1979 the assembler and disassembler to share the same struct.
1980
1981Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1982
1983 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1984 Williams <steve@icarus.com>.
1985
1986Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1987
1988 * d10v.h: New file.
1989
1990Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1991
1992 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1993
1994Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1995
d83c6548 1996 * m68k.h (mcf5200): New macro.
252b5132
RH
1997 Document names of coldfire control registers.
1998
1999Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2000
2001 * h8300.h (SRC_IN_DST): Define.
2002
2003 * h8300.h (UNOP3): Mark the register operand in this insn
2004 as a source operand, not a destination operand.
2005 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2006 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2007 register operand with SRC_IN_DST.
2008
2009Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2010
2011 * alpha.h: New file.
2012
2013Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2014
2015 * rs6k.h: Remove obsolete file.
2016
2017Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2018
2019 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2020 fdivp, and fdivrp. Add ffreep.
2021
2022Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2023
2024 * h8300.h: Reorder various #defines for readability.
2025 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2026 (BITOP): Accept additional (unused) argument. All callers changed.
2027 (EBITOP): Likewise.
2028 (O_LAST): Bump.
2029 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2030
2031 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2032 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2033 (BITOP, EBITOP): Handle new H8/S addressing modes for
2034 bit insns.
2035 (UNOP3): Handle new shift/rotate insns on the H8/S.
2036 (insns using exr): New instructions.
2037 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2038
2039Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2040
2041 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2042 was incorrect.
2043
2044Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2045
2046 * h8300.h (START): Remove.
2047 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2048 and mov.l insns that can be relaxed.
2049
2050Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2051
2052 * i386.h: Remove Abs32 from lcall.
2053
2054Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2055
2056 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2057 (SLCPOP): New macro.
2058 Mark X,Y opcode letters as in use.
2059
2060Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2061
2062 * sparc.h (F_FLOAT, F_FBR): Define.
2063
2064Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2065
2066 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2067 from all insns.
2068 (ABS8SRC,ABS8DST): Add ABS8MEM.
2069 (add.l): Fix reg+reg variant.
2070 (eepmov.w): Renamed from eepmovw.
2071 (ldc,stc): Fix many cases.
2072
2073Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2074
2075 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2076
2077Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2078
2079 * sparc.h (O): Mark operand letter as in use.
2080
2081Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2082
2083 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2084 Mark operand letters uU as in use.
2085
2086Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2087
2088 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2089 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2090 (SPARC_OPCODE_SUPPORTED): New macro.
2091 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2092 (F_NOTV9): Delete.
2093
2094Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2095
2096 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2097 declaration consistent with return type in definition.
2098
2099Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2100
2101 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2102
2103Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2104
2105 * i386.h (i386_regtab): Add 80486 test registers.
2106
2107Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2108
2109 * i960.h (I_HX): Define.
2110 (i960_opcodes): Add HX instruction.
2111
2112Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2113
2114 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2115 and fclex.
2116
2117Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2118
2119 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2120 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2121 (bfd_* defines): Delete.
2122 (sparc_opcode_archs): Replaces architecture_pname.
2123 (sparc_opcode_lookup_arch): Declare.
2124 (NUMOPCODES): Delete.
2125
2126Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2127
2128 * sparc.h (enum sparc_architecture): Add v9a.
2129 (ARCHITECTURES_CONFLICT_P): Update.
2130
2131Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2132
2133 * i386.h: Added Pentium Pro instructions.
2134
2135Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2136
2137 * m68k.h: Document new 'W' operand place.
2138
2139Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2140
2141 * hppa.h: Add lci and syncdma instructions.
2142
2143Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2144
2145 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2146 instructions.
252b5132
RH
2147
2148Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2149
2150 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2151 assembler's -mcom and -many switches.
2152
2153Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2154
2155 * i386.h: Fix cmpxchg8b extension opcode description.
2156
2157Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2158
2159 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2160 and register cr4.
2161
2162Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2163
2164 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2165
2166Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2167
2168 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2169
2170Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2171
2172 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2173
2174Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2175
2176 * m68kmri.h: Remove.
2177
2178 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2179 declarations. Remove F_ALIAS and flag field of struct
2180 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2181 int. Make name and args fields of struct m68k_opcode const.
2182
2183Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2184
2185 * sparc.h (F_NOTV9): Define.
2186
2187Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2188
2189 * mips.h (INSN_4010): Define.
2190
2191Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2192
2193 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2194
2195 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2196 * m68k.h: Fix argument descriptions of coprocessor
2197 instructions to allow only alterable operands where appropriate.
2198 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2199 (m68k_opcode_aliases): Add more aliases.
2200
2201Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2202
2203 * m68k.h: Added explcitly short-sized conditional branches, and a
2204 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2205 svr4-based configurations.
2206
2207Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2208
2209 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2210 * i386.h: added missing Data16/Data32 flags to a few instructions.
2211
2212Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2213
2214 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2215 (OP_MASK_BCC, OP_SH_BCC): Define.
2216 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2217 (OP_MASK_CCC, OP_SH_CCC): Define.
2218 (INSN_READ_FPR_R): Define.
2219 (INSN_RFE): Delete.
2220
2221Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2222
2223 * m68k.h (enum m68k_architecture): Deleted.
2224 (struct m68k_opcode_alias): New type.
2225 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2226 matching constraints, values and flags. As a side effect of this,
2227 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2228 as I know were never used, now may need re-examining.
2229 (numopcodes): Now const.
2230 (m68k_opcode_aliases, numaliases): New variables.
2231 (endop): Deleted.
2232 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2233 m68k_opcode_aliases; update declaration of m68k_opcodes.
2234
2235Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2236
2237 * hppa.h (delay_type): Delete unused enumeration.
2238 (pa_opcode): Replace unused delayed field with an architecture
2239 field.
2240 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2241
2242Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2243
2244 * mips.h (INSN_ISA4): Define.
2245
2246Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2247
2248 * mips.h (M_DLA_AB, M_DLI): Define.
2249
2250Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2251
2252 * hppa.h (fstwx): Fix single-bit error.
2253
2254Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2255
2256 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2257
2258Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2259
2260 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2261 debug registers. From Charles Hannum (mycroft@netbsd.org).
2262
2263Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2264
2265 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2266 i386 support:
2267 * i386.h (MOV_AX_DISP32): New macro.
2268 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2269 of several call/return instructions.
2270 (ADDR_PREFIX_OPCODE): New macro.
2271
2272Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2273
2274 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2275
4f1d9bd8
NC
2276 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2277 char.
252b5132
RH
2278 (struct vot, field `name'): ditto.
2279
2280Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2281
2282 * vax.h: Supply and properly group all values in end sentinel.
2283
2284Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2285
2286 * mips.h (INSN_ISA, INSN_4650): Define.
2287
2288Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2289
2290 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2291 systems with a separate instruction and data cache, such as the
2292 29040, these instructions take an optional argument.
2293
2294Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2295
2296 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2297 INSN_TRAP.
2298
2299Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2300
2301 * mips.h (INSN_STORE_MEMORY): Define.
2302
2303Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2304
2305 * sparc.h: Document new operand type 'x'.
2306
2307Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2308
2309 * i960.h (I_CX2): New instruction category. It includes
2310 instructions available on Cx and Jx processors.
2311 (I_JX): New instruction category, for JX-only instructions.
2312 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2313 Jx-only instructions, in I_JX category.
2314
2315Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2316
2317 * ns32k.h (endop): Made pointer const too.
2318
2319Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2320
2321 * ns32k.h: Drop Q operand type as there is no correct use
2322 for it. Add I and Z operand types which allow better checking.
2323
2324Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2325
2326 * h8300.h (xor.l) :fix bit pattern.
2327 (L_2): New size of operand.
2328 (trapa): Use it.
2329
2330Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2331
2332 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2333
2334Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2335
2336 * sparc.h: Include v9 definitions.
2337
2338Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2339
2340 * m68k.h (m68060): Defined.
2341 (m68040up, mfloat, mmmu): Include it.
2342 (struct m68k_opcode): Widen `arch' field.
2343 (m68k_opcodes): Updated for M68060. Removed comments that were
2344 instructions commented out by "JF" years ago.
2345
2346Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2347
2348 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2349 add a one-bit `flags' field.
2350 (F_ALIAS): New macro.
2351
2352Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2353
2354 * h8300.h (dec, inc): Get encoding right.
2355
2356Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2357
2358 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2359 a flag instead.
2360 (PPC_OPERAND_SIGNED): Define.
2361 (PPC_OPERAND_SIGNOPT): Define.
2362
2363Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2364
2365 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2366 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2367
2368Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2369
2370 * i386.h: Reverse last change. It'll be handled in gas instead.
2371
2372Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2373
2374 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2375 slower on the 486 and used the implicit shift count despite the
2376 explicit operand. The one-operand form is still available to get
2377 the shorter form with the implicit shift count.
2378
2379Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2380
2381 * hppa.h: Fix typo in fstws arg string.
2382
2383Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2384
2385 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2386
2387Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2388
2389 * ppc.h (PPC_OPCODE_601): Define.
2390
2391Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2392
2393 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2394 (so we can determine valid completers for both addb and addb[tf].)
2395
2396 * hppa.h (xmpyu): No floating point format specifier for the
2397 xmpyu instruction.
2398
2399Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2400
2401 * ppc.h (PPC_OPERAND_NEXT): Define.
2402 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2403 (struct powerpc_macro): Define.
2404 (powerpc_macros, powerpc_num_macros): Declare.
2405
2406Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2407
2408 * ppc.h: New file. Header file for PowerPC opcode table.
2409
2410Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2411
2412 * hppa.h: More minor template fixes for sfu and copr (to allow
2413 for easier disassembly).
2414
2415 * hppa.h: Fix templates for all the sfu and copr instructions.
2416
2417Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2418
2419 * i386.h (push): Permit Imm16 operand too.
2420
2421Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2422
2423 * h8300.h (andc): Exists in base arch.
2424
2425Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2426
2427 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2428 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2429
2430Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2431
2432 * hppa.h: Add FP quadword store instructions.
2433
2434Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2435
2436 * mips.h: (M_J_A): Added.
2437 (M_LA): Removed.
2438
2439Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2440
2441 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2442 <mellon@pepper.ncd.com>.
2443
2444Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2445
2446 * hppa.h: Immediate field in probei instructions is unsigned,
2447 not low-sign extended.
2448
2449Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2450
2451 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2452
2453Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2454
2455 * i386.h: Add "fxch" without operand.
2456
2457Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2458
2459 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2460
2461Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2462
2463 * hppa.h: Add gfw and gfr to the opcode table.
2464
2465Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2466
2467 * m88k.h: extended to handle m88110.
2468
2469Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2470
2471 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2472 addresses.
2473
2474Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2475
2476 * i960.h (i960_opcodes): Properly bracket initializers.
2477
2478Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2479
2480 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2481
2482Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2483
2484 * m68k.h (two): Protect second argument with parentheses.
2485
2486Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2487
2488 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2489 Deleted old in/out instructions in "#if 0" section.
2490
2491Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2492
2493 * i386.h (i386_optab): Properly bracket initializers.
2494
2495Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2496
2497 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2498 Jeff Law, law@cs.utah.edu).
2499
2500Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2501
2502 * i386.h (lcall): Accept Imm32 operand also.
2503
2504Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2505
2506 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2507 (M_DABS): Added.
2508
2509Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2510
2511 * mips.h (INSN_*): Changed values. Removed unused definitions.
2512 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2513 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2514 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2515 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2516 (M_*): Added new values for r6000 and r4000 macros.
2517 (ANY_DELAY): Removed.
2518
2519Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2520
2521 * mips.h: Added M_LI_S and M_LI_SS.
2522
2523Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2524
2525 * h8300.h: Get some rare mov.bs correct.
2526
2527Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2528
2529 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2530 been included.
2531
2532Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2533
2534 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2535 jump instructions, for use in disassemblers.
2536
2537Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2538
2539 * m88k.h: Make bitfields just unsigned, not unsigned long or
2540 unsigned short.
2541
2542Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2543
2544 * hppa.h: New argument type 'y'. Use in various float instructions.
2545
2546Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2547
2548 * hppa.h (break): First immediate field is unsigned.
2549
2550 * hppa.h: Add rfir instruction.
2551
2552Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2553
2554 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2555
2556Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2557
2558 * mips.h: Reworked the hazard information somewhat, and fixed some
2559 bugs in the instruction hazard descriptions.
2560
2561Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2562
2563 * m88k.h: Corrected a couple of opcodes.
2564
2565Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2566
2567 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2568 new version includes instruction hazard information, but is
2569 otherwise reasonably similar.
2570
2571Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2572
2573 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2574
2575Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2576
2577 Patches from Jeff Law, law@cs.utah.edu:
2578 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2579 Make the tables be the same for the following instructions:
2580 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2581 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2582 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2583 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2584 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2585 "fcmp", and "ftest".
2586
2587 * hppa.h: Make new and old tables the same for "break", "mtctl",
2588 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2589 Fix typo in last patch. Collapse several #ifdefs into a
2590 single #ifdef.
2591
2592 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2593 of the comments up-to-date.
2594
2595 * hppa.h: Update "free list" of letters and update
2596 comments describing each letter's function.
2597
4f1d9bd8
NC
2598Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2599
2600 * h8300.h: Lots of little fixes for the h8/300h.
2601
2602Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2603
2604 Support for H8/300-H
2605 * h8300.h: Lots of new opcodes.
2606
252b5132
RH
2607Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2608
2609 * h8300.h: checkpoint, includes H8/300-H opcodes.
2610
2611Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2612
2613 * Patches from Jeffrey Law <law@cs.utah.edu>.
2614 * hppa.h: Rework single precision FP
2615 instructions so that they correctly disassemble code
2616 PA1.1 code.
2617
2618Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2619
2620 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2621 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2622
2623Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2624
2625 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2626 gdb will define it for now.
2627
2628Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2629
2630 * sparc.h: Don't end enumerator list with comma.
2631
2632Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2633
2634 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2635 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2636 ("bc2t"): Correct typo.
2637 ("[ls]wc[023]"): Use T rather than t.
2638 ("c[0123]"): Define general coprocessor instructions.
2639
2640Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2641
2642 * m68k.h: Move split point for gcc compilation more towards
2643 middle.
2644
2645Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2646
2647 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2648 simply wrong, ics, rfi, & rfsvc were missing).
2649 Add "a" to opr_ext for "bb". Doc fix.
2650
2651Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2652
2653 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2654 * mips.h: Add casts, to suppress warnings about shifting too much.
2655 * m68k.h: Document the placement code '9'.
2656
2657Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2658
2659 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2660 allows callers to break up the large initialized struct full of
2661 opcodes into two half-sized ones. This permits GCC to compile
2662 this module, since it takes exponential space for initializers.
2663 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2664
2665Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2666
2667 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2668 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2669 initialized structs in it.
2670
2671Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2672
2673 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2674 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2675 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2676
2677Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2678
2679 * mips.h: document "i" and "j" operands correctly.
2680
2681Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2682
2683 * mips.h: Removed endianness dependency.
2684
2685Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2686
2687 * h8300.h: include info on number of cycles per instruction.
2688
2689Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2690
2691 * hppa.h: Move handy aliases to the front. Fix masks for extract
2692 and deposit instructions.
2693
2694Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2695
2696 * i386.h: accept shld and shrd both with and without the shift
2697 count argument, which is always %cl.
2698
2699Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2700
2701 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2702 (one_byte_segment_defaults, two_byte_segment_defaults,
2703 i386_prefixtab_end): Ditto.
2704
2705Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2706
2707 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2708 for operand 2; from John Carr, jfc@dsg.dec.com.
2709
2710Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2711
2712 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2713 always use 16-bit offsets. Makes calculated-size jump tables
2714 feasible.
2715
2716Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2717
2718 * i386.h: Fix one-operand forms of in* and out* patterns.
2719
2720Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2721
2722 * m68k.h: Added CPU32 support.
2723
2724Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2725
2726 * mips.h (break): Disassemble the argument. Patch from
2727 jonathan@cs.stanford.edu (Jonathan Stone).
2728
2729Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2730
2731 * m68k.h: merged Motorola and MIT syntax.
2732
2733Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2734
2735 * m68k.h (pmove): make the tests less strict, the 68k book is
2736 wrong.
2737
2738Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2739
2740 * m68k.h (m68ec030): Defined as alias for 68030.
2741 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2742 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2743 them. Tightened description of "fmovex" to distinguish it from
2744 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2745 up descriptions that claimed versions were available for chips not
2746 supporting them. Added "pmovefd".
2747
2748Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2749
2750 * m68k.h: fix where the . goes in divull
2751
2752Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2753
2754 * m68k.h: the cas2 instruction is supposed to be written with
2755 indirection on the last two operands, which can be either data or
2756 address registers. Added a new operand type 'r' which accepts
2757 either register type. Added new cases for cas2l and cas2w which
2758 use them. Corrected masks for cas2 which failed to recognize use
2759 of address register.
2760
2761Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2762
2763 * m68k.h: Merged in patches (mostly m68040-specific) from
2764 Colin Smith <colin@wrs.com>.
2765
2766 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2767 base). Also cleaned up duplicates, re-ordered instructions for
2768 the sake of dis-assembling (so aliases come after standard names).
2769 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2770
2771Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2772
2773 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2774 all missing .s
2775
2776Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2777
2778 * sparc.h: Moved tables to BFD library.
2779
2780 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2781
2782Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2783
2784 * h8300.h: Finish filling in all the holes in the opcode table,
2785 so that the Lucid C compiler can digest this as well...
2786
2787Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2788
2789 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2790 Fix opcodes on various sizes of fild/fist instructions
2791 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2792 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2793
2794Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2795
2796 * h8300.h: Fill in all the holes in the opcode table so that the
2797 losing HPUX C compiler can digest this...
2798
2799Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2800
2801 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2802 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2803
2804Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2805
2806 * sparc.h: Add new architecture variant sparclite; add its scan
2807 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2808
2809Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2810
2811 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2812 fy@lucid.com).
2813
2814Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2815
2816 * rs6k.h: New version from IBM (Metin).
2817
2818Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2819
2820 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2821 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2822
2823Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2824
2825 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2826
2827Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2828
2829 * m68k.h (one, two): Cast macro args to unsigned to suppress
2830 complaints from compiler and lint about integer overflow during
2831 shift.
2832
2833Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2834
2835 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2836
2837Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2838
2839 * mips.h: Make bitfield layout depend on the HOST compiler,
2840 not on the TARGET system.
2841
2842Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2843
2844 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2845 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2846 <TRANLE@INTELLICORP.COM>.
2847
2848Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2849
2850 * h8300.h: turned op_type enum into #define list
2851
2852Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2853
2854 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2855 similar instructions -- they've been renamed to "fitoq", etc.
2856 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2857 number of arguments.
2858 * h8300.h: Remove extra ; which produces compiler warning.
2859
2860Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2861
2862 * sparc.h: fix opcode for tsubcctv.
2863
2864Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2865
2866 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2867
2868Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2869
2870 * sparc.h (nop): Made the 'lose' field be even tighter,
2871 so only a standard 'nop' is disassembled as a nop.
2872
2873Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2874
2875 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2876 disassembled as a nop.
2877
4f1d9bd8
NC
2878Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2879
2880 * m68k.h, sparc.h: ANSIfy enums.
2881
252b5132
RH
2882Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2883
2884 * sparc.h: fix a typo.
2885
2886Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2887
2888 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2889 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2890 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2891
2892\f
2893Local Variables:
2894version-control: never
2895End: