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1/* Opcode table for the Atmel AVR micro controllers.
2
6f2750fe 3 Copyright (C) 2000-2016 Free Software Foundation, Inc.
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4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
e4e42b45 8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
e4e42b45
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
68ab2dd9 20
d727e8c2 21#define AVR_ISA_1200 0x0001 /* In the beginning there was ... */
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22#define AVR_ISA_LPM 0x0002 /* device has LPM */
23#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
24#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
f36e8886 25#define AVR_ISA_TINY 0x0010 /* device has Tiny core specific encodings */
65aa24b6
NC
26#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL
27 supported, no 8K wrap on RJMP and RCALL) */
23794b24 28#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */
68ab2dd9 29#define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */
b914894f 30#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] */
65aa24b6 31#define AVR_ISA_SPM 0x0200 /* device can program itself */
b914894f 32#define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */
68ab2dd9 33#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
23794b24 34#define AVR_ISA_MOVW 0x1000 /* device has MOVW */
8cc66334
EW
35#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
36#define AVR_ISA_DES 0x4000 /* device has DES */
7bab7634 37#define AVR_ISA_RMW 0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */
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38
39#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
d727e8c2 40#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
f36e8886 41#define AVR_ISA_2xxxa (AVR_ISA_1200 | AVR_ISA_SRAM)
d669d37f
NC
42/* For the attiny26 which is missing LPM Rd,Z+. */
43#define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX)
2b1ed17b 44#define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX)
23794b24 45#define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \
d727e8c2 46 AVR_ISA_SPM | AVR_ISA_BRK)
d727e8c2
NC
47#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
48#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
7b21ac3f 49#define AVR_ISA_M8 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
982b62a0 50 AVR_ISA_LPMX | AVR_ISA_SPM)
7b21ac3f 51#define AVR_ISA_PWMx (AVR_ISA_M8 | AVR_ISA_BRK)
d727e8c2
NC
52#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
53 AVR_ISA_LPMX | AVR_ISA_SPM)
54#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
55#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
56#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
8cc66334 57#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
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58#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
59#define AVR_ISA_XMEGAU (AVR_ISA_XMEGA | AVR_ISA_RMW)
68ab2dd9 60
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61#define AVR_ISA_AVR1 AVR_ISA_TINY1
62#define AVR_ISA_AVR2 AVR_ISA_2xxx
63#define AVR_ISA_AVR25 AVR_ISA_TINY2
64#define AVR_ISA_AVR3 AVR_ISA_M603
65#define AVR_ISA_AVR31 AVR_ISA_M103
66#define AVR_ISA_AVR35 (AVR_ISA_AVR3 | AVR_ISA_MOVW | \
67 AVR_ISA_LPMX | AVR_ISA_SPM | AVR_ISA_BRK)
68#define AVR_ISA_AVR3_ALL (AVR_ISA_AVR3 | AVR_ISA_AVR31 | AVR_ISA_AVR35)
69#define AVR_ISA_AVR4 AVR_ISA_PWMx
70#define AVR_ISA_AVR5 AVR_ISA_M323
71#define AVR_ISA_AVR51 AVR_ISA_M128
72#define AVR_ISA_AVR6 (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \
73 AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \
74 AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
2dad5a91 75 AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW)
68ab2dd9 76
f36e8886
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77#define AVR_ISA_AVRTINY (AVR_ISA_1200 | AVR_ISA_BRK | AVR_ISA_SRAM | \
78 AVR_ISA_TINY)
79
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80#define REGISTER_P(x) ((x) == 'r' \
81 || (x) == 'd' \
82 || (x) == 'w' \
83 || (x) == 'a' \
84 || (x) == 'v')
85
45ee1401
DC
86/* Undefined combination of operands - does the register
87 operand overlap with pre-decremented or post-incremented
88 pointer register (like ld r31,Z+)? */
89#define AVR_UNDEF_P(x) (((x) & 0xFFED) == 0x91E5 || \
90 ((x) & 0xFDEF) == 0x91AD || ((x) & 0xFDEF) == 0x91AE || \
91 ((x) & 0xFDEF) == 0x91C9 || ((x) & 0xFDEF) == 0x91CA || \
92 ((x) & 0xFDEF) == 0x91E1 || ((x) & 0xFDEF) == 0x91E2)
93
94/* Is this a skip instruction {cpse,sbic,sbis,sbrc,sbrs}? */
95#define AVR_SKIP_P(x) (((x) & 0xFC00) == 0x1000 || \
96 ((x) & 0xFD00) == 0x9900 || ((x) & 0xFC08) == 0xFC00)
97
98/* Is this `ldd r,b+0' or `std b+0,r' (b={Y,Z}, disassembled as
99 `ld r,b' or `st b,r' respectively - next opcode entry)? */
100#define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000)
101
f36e8886 102/* Constraint letters:
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103 r - any register
104 d - `ldi' register (r16-r31)
105 v - `movw' even register (r0, r2, ..., r28, r30)
106 a - `fmul' register (r16-r23)
107 w - `adiw' register (r24,r26,r28,r30)
108 e - pointer registers (X,Y,Z)
109 b - base pointer register and displacement ([YZ]+disp)
110 z - Z pointer register (for [e]lpm Rd,Z[+])
111 M - immediate value from 0 to 255
112 n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
113 s - immediate value from 0 to 7
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114 P - Port address value from 0 to 63. (in, out)
115 p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
116 K - immediate value from 0 to 63 (used in `adiw', `sbiw')
68ab2dd9 117 i - immediate value
f36e8886 118 j - 7 bit immediate value from 0x40 to 0xBF (for 16-bit 'lds'/'sts')
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DC
119 l - signed pc relative offset from -64 to 63
120 L - signed pc relative offset from -2048 to 2047
45ee1401 121 h - absolute code address (call, jmp)
68ab2dd9 122 S - immediate value from 0 to 7 (S = s << 4)
8cc66334 123 E - immediate value from 0 to 15, shifted left by 4 (des)
68ab2dd9 124 ? - use this opcode entry if no parameters, else use next opcode entry
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DC
125
126 Order is important - some binary opcodes have more than one name,
127 the disassembler will only see the first match.
128
b914894f 129 Remaining undefined opcodes (1699 total - some of them might work
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DC
130 as normal instructions if not all of the bits are decoded):
131
132 0x0001...0x00ff (255) (known to be decoded as `nop' by the old core)
133 "100100xxxxxxx011" (128) 0x9[0-3][0-9a-f][3b]
134 "100100xxxxxx1000" (64) 0x9[0-3][0-9a-f]8
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DC
135 "1001010xxxxx0100" (32) 0x9[45][0-9a-f]4
136 "1001010x001x1001" (4) 0x9[45][23]9
137 "1001010x01xx1001" (8) 0x9[45][4-7]9
138 "1001010x1xxx1001" (16) 0x9[45][8-9a-f]9
139 "1001010xxxxx1011" (32) 0x9[45][0-9a-f]b
140 "10010101001x1000" (2) 0x95[23]8
141 "1001010101xx1000" (4) 0x95[4-7]8
b914894f 142 "1001010110111000" (1) 0x95b8
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DC
143 "1001010111111000" (1) 0x95f8 (`espm' removed in databook update)
144 "11111xxxxxxx1xxx" (1024) 0xf[8-9a-f][0-9a-f][8-9a-f]
145 */
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DC
146
147AVR_INSN (clc, "", "1001010010001000", 1, AVR_ISA_1200, 0x9488)
148AVR_INSN (clh, "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8)
149AVR_INSN (cli, "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8)
150AVR_INSN (cln, "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8)
151AVR_INSN (cls, "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8)
152AVR_INSN (clt, "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8)
153AVR_INSN (clv, "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8)
154AVR_INSN (clz, "", "1001010010011000", 1, AVR_ISA_1200, 0x9498)
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DC
155
156AVR_INSN (sec, "", "1001010000001000", 1, AVR_ISA_1200, 0x9408)
157AVR_INSN (seh, "", "1001010001011000", 1, AVR_ISA_1200, 0x9458)
158AVR_INSN (sei, "", "1001010001111000", 1, AVR_ISA_1200, 0x9478)
159AVR_INSN (sen, "", "1001010000101000", 1, AVR_ISA_1200, 0x9428)
160AVR_INSN (ses, "", "1001010001001000", 1, AVR_ISA_1200, 0x9448)
161AVR_INSN (set, "", "1001010001101000", 1, AVR_ISA_1200, 0x9468)
162AVR_INSN (sev, "", "1001010000111000", 1, AVR_ISA_1200, 0x9438)
163AVR_INSN (sez, "", "1001010000011000", 1, AVR_ISA_1200, 0x9418)
164
f36e8886 165/* Same as {cl,se}[chinstvz] above. */
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DC
166AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
167AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
168
f36e8886
BS
169AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxxa,0x9509)
170AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxxa,0x9409)
45ee1401 171
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DC
172AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
173AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
174AVR_INSN (elpm, "?", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8)
175AVR_INSN (elpm, "r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006)
45ee1401 176
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DC
177AVR_INSN (nop, "", "0000000000000000", 1, AVR_ISA_1200, 0x0000)
178AVR_INSN (ret, "", "1001010100001000", 1, AVR_ISA_1200, 0x9508)
179AVR_INSN (reti, "", "1001010100011000", 1, AVR_ISA_1200, 0x9518)
68ab2dd9 180AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
b914894f 181AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598)
68ab2dd9 182AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
8cc66334
EW
183AVR_INSN (spm, "?", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
184AVR_INSN (spm, "z", "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
68ab2dd9 185
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DC
186AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
187AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
188AVR_INSN (and, "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
189AVR_INSN (cp, "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400)
190AVR_INSN (cpc, "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400)
191AVR_INSN (cpse, "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000)
192AVR_INSN (eor, "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
193AVR_INSN (mov, "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00)
194AVR_INSN (mul, "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00)
195AVR_INSN (or, "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
196AVR_INSN (sbc, "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
197AVR_INSN (sub, "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
198
f36e8886 199/* Shorthand for {eor,add,adc,and} r,r above. */
60a2978a
DC
200AVR_INSN (clr, "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
201AVR_INSN (lsl, "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
202AVR_INSN (rol, "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
203AVR_INSN (tst, "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
204
68ab2dd9
DC
205AVR_INSN (andi, "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
206 /*XXX special case*/
207AVR_INSN (cbr, "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
45ee1401 208
68ab2dd9 209AVR_INSN (ldi, "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000)
45ee1401
DC
210AVR_INSN (ser, "d", "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f)
211
68ab2dd9 212AVR_INSN (ori, "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
68ab2dd9 213AVR_INSN (sbr, "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
45ee1401
DC
214
215AVR_INSN (cpi, "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000)
216AVR_INSN (sbci, "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000)
68ab2dd9
DC
217AVR_INSN (subi, "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000)
218
219AVR_INSN (sbrc, "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00)
220AVR_INSN (sbrs, "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00)
221AVR_INSN (bld, "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800)
222AVR_INSN (bst, "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00)
223
224AVR_INSN (in, "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000)
225AVR_INSN (out, "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800)
226
227AVR_INSN (adiw, "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600)
228AVR_INSN (sbiw, "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700)
229
230AVR_INSN (cbi, "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800)
231AVR_INSN (sbi, "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00)
232AVR_INSN (sbic, "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900)
233AVR_INSN (sbis, "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00)
234
235AVR_INSN (brcc, "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
236AVR_INSN (brcs, "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
237AVR_INSN (breq, "l", "111100lllllll001", 1, AVR_ISA_1200, 0xf001)
238AVR_INSN (brge, "l", "111101lllllll100", 1, AVR_ISA_1200, 0xf404)
239AVR_INSN (brhc, "l", "111101lllllll101", 1, AVR_ISA_1200, 0xf405)
240AVR_INSN (brhs, "l", "111100lllllll101", 1, AVR_ISA_1200, 0xf005)
241AVR_INSN (brid, "l", "111101lllllll111", 1, AVR_ISA_1200, 0xf407)
242AVR_INSN (brie, "l", "111100lllllll111", 1, AVR_ISA_1200, 0xf007)
243AVR_INSN (brlo, "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
244AVR_INSN (brlt, "l", "111100lllllll100", 1, AVR_ISA_1200, 0xf004)
245AVR_INSN (brmi, "l", "111100lllllll010", 1, AVR_ISA_1200, 0xf002)
246AVR_INSN (brne, "l", "111101lllllll001", 1, AVR_ISA_1200, 0xf401)
247AVR_INSN (brpl, "l", "111101lllllll010", 1, AVR_ISA_1200, 0xf402)
248AVR_INSN (brsh, "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
249AVR_INSN (brtc, "l", "111101lllllll110", 1, AVR_ISA_1200, 0xf406)
250AVR_INSN (brts, "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006)
251AVR_INSN (brvc, "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403)
252AVR_INSN (brvs, "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003)
253
f36e8886 254/* Same as br?? above. */
68ab2dd9
DC
255AVR_INSN (brbc, "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400)
256AVR_INSN (brbs, "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000)
257
258AVR_INSN (rcall, "L", "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000)
259AVR_INSN (rjmp, "L", "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000)
260
261AVR_INSN (call, "h", "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e)
262AVR_INSN (jmp, "h", "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c)
263
264AVR_INSN (asr, "r", "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405)
265AVR_INSN (com, "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400)
266AVR_INSN (dec, "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a)
267AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
268AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
269AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
f36e8886
BS
270AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxxa,0x900f)
271AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxxa,0x920f)
68ab2dd9 272AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
68ab2dd9
DC
273AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
274
f36e8886 275/* Atomic memory operations for XMEGA. List before `sts'. */
7bab7634
DC
276AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204)
277AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205)
278AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206)
279AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207)
76e879f8 280
f36e8886 281/* Known to be decoded as `nop' by the old core. */
23794b24 282AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)
68ab2dd9
DC
283AVR_INSN (muls, "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200)
284AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300)
285AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308)
286AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380)
287AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388)
65aa24b6 288
f36e8886
BS
289AVR_INSN (sts, "j,d", "10101kkkddddkkkk", 1, AVR_ISA_TINY, 0xA800)
290AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
291AVR_INSN (lds, "d,j", "10100kkkddddkkkk", 1, AVR_ISA_TINY, 0xA000)
292AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
45ee1401 293
f36e8886
BS
294/* Special case for b+0, `e' must be next entry after `b',
295 b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X. */
68ab2dd9 296AVR_INSN (ldd, "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000)
68ab2dd9 297AVR_INSN (ld, "r,e", "100!000dddddee-+", 1, AVR_ISA_1200, 0x8000)
45ee1401 298AVR_INSN (std, "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200)
68ab2dd9
DC
299AVR_INSN (st, "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
300
f36e8886
BS
301/* These are for devices that don't exist yet
302 (>128K program memory, PC = EIND:Z). */
65aa24b6
NC
303AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
304AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
305
f36e8886 306/* DES instruction for encryption and decryption. */
8cc66334
EW
307AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)
308