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b8891f8d | 1 | /* C-SKY assembler/disassembler support. |
250d07de | 2 | Copyright (C) 2004-2021 Free Software Foundation, Inc. |
b8891f8d AJ |
3 | Contributed by C-SKY Microsystems and Mentor Graphics. |
4 | ||
5 | This file is part of GDB and GAS. | |
6 | ||
7 | GDB and GAS are free software; you can redistribute it and/or | |
8 | modify it under the terms of the GNU General Public License as | |
9 | published by the Free Software Foundation; either version 3, or (at | |
10 | your option) any later version. | |
11 | ||
12 | GDB and GAS are distributed in the hope that it will be useful, but | |
13 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GDB or GAS; see the file COPYING3. If not, write to the | |
19 | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, | |
20 | MA 02110-1301, USA. */ | |
21 | ||
22 | #include "dis-asm.h" | |
23 | ||
24 | /* The following bitmasks control instruction set architecture. */ | |
548f5275 CQ |
25 | #define CSKYV1_ISA_E1 ((bfd_uint64_t)1 << 0) |
26 | #define CSKYV2_ISA_E1 ((bfd_uint64_t)1 << 1) | |
27 | #define CSKYV2_ISA_1E2 ((bfd_uint64_t)1 << 2) | |
28 | #define CSKYV2_ISA_2E3 ((bfd_uint64_t)1 << 3) | |
29 | #define CSKYV2_ISA_3E7 ((bfd_uint64_t)1 << 4) | |
30 | #define CSKYV2_ISA_7E10 ((bfd_uint64_t)1 << 5) | |
31 | #define CSKYV2_ISA_3E3R1 ((bfd_uint64_t)1 << 6) | |
32 | #define CSKYV2_ISA_3E3R2 ((bfd_uint64_t)1 << 7) | |
33 | #define CSKYV2_ISA_10E60 ((bfd_uint64_t)1 << 8) | |
34 | #define CSKYV2_ISA_3E3R3 ((bfd_uint64_t)1 << 9) | |
b8891f8d | 35 | |
548f5275 CQ |
36 | #define CSKY_ISA_TRUST ((bfd_uint64_t)1 << 11) |
37 | #define CSKY_ISA_CACHE ((bfd_uint64_t)1 << 12) | |
38 | #define CSKY_ISA_NVIC ((bfd_uint64_t)1 << 13) | |
39 | #define CSKY_ISA_CP ((bfd_uint64_t)1 << 14) | |
40 | #define CSKY_ISA_MP ((bfd_uint64_t)1 << 15) | |
41 | #define CSKY_ISA_MP_1E2 ((bfd_uint64_t)1 << 16) | |
42 | #define CSKY_ISA_JAVA ((bfd_uint64_t)1 << 17) | |
43 | #define CSKY_ISA_MAC ((bfd_uint64_t)1 << 18) | |
44 | #define CSKY_ISA_MAC_DSP ((bfd_uint64_t)1 << 19) | |
b8891f8d AJ |
45 | |
46 | /* Base ISA for csky v1 and v2. */ | |
548f5275 CQ |
47 | #define CSKY_ISA_DSP ((bfd_uint64_t)1 << 20) |
48 | #define CSKY_ISA_DSP_1E2 ((bfd_uint64_t)1 << 21) | |
49 | #define CSKY_ISA_DSP_ENHANCE ((bfd_uint64_t)1 << 22) | |
50 | #define CSKY_ISA_DSPE60 ((bfd_uint64_t)1 << 23) | |
b8891f8d AJ |
51 | |
52 | /* Base float instruction (803f & 810f). */ | |
548f5275 | 53 | #define CSKY_ISA_FLOAT_E1 ((bfd_uint64_t)1 << 25) |
b8891f8d | 54 | /* M_FLOAT support (810f). */ |
548f5275 | 55 | #define CSKY_ISA_FLOAT_1E2 ((bfd_uint64_t)1 << 26) |
b8891f8d | 56 | /* 803 support (803f). */ |
548f5275 | 57 | #define CSKY_ISA_FLOAT_1E3 ((bfd_uint64_t)1 << 27) |
b8891f8d | 58 | /* 807 support (803f & 807f). */ |
548f5275 | 59 | #define CSKY_ISA_FLOAT_3E4 ((bfd_uint64_t)1 << 28) |
1feede9b | 60 | /* 860 support. */ |
548f5275 | 61 | #define CSKY_ISA_FLOAT_7E60 ((bfd_uint64_t)1 << 36) |
b8891f8d | 62 | /* Vector DSP support. */ |
548f5275 CQ |
63 | #define CSKY_ISA_VDSP ((bfd_uint64_t)1 << 29) |
64 | #define CSKY_ISA_VDSP_2 ((bfd_uint64_t)1 << 30) | |
b8891f8d AJ |
65 | |
66 | /* The following bitmasks control cpu architecture for CSKY. */ | |
67 | #define CSKY_ABI_V1 (1 << 28) | |
68 | #define CSKY_ABI_V2 (2 << 28) | |
69 | #define CSKY_ARCH_MASK 0x0000001F | |
70 | #define CSKY_ABI_MASK 0xF0000000 | |
71 | ||
72 | #define CSKY_ARCH_510 0x1 | |
73 | #define CSKY_ARCH_610 0x2 | |
74 | #define CSKY_ARCH_801 0xa | |
75 | #define CSKY_ARCH_802 0x10 | |
76 | #define CSKY_ARCH_803 0x9 | |
548f5275 CQ |
77 | /* 804 use the same arch flag as 803 yet. */ |
78 | #define CSKY_ARCH_804 0x9 | |
79 | #define CSKY_ARCH_805 0x11 | |
b8891f8d AJ |
80 | #define CSKY_ARCH_807 0x6 |
81 | #define CSKY_ARCH_810 0x8 | |
531c73a3 | 82 | #define CSKY_ARCH_860 0xb |
548f5275 CQ |
83 | /* 800 is a special arch supporting all instructions for ABIV2. */ |
84 | #define CSKY_ARCH_800 0x1f | |
b8891f8d AJ |
85 | |
86 | #define CSKY_ARCH_MAC (1 << 15) | |
87 | #define CSKY_ARCH_DSP (1 << 14) | |
88 | #define CSKY_ARCH_FLOAT (1 << 13) | |
89 | #define CSKY_ARCH_SIMD (1 << 12) | |
90 | #define CSKY_ARCH_CP (1 << 11) | |
91 | #define CSKY_ARCH_MP (1 << 10) | |
92 | #define CSKY_ARCH_CACHE (1 << 9) | |
93 | #define CSKY_ARCH_JAVA (1 << 8) | |
94 | #define CSKY_ARCH_APS (1 << 7) | |
95 | ||
9d1ccf22 CQ |
96 | /* eflag's Versions. */ |
97 | #define CSKY_VERSION_V1 (1 << 24) | |
98 | #define CSKY_VERSION_V2 (2 << 24) | |
99 | #define CSKY_VERSION_V3 (3 << 24) | |
100 | ||
b8891f8d AJ |
101 | #define IS_CSKY_V1(a) \ |
102 | (((a) & CSKY_ABI_MASK) == CSKY_ABI_V1) | |
103 | #define IS_CSKY_V2(a) \ | |
104 | (((a) & CSKY_ABI_MASK) == CSKY_ABI_V2) | |
105 | #define IS_CSKY_ARCH_V1(a) \ | |
106 | (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510 \ | |
107 | || ((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610) | |
108 | #define IS_CSKY_ARCH_V2(a) \ | |
109 | (!(IS_CSKY_ARCH_V1 (a))) | |
110 | ||
111 | #define IS_CSKY_ARCH_510(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510) | |
112 | #define IS_CSKY_ARCH_610(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610) | |
113 | #define IS_CSKY_ARCH_801(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_801) | |
114 | #define IS_CSKY_ARCH_802(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_802) | |
115 | #define IS_CSKY_ARCH_803(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_803) | |
116 | #define IS_CSKY_ARCH_807(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_807) | |
117 | #define IS_CSKY_ARCH_810(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_810) | |
118 | ||
119 | #define CPU_ARCH_MASK \ | |
120 | (CSKY_ARCH_JAVA | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP | CSKY_ARCH_MASK) | |
121 | ||
122 | #ifdef __cplusplus | |
123 | extern "C" { | |
124 | #endif | |
125 | extern int print_insn_csky (bfd_vma memaddr, struct disassemble_info *info); | |
126 | #ifdef __cplusplus | |
127 | } | |
128 | #endif |