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3b17ee1b | 1 | /* Table of opcodes for the PA-RISC. |
b5eab453 | 2 | Copyright (C) 1990, 1991, 1993, 1995 Free Software Foundation, Inc. |
3b17ee1b KR |
3 | |
4 | Contributed by the Center for Software Science at the | |
5 | University of Utah (pa-gdb-bugs@cs.utah.edu). | |
6 | ||
7 | This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. | |
8 | ||
9 | GAS/GDB is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 1, or (at your option) | |
12 | any later version. | |
13 | ||
14 | GAS/GDB is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS or GDB; see the file COPYING. If not, write to | |
b5eab453 | 21 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
3b17ee1b KR |
22 | |
23 | #if !defined(__STDC__) && !defined(const) | |
24 | #define const | |
25 | #endif | |
26 | ||
27 | /* | |
28 | * Structure of an opcode table entry. | |
29 | */ | |
30 | ||
31 | /* There are two kinds of delay slot nullification: normal which is | |
32 | * controled by the nullification bit, and conditional, which depends | |
33 | * on the direction of the branch and its success or failure. | |
13a34399 JL |
34 | * |
35 | * NONE is unfortunately #defined in the hiux system include files. | |
36 | * #undef it away. | |
3b17ee1b | 37 | */ |
13a34399 | 38 | #undef NONE |
3b17ee1b KR |
39 | struct pa_opcode |
40 | { | |
41 | const char *name; | |
42 | unsigned long int match; /* Bits that must be set... */ | |
43 | unsigned long int mask; /* ... in these bits. */ | |
44 | char *args; | |
b5eab453 | 45 | enum pa_arch arch; |
3b17ee1b KR |
46 | }; |
47 | ||
48 | /* | |
49 | All hppa opcodes are 32 bits. | |
50 | ||
51 | The match component is a mask saying which bits must match a | |
52 | particular opcode in order for an instruction to be an instance | |
53 | of that opcode. | |
54 | ||
55 | The args component is a string containing one character | |
56 | for each operand of the instruction. | |
57 | ||
58 | Bit positions in this description follow HP usage of lsb = 31, | |
59 | "at" is lsb of field. | |
60 | ||
3b17ee1b KR |
61 | In the args field, the following characters must match exactly: |
62 | ||
63 | '+,() ' | |
64 | ||
65 | In the args field, the following characters are unused: | |
66 | ||
898d1e23 JL |
67 | ' "#$% *+- ./ :; ' |
68 | ' [\] ' | |
69 | ' { } ' | |
3b17ee1b KR |
70 | |
71 | Here are all the characters: | |
72 | ||
73 | ' !"#$%&'()*+-,./0123456789:;<=>?@' | |
74 | 'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_' | |
75 | 'abcdefghijklmnopqrstuvwxyz{|}~' | |
3b17ee1b KR |
76 | |
77 | Kinds of operands: | |
efa77160 JK |
78 | x integer register field at 15. |
79 | b integer register field at 10. | |
80 | t integer register field at 31. | |
81 | y floating point register field at 31 | |
3b17ee1b KR |
82 | 5 5 bit immediate at 15. |
83 | s 2 bit space specifier at 17. | |
84 | S 3 bit space specifier at 18. | |
85 | c indexed load completer. | |
86 | C short load and store completer. | |
87 | Y Store Bytes Short completer | |
88 | < non-negated compare/subtract conditions. | |
3b17ee1b KR |
89 | a compare/subtract conditions |
90 | d non-negated add conditions | |
3b17ee1b KR |
91 | & logical instruction conditions |
92 | U unit instruction conditions | |
93 | > shift/extract/deposit conditions. | |
94 | ~ bvb,bb conditions | |
95 | V 5 bit immediate value at 31 | |
96 | i 11 bit immediate value at 31 | |
97 | j 14 bit immediate value at 31 | |
98 | k 21 bit immediate value at 31 | |
99 | n nullification for branch instructions | |
13a34399 | 100 | N nullification for spop and copr instructions |
3b17ee1b | 101 | w 12 bit branch displacement |
efa77160 JK |
102 | W 17 bit branch displacement (PC relative) |
103 | z 17 bit branch displacement (just a number, not an address) | |
3b17ee1b KR |
104 | |
105 | Also these: | |
106 | ||
3b17ee1b KR |
107 | p 5 bit shift count at 26 (to support the SHD instruction) encoded as |
108 | 31-p | |
109 | P 5 bit bit position at 26 | |
110 | T 5 bit field length at 31 (encoded as 32-T) | |
111 | A 13 bit immediate at 18 (to support the BREAK instruction) | |
3b17ee1b KR |
112 | ^ like b, but describes a control register |
113 | Z System Control Completer (to support LPA, LHA, etc.) | |
3b17ee1b KR |
114 | D 26 bit immediate at 31 (to support the DIAG instruction) |
115 | ||
116 | f 3 bit Special Function Unit identifier at 25 | |
117 | O 20 bit Special Function Unit operation split between 15 bits at 20 | |
118 | and 5 bits at 31 | |
119 | o 15 bit Special Function Unit operation at 20 | |
120 | 2 22 bit Special Function Unit operation split between 17 bits at 20 | |
121 | and 5 bits at 31 | |
122 | 1 15 bit Special Function Unit operation split between 10 bits at 20 | |
123 | and 5 bits at 31 | |
124 | 0 10 bit Special Function Unit operation split between 5 bits at 20 | |
125 | and 5 bits at 31 | |
126 | u 3 bit coprocessor unit identifier at 25 | |
127 | F Source Floating Point Operand Format Completer encoded 2 bits at 20 | |
0b3ae811 JK |
128 | I Source Floating Point Operand Format Completer encoded 1 bits at 20 |
129 | (for 0xe format FP instructions) | |
3b17ee1b KR |
130 | G Destination Floating Point Operand Format Completer encoded 2 bits at 18 |
131 | M Floating-Point Compare Conditions (encoded as 5 bits at 31) | |
b5eab453 KR |
132 | ? non-negated/negated compare/subtract conditions. |
133 | @ non-negated/negated add conditions. | |
3b17ee1b | 134 | ! non-negated add conditions. |
3b17ee1b | 135 | |
0b3ae811 JK |
136 | s 2 bit space specifier at 17. |
137 | b register field at 10. | |
3b17ee1b KR |
138 | r 5 bit immediate value at 31 (for the break instruction) |
139 | (very similar to V above, except the value is unsigned instead of | |
140 | low_sign_ext) | |
13a34399 | 141 | R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions) |
3b17ee1b KR |
142 | (same as r above, except the value is in a different location) |
143 | Q 5 bit immediate value at 10 (a bit position specified in | |
144 | the bb instruction. It's the same as r above, except the | |
145 | value is in a different location) | |
efa77160 | 146 | | shift/extract/deposit conditions when used in a conditional branch |
3b17ee1b KR |
147 | |
148 | And these (PJH) for PA-89 F.P. registers and instructions: | |
149 | ||
150 | v a 't' operand type extended to handle L/R register halves. | |
151 | E a 'b' operand type extended to handle L/R register halves. | |
152 | X an 'x' operand type extended to handle L/R register halves. | |
0b3ae811 JK |
153 | J a 'b' operand type further extended to handle extra 1.1 registers |
154 | K a 'x' operand type further extended to handle extra 1.1 registers | |
3b17ee1b KR |
155 | 4 a variation of the 'b' operand type for 'fmpyadd' and 'fmpysub' |
156 | 6 a variation of the 'x' operand type for 'fmpyadd' and 'fmpysub' | |
157 | 7 a variation of the 't' operand type for 'fmpyadd' and 'fmpysub' | |
158 | 8 5 bit register field at 20 (used in 'fmpyadd' and 'fmpysub') | |
159 | 9 5 bit register field at 25 (used in 'fmpyadd' and 'fmpysub') | |
160 | H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub' | |
161 | (very similar to 'F') | |
3b17ee1b KR |
162 | */ |
163 | ||
898d1e23 JL |
164 | /* start-sanitize-cygnus */ |
165 | /* Letters for PA2.0 support | |
166 | We don't want this code to leak just yet. | |
167 | ||
168 | 3 fmpyfadd/fmpynfadd ra operand | |
169 | g Like C, but encoding of the modifier is different. | |
170 | B Like C, but encoding of the modifier is different. | |
171 | l Long displacement for PA2.0 fp loads and stores. | |
172 | L Long displacement for PA2.0 fp loads and stores. | |
173 | e FP register specification for PA2.0 large displacement loads and stores | |
174 | h Offset into CA array for fcmp | |
175 | m Offset into CA array for ftest | |
176 | = Graphics conditions for ftest | |
177 | q,_ source/dest floating point formats for fcnv | |
178 | */ | |
179 | ||
180 | /* end-sanitize-cygnus */ | |
181 | ||
182 | /* List of characters not to put a space after. Note that | |
183 | "," is included, as the "spopN" operations use literal | |
184 | commas in their completer sections. */ | |
185 | static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}"; | |
186 | ||
3b17ee1b KR |
187 | /* The order of the opcodes in this table is significant: |
188 | ||
189 | * The assembler requires that all instances of the same mnemonic must be | |
190 | consecutive. If they aren't, the assembler will bomb at runtime. | |
191 | ||
192 | * The disassembler should not care about the order of the opcodes. */ | |
193 | ||
194 | static const struct pa_opcode pa_opcodes[] = | |
195 | { | |
196 | ||
197 | /* pseudo-instructions */ | |
198 | ||
b5eab453 KR |
199 | { "b", 0xe8000000, 0xffe0e000, "nW", pa10}, /* bl foo,r0 */ |
200 | { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10}, /* ldo val(r0),r */ | |
201 | { "comib", 0x84000000, 0xfc000000, "?n5,b,w", pa10}, /* comib{tf}*/ | |
202 | { "comb", 0x80000000, 0xfc000000, "?nx,b,w", pa10}, /* comb{tf} */ | |
203 | { "addb", 0xa0000000, 0xfc000000, "@nx,b,w", pa10}, /* addb{tf} */ | |
204 | { "addib", 0xa4000000, 0xfc000000, "@n5,b,w", pa10}, /* addib{tf}*/ | |
205 | { "nop", 0x08000240, 0xffffffff, "", pa10}, /* or 0,0,0 */ | |
206 | { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10}, /* or r,0,t */ | |
207 | { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10}, /* mtctl r,cr11 */ | |
86f9a3c1 JL |
208 | /* start-sanitize-cygnus */ |
209 | { "mtsarcm", 0x016018c0, 0xffe0ffff, "x", pa20}, | |
210 | /* end-sanitize-cygnus */ | |
3b17ee1b | 211 | |
0b3ae811 | 212 | /* Loads and Stores for integer registers. */ |
b5eab453 KR |
213 | { "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10}, |
214 | { "ldw", 0x48000000, 0xfc000000, "j(b),x", pa10}, | |
215 | { "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10}, | |
216 | { "ldh", 0x44000000, 0xfc000000, "j(b),x", pa10}, | |
217 | { "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10}, | |
218 | { "ldb", 0x40000000, 0xfc000000, "j(b),x", pa10}, | |
219 | { "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10}, | |
220 | { "stw", 0x68000000, 0xfc000000, "x,j(b)", pa10}, | |
221 | { "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10}, | |
222 | { "sth", 0x64000000, 0xfc000000, "x,j(b)", pa10}, | |
223 | { "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10}, | |
224 | { "stb", 0x60000000, 0xfc000000, "x,j(b)", pa10}, | |
225 | { "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10}, | |
226 | { "ldwm", 0x4c000000, 0xfc000000, "j(b),x", pa10}, | |
227 | { "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10}, | |
228 | { "stwm", 0x6c000000, 0xfc000000, "x,j(b)", pa10}, | |
229 | { "ldwx", 0x0c000080, 0xfc001fc0, "cx(s,b),t", pa10}, | |
230 | { "ldwx", 0x0c000080, 0xfc001fc0, "cx(b),t", pa10}, | |
231 | { "ldhx", 0x0c000040, 0xfc001fc0, "cx(s,b),t", pa10}, | |
232 | { "ldhx", 0x0c000040, 0xfc001fc0, "cx(b),t", pa10}, | |
233 | { "ldbx", 0x0c000000, 0xfc001fc0, "cx(s,b),t", pa10}, | |
234 | { "ldbx", 0x0c000000, 0xfc001fc0, "cx(b),t", pa10}, | |
235 | { "ldwax", 0x0c000180, 0xfc00dfc0, "cx(b),t", pa10}, | |
236 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cx(s,b),t", pa10}, | |
237 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cx(b),t", pa10}, | |
238 | { "ldws", 0x0c001080, 0xfc001fc0, "C5(s,b),t", pa10}, | |
239 | { "ldws", 0x0c001080, 0xfc001fc0, "C5(b),t", pa10}, | |
240 | { "ldhs", 0x0c001040, 0xfc001fc0, "C5(s,b),t", pa10}, | |
241 | { "ldhs", 0x0c001040, 0xfc001fc0, "C5(b),t", pa10}, | |
242 | { "ldbs", 0x0c001000, 0xfc001fc0, "C5(s,b),t", pa10}, | |
243 | { "ldbs", 0x0c001000, 0xfc001fc0, "C5(b),t", pa10}, | |
244 | { "ldwas", 0x0c001180, 0xfc00dfc0, "C5(b),t", pa10}, | |
245 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "C5(s,b),t", pa10}, | |
246 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "C5(b),t", pa10}, | |
247 | { "stws", 0x0c001280, 0xfc001fc0, "Cx,V(s,b)", pa10}, | |
248 | { "stws", 0x0c001280, 0xfc001fc0, "Cx,V(b)", pa10}, | |
249 | { "sths", 0x0c001240, 0xfc001fc0, "Cx,V(s,b)", pa10}, | |
250 | { "sths", 0x0c001240, 0xfc001fc0, "Cx,V(b)", pa10}, | |
251 | { "stbs", 0x0c001200, 0xfc001fc0, "Cx,V(s,b)", pa10}, | |
252 | { "stbs", 0x0c001200, 0xfc001fc0, "Cx,V(b)", pa10}, | |
253 | { "stwas", 0x0c001380, 0xfc00dfc0, "Cx,V(b)", pa10}, | |
254 | { "stbys", 0x0c001300, 0xfc001fc0, "Yx,V(s,b)", pa10}, | |
255 | { "stbys", 0x0c001300, 0xfc001fc0, "Yx,V(b)", pa10}, | |
0b3ae811 JK |
256 | |
257 | /* Immediate instructions. */ | |
b5eab453 KR |
258 | { "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10}, |
259 | { "ldil", 0x20000000, 0xfc000000, "k,b", pa10}, | |
260 | { "addil", 0x28000000, 0xfc000000, "k,b", pa10}, | |
0b3ae811 JK |
261 | |
262 | /* Branching instructions. */ | |
b5eab453 KR |
263 | { "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10}, |
264 | { "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10}, | |
265 | { "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10}, | |
266 | { "bv", 0xe800c000, 0xfc00e001, "nx(b)", pa10}, | |
267 | { "bv", 0xe800c000, 0xfc00e001, "n(b)", pa10}, | |
268 | { "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10}, | |
269 | { "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10}, | |
270 | { "movb", 0xc8000000, 0xfc000000, "|nx,b,w", pa10}, | |
271 | { "movib", 0xcc000000, 0xfc000000, "|n5,b,w", pa10}, | |
272 | { "combt", 0x80000000, 0xfc000000, "<nx,b,w", pa10}, | |
273 | { "combf", 0x88000000, 0xfc000000, "<nx,b,w", pa10}, | |
274 | { "comibt", 0x84000000, 0xfc000000, "<n5,b,w", pa10}, | |
275 | { "comibf", 0x8c000000, 0xfc000000, "<n5,b,w", pa10}, | |
276 | { "addbt", 0xa0000000, 0xfc000000, "!nx,b,w", pa10}, | |
277 | { "addbf", 0xa8000000, 0xfc000000, "!nx,b,w", pa10}, | |
278 | { "addibt", 0xa4000000, 0xfc000000, "!n5,b,w", pa10}, | |
279 | { "addibf", 0xac000000, 0xfc000000, "!n5,b,w", pa10}, | |
280 | { "bvb", 0xc0000000, 0xffe00000, "~nx,w", pa10}, | |
281 | { "bb", 0xc4000000, 0xfc000000, "~nx,Q,w", pa10}, | |
3b17ee1b KR |
282 | |
283 | /* Computation Instructions */ | |
284 | ||
b5eab453 KR |
285 | { "add", 0x08000600, 0xfc000fe0, "dx,b,t", pa10}, |
286 | { "addl", 0x08000a00, 0xfc000fe0, "dx,b,t", pa10}, | |
287 | { "addo", 0x08000e00, 0xfc000fe0, "dx,b,t", pa10}, | |
288 | { "addc", 0x08000700, 0xfc000fe0, "dx,b,t", pa10}, | |
289 | { "addco", 0x08000f00, 0xfc000fe0, "dx,b,t", pa10}, | |
290 | { "sh1add", 0x08000640, 0xfc000fe0, "dx,b,t", pa10}, | |
291 | { "sh1addl", 0x08000a40, 0xfc000fe0, "dx,b,t", pa10}, | |
292 | { "sh1addo", 0x08000e40, 0xfc000fe0, "dx,b,t", pa10}, | |
293 | { "sh2add", 0x08000680, 0xfc000fe0, "dx,b,t", pa10}, | |
294 | { "sh2addl", 0x08000a80, 0xfc000fe0, "dx,b,t", pa10}, | |
295 | { "sh2addo", 0x08000e80, 0xfc000fe0, "dx,b,t", pa10}, | |
296 | { "sh3add", 0x080006c0, 0xfc000fe0, "dx,b,t", pa10}, | |
297 | { "sh3addl", 0x08000ac0, 0xfc000fe0, "dx,b,t", pa10}, | |
298 | { "sh3addo", 0x08000ec0, 0xfc000fe0, "dx,b,t", pa10}, | |
299 | { "sub", 0x08000400, 0xfc000fe0, "ax,b,t", pa10}, | |
300 | { "subo", 0x08000c00, 0xfc000fe0, "ax,b,t", pa10}, | |
301 | { "subb", 0x08000500, 0xfc000fe0, "ax,b,t", pa10}, | |
302 | { "subbo", 0x08000d00, 0xfc000fe0, "ax,b,t", pa10}, | |
303 | { "subt", 0x080004c0, 0xfc000fe0, "ax,b,t", pa10}, | |
304 | { "subto", 0x08000cc0, 0xfc000fe0, "ax,b,t", pa10}, | |
305 | { "ds", 0x08000440, 0xfc000fe0, "ax,b,t", pa10}, | |
306 | { "comclr", 0x08000880, 0xfc000fe0, "ax,b,t", pa10}, | |
307 | { "or", 0x08000240, 0xfc000fe0, "&x,b,t", pa10}, | |
308 | { "xor", 0x08000280, 0xfc000fe0, "&x,b,t", pa10}, | |
309 | { "and", 0x08000200, 0xfc000fe0, "&x,b,t", pa10}, | |
310 | { "andcm", 0x08000000, 0xfc000fe0, "&x,b,t", pa10}, | |
311 | { "uxor", 0x08000380, 0xfc000fe0, "Ux,b,t", pa10}, | |
312 | { "uaddcm", 0x08000980, 0xfc000fe0, "Ux,b,t", pa10}, | |
313 | { "uaddcmt", 0x080009c0, 0xfc000fe0, "Ux,b,t", pa10}, | |
314 | { "dcor", 0x08000b80, 0xfc1f0fe0, "Ub,t", pa10}, | |
315 | { "idcor", 0x08000bc0, 0xfc1f0fe0, "Ub,t", pa10}, | |
316 | { "addi", 0xb4000000, 0xfc000800, "di,b,x", pa10}, | |
317 | { "addio", 0xb4000800, 0xfc000800, "di,b,x", pa10}, | |
318 | { "addit", 0xb0000000, 0xfc000800, "di,b,x", pa10}, | |
319 | { "addito", 0xb0000800, 0xfc000800, "di,b,x", pa10}, | |
320 | { "subi", 0x94000000, 0xfc000800, "ai,b,x", pa10}, | |
321 | { "subio", 0x94000800, 0xfc000800, "ai,b,x", pa10}, | |
322 | { "comiclr", 0x90000000, 0xfc000800, "ai,b,x", pa10}, | |
3b17ee1b KR |
323 | |
324 | /* Extract and Deposit Instructions */ | |
325 | ||
b5eab453 KR |
326 | { "vshd", 0xd0000000, 0xfc001fe0, ">x,b,t", pa10}, |
327 | { "shd", 0xd0000800, 0xfc001c00, ">x,b,p,t", pa10}, | |
328 | { "vextru", 0xd0001000, 0xfc001fe0, ">b,T,x", pa10}, | |
329 | { "vextrs", 0xd0001400, 0xfc001fe0, ">b,T,x", pa10}, | |
330 | { "extru", 0xd0001800, 0xfc001c00, ">b,P,T,x", pa10}, | |
331 | { "extrs", 0xd0001c00, 0xfc001c00, ">b,P,T,x", pa10}, | |
332 | { "zvdep", 0xd4000000, 0xfc001fe0, ">x,T,b", pa10}, | |
333 | { "vdep", 0xd4000400, 0xfc001fe0, ">x,T,b", pa10}, | |
334 | { "zdep", 0xd4000800, 0xfc001c00, ">x,p,T,b", pa10}, | |
335 | { "dep", 0xd4000c00, 0xfc001c00, ">x,p,T,b", pa10}, | |
336 | { "zvdepi", 0xd4001000, 0xfc001fe0, ">5,T,b", pa10}, | |
337 | { "vdepi", 0xd4001400, 0xfc001fe0, ">5,T,b", pa10}, | |
338 | { "zdepi", 0xd4001800, 0xfc001c00, ">5,p,T,b", pa10}, | |
339 | { "depi", 0xd4001c00, 0xfc001c00, ">5,p,T,b", pa10}, | |
3b17ee1b KR |
340 | |
341 | /* System Control Instructions */ | |
342 | ||
b5eab453 KR |
343 | { "break", 0x00000000, 0xfc001fe0, "r,A", pa10}, |
344 | { "rfi", 0x00000c00, 0xffffffff, "", pa10}, | |
345 | { "rfir", 0x00000ca0, 0xffffffff, "", pa11}, | |
346 | { "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10}, | |
347 | { "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10}, | |
348 | { "mtsm", 0x00001860, 0xffe0ffff, "x", pa10}, | |
349 | { "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10}, | |
350 | { "ldsid", 0x000010a0, 0xfc1f3fe0, "(b),t", pa10}, | |
351 | { "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10}, | |
352 | { "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10}, | |
353 | { "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10}, | |
354 | { "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10}, | |
355 | { "sync", 0x00000400, 0xffffffff, "", pa10}, | |
5a71a0f7 | 356 | { "syncdma", 0x00100400, 0xffffffff, "", pa10}, |
b5eab453 KR |
357 | { "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10}, |
358 | { "prober", 0x04001180, 0xfc003fe0, "(b),x,t", pa10}, | |
359 | { "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10}, | |
360 | { "proberi", 0x04003180, 0xfc003fe0, "(b),R,t", pa10}, | |
361 | { "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10}, | |
362 | { "probew", 0x040011c0, 0xfc003fe0, "(b),x,t", pa10}, | |
363 | { "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10}, | |
364 | { "probewi", 0x040031c0, 0xfc003fe0, "(b),R,t", pa10}, | |
365 | { "lpa", 0x04001340, 0xfc003fc0, "Zx(s,b),t", pa10}, | |
366 | { "lpa", 0x04001340, 0xfc003fc0, "Zx(b),t", pa10}, | |
367 | { "lha", 0x04001300, 0xfc003fc0, "Zx(s,b),t", pa10}, | |
368 | { "lha", 0x04001300, 0xfc003fc0, "Zx(b),t", pa10}, | |
898d1e23 JL |
369 | { "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa10}, |
370 | { "lci", 0x04001300, 0xfc003fe0, "x(b),t", pa10}, | |
b5eab453 KR |
371 | { "pdtlb", 0x04001200, 0xfc003fdf, "Zx(s,b)", pa10}, |
372 | { "pdtlb", 0x04001200, 0xfc003fdf, "Zx(b)", pa10}, | |
898d1e23 JL |
373 | { "pitlb", 0x04000200, 0xfc001fdf, "Zx(S,b)", pa10}, |
374 | { "pitlb", 0x04000200, 0xfc001fdf, "Zx(b)", pa10}, | |
b5eab453 KR |
375 | { "pdtlbe", 0x04001240, 0xfc003fdf, "Zx(s,b)", pa10}, |
376 | { "pdtlbe", 0x04001240, 0xfc003fdf, "Zx(b)", pa10}, | |
898d1e23 JL |
377 | { "pitlbe", 0x04000240, 0xfc001fdf, "Zx(S,b)", pa10}, |
378 | { "pitlbe", 0x04000240, 0xfc001fdf, "Zx(b)", pa10}, | |
b5eab453 KR |
379 | { "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10}, |
380 | { "idtlba", 0x04001040, 0xfc003fff, "x,(b)", pa10}, | |
898d1e23 JL |
381 | { "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10}, |
382 | { "iitlba", 0x04000040, 0xfc001fff, "x,(b)", pa10}, | |
b5eab453 KR |
383 | { "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10}, |
384 | { "idtlbp", 0x04001000, 0xfc003fff, "x,(b)", pa10}, | |
898d1e23 JL |
385 | { "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10}, |
386 | { "iitlbp", 0x04000000, 0xfc001fff, "x,(b)", pa10}, | |
b5eab453 KR |
387 | { "pdc", 0x04001380, 0xfc003fdf, "Zx(s,b)", pa10}, |
388 | { "pdc", 0x04001380, 0xfc003fdf, "Zx(b)", pa10}, | |
389 | { "fdc", 0x04001280, 0xfc003fdf, "Zx(s,b)", pa10}, | |
390 | { "fdc", 0x04001280, 0xfc003fdf, "Zx(b)", pa10}, | |
898d1e23 JL |
391 | { "fic", 0x04000280, 0xfc001fdf, "Zx(S,b)", pa10}, |
392 | { "fic", 0x04000280, 0xfc001fdf, "Zx(b)", pa10}, | |
b5eab453 KR |
393 | { "fdce", 0x040012c0, 0xfc003fdf, "Zx(s,b)", pa10}, |
394 | { "fdce", 0x040012c0, 0xfc003fdf, "Zx(b)", pa10}, | |
898d1e23 JL |
395 | { "fice", 0x040002c0, 0xfc001fdf, "Zx(S,b)", pa10}, |
396 | { "fice", 0x040002c0, 0xfc001fdf, "Zx(b)", pa10}, | |
b5eab453 | 397 | { "diag", 0x14000000, 0xfc000000, "D", pa10}, |
13a34399 JL |
398 | |
399 | /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either | |
400 | the Timex FPU or the Mustang ERS (not sure which) manual. */ | |
b5eab453 KR |
401 | { "gfw", 0x04001680, 0xfc003fdf, "Zx(s,b)", pa11}, |
402 | { "gfw", 0x04001680, 0xfc003fdf, "Zx(b)", pa11}, | |
403 | { "gfr", 0x04001a80, 0xfc003fdf, "Zx(s,b)", pa11}, | |
404 | { "gfr", 0x04001a80, 0xfc003fdf, "Zx(b)", pa11}, | |
3b17ee1b KR |
405 | |
406 | /* Floating Point Coprocessor Instructions */ | |
0b3ae811 | 407 | |
b5eab453 KR |
408 | { "fldwx", 0x24000000, 0xfc001f80, "cx(s,b),v", pa10}, |
409 | { "fldwx", 0x24000000, 0xfc001f80, "cx(b),v", pa10}, | |
410 | { "flddx", 0x2c000000, 0xfc001fc0, "cx(s,b),y", pa10}, | |
411 | { "flddx", 0x2c000000, 0xfc001fc0, "cx(b),y", pa10}, | |
412 | { "fstwx", 0x24000200, 0xfc001f80, "cv,x(s,b)", pa10}, | |
413 | { "fstwx", 0x24000200, 0xfc001f80, "cv,x(b)", pa10}, | |
414 | { "fstdx", 0x2c000200, 0xfc001fc0, "cy,x(s,b)", pa10}, | |
415 | { "fstdx", 0x2c000200, 0xfc001fc0, "cy,x(b)", pa10}, | |
416 | { "fstqx", 0x3c000200, 0xfc001fc0, "cy,x(s,b)", pa10}, | |
417 | { "fstqx", 0x3c000200, 0xfc001fc0, "cy,x(b)", pa10}, | |
898d1e23 JL |
418 | /* start-sanitize-cygnus */ |
419 | { "fldws", 0x5c000000, 0xfc000004, "gl(s,b),e", pa20}, | |
420 | { "fldws", 0x5c000000, 0xfc000004, "gl(b),e", pa20}, | |
421 | /* end-sanitize-cygnus */ | |
b5eab453 KR |
422 | { "fldws", 0x24001000, 0xfc001f80, "C5(s,b),v", pa10}, |
423 | { "fldws", 0x24001000, 0xfc001f80, "C5(b),v", pa10}, | |
898d1e23 JL |
424 | /* start-sanitize-cygnus */ |
425 | { "fldds", 0x50000002, 0xfc000002, "BL(s,b),x", pa20}, | |
426 | { "fldds", 0x50000002, 0xfc000002, "BL(b),x", pa20}, | |
427 | /* end-sanitize-cygnus */ | |
b5eab453 KR |
428 | { "fldds", 0x2c001000, 0xfc001fc0, "C5(s,b),y", pa10}, |
429 | { "fldds", 0x2c001000, 0xfc001fc0, "C5(b),y", pa10}, | |
898d1e23 JL |
430 | /* start-sanitize-cygnus */ |
431 | { "fstws", 0x7c000000, 0xfc000004, "ge,l(s,b)", pa20}, | |
432 | { "fstws", 0x7c000000, 0xfc000004, "ge,l(b)", pa20}, | |
433 | /* end-sanitize-cygnus */ | |
b5eab453 KR |
434 | { "fstws", 0x24001200, 0xfc001f80, "Cv,5(s,b)", pa10}, |
435 | { "fstws", 0x24001200, 0xfc001f80, "Cv,5(b)", pa10}, | |
898d1e23 JL |
436 | /* start-sanitize-cygnus */ |
437 | { "fstds", 0x70000002, 0xfc000002, "Bx,L(s,b)", pa20}, | |
438 | { "fstds", 0x70000002, 0xfc000002, "Bx,L(b)", pa20}, | |
439 | /* end-sanitize-cygnus */ | |
b5eab453 KR |
440 | { "fstds", 0x2c001200, 0xfc001fc0, "Cy,5(s,b)", pa10}, |
441 | { "fstds", 0x2c001200, 0xfc001fc0, "Cy,5(b)", pa10}, | |
442 | { "fstqs", 0x3c001200, 0xfc001fc0, "Cy,5(s,b)", pa10}, | |
443 | { "fstqs", 0x3c001200, 0xfc001fc0, "Cy,5(b)", pa10}, | |
444 | { "fadd", 0x30000600, 0xfc00e7e0, "FE,X,v", pa10}, | |
445 | { "fadd", 0x38000600, 0xfc00e720, "IJ,K,v", pa10}, | |
446 | { "fsub", 0x30002600, 0xfc00e7e0, "FE,X,v", pa10}, | |
447 | { "fsub", 0x38002600, 0xfc00e720, "IJ,K,v", pa10}, | |
448 | { "fmpy", 0x30004600, 0xfc00e7e0, "FE,X,v", pa10}, | |
449 | { "fmpy", 0x38004600, 0xfc00e720, "IJ,K,v", pa10}, | |
450 | { "fdiv", 0x30006600, 0xfc00e7e0, "FE,X,v", pa10}, | |
451 | { "fdiv", 0x38006600, 0xfc00e720, "IJ,K,v", pa10}, | |
452 | { "fsqrt", 0x30008000, 0xfc1fe7e0, "FE,v", pa10}, | |
453 | { "fsqrt", 0x38008000, 0xfc1fe720, "FJ,v", pa10}, | |
454 | { "fabs", 0x30006000, 0xfc1fe7e0, "FE,v", pa10}, | |
455 | { "fabs", 0x38006000, 0xfc1fe720, "FJ,v", pa10}, | |
456 | { "frem", 0x30008600, 0xfc00e7e0, "FE,X,v", pa10}, | |
457 | { "frem", 0x38008600, 0xfc00e720, "FJ,K,v", pa10}, | |
458 | { "frnd", 0x3000a000, 0xfc1fe7e0, "FE,v", pa10}, | |
459 | { "frnd", 0x3800a000, 0xfc1fe720, "FJ,v", pa10}, | |
460 | { "fcpy", 0x30004000, 0xfc1fe7e0, "FE,v", pa10}, | |
461 | { "fcpy", 0x38004000, 0xfc1fe720, "FJ,v", pa10}, | |
462 | { "fcnvff", 0x30000200, 0xfc1f87e0, "FGE,v", pa10}, | |
463 | { "fcnvff", 0x38000200, 0xfc1f8720, "FGJ,v", pa10}, | |
464 | { "fcnvxf", 0x30008200, 0xfc1f87e0, "FGE,v", pa10}, | |
465 | { "fcnvxf", 0x38008200, 0xfc1f8720, "FGJ,v", pa10}, | |
466 | { "fcnvfx", 0x30010200, 0xfc1f87e0, "FGE,v", pa10}, | |
467 | { "fcnvfx", 0x38010200, 0xfc1f8720, "FGJ,v", pa10}, | |
468 | { "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGE,v", pa10}, | |
469 | { "fcnvfxt", 0x38018200, 0xfc1f8720, "FGJ,v", pa10}, | |
898d1e23 JL |
470 | /* start-sanitize-cygnus */ |
471 | { "fmpyfadd", 0xb8000000, 0xfc000020, "FE,X,3,v", pa20}, | |
472 | { "fmpynfadd", 0xb8000020, 0xfc000020, "FE,X,3,v", pa20}, | |
473 | { "fneg", 0x3000c000, 0xfc1fe7e0, "FE,v", pa20}, | |
474 | { "fneg", 0x3800c000, 0xfc1fe720, "FJ,v", pa20}, | |
475 | { "fnegabs", 0x3000e000, 0xfc1fe7e0, "FE,v", pa20}, | |
476 | { "fnegabs", 0x3800e000, 0xfc1fe720, "FJ,v", pa20}, | |
477 | { "fcnvuf", 0x30028200, 0xfc1f87e0, "FGE,v", pa20}, | |
478 | { "fcnvuf", 0x38028200, 0xfc1f8720, "FGJ,v", pa20}, | |
479 | { "fcnvfu", 0x30030200, 0xfc1f87e0, "FGE,v", pa20}, | |
480 | { "fcnvfu", 0x38030200, 0xfc1f8720, "FGJ,v", pa20}, | |
481 | { "fcnvfut", 0x30038200, 0xfc1f87e0, "FGE,v", pa20}, | |
482 | { "fcnvfut", 0x38038200, 0xfc1f8720, "q_J,v", pa20}, | |
483 | { "fcnv", 0x30000200, 0xfc1c0720, "q_E,v", pa20}, | |
484 | { "fcnv", 0x38000200, 0xfc1c0720, "FGJ,v", pa20}, | |
485 | { "fcmp", 0x30000400, 0xfc0007e0, "FME,X,h", pa20}, | |
486 | /* end-sanitize-cygnus */ | |
b5eab453 | 487 | { "fcmp", 0x30000400, 0xfc00e7e0, "FME,X", pa10}, |
898d1e23 JL |
488 | /* start-sanitize-cygnus */ |
489 | { "fcmp", 0x38000400, 0xfc000720, "IMJ,K,h", pa20}, | |
490 | /* end-sanitize-cygnus */ | |
b5eab453 KR |
491 | { "fcmp", 0x38000400, 0xfc00e720, "IMJ,K", pa10}, |
492 | { "xmpyu", 0x38004700, 0xfc00e720, "E,X,v", pa11}, | |
493 | { "fmpyadd", 0x18000000, 0xfc000000, "H4,6,7,9,8", pa11}, | |
494 | { "fmpysub", 0x98000000, 0xfc000000, "H4,6,7,9,8", pa11}, | |
495 | { "ftest", 0x30002420, 0xffffffff, "", pa10}, | |
898d1e23 JL |
496 | /* start-sanitize-cygnus */ |
497 | { "ftest", 0x30002420, 0xffffffe0, ",=", pa20}, | |
498 | { "ftest", 0x30000420, 0xffff1fff, "m", pa20}, | |
499 | /* end-sanitize-cygnus */ | |
500 | { "fid", 0x30000000, 0xffffffff, "", pa11}, | |
3b17ee1b | 501 | |
0b3ae811 | 502 | |
3b17ee1b KR |
503 | /* Assist Instructions */ |
504 | ||
b5eab453 KR |
505 | { "spop0", 0x10000000, 0xfc000600, "f,ON", pa10}, |
506 | { "spop1", 0x10000200, 0xfc000600, "f,oNt", pa10}, | |
507 | { "spop2", 0x10000400, 0xfc000600, "f,1Nb", pa10}, | |
508 | { "spop3", 0x10000600, 0xfc000600, "f,0Nx,b", pa10}, | |
509 | { "copr", 0x30000000, 0xfc000000, "u,2N", pa10}, | |
510 | { "cldwx", 0x24000000, 0xfc001e00, "ucx(s,b),t", pa10}, | |
511 | { "cldwx", 0x24000000, 0xfc001e00, "ucx(b),t", pa10}, | |
512 | { "clddx", 0x2c000000, 0xfc001e00, "ucx(s,b),t", pa10}, | |
513 | { "clddx", 0x2c000000, 0xfc001e00, "ucx(b),t", pa10}, | |
514 | { "cstwx", 0x24000200, 0xfc001e00, "uct,x(s,b)", pa10}, | |
515 | { "cstwx", 0x24000200, 0xfc001e00, "uct,x(b)", pa10}, | |
516 | { "cstdx", 0x2c000200, 0xfc001e00, "uct,x(s,b)", pa10}, | |
517 | { "cstdx", 0x2c000200, 0xfc001e00, "uct,x(b)", pa10}, | |
518 | { "cldws", 0x24001000, 0xfc001e00, "uC5(s,b),t", pa10}, | |
519 | { "cldws", 0x24001000, 0xfc001e00, "uC5(b),t", pa10}, | |
520 | { "cldds", 0x2c001000, 0xfc001e00, "uC5(s,b),t", pa10}, | |
521 | { "cldds", 0x2c001000, 0xfc001e00, "uC5(b),t", pa10}, | |
522 | { "cstws", 0x24001200, 0xfc001e00, "uCt,5(s,b)", pa10}, | |
523 | { "cstws", 0x24001200, 0xfc001e00, "uCt,5(b)", pa10}, | |
524 | { "cstds", 0x2c001200, 0xfc001e00, "uCt,5(s,b)", pa10}, | |
525 | { "cstds", 0x2c001200, 0xfc001e00, "uCt,5(b)", pa10}, | |
3b17ee1b KR |
526 | }; |
527 | ||
528 | #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0])) | |
3b17ee1b KR |
529 | |
530 | /* SKV 12/18/92. Added some denotations for various operands. */ | |
531 | ||
532 | #define PA_IMM11_AT_31 'i' | |
533 | #define PA_IMM14_AT_31 'j' | |
534 | #define PA_IMM21_AT_31 'k' | |
535 | #define PA_DISP12 'w' | |
536 | #define PA_DISP17 'W' | |
537 | ||
538 | #define N_HPPA_OPERAND_FORMATS 5 |