projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 4162bb66 | 1 | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
| 49f58d10 JB |
2 | /* Instruction building/extraction support for m32c. -*- C -*- |
| 3 | ||
| e729279b NC |
4 | THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. |
| 5 | - the resultant file is machine generated, cgen-ibld.in isn't | |
| 49f58d10 | 6 | |
| 250d07de | 7 | Copyright (C) 1996-2021 Free Software Foundation, Inc. |
| 49f58d10 | 8 | |
| 9b201bb5 | 9 | This file is part of libopcodes. |
| 49f58d10 | 10 | |
| 9b201bb5 | 11 | This library is free software; you can redistribute it and/or modify |
| e729279b | 12 | it under the terms of the GNU General Public License as published by |
| 9b201bb5 | 13 | the Free Software Foundation; either version 3, or (at your option) |
| e729279b | 14 | any later version. |
| 49f58d10 | 15 | |
| 9b201bb5 NC |
16 | It is distributed in the hope that it will be useful, but WITHOUT |
| 17 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 18 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 19 | License for more details. | |
| 49f58d10 | 20 | |
| e729279b NC |
21 | You should have received a copy of the GNU General Public License |
| 22 | along with this program; if not, write to the Free Software Foundation, Inc., | |
| 23 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
| 49f58d10 JB |
24 | |
| 25 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
| 26 | Keep that in mind. */ | |
| 27 | ||
| 28 | #include "sysdep.h" | |
| 29 | #include <stdio.h> | |
| 30 | #include "ansidecl.h" | |
| 31 | #include "dis-asm.h" | |
| 32 | #include "bfd.h" | |
| 33 | #include "symcat.h" | |
| 34 | #include "m32c-desc.h" | |
| 35 | #include "m32c-opc.h" | |
| fe8afbc4 | 36 | #include "cgen/basic-modes.h" |
| 49f58d10 JB |
37 | #include "opintl.h" |
| 38 | #include "safe-ctype.h" | |
| 39 | ||
| e729279b | 40 | #undef min |
| 49f58d10 | 41 | #define min(a,b) ((a) < (b) ? (a) : (b)) |
| e729279b | 42 | #undef max |
| 49f58d10 JB |
43 | #define max(a,b) ((a) > (b) ? (a) : (b)) |
| 44 | ||
| 45 | /* Used by the ifield rtx function. */ | |
| 46 | #define FLD(f) (fields->f) | |
| 47 | ||
| 48 | static const char * insert_normal | |
| 49 | (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, | |
| 50 | unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); | |
| 51 | static const char * insert_insn_normal | |
| 52 | (CGEN_CPU_DESC, const CGEN_INSN *, | |
| 53 | CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); | |
| 54 | static int extract_normal | |
| 55 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, | |
| 56 | unsigned int, unsigned int, unsigned int, unsigned int, | |
| 57 | unsigned int, unsigned int, bfd_vma, long *); | |
| 58 | static int extract_insn_normal | |
| 59 | (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, | |
| 60 | CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); | |
| 61 | #if CGEN_INT_INSN_P | |
| 62 | static void put_insn_int_value | |
| 63 | (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); | |
| 64 | #endif | |
| 65 | #if ! CGEN_INT_INSN_P | |
| 66 | static CGEN_INLINE void insert_1 | |
| 67 | (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); | |
| 68 | static CGEN_INLINE int fill_cache | |
| 69 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); | |
| 70 | static CGEN_INLINE long extract_1 | |
| 71 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); | |
| 72 | #endif | |
| 73 | \f | |
| 74 | /* Operand insertion. */ | |
| 75 | ||
| 76 | #if ! CGEN_INT_INSN_P | |
| 77 | ||
| 78 | /* Subroutine of insert_normal. */ | |
| 79 | ||
| 80 | static CGEN_INLINE void | |
| 81 | insert_1 (CGEN_CPU_DESC cd, | |
| 82 | unsigned long value, | |
| 83 | int start, | |
| 84 | int length, | |
| 85 | int word_length, | |
| 86 | unsigned char *bufp) | |
| 87 | { | |
| a1e60a1b | 88 | unsigned long x, mask; |
| 49f58d10 JB |
89 | int shift; |
| 90 | ||
| e9bffec9 | 91 | x = cgen_get_insn_value (cd, bufp, word_length, cd->endian); |
| 49f58d10 JB |
92 | |
| 93 | /* Written this way to avoid undefined behaviour. */ | |
| a1e60a1b | 94 | mask = (1UL << (length - 1) << 1) - 1; |
| 49f58d10 JB |
95 | if (CGEN_INSN_LSB0_P) |
| 96 | shift = (start + 1) - length; | |
| 97 | else | |
| 98 | shift = (word_length - (start + length)); | |
| 99 | x = (x & ~(mask << shift)) | ((value & mask) << shift); | |
| 100 | ||
| e9bffec9 | 101 | cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian); |
| 49f58d10 JB |
102 | } |
| 103 | ||
| 104 | #endif /* ! CGEN_INT_INSN_P */ | |
| 105 | ||
| 106 | /* Default insertion routine. | |
| 107 | ||
| 108 | ATTRS is a mask of the boolean attributes. | |
| 109 | WORD_OFFSET is the offset in bits from the start of the insn of the value. | |
| 110 | WORD_LENGTH is the length of the word in bits in which the value resides. | |
| 111 | START is the starting bit number in the word, architecture origin. | |
| 112 | LENGTH is the length of VALUE in bits. | |
| 113 | TOTAL_LENGTH is the total length of the insn in bits. | |
| 114 | ||
| 115 | The result is an error message or NULL if success. */ | |
| 116 | ||
| 117 | /* ??? This duplicates functionality with bfd's howto table and | |
| 118 | bfd_install_relocation. */ | |
| 119 | /* ??? This doesn't handle bfd_vma's. Create another function when | |
| 120 | necessary. */ | |
| 121 | ||
| 122 | static const char * | |
| 123 | insert_normal (CGEN_CPU_DESC cd, | |
| 124 | long value, | |
| 125 | unsigned int attrs, | |
| 126 | unsigned int word_offset, | |
| 127 | unsigned int start, | |
| 128 | unsigned int length, | |
| 129 | unsigned int word_length, | |
| 130 | unsigned int total_length, | |
| 131 | CGEN_INSN_BYTES_PTR buffer) | |
| 132 | { | |
| 133 | static char errbuf[100]; | |
| a1e60a1b | 134 | unsigned long mask; |
| 49f58d10 JB |
135 | |
| 136 | /* If LENGTH is zero, this operand doesn't contribute to the value. */ | |
| 137 | if (length == 0) | |
| 138 | return NULL; | |
| 139 | ||
| a1e60a1b AM |
140 | /* Written this way to avoid undefined behaviour. */ |
| 141 | mask = (1UL << (length - 1) << 1) - 1; | |
| 142 | ||
| b7cd1872 | 143 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 49f58d10 JB |
144 | abort (); |
| 145 | ||
| 146 | /* For architectures with insns smaller than the base-insn-bitsize, | |
| 147 | word_length may be too big. */ | |
| 148 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) | |
| 149 | { | |
| 150 | if (word_offset == 0 | |
| 151 | && word_length > total_length) | |
| 152 | word_length = total_length; | |
| 153 | } | |
| 154 | ||
| 155 | /* Ensure VALUE will fit. */ | |
| 156 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) | |
| 157 | { | |
| ae3e98b4 | 158 | long minval = - (1UL << (length - 1)); |
| 49f58d10 | 159 | unsigned long maxval = mask; |
| 43e65147 | 160 | |
| 49f58d10 JB |
161 | if ((value > 0 && (unsigned long) value > maxval) |
| 162 | || value < minval) | |
| 163 | { | |
| 164 | /* xgettext:c-format */ | |
| 165 | sprintf (errbuf, | |
| 166 | _("operand out of range (%ld not between %ld and %lu)"), | |
| 167 | value, minval, maxval); | |
| 168 | return errbuf; | |
| 169 | } | |
| 170 | } | |
| 171 | else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) | |
| 172 | { | |
| 173 | unsigned long maxval = mask; | |
| ed963e2d NC |
174 | unsigned long val = (unsigned long) value; |
| 175 | ||
| 176 | /* For hosts with a word size > 32 check to see if value has been sign | |
| 177 | extended beyond 32 bits. If so then ignore these higher sign bits | |
| 178 | as the user is attempting to store a 32-bit signed value into an | |
| 179 | unsigned 32-bit field which is allowed. */ | |
| 180 | if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) | |
| 181 | val &= 0xFFFFFFFF; | |
| 182 | ||
| 183 | if (val > maxval) | |
| 49f58d10 JB |
184 | { |
| 185 | /* xgettext:c-format */ | |
| 186 | sprintf (errbuf, | |
| ed963e2d NC |
187 | _("operand out of range (0x%lx not between 0 and 0x%lx)"), |
| 188 | val, maxval); | |
| 49f58d10 JB |
189 | return errbuf; |
| 190 | } | |
| 191 | } | |
| 192 | else | |
| 193 | { | |
| 194 | if (! cgen_signed_overflow_ok_p (cd)) | |
| 195 | { | |
| ae3e98b4 AM |
196 | long minval = - (1UL << (length - 1)); |
| 197 | long maxval = (1UL << (length - 1)) - 1; | |
| 43e65147 | 198 | |
| 49f58d10 JB |
199 | if (value < minval || value > maxval) |
| 200 | { | |
| 201 | sprintf | |
| 202 | /* xgettext:c-format */ | |
| 203 | (errbuf, _("operand out of range (%ld not between %ld and %ld)"), | |
| 204 | value, minval, maxval); | |
| 205 | return errbuf; | |
| 206 | } | |
| 207 | } | |
| 208 | } | |
| 209 | ||
| 210 | #if CGEN_INT_INSN_P | |
| 211 | ||
| 212 | { | |
| a143b004 | 213 | int shift_within_word, shift_to_word, shift; |
| 49f58d10 | 214 | |
| a143b004 AB |
215 | /* How to shift the value to BIT0 of the word. */ |
| 216 | shift_to_word = total_length - (word_offset + word_length); | |
| 217 | ||
| 218 | /* How to shift the value to the field within the word. */ | |
| 49f58d10 | 219 | if (CGEN_INSN_LSB0_P) |
| a143b004 | 220 | shift_within_word = start + 1 - length; |
| 49f58d10 | 221 | else |
| a143b004 AB |
222 | shift_within_word = word_length - start - length; |
| 223 | ||
| 224 | /* The total SHIFT, then mask in the value. */ | |
| 225 | shift = shift_to_word + shift_within_word; | |
| 49f58d10 JB |
226 | *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); |
| 227 | } | |
| 228 | ||
| 229 | #else /* ! CGEN_INT_INSN_P */ | |
| 230 | ||
| 231 | { | |
| 232 | unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; | |
| 233 | ||
| 234 | insert_1 (cd, value, start, length, word_length, bufp); | |
| 235 | } | |
| 236 | ||
| 237 | #endif /* ! CGEN_INT_INSN_P */ | |
| 238 | ||
| 239 | return NULL; | |
| 240 | } | |
| 241 | ||
| 242 | /* Default insn builder (insert handler). | |
| 243 | The instruction is recorded in CGEN_INT_INSN_P byte order (meaning | |
| 244 | that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is | |
| 245 | recorded in host byte order, otherwise BUFFER is an array of bytes | |
| 246 | and the value is recorded in target byte order). | |
| 247 | The result is an error message or NULL if success. */ | |
| 248 | ||
| 249 | static const char * | |
| 250 | insert_insn_normal (CGEN_CPU_DESC cd, | |
| 251 | const CGEN_INSN * insn, | |
| 252 | CGEN_FIELDS * fields, | |
| 253 | CGEN_INSN_BYTES_PTR buffer, | |
| 254 | bfd_vma pc) | |
| 255 | { | |
| 256 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
| 257 | unsigned long value; | |
| 258 | const CGEN_SYNTAX_CHAR_TYPE * syn; | |
| 259 | ||
| 260 | CGEN_INIT_INSERT (cd); | |
| 261 | value = CGEN_INSN_BASE_VALUE (insn); | |
| 262 | ||
| 263 | /* If we're recording insns as numbers (rather than a string of bytes), | |
| 264 | target byte order handling is deferred until later. */ | |
| 265 | ||
| 266 | #if CGEN_INT_INSN_P | |
| 267 | ||
| 268 | put_insn_int_value (cd, buffer, cd->base_insn_bitsize, | |
| 269 | CGEN_FIELDS_BITSIZE (fields), value); | |
| 270 | ||
| 271 | #else | |
| 272 | ||
| 273 | cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, | |
| e9bffec9 JM |
274 | (unsigned) CGEN_FIELDS_BITSIZE (fields)), |
| 275 | value, cd->insn_endian); | |
| 49f58d10 JB |
276 | |
| 277 | #endif /* ! CGEN_INT_INSN_P */ | |
| 278 | ||
| 279 | /* ??? It would be better to scan the format's fields. | |
| 280 | Still need to be able to insert a value based on the operand though; | |
| 281 | e.g. storing a branch displacement that got resolved later. | |
| 282 | Needs more thought first. */ | |
| 283 | ||
| 284 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) | |
| 285 | { | |
| 286 | const char *errmsg; | |
| 287 | ||
| 288 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
| 289 | continue; | |
| 290 | ||
| 291 | errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), | |
| 292 | fields, buffer, pc); | |
| 293 | if (errmsg) | |
| 294 | return errmsg; | |
| 295 | } | |
| 296 | ||
| 297 | return NULL; | |
| 298 | } | |
| 299 | ||
| 300 | #if CGEN_INT_INSN_P | |
| 301 | /* Cover function to store an insn value into an integral insn. Must go here | |
| e729279b | 302 | because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ |
| 49f58d10 JB |
303 | |
| 304 | static void | |
| 305 | put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
| 306 | CGEN_INSN_BYTES_PTR buf, | |
| 307 | int length, | |
| 308 | int insn_length, | |
| 309 | CGEN_INSN_INT value) | |
| 310 | { | |
| 311 | /* For architectures with insns smaller than the base-insn-bitsize, | |
| 312 | length may be too big. */ | |
| 313 | if (length > insn_length) | |
| 314 | *buf = value; | |
| 315 | else | |
| 316 | { | |
| 317 | int shift = insn_length - length; | |
| 318 | /* Written this way to avoid undefined behaviour. */ | |
| a1e60a1b | 319 | CGEN_INSN_INT mask = length == 0 ? 0 : (1UL << (length - 1) << 1) - 1; |
| e729279b | 320 | |
| 49f58d10 JB |
321 | *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); |
| 322 | } | |
| 323 | } | |
| 324 | #endif | |
| 325 | \f | |
| 326 | /* Operand extraction. */ | |
| 327 | ||
| 328 | #if ! CGEN_INT_INSN_P | |
| 329 | ||
| 330 | /* Subroutine of extract_normal. | |
| 331 | Ensure sufficient bytes are cached in EX_INFO. | |
| 332 | OFFSET is the offset in bytes from the start of the insn of the value. | |
| 333 | BYTES is the length of the needed value. | |
| 334 | Returns 1 for success, 0 for failure. */ | |
| 335 | ||
| 336 | static CGEN_INLINE int | |
| 337 | fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
| 338 | CGEN_EXTRACT_INFO *ex_info, | |
| 339 | int offset, | |
| 340 | int bytes, | |
| 341 | bfd_vma pc) | |
| 342 | { | |
| 343 | /* It's doubtful that the middle part has already been fetched so | |
| 344 | we don't optimize that case. kiss. */ | |
| 345 | unsigned int mask; | |
| 346 | disassemble_info *info = (disassemble_info *) ex_info->dis_info; | |
| 347 | ||
| 348 | /* First do a quick check. */ | |
| 349 | mask = (1 << bytes) - 1; | |
| 350 | if (((ex_info->valid >> offset) & mask) == mask) | |
| 351 | return 1; | |
| 352 | ||
| 353 | /* Search for the first byte we need to read. */ | |
| 354 | for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) | |
| 355 | if (! (mask & ex_info->valid)) | |
| 356 | break; | |
| 357 | ||
| 358 | if (bytes) | |
| 359 | { | |
| 360 | int status; | |
| 361 | ||
| 362 | pc += offset; | |
| 363 | status = (*info->read_memory_func) | |
| 364 | (pc, ex_info->insn_bytes + offset, bytes, info); | |
| 365 | ||
| 366 | if (status != 0) | |
| 367 | { | |
| 368 | (*info->memory_error_func) (status, pc, info); | |
| 369 | return 0; | |
| 370 | } | |
| 371 | ||
| 372 | ex_info->valid |= ((1 << bytes) - 1) << offset; | |
| 373 | } | |
| 374 | ||
| 375 | return 1; | |
| 376 | } | |
| 377 | ||
| 378 | /* Subroutine of extract_normal. */ | |
| 379 | ||
| 380 | static CGEN_INLINE long | |
| 381 | extract_1 (CGEN_CPU_DESC cd, | |
| 382 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, | |
| 383 | int start, | |
| 384 | int length, | |
| 385 | int word_length, | |
| 386 | unsigned char *bufp, | |
| 387 | bfd_vma pc ATTRIBUTE_UNUSED) | |
| 388 | { | |
| 389 | unsigned long x; | |
| 390 | int shift; | |
| e729279b | 391 | |
| e9bffec9 | 392 | x = cgen_get_insn_value (cd, bufp, word_length, cd->endian); |
| 49f58d10 JB |
393 | |
| 394 | if (CGEN_INSN_LSB0_P) | |
| 395 | shift = (start + 1) - length; | |
| 396 | else | |
| 397 | shift = (word_length - (start + length)); | |
| 398 | return x >> shift; | |
| 399 | } | |
| 400 | ||
| 401 | #endif /* ! CGEN_INT_INSN_P */ | |
| 402 | ||
| 403 | /* Default extraction routine. | |
| 404 | ||
| 405 | INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, | |
| 406 | or sometimes less for cases like the m32r where the base insn size is 32 | |
| 407 | but some insns are 16 bits. | |
| 408 | ATTRS is a mask of the boolean attributes. We only need `SIGNED', | |
| 409 | but for generality we take a bitmask of all of them. | |
| 410 | WORD_OFFSET is the offset in bits from the start of the insn of the value. | |
| 411 | WORD_LENGTH is the length of the word in bits in which the value resides. | |
| 412 | START is the starting bit number in the word, architecture origin. | |
| 413 | LENGTH is the length of VALUE in bits. | |
| 414 | TOTAL_LENGTH is the total length of the insn in bits. | |
| 415 | ||
| 416 | Returns 1 for success, 0 for failure. */ | |
| 417 | ||
| 418 | /* ??? The return code isn't properly used. wip. */ | |
| 419 | ||
| 420 | /* ??? This doesn't handle bfd_vma's. Create another function when | |
| 421 | necessary. */ | |
| 422 | ||
| 423 | static int | |
| 424 | extract_normal (CGEN_CPU_DESC cd, | |
| 425 | #if ! CGEN_INT_INSN_P | |
| 426 | CGEN_EXTRACT_INFO *ex_info, | |
| 427 | #else | |
| 428 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, | |
| 429 | #endif | |
| 430 | CGEN_INSN_INT insn_value, | |
| 431 | unsigned int attrs, | |
| 432 | unsigned int word_offset, | |
| 433 | unsigned int start, | |
| 434 | unsigned int length, | |
| 435 | unsigned int word_length, | |
| 436 | unsigned int total_length, | |
| 437 | #if ! CGEN_INT_INSN_P | |
| 438 | bfd_vma pc, | |
| 439 | #else | |
| 440 | bfd_vma pc ATTRIBUTE_UNUSED, | |
| 441 | #endif | |
| 442 | long *valuep) | |
| 443 | { | |
| 444 | long value, mask; | |
| 445 | ||
| 446 | /* If LENGTH is zero, this operand doesn't contribute to the value | |
| 447 | so give it a standard value of zero. */ | |
| 448 | if (length == 0) | |
| 449 | { | |
| 450 | *valuep = 0; | |
| 451 | return 1; | |
| 452 | } | |
| 453 | ||
| b7cd1872 | 454 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 49f58d10 JB |
455 | abort (); |
| 456 | ||
| 457 | /* For architectures with insns smaller than the insn-base-bitsize, | |
| 458 | word_length may be too big. */ | |
| 459 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) | |
| 460 | { | |
| 54d46aca DD |
461 | if (word_offset + word_length > total_length) |
| 462 | word_length = total_length - word_offset; | |
| 49f58d10 JB |
463 | } |
| 464 | ||
| 465 | /* Does the value reside in INSN_VALUE, and at the right alignment? */ | |
| 466 | ||
| 467 | if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) | |
| 468 | { | |
| 469 | if (CGEN_INSN_LSB0_P) | |
| 470 | value = insn_value >> ((word_offset + start + 1) - length); | |
| 471 | else | |
| 472 | value = insn_value >> (total_length - ( word_offset + start + length)); | |
| 473 | } | |
| 474 | ||
| 475 | #if ! CGEN_INT_INSN_P | |
| 476 | ||
| 477 | else | |
| 478 | { | |
| 479 | unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; | |
| 480 | ||
| b7cd1872 | 481 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 49f58d10 JB |
482 | abort (); |
| 483 | ||
| 484 | if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) | |
| 2f5dd314 AM |
485 | { |
| 486 | *valuep = 0; | |
| 487 | return 0; | |
| 488 | } | |
| 49f58d10 JB |
489 | |
| 490 | value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); | |
| 491 | } | |
| 492 | ||
| 493 | #endif /* ! CGEN_INT_INSN_P */ | |
| 494 | ||
| 495 | /* Written this way to avoid undefined behaviour. */ | |
| a1e60a1b | 496 | mask = (1UL << (length - 1) << 1) - 1; |
| 49f58d10 JB |
497 | |
| 498 | value &= mask; | |
| 499 | /* sign extend? */ | |
| 500 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) | |
| ae3e98b4 | 501 | && (value & (1UL << (length - 1)))) |
| 49f58d10 JB |
502 | value |= ~mask; |
| 503 | ||
| 504 | *valuep = value; | |
| 505 | ||
| 506 | return 1; | |
| 507 | } | |
| 508 | ||
| 509 | /* Default insn extractor. | |
| 510 | ||
| 511 | INSN_VALUE is the first base_insn_bitsize bits, translated to host order. | |
| 512 | The extracted fields are stored in FIELDS. | |
| 513 | EX_INFO is used to handle reading variable length insns. | |
| 514 | Return the length of the insn in bits, or 0 if no match, | |
| 515 | or -1 if an error occurs fetching data (memory_error_func will have | |
| 516 | been called). */ | |
| 517 | ||
| 518 | static int | |
| 519 | extract_insn_normal (CGEN_CPU_DESC cd, | |
| 520 | const CGEN_INSN *insn, | |
| 521 | CGEN_EXTRACT_INFO *ex_info, | |
| 522 | CGEN_INSN_INT insn_value, | |
| 523 | CGEN_FIELDS *fields, | |
| 524 | bfd_vma pc) | |
| 525 | { | |
| 526 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
| 527 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
| 528 | ||
| 529 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
| 530 | ||
| 531 | CGEN_INIT_EXTRACT (cd); | |
| 532 | ||
| 533 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
| 534 | { | |
| 535 | int length; | |
| 536 | ||
| 537 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
| 538 | continue; | |
| 539 | ||
| 540 | length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), | |
| 541 | ex_info, insn_value, fields, pc); | |
| 542 | if (length <= 0) | |
| 543 | return length; | |
| 544 | } | |
| 545 | ||
| 546 | /* We recognized and successfully extracted this insn. */ | |
| 547 | return CGEN_INSN_BITSIZE (insn); | |
| 548 | } | |
| 549 | \f | |
| e729279b | 550 | /* Machine generated code added here. */ |
| 49f58d10 JB |
551 | |
| 552 | const char * m32c_cgen_insert_operand | |
| e729279b | 553 | (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 49f58d10 JB |
554 | |
| 555 | /* Main entry point for operand insertion. | |
| 556 | ||
| 557 | This function is basically just a big switch statement. Earlier versions | |
| 558 | used tables to look up the function to use, but | |
| 559 | - if the table contains both assembler and disassembler functions then | |
| 560 | the disassembler contains much of the assembler and vice-versa, | |
| 561 | - there's a lot of inlining possibilities as things grow, | |
| 562 | - using a switch statement avoids the function call overhead. | |
| 563 | ||
| 564 | This function could be moved into `parse_insn_normal', but keeping it | |
| 565 | separate makes clear the interface between `parse_insn_normal' and each of | |
| 566 | the handlers. It's also needed by GAS to insert operands that couldn't be | |
| 567 | resolved during parsing. */ | |
| 568 | ||
| 569 | const char * | |
| e729279b NC |
570 | m32c_cgen_insert_operand (CGEN_CPU_DESC cd, |
| 571 | int opindex, | |
| 572 | CGEN_FIELDS * fields, | |
| 573 | CGEN_INSN_BYTES_PTR buffer, | |
| 574 | bfd_vma pc ATTRIBUTE_UNUSED) | |
| 49f58d10 JB |
575 | { |
| 576 | const char * errmsg = NULL; | |
| 577 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); | |
| 578 | ||
| 579 | switch (opindex) | |
| 580 | { | |
| 581 | case M32C_OPERAND_A0 : | |
| 582 | break; | |
| 583 | case M32C_OPERAND_A1 : | |
| 584 | break; | |
| 585 | case M32C_OPERAND_AN16_PUSH_S : | |
| 586 | errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); | |
| 587 | break; | |
| 588 | case M32C_OPERAND_BIT16AN : | |
| 589 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
| 590 | break; | |
| 591 | case M32C_OPERAND_BIT16RN : | |
| 592 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
| 593 | break; | |
| 5398310a DD |
594 | case M32C_OPERAND_BIT3_S : |
| 595 | { | |
| 596 | { | |
| 597 | FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); | |
| fe8afbc4 | 598 | FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); |
| 5398310a DD |
599 | } |
| 600 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); | |
| 601 | if (errmsg) | |
| 602 | break; | |
| 603 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
| 604 | if (errmsg) | |
| 605 | break; | |
| 606 | } | |
| 607 | break; | |
| 49f58d10 JB |
608 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 609 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
| 610 | break; | |
| 611 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
| 612 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 613 | break; | |
| 614 | case M32C_OPERAND_BIT32RNPREFIXED : | |
| 615 | { | |
| 616 | long value = fields->f_dst32_rn_prefixed_QI; | |
| 0c115f84 | 617 | value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1)))); |
| 49f58d10 JB |
618 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); |
| 619 | } | |
| 620 | break; | |
| 621 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
| 622 | { | |
| 623 | long value = fields->f_dst32_rn_unprefixed_QI; | |
| 0c115f84 | 624 | value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1)))); |
| 49f58d10 JB |
625 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); |
| 626 | } | |
| 627 | break; | |
| 628 | case M32C_OPERAND_BITBASE16_16_S8 : | |
| 629 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
| 630 | break; | |
| 631 | case M32C_OPERAND_BITBASE16_16_U16 : | |
| 632 | { | |
| 633 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 634 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
635 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 636 | } | |
| 637 | break; | |
| 638 | case M32C_OPERAND_BITBASE16_16_U8 : | |
| 639 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
| 640 | break; | |
| 641 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
| 642 | { | |
| 643 | { | |
| 644 | FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7)); | |
| fe8afbc4 | 645 | FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); |
| 49f58d10 JB |
646 | } |
| 647 | errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer); | |
| 648 | if (errmsg) | |
| 649 | break; | |
| 650 | errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); | |
| 651 | if (errmsg) | |
| 652 | break; | |
| 653 | } | |
| 654 | break; | |
| 655 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
| 656 | { | |
| 657 | { | |
| 658 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7)); | |
| fe8afbc4 | 659 | FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); |
| 49f58d10 JB |
660 | } |
| 661 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
| 662 | if (errmsg) | |
| 663 | break; | |
| 664 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
| 665 | if (errmsg) | |
| 666 | break; | |
| 667 | } | |
| 668 | break; | |
| 669 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
| 670 | { | |
| 671 | { | |
| 672 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7)); | |
| fe8afbc4 | 673 | FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); |
| 49f58d10 JB |
674 | } |
| 675 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
| 676 | if (errmsg) | |
| 677 | break; | |
| 678 | { | |
| 679 | long value = fields->f_dsp_16_s16; | |
| cc6aa1a6 | 680 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
681 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 682 | } | |
| 683 | if (errmsg) | |
| 684 | break; | |
| 685 | } | |
| 686 | break; | |
| 687 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
| 688 | { | |
| 689 | { | |
| 690 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7)); | |
| fe8afbc4 | 691 | FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); |
| 49f58d10 JB |
692 | } |
| 693 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
| 694 | if (errmsg) | |
| 695 | break; | |
| 696 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
| 697 | if (errmsg) | |
| 698 | break; | |
| 699 | } | |
| 700 | break; | |
| 701 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
| 702 | { | |
| 703 | { | |
| 704 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7)); | |
| fe8afbc4 | 705 | FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); |
| 49f58d10 JB |
706 | } |
| 707 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
| 708 | if (errmsg) | |
| 709 | break; | |
| 710 | { | |
| 711 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 712 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
713 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 714 | } | |
| 715 | if (errmsg) | |
| 716 | break; | |
| 717 | } | |
| 718 | break; | |
| 719 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
| 720 | { | |
| 721 | { | |
| 722 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7)); | |
| fe8afbc4 DE |
723 | FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); |
| 724 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); | |
| 49f58d10 JB |
725 | } |
| 726 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
| 727 | if (errmsg) | |
| 728 | break; | |
| 729 | { | |
| 730 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 731 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
732 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 733 | } | |
| 734 | if (errmsg) | |
| 735 | break; | |
| 736 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 737 | if (errmsg) | |
| 738 | break; | |
| 739 | } | |
| 740 | break; | |
| 741 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
| 742 | { | |
| 743 | { | |
| 744 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7)); | |
| fe8afbc4 | 745 | FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); |
| 49f58d10 JB |
746 | } |
| 747 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
| 748 | if (errmsg) | |
| 749 | break; | |
| 750 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); | |
| 751 | if (errmsg) | |
| 752 | break; | |
| 753 | } | |
| 754 | break; | |
| 755 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
| 756 | { | |
| 757 | { | |
| 758 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7)); | |
| fe8afbc4 DE |
759 | FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); |
| 760 | FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); | |
| 49f58d10 JB |
761 | } |
| 762 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
| 763 | if (errmsg) | |
| 764 | break; | |
| 765 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 766 | if (errmsg) | |
| 767 | break; | |
| 768 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); | |
| 769 | if (errmsg) | |
| 770 | break; | |
| 771 | } | |
| 772 | break; | |
| 773 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
| 774 | { | |
| 775 | { | |
| 776 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7)); | |
| fe8afbc4 | 777 | FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); |
| 49f58d10 JB |
778 | } |
| 779 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
| 780 | if (errmsg) | |
| 781 | break; | |
| 782 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 783 | if (errmsg) | |
| 784 | break; | |
| 785 | } | |
| 786 | break; | |
| 787 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
| 788 | { | |
| 789 | { | |
| 790 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7)); | |
| fe8afbc4 DE |
791 | FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); |
| 792 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); | |
| 49f58d10 JB |
793 | } |
| 794 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
| 795 | if (errmsg) | |
| 796 | break; | |
| 797 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 798 | if (errmsg) | |
| 799 | break; | |
| 800 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 801 | if (errmsg) | |
| 802 | break; | |
| 803 | } | |
| 804 | break; | |
| 805 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
| 806 | { | |
| 807 | { | |
| 808 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7)); | |
| fe8afbc4 DE |
809 | FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); |
| 810 | FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); | |
| 49f58d10 JB |
811 | } |
| 812 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
| 813 | if (errmsg) | |
| 814 | break; | |
| 815 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 816 | if (errmsg) | |
| 817 | break; | |
| 818 | { | |
| 819 | long value = fields->f_dsp_32_u16; | |
| cc6aa1a6 | 820 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
821 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 822 | } | |
| 823 | if (errmsg) | |
| 824 | break; | |
| 825 | } | |
| 826 | break; | |
| 827 | case M32C_OPERAND_BITNO16R : | |
| 828 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
| 829 | break; | |
| 830 | case M32C_OPERAND_BITNO32PREFIXED : | |
| 831 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
| 832 | break; | |
| 833 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
| 834 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
| 835 | break; | |
| 836 | case M32C_OPERAND_DSP_10_U6 : | |
| 837 | errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer); | |
| 838 | break; | |
| 839 | case M32C_OPERAND_DSP_16_S16 : | |
| 840 | { | |
| 841 | long value = fields->f_dsp_16_s16; | |
| cc6aa1a6 | 842 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
843 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 844 | } | |
| 845 | break; | |
| 846 | case M32C_OPERAND_DSP_16_S8 : | |
| 847 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
| 848 | break; | |
| 849 | case M32C_OPERAND_DSP_16_U16 : | |
| 850 | { | |
| 851 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 852 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
853 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 854 | } | |
| 855 | break; | |
| 856 | case M32C_OPERAND_DSP_16_U20 : | |
| 857 | { | |
| 858 | { | |
| 859 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); | |
| fe8afbc4 | 860 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); |
| 49f58d10 JB |
861 | } |
| 862 | { | |
| 863 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 864 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
865 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 866 | } | |
| 867 | if (errmsg) | |
| 868 | break; | |
| 869 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 870 | if (errmsg) | |
| 871 | break; | |
| 872 | } | |
| 873 | break; | |
| 874 | case M32C_OPERAND_DSP_16_U24 : | |
| 875 | { | |
| 876 | { | |
| 877 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); | |
| fe8afbc4 | 878 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); |
| 49f58d10 JB |
879 | } |
| 880 | { | |
| 881 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 882 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
883 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 884 | } | |
| 885 | if (errmsg) | |
| 886 | break; | |
| 887 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 888 | if (errmsg) | |
| 889 | break; | |
| 890 | } | |
| 891 | break; | |
| 892 | case M32C_OPERAND_DSP_16_U8 : | |
| 893 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
| 894 | break; | |
| 895 | case M32C_OPERAND_DSP_24_S16 : | |
| 896 | { | |
| 897 | { | |
| 898 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); | |
| fe8afbc4 | 899 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); |
| 49f58d10 JB |
900 | } |
| 901 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 902 | if (errmsg) | |
| 903 | break; | |
| 904 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 905 | if (errmsg) | |
| 906 | break; | |
| 907 | } | |
| 908 | break; | |
| 909 | case M32C_OPERAND_DSP_24_S8 : | |
| 910 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); | |
| 911 | break; | |
| 912 | case M32C_OPERAND_DSP_24_U16 : | |
| 913 | { | |
| 914 | { | |
| 915 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255)); | |
| fe8afbc4 | 916 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255)); |
| 49f58d10 JB |
917 | } |
| 918 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 919 | if (errmsg) | |
| 920 | break; | |
| 921 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 922 | if (errmsg) | |
| 923 | break; | |
| 924 | } | |
| 925 | break; | |
| 926 | case M32C_OPERAND_DSP_24_U20 : | |
| 927 | { | |
| 928 | { | |
| 929 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); | |
| fe8afbc4 | 930 | FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); |
| 49f58d10 JB |
931 | } |
| 932 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 933 | if (errmsg) | |
| 934 | break; | |
| 935 | { | |
| 936 | long value = fields->f_dsp_32_u16; | |
| cc6aa1a6 | 937 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
938 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 939 | } | |
| 940 | if (errmsg) | |
| 941 | break; | |
| 942 | } | |
| 943 | break; | |
| 944 | case M32C_OPERAND_DSP_24_U24 : | |
| 945 | { | |
| 946 | { | |
| 947 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); | |
| fe8afbc4 | 948 | FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); |
| 49f58d10 JB |
949 | } |
| 950 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 951 | if (errmsg) | |
| 952 | break; | |
| 953 | { | |
| 954 | long value = fields->f_dsp_32_u16; | |
| cc6aa1a6 | 955 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
956 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 957 | } | |
| 958 | if (errmsg) | |
| 959 | break; | |
| 960 | } | |
| 961 | break; | |
| 962 | case M32C_OPERAND_DSP_24_U8 : | |
| 963 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 964 | break; | |
| 965 | case M32C_OPERAND_DSP_32_S16 : | |
| 966 | { | |
| 967 | long value = fields->f_dsp_32_s16; | |
| cc6aa1a6 | 968 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
969 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); |
| 970 | } | |
| 971 | break; | |
| 972 | case M32C_OPERAND_DSP_32_S8 : | |
| 973 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); | |
| 974 | break; | |
| 975 | case M32C_OPERAND_DSP_32_U16 : | |
| 976 | { | |
| 977 | long value = fields->f_dsp_32_u16; | |
| cc6aa1a6 | 978 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
979 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 980 | } | |
| 981 | break; | |
| 982 | case M32C_OPERAND_DSP_32_U20 : | |
| 983 | { | |
| 984 | long value = fields->f_dsp_32_u24; | |
| fe8afbc4 | 985 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
986 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); |
| 987 | } | |
| 988 | break; | |
| 989 | case M32C_OPERAND_DSP_32_U24 : | |
| 990 | { | |
| 991 | long value = fields->f_dsp_32_u24; | |
| fe8afbc4 | 992 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
993 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); |
| 994 | } | |
| 995 | break; | |
| 996 | case M32C_OPERAND_DSP_32_U8 : | |
| 997 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 998 | break; | |
| 999 | case M32C_OPERAND_DSP_40_S16 : | |
| 1000 | { | |
| 1001 | long value = fields->f_dsp_40_s16; | |
| cc6aa1a6 | 1002 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1003 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); |
| 1004 | } | |
| 1005 | break; | |
| 1006 | case M32C_OPERAND_DSP_40_S8 : | |
| 1007 | errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); | |
| 1008 | break; | |
| 1009 | case M32C_OPERAND_DSP_40_U16 : | |
| 1010 | { | |
| 1011 | long value = fields->f_dsp_40_u16; | |
| cc6aa1a6 | 1012 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1013 | errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer); |
| 1014 | } | |
| 1015 | break; | |
| 75b06e7b DD |
1016 | case M32C_OPERAND_DSP_40_U20 : |
| 1017 | { | |
| 1018 | long value = fields->f_dsp_40_u20; | |
| fe8afbc4 | 1019 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); |
| 75b06e7b DD |
1020 | errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer); |
| 1021 | } | |
| 1022 | break; | |
| 49f58d10 JB |
1023 | case M32C_OPERAND_DSP_40_U24 : |
| 1024 | { | |
| 1025 | long value = fields->f_dsp_40_u24; | |
| fe8afbc4 | 1026 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
1027 | errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); |
| 1028 | } | |
| 1029 | break; | |
| 1030 | case M32C_OPERAND_DSP_40_U8 : | |
| 1031 | errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); | |
| 1032 | break; | |
| 1033 | case M32C_OPERAND_DSP_48_S16 : | |
| 1034 | { | |
| 1035 | long value = fields->f_dsp_48_s16; | |
| cc6aa1a6 | 1036 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1037 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); |
| 1038 | } | |
| 1039 | break; | |
| 1040 | case M32C_OPERAND_DSP_48_S8 : | |
| 1041 | errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); | |
| 1042 | break; | |
| 1043 | case M32C_OPERAND_DSP_48_U16 : | |
| 1044 | { | |
| 1045 | long value = fields->f_dsp_48_u16; | |
| cc6aa1a6 | 1046 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1047 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1048 | } | |
| 1049 | break; | |
| 75b06e7b DD |
1050 | case M32C_OPERAND_DSP_48_U20 : |
| 1051 | { | |
| 1052 | { | |
| fe8afbc4 | 1053 | FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15)); |
| 75b06e7b DD |
1054 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535)); |
| 1055 | } | |
| 1056 | { | |
| 1057 | long value = fields->f_dsp_48_u16; | |
| cc6aa1a6 | 1058 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 75b06e7b DD |
1059 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1060 | } | |
| 1061 | if (errmsg) | |
| 1062 | break; | |
| 1063 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
| 1064 | if (errmsg) | |
| 1065 | break; | |
| 1066 | } | |
| 1067 | break; | |
| 49f58d10 JB |
1068 | case M32C_OPERAND_DSP_48_U24 : |
| 1069 | { | |
| 1070 | { | |
| fe8afbc4 | 1071 | FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255)); |
| 49f58d10 JB |
1072 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535)); |
| 1073 | } | |
| 1074 | { | |
| 1075 | long value = fields->f_dsp_48_u16; | |
| cc6aa1a6 | 1076 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1077 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1078 | } | |
| 1079 | if (errmsg) | |
| 1080 | break; | |
| 1081 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
| 1082 | if (errmsg) | |
| 1083 | break; | |
| 1084 | } | |
| 1085 | break; | |
| 1086 | case M32C_OPERAND_DSP_48_U8 : | |
| 1087 | errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer); | |
| 1088 | break; | |
| f75eb1c0 DD |
1089 | case M32C_OPERAND_DSP_8_S24 : |
| 1090 | { | |
| 1091 | long value = fields->f_dsp_8_s24; | |
| cc6aa1a6 | 1092 | value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608)); |
| f75eb1c0 DD |
1093 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer); |
| 1094 | } | |
| 1095 | break; | |
| 49f58d10 JB |
1096 | case M32C_OPERAND_DSP_8_S8 : |
| 1097 | errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); | |
| 1098 | break; | |
| 1099 | case M32C_OPERAND_DSP_8_U16 : | |
| 1100 | { | |
| 1101 | long value = fields->f_dsp_8_u16; | |
| cc6aa1a6 | 1102 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1103 | errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer); |
| 1104 | } | |
| 1105 | break; | |
| e729279b NC |
1106 | case M32C_OPERAND_DSP_8_U24 : |
| 1107 | { | |
| 1108 | long value = fields->f_dsp_8_u24; | |
| fe8afbc4 | 1109 | value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| e729279b NC |
1110 | errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer); |
| 1111 | } | |
| 1112 | break; | |
| 49f58d10 JB |
1113 | case M32C_OPERAND_DSP_8_U6 : |
| 1114 | errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer); | |
| 1115 | break; | |
| 1116 | case M32C_OPERAND_DSP_8_U8 : | |
| 1117 | errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); | |
| 1118 | break; | |
| 1119 | case M32C_OPERAND_DST16AN : | |
| 1120 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
| 1121 | break; | |
| 1122 | case M32C_OPERAND_DST16AN_S : | |
| 1123 | errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer); | |
| 1124 | break; | |
| 1125 | case M32C_OPERAND_DST16ANHI : | |
| 1126 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
| 1127 | break; | |
| 1128 | case M32C_OPERAND_DST16ANQI : | |
| 1129 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
| 1130 | break; | |
| 1131 | case M32C_OPERAND_DST16ANQI_S : | |
| 1132 | errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); | |
| 1133 | break; | |
| 1134 | case M32C_OPERAND_DST16ANSI : | |
| 1135 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
| 1136 | break; | |
| 1137 | case M32C_OPERAND_DST16RNEXTQI : | |
| 1138 | errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer); | |
| 1139 | break; | |
| 1140 | case M32C_OPERAND_DST16RNHI : | |
| 1141 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
| 1142 | break; | |
| 1143 | case M32C_OPERAND_DST16RNQI : | |
| 1144 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
| 1145 | break; | |
| 1146 | case M32C_OPERAND_DST16RNQI_S : | |
| 1147 | errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); | |
| 1148 | break; | |
| 1149 | case M32C_OPERAND_DST16RNSI : | |
| 1150 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
| 1151 | break; | |
| 1152 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
| 1153 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1154 | break; | |
| 1155 | case M32C_OPERAND_DST32ANPREFIXED : | |
| 1156 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
| 1157 | break; | |
| 1158 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
| 1159 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
| 1160 | break; | |
| 1161 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
| 1162 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
| 1163 | break; | |
| 1164 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
| 1165 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
| 1166 | break; | |
| 1167 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
| 1168 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1169 | break; | |
| 1170 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
| 1171 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1172 | break; | |
| 1173 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
| 1174 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1175 | break; | |
| 1176 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
| 1177 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1178 | break; | |
| 1179 | case M32C_OPERAND_DST32R0HI_S : | |
| 1180 | break; | |
| 1181 | case M32C_OPERAND_DST32R0QI_S : | |
| 1182 | break; | |
| 1183 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
| 1184 | errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1185 | break; | |
| 1186 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
| 1187 | errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1188 | break; | |
| 1189 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
| 1190 | { | |
| 1191 | long value = fields->f_dst32_rn_prefixed_HI; | |
| 1192 | value = ((((value) + (2))) % (4)); | |
| 1193 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); | |
| 1194 | } | |
| 1195 | break; | |
| 1196 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
| 1197 | { | |
| 1198 | long value = fields->f_dst32_rn_prefixed_QI; | |
| 0c115f84 | 1199 | value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1)))); |
| 49f58d10 JB |
1200 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); |
| 1201 | } | |
| 1202 | break; | |
| 1203 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
| 1204 | { | |
| 1205 | long value = fields->f_dst32_rn_prefixed_SI; | |
| 1206 | value = ((value) + (2)); | |
| 1207 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); | |
| 1208 | } | |
| 1209 | break; | |
| 1210 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
| 1211 | { | |
| 1212 | long value = fields->f_dst32_rn_unprefixed_HI; | |
| 1213 | value = ((((value) + (2))) % (4)); | |
| 1214 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); | |
| 1215 | } | |
| 1216 | break; | |
| 1217 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
| 1218 | { | |
| 1219 | long value = fields->f_dst32_rn_unprefixed_QI; | |
| 0c115f84 | 1220 | value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1)))); |
| 49f58d10 JB |
1221 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); |
| 1222 | } | |
| 1223 | break; | |
| 1224 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
| 1225 | { | |
| 1226 | long value = fields->f_dst32_rn_unprefixed_SI; | |
| 1227 | value = ((value) + (2)); | |
| 1228 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); | |
| 1229 | } | |
| 1230 | break; | |
| 1231 | case M32C_OPERAND_G : | |
| 1232 | break; | |
| 1233 | case M32C_OPERAND_IMM_12_S4 : | |
| 1234 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); | |
| 1235 | break; | |
| c6552317 DD |
1236 | case M32C_OPERAND_IMM_12_S4N : |
| 1237 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); | |
| 1238 | break; | |
| 49f58d10 JB |
1239 | case M32C_OPERAND_IMM_13_U3 : |
| 1240 | errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); | |
| 1241 | break; | |
| 1242 | case M32C_OPERAND_IMM_16_HI : | |
| 1243 | { | |
| 1244 | long value = fields->f_dsp_16_s16; | |
| cc6aa1a6 | 1245 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1246 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 1247 | } | |
| 1248 | break; | |
| 1249 | case M32C_OPERAND_IMM_16_QI : | |
| 1250 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
| 1251 | break; | |
| 1252 | case M32C_OPERAND_IMM_16_SI : | |
| 1253 | { | |
| 1254 | { | |
| fe8afbc4 | 1255 | FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535)); |
| 49f58d10 JB |
1256 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535)); |
| 1257 | } | |
| 1258 | { | |
| 1259 | long value = fields->f_dsp_16_u16; | |
| cc6aa1a6 | 1260 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1261 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); |
| 1262 | } | |
| 1263 | if (errmsg) | |
| 1264 | break; | |
| 1265 | { | |
| 1266 | long value = fields->f_dsp_32_u16; | |
| cc6aa1a6 | 1267 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1268 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); |
| 1269 | } | |
| 1270 | if (errmsg) | |
| 1271 | break; | |
| 1272 | } | |
| 1273 | break; | |
| 1274 | case M32C_OPERAND_IMM_20_S4 : | |
| 1275 | errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); | |
| 1276 | break; | |
| 1277 | case M32C_OPERAND_IMM_24_HI : | |
| 1278 | { | |
| 1279 | { | |
| 1280 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); | |
| fe8afbc4 | 1281 | FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); |
| 49f58d10 JB |
1282 | } |
| 1283 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 1284 | if (errmsg) | |
| 1285 | break; | |
| 1286 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 1287 | if (errmsg) | |
| 1288 | break; | |
| 1289 | } | |
| 1290 | break; | |
| 1291 | case M32C_OPERAND_IMM_24_QI : | |
| 1292 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); | |
| 1293 | break; | |
| 1294 | case M32C_OPERAND_IMM_24_SI : | |
| 1295 | { | |
| 1296 | { | |
| fe8afbc4 | 1297 | FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); |
| 49f58d10 JB |
1298 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255)); |
| 1299 | } | |
| 1300 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 1301 | if (errmsg) | |
| 1302 | break; | |
| 1303 | { | |
| 1304 | long value = fields->f_dsp_32_u24; | |
| fe8afbc4 | 1305 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
1306 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); |
| 1307 | } | |
| 1308 | if (errmsg) | |
| 1309 | break; | |
| 1310 | } | |
| 1311 | break; | |
| 1312 | case M32C_OPERAND_IMM_32_HI : | |
| 1313 | { | |
| 1314 | long value = fields->f_dsp_32_s16; | |
| cc6aa1a6 | 1315 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1316 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); |
| 1317 | } | |
| 1318 | break; | |
| 1319 | case M32C_OPERAND_IMM_32_QI : | |
| 1320 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); | |
| 1321 | break; | |
| 1322 | case M32C_OPERAND_IMM_32_SI : | |
| 1323 | { | |
| 1324 | long value = fields->f_dsp_32_s32; | |
| 0c115f84 | 1325 | value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) & (65280))) << (8))) | (((((value) & (255))) << (24))))))); |
| 49f58d10 JB |
1326 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer); |
| 1327 | } | |
| 1328 | break; | |
| 1329 | case M32C_OPERAND_IMM_40_HI : | |
| 1330 | { | |
| 1331 | long value = fields->f_dsp_40_s16; | |
| cc6aa1a6 | 1332 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1333 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); |
| 1334 | } | |
| 1335 | break; | |
| 1336 | case M32C_OPERAND_IMM_40_QI : | |
| 1337 | errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); | |
| 1338 | break; | |
| 1339 | case M32C_OPERAND_IMM_40_SI : | |
| 1340 | { | |
| 1341 | { | |
| fe8afbc4 | 1342 | FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255)); |
| 49f58d10 JB |
1343 | FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215)); |
| 1344 | } | |
| 1345 | { | |
| 1346 | long value = fields->f_dsp_40_u24; | |
| fe8afbc4 | 1347 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
1348 | errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); |
| 1349 | } | |
| 1350 | if (errmsg) | |
| 1351 | break; | |
| 1352 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
| 1353 | if (errmsg) | |
| 1354 | break; | |
| 1355 | } | |
| 1356 | break; | |
| 1357 | case M32C_OPERAND_IMM_48_HI : | |
| 1358 | { | |
| 1359 | long value = fields->f_dsp_48_s16; | |
| cc6aa1a6 | 1360 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1361 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); |
| 1362 | } | |
| 1363 | break; | |
| 1364 | case M32C_OPERAND_IMM_48_QI : | |
| 1365 | errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); | |
| 1366 | break; | |
| 1367 | case M32C_OPERAND_IMM_48_SI : | |
| 1368 | { | |
| 1369 | { | |
| fe8afbc4 | 1370 | FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535)); |
| 49f58d10 JB |
1371 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535)); |
| 1372 | } | |
| 1373 | { | |
| 1374 | long value = fields->f_dsp_48_u16; | |
| cc6aa1a6 | 1375 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1376 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); |
| 1377 | } | |
| 1378 | if (errmsg) | |
| 1379 | break; | |
| 1380 | { | |
| 1381 | long value = fields->f_dsp_64_u16; | |
| cc6aa1a6 | 1382 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1383 | errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer); |
| 1384 | } | |
| 1385 | if (errmsg) | |
| 1386 | break; | |
| 1387 | } | |
| 1388 | break; | |
| 1389 | case M32C_OPERAND_IMM_56_HI : | |
| 1390 | { | |
| 1391 | { | |
| 1392 | FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255)); | |
| fe8afbc4 | 1393 | FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255)); |
| 49f58d10 JB |
1394 | } |
| 1395 | errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer); | |
| 1396 | if (errmsg) | |
| 1397 | break; | |
| 1398 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
| 1399 | if (errmsg) | |
| 1400 | break; | |
| 1401 | } | |
| 1402 | break; | |
| 1403 | case M32C_OPERAND_IMM_56_QI : | |
| 1404 | errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer); | |
| 1405 | break; | |
| 1406 | case M32C_OPERAND_IMM_64_HI : | |
| 1407 | { | |
| 1408 | long value = fields->f_dsp_64_s16; | |
| 44e4546f | 1409 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1410 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer); |
| 1411 | } | |
| 1412 | break; | |
| 1413 | case M32C_OPERAND_IMM_8_HI : | |
| 1414 | { | |
| 1415 | long value = fields->f_dsp_8_s16; | |
| cc6aa1a6 | 1416 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1417 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer); |
| 1418 | } | |
| 1419 | break; | |
| 1420 | case M32C_OPERAND_IMM_8_QI : | |
| 1421 | errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); | |
| 1422 | break; | |
| 1423 | case M32C_OPERAND_IMM_8_S4 : | |
| 1424 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); | |
| 1425 | break; | |
| c6552317 DD |
1426 | case M32C_OPERAND_IMM_8_S4N : |
| 1427 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); | |
| 1428 | break; | |
| 49f58d10 JB |
1429 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 1430 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); | |
| 1431 | break; | |
| 1432 | case M32C_OPERAND_IMM_SH_20_S4 : | |
| 1433 | errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); | |
| 1434 | break; | |
| 1435 | case M32C_OPERAND_IMM_SH_8_S4 : | |
| 1436 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); | |
| 1437 | break; | |
| 1438 | case M32C_OPERAND_IMM1_S : | |
| 1439 | { | |
| 1440 | long value = fields->f_imm1_S; | |
| 1441 | value = ((value) - (1)); | |
| 1442 | errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer); | |
| 1443 | } | |
| 1444 | break; | |
| 1445 | case M32C_OPERAND_IMM3_S : | |
| 1446 | { | |
| 1447 | { | |
| 1448 | FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); | |
| fe8afbc4 | 1449 | FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); |
| 49f58d10 JB |
1450 | } |
| 1451 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); | |
| 1452 | if (errmsg) | |
| 1453 | break; | |
| 1454 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
| 1455 | if (errmsg) | |
| 1456 | break; | |
| 1457 | } | |
| 1458 | break; | |
| 1459 | case M32C_OPERAND_LAB_16_8 : | |
| 1460 | { | |
| 1461 | long value = fields->f_lab_16_8; | |
| 1462 | value = ((value) - (((pc) + (2)))); | |
| 1463 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer); | |
| 1464 | } | |
| 1465 | break; | |
| 1466 | case M32C_OPERAND_LAB_24_8 : | |
| 1467 | { | |
| 1468 | long value = fields->f_lab_24_8; | |
| 1469 | value = ((value) - (((pc) + (2)))); | |
| 1470 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer); | |
| 1471 | } | |
| 1472 | break; | |
| 1473 | case M32C_OPERAND_LAB_32_8 : | |
| 1474 | { | |
| 1475 | long value = fields->f_lab_32_8; | |
| 1476 | value = ((value) - (((pc) + (2)))); | |
| 1477 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer); | |
| 1478 | } | |
| 1479 | break; | |
| 1480 | case M32C_OPERAND_LAB_40_8 : | |
| 1481 | { | |
| 1482 | long value = fields->f_lab_40_8; | |
| 1483 | value = ((value) - (((pc) + (2)))); | |
| 1484 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer); | |
| 1485 | } | |
| 1486 | break; | |
| 1487 | case M32C_OPERAND_LAB_5_3 : | |
| 1488 | { | |
| 1489 | long value = fields->f_lab_5_3; | |
| 1490 | value = ((value) - (((pc) + (2)))); | |
| e729279b | 1491 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer); |
| 49f58d10 JB |
1492 | } |
| 1493 | break; | |
| 1494 | case M32C_OPERAND_LAB_8_16 : | |
| 1495 | { | |
| 1496 | long value = fields->f_lab_8_16; | |
| 1d61b032 | 1497 | value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65280))) >> (8)))); |
| 49f58d10 JB |
1498 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer); |
| 1499 | } | |
| 1500 | break; | |
| 1501 | case M32C_OPERAND_LAB_8_24 : | |
| 1502 | { | |
| 1503 | long value = fields->f_lab_8_24; | |
| fe8afbc4 | 1504 | value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| 49f58d10 JB |
1505 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer); |
| 1506 | } | |
| 1507 | break; | |
| 1508 | case M32C_OPERAND_LAB_8_8 : | |
| 1509 | { | |
| 1510 | long value = fields->f_lab_8_8; | |
| 1511 | value = ((value) - (((pc) + (1)))); | |
| 1512 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer); | |
| 1513 | } | |
| 1514 | break; | |
| 1515 | case M32C_OPERAND_LAB32_JMP_S : | |
| 1516 | { | |
| 1517 | { | |
| e729279b NC |
1518 | SI tmp_val; |
| 1519 | tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2)); | |
| 1520 | FLD (f_7_1) = ((tmp_val) & (1)); | |
| fe8afbc4 | 1521 | FLD (f_2_2) = ((USI) (tmp_val) >> (1)); |
| 49f58d10 JB |
1522 | } |
| 1523 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); | |
| 1524 | if (errmsg) | |
| 1525 | break; | |
| 1526 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
| 1527 | if (errmsg) | |
| 1528 | break; | |
| 1529 | } | |
| 1530 | break; | |
| 1531 | case M32C_OPERAND_Q : | |
| 1532 | break; | |
| 1533 | case M32C_OPERAND_R0 : | |
| 1534 | break; | |
| 1535 | case M32C_OPERAND_R0H : | |
| 1536 | break; | |
| 1537 | case M32C_OPERAND_R0L : | |
| 1538 | break; | |
| 1539 | case M32C_OPERAND_R1 : | |
| 1540 | break; | |
| 1541 | case M32C_OPERAND_R1R2R0 : | |
| 1542 | break; | |
| 1543 | case M32C_OPERAND_R2 : | |
| 1544 | break; | |
| 1545 | case M32C_OPERAND_R2R0 : | |
| 1546 | break; | |
| 1547 | case M32C_OPERAND_R3 : | |
| 1548 | break; | |
| 1549 | case M32C_OPERAND_R3R1 : | |
| 1550 | break; | |
| 1551 | case M32C_OPERAND_REGSETPOP : | |
| 1552 | errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); | |
| 1553 | break; | |
| 1554 | case M32C_OPERAND_REGSETPUSH : | |
| 1555 | errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); | |
| 1556 | break; | |
| 1557 | case M32C_OPERAND_RN16_PUSH_S : | |
| 1558 | errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); | |
| 1559 | break; | |
| 1560 | case M32C_OPERAND_S : | |
| 1561 | break; | |
| 1562 | case M32C_OPERAND_SRC16AN : | |
| 1563 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1564 | break; | |
| 1565 | case M32C_OPERAND_SRC16ANHI : | |
| 1566 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1567 | break; | |
| 1568 | case M32C_OPERAND_SRC16ANQI : | |
| 1569 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1570 | break; | |
| 1571 | case M32C_OPERAND_SRC16RNHI : | |
| 1572 | errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); | |
| 1573 | break; | |
| 1574 | case M32C_OPERAND_SRC16RNQI : | |
| 1575 | errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); | |
| 1576 | break; | |
| 1577 | case M32C_OPERAND_SRC32ANPREFIXED : | |
| 1578 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
| 1579 | break; | |
| 1580 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
| 1581 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
| 1582 | break; | |
| 1583 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
| 1584 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
| 1585 | break; | |
| 1586 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
| 1587 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
| 1588 | break; | |
| 1589 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
| 1590 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1591 | break; | |
| 1592 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
| 1593 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1594 | break; | |
| 1595 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
| 1596 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1597 | break; | |
| 1598 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
| 1599 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
| 1600 | break; | |
| 1601 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
| 1602 | { | |
| 1603 | long value = fields->f_src32_rn_prefixed_HI; | |
| 1604 | value = ((((value) + (2))) % (4)); | |
| 1605 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); | |
| 1606 | } | |
| 1607 | break; | |
| 1608 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
| 1609 | { | |
| 1610 | long value = fields->f_src32_rn_prefixed_QI; | |
| 0c115f84 | 1611 | value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1)))); |
| 49f58d10 JB |
1612 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); |
| 1613 | } | |
| 1614 | break; | |
| 1615 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
| 1616 | { | |
| 1617 | long value = fields->f_src32_rn_prefixed_SI; | |
| 1618 | value = ((value) + (2)); | |
| 1619 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); | |
| 1620 | } | |
| 1621 | break; | |
| 1622 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
| 1623 | { | |
| 1624 | long value = fields->f_src32_rn_unprefixed_HI; | |
| 1625 | value = ((((value) + (2))) % (4)); | |
| 1626 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); | |
| 1627 | } | |
| 1628 | break; | |
| 1629 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
| 1630 | { | |
| 1631 | long value = fields->f_src32_rn_unprefixed_QI; | |
| 0c115f84 | 1632 | value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1)))); |
| 49f58d10 JB |
1633 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); |
| 1634 | } | |
| 1635 | break; | |
| 1636 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
| 1637 | { | |
| 1638 | long value = fields->f_src32_rn_unprefixed_SI; | |
| 1639 | value = ((value) + (2)); | |
| 1640 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); | |
| 1641 | } | |
| 1642 | break; | |
| 1643 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
| 1644 | errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer); | |
| 1645 | break; | |
| 1646 | case M32C_OPERAND_X : | |
| 1647 | break; | |
| 1648 | case M32C_OPERAND_Z : | |
| 1649 | break; | |
| 1650 | case M32C_OPERAND_COND16_16 : | |
| 1651 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
| 1652 | break; | |
| 1653 | case M32C_OPERAND_COND16_24 : | |
| 1654 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 1655 | break; | |
| 1656 | case M32C_OPERAND_COND16_32 : | |
| 1657 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 1658 | break; | |
| 1659 | case M32C_OPERAND_COND16C : | |
| 1660 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); | |
| 1661 | break; | |
| 1662 | case M32C_OPERAND_COND16J : | |
| 1663 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); | |
| 1664 | break; | |
| 1665 | case M32C_OPERAND_COND16J5 : | |
| 1666 | errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer); | |
| 1667 | break; | |
| 1668 | case M32C_OPERAND_COND32 : | |
| 1669 | { | |
| 1670 | { | |
| fe8afbc4 | 1671 | FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1)); |
| 49f58d10 JB |
1672 | FLD (f_13_3) = ((FLD (f_cond32)) & (7)); |
| 1673 | } | |
| 1674 | errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer); | |
| 1675 | if (errmsg) | |
| 1676 | break; | |
| 1677 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
| 1678 | if (errmsg) | |
| 1679 | break; | |
| 1680 | } | |
| 1681 | break; | |
| 1682 | case M32C_OPERAND_COND32_16 : | |
| 1683 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
| 1684 | break; | |
| 1685 | case M32C_OPERAND_COND32_24 : | |
| 1686 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
| 1687 | break; | |
| 1688 | case M32C_OPERAND_COND32_32 : | |
| 1689 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
| 1690 | break; | |
| 1691 | case M32C_OPERAND_COND32_40 : | |
| 1692 | errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); | |
| 1693 | break; | |
| 1694 | case M32C_OPERAND_COND32J : | |
| 1695 | { | |
| 1696 | { | |
| fe8afbc4 | 1697 | FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7)); |
| 49f58d10 JB |
1698 | FLD (f_7_1) = ((FLD (f_cond32j)) & (1)); |
| 1699 | } | |
| 1700 | errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer); | |
| 1701 | if (errmsg) | |
| 1702 | break; | |
| 1703 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
| 1704 | if (errmsg) | |
| 1705 | break; | |
| 1706 | } | |
| 1707 | break; | |
| 1708 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
| 1709 | errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); | |
| 1710 | break; | |
| 1711 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
| 1712 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
| 1713 | break; | |
| 1714 | case M32C_OPERAND_CR16 : | |
| 1715 | errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); | |
| 1716 | break; | |
| 1717 | case M32C_OPERAND_CR2_32 : | |
| 1718 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
| 1719 | break; | |
| 1720 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
| 1721 | errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); | |
| 1722 | break; | |
| 1723 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
| 1724 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
| 1725 | break; | |
| 1726 | case M32C_OPERAND_FLAGS16 : | |
| 1727 | errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); | |
| 1728 | break; | |
| 1729 | case M32C_OPERAND_FLAGS32 : | |
| 1730 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
| 1731 | break; | |
| 1732 | case M32C_OPERAND_SCCOND32 : | |
| 1733 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); | |
| 1734 | break; | |
| 1735 | case M32C_OPERAND_SIZE : | |
| 1736 | break; | |
| 1737 | ||
| 1738 | default : | |
| 1739 | /* xgettext:c-format */ | |
| a6743a54 AM |
1740 | opcodes_error_handler |
| 1741 | (_("internal error: unrecognized field %d while building insn"), | |
| 1742 | opindex); | |
| 49f58d10 JB |
1743 | abort (); |
| 1744 | } | |
| 1745 | ||
| 1746 | return errmsg; | |
| 1747 | } | |
| 1748 | ||
| 1749 | int m32c_cgen_extract_operand | |
| e729279b | 1750 | (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 49f58d10 JB |
1751 | |
| 1752 | /* Main entry point for operand extraction. | |
| 1753 | The result is <= 0 for error, >0 for success. | |
| 1754 | ??? Actual values aren't well defined right now. | |
| 1755 | ||
| 1756 | This function is basically just a big switch statement. Earlier versions | |
| 1757 | used tables to look up the function to use, but | |
| 1758 | - if the table contains both assembler and disassembler functions then | |
| 1759 | the disassembler contains much of the assembler and vice-versa, | |
| 1760 | - there's a lot of inlining possibilities as things grow, | |
| 1761 | - using a switch statement avoids the function call overhead. | |
| 1762 | ||
| 1763 | This function could be moved into `print_insn_normal', but keeping it | |
| 1764 | separate makes clear the interface between `print_insn_normal' and each of | |
| 1765 | the handlers. */ | |
| 1766 | ||
| 1767 | int | |
| e729279b NC |
1768 | m32c_cgen_extract_operand (CGEN_CPU_DESC cd, |
| 1769 | int opindex, | |
| 1770 | CGEN_EXTRACT_INFO *ex_info, | |
| 1771 | CGEN_INSN_INT insn_value, | |
| 1772 | CGEN_FIELDS * fields, | |
| 1773 | bfd_vma pc) | |
| 49f58d10 JB |
1774 | { |
| 1775 | /* Assume success (for those operands that are nops). */ | |
| 1776 | int length = 1; | |
| 1777 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); | |
| 1778 | ||
| 1779 | switch (opindex) | |
| 1780 | { | |
| 1781 | case M32C_OPERAND_A0 : | |
| 1782 | break; | |
| 1783 | case M32C_OPERAND_A1 : | |
| 1784 | break; | |
| 1785 | case M32C_OPERAND_AN16_PUSH_S : | |
| 1786 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); | |
| 1787 | break; | |
| 1788 | case M32C_OPERAND_BIT16AN : | |
| 1789 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
| 1790 | break; | |
| 1791 | case M32C_OPERAND_BIT16RN : | |
| 1792 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
| 1793 | break; | |
| 5398310a DD |
1794 | case M32C_OPERAND_BIT3_S : |
| 1795 | { | |
| 1796 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); | |
| 1797 | if (length <= 0) break; | |
| 1798 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
| 1799 | if (length <= 0) break; | |
| 1800 | { | |
| 1801 | FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); | |
| 1802 | } | |
| 1803 | } | |
| 1804 | break; | |
| 49f58d10 JB |
1805 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 1806 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
| 1807 | break; | |
| 1808 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
| 1809 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
| 1810 | break; | |
| 1811 | case M32C_OPERAND_BIT32RNPREFIXED : | |
| 1812 | { | |
| 1813 | long value; | |
| 1814 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
| fe8afbc4 | 1815 | value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 49f58d10 JB |
1816 | fields->f_dst32_rn_prefixed_QI = value; |
| 1817 | } | |
| 1818 | break; | |
| 1819 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
| 1820 | { | |
| 1821 | long value; | |
| 1822 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
| fe8afbc4 | 1823 | value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 49f58d10 JB |
1824 | fields->f_dst32_rn_unprefixed_QI = value; |
| 1825 | } | |
| 1826 | break; | |
| 1827 | case M32C_OPERAND_BITBASE16_16_S8 : | |
| 1828 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
| 1829 | break; | |
| 1830 | case M32C_OPERAND_BITBASE16_16_U16 : | |
| 1831 | { | |
| 1832 | long value; | |
| 1833 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 1834 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1835 | fields->f_dsp_16_u16 = value; |
| 1836 | } | |
| 1837 | break; | |
| 1838 | case M32C_OPERAND_BITBASE16_16_U8 : | |
| 1839 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
| 1840 | break; | |
| 1841 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
| 1842 | { | |
| 1843 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S); | |
| 1844 | if (length <= 0) break; | |
| 1845 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); | |
| 1846 | if (length <= 0) break; | |
| 1847 | { | |
| 1848 | FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S))); | |
| 1849 | } | |
| 1850 | } | |
| 1851 | break; | |
| 1852 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
| 1853 | { | |
| 1854 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
| 1855 | if (length <= 0) break; | |
| 1856 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
| 1857 | if (length <= 0) break; | |
| 1858 | { | |
| 0c115f84 | 1859 | FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) * (8))) | (FLD (f_bitno32_unprefixed))); |
| 49f58d10 JB |
1860 | } |
| 1861 | } | |
| 1862 | break; | |
| 1863 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
| 1864 | { | |
| 1865 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
| 1866 | if (length <= 0) break; | |
| 1867 | { | |
| 1868 | long value; | |
| 1869 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 1870 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
1871 | fields->f_dsp_16_s16 = value; |
| 1872 | } | |
| 1873 | if (length <= 0) break; | |
| 1874 | { | |
| cc6aa1a6 | 1875 | FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) * (8))) | (FLD (f_bitno32_unprefixed))); |
| 49f58d10 JB |
1876 | } |
| 1877 | } | |
| 1878 | break; | |
| 1879 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
| 1880 | { | |
| 1881 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
| 1882 | if (length <= 0) break; | |
| 1883 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
| 1884 | if (length <= 0) break; | |
| 1885 | { | |
| 1886 | FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed))); | |
| 1887 | } | |
| 1888 | } | |
| 1889 | break; | |
| 1890 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
| 1891 | { | |
| 1892 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
| 1893 | if (length <= 0) break; | |
| 1894 | { | |
| 1895 | long value; | |
| 1896 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 1897 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1898 | fields->f_dsp_16_u16 = value; |
| 1899 | } | |
| 1900 | if (length <= 0) break; | |
| 1901 | { | |
| 1902 | FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed))); | |
| 1903 | } | |
| 1904 | } | |
| 1905 | break; | |
| 1906 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
| 1907 | { | |
| 1908 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
| 1909 | if (length <= 0) break; | |
| 1910 | { | |
| 1911 | long value; | |
| 1912 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 1913 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1914 | fields->f_dsp_16_u16 = value; |
| 1915 | } | |
| 1916 | if (length <= 0) break; | |
| 1917 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 1918 | if (length <= 0) break; | |
| 1919 | { | |
| 1920 | FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed))))); | |
| 1921 | } | |
| 1922 | } | |
| 1923 | break; | |
| 1924 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
| 1925 | { | |
| 1926 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
| 1927 | if (length <= 0) break; | |
| 1928 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); | |
| 1929 | if (length <= 0) break; | |
| 1930 | { | |
| 0c115f84 | 1931 | FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) * (8))) | (FLD (f_bitno32_prefixed))); |
| 49f58d10 JB |
1932 | } |
| 1933 | } | |
| 1934 | break; | |
| 1935 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
| 1936 | { | |
| 1937 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
| 1938 | if (length <= 0) break; | |
| 1939 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 1940 | if (length <= 0) break; | |
| 1941 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); | |
| 1942 | if (length <= 0) break; | |
| 1943 | { | |
| 0c115f84 | 1944 | FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) * (2048))) | (FLD (f_bitno32_prefixed))))); |
| 49f58d10 JB |
1945 | } |
| 1946 | } | |
| 1947 | break; | |
| 1948 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
| 1949 | { | |
| 1950 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
| 1951 | if (length <= 0) break; | |
| 1952 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 1953 | if (length <= 0) break; | |
| 1954 | { | |
| 1955 | FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed))); | |
| 1956 | } | |
| 1957 | } | |
| 1958 | break; | |
| 1959 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
| 1960 | { | |
| 1961 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
| 1962 | if (length <= 0) break; | |
| 1963 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 1964 | if (length <= 0) break; | |
| 1965 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 1966 | if (length <= 0) break; | |
| 1967 | { | |
| 1968 | FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed))))); | |
| 1969 | } | |
| 1970 | } | |
| 1971 | break; | |
| 1972 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
| 1973 | { | |
| 1974 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
| 1975 | if (length <= 0) break; | |
| 1976 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 1977 | if (length <= 0) break; | |
| 1978 | { | |
| 1979 | long value; | |
| 1980 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 1981 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
1982 | fields->f_dsp_32_u16 = value; |
| 1983 | } | |
| 1984 | if (length <= 0) break; | |
| 1985 | { | |
| 1986 | FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed))))); | |
| 1987 | } | |
| 1988 | } | |
| 1989 | break; | |
| 1990 | case M32C_OPERAND_BITNO16R : | |
| 1991 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
| 1992 | break; | |
| 1993 | case M32C_OPERAND_BITNO32PREFIXED : | |
| 1994 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
| 1995 | break; | |
| 1996 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
| 1997 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
| 1998 | break; | |
| 1999 | case M32C_OPERAND_DSP_10_U6 : | |
| 2000 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6); | |
| 2001 | break; | |
| 2002 | case M32C_OPERAND_DSP_16_S16 : | |
| 2003 | { | |
| 2004 | long value; | |
| 2005 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2006 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2007 | fields->f_dsp_16_s16 = value; |
| 2008 | } | |
| 2009 | break; | |
| 2010 | case M32C_OPERAND_DSP_16_S8 : | |
| 2011 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
| 2012 | break; | |
| 2013 | case M32C_OPERAND_DSP_16_U16 : | |
| 2014 | { | |
| 2015 | long value; | |
| 2016 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2017 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2018 | fields->f_dsp_16_u16 = value; |
| 2019 | } | |
| 2020 | break; | |
| 2021 | case M32C_OPERAND_DSP_16_U20 : | |
| 2022 | { | |
| 2023 | { | |
| 2024 | long value; | |
| 2025 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2026 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2027 | fields->f_dsp_16_u16 = value; |
| 2028 | } | |
| 2029 | if (length <= 0) break; | |
| 2030 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2031 | if (length <= 0) break; | |
| 2032 | { | |
| 2033 | FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); | |
| 2034 | } | |
| 2035 | } | |
| 2036 | break; | |
| 2037 | case M32C_OPERAND_DSP_16_U24 : | |
| 2038 | { | |
| 2039 | { | |
| 2040 | long value; | |
| 2041 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2042 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2043 | fields->f_dsp_16_u16 = value; |
| 2044 | } | |
| 2045 | if (length <= 0) break; | |
| 2046 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2047 | if (length <= 0) break; | |
| 2048 | { | |
| 2049 | FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); | |
| 2050 | } | |
| 2051 | } | |
| 2052 | break; | |
| 2053 | case M32C_OPERAND_DSP_16_U8 : | |
| 2054 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
| 2055 | break; | |
| 2056 | case M32C_OPERAND_DSP_24_S16 : | |
| 2057 | { | |
| 2058 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2059 | if (length <= 0) break; | |
| 2060 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2061 | if (length <= 0) break; | |
| 2062 | { | |
| 2063 | FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); | |
| 2064 | } | |
| 2065 | } | |
| 2066 | break; | |
| 2067 | case M32C_OPERAND_DSP_24_S8 : | |
| 2068 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); | |
| 2069 | break; | |
| 2070 | case M32C_OPERAND_DSP_24_U16 : | |
| 2071 | { | |
| 2072 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2073 | if (length <= 0) break; | |
| 2074 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2075 | if (length <= 0) break; | |
| 2076 | { | |
| 2077 | FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))); | |
| 2078 | } | |
| 2079 | } | |
| 2080 | break; | |
| 2081 | case M32C_OPERAND_DSP_24_U20 : | |
| 2082 | { | |
| 2083 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2084 | if (length <= 0) break; | |
| 2085 | { | |
| 2086 | long value; | |
| 2087 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2088 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2089 | fields->f_dsp_32_u16 = value; |
| 2090 | } | |
| 2091 | if (length <= 0) break; | |
| 2092 | { | |
| 2093 | FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); | |
| 2094 | } | |
| 2095 | } | |
| 2096 | break; | |
| 2097 | case M32C_OPERAND_DSP_24_U24 : | |
| 2098 | { | |
| 2099 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2100 | if (length <= 0) break; | |
| 2101 | { | |
| 2102 | long value; | |
| 2103 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2104 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2105 | fields->f_dsp_32_u16 = value; |
| 2106 | } | |
| 2107 | if (length <= 0) break; | |
| 2108 | { | |
| 2109 | FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); | |
| 2110 | } | |
| 2111 | } | |
| 2112 | break; | |
| 2113 | case M32C_OPERAND_DSP_24_U8 : | |
| 2114 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2115 | break; | |
| 2116 | case M32C_OPERAND_DSP_32_S16 : | |
| 2117 | { | |
| 2118 | long value; | |
| 2119 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2120 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2121 | fields->f_dsp_32_s16 = value; |
| 2122 | } | |
| 2123 | break; | |
| 2124 | case M32C_OPERAND_DSP_32_S8 : | |
| 2125 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); | |
| 2126 | break; | |
| 2127 | case M32C_OPERAND_DSP_32_U16 : | |
| 2128 | { | |
| 2129 | long value; | |
| 2130 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2131 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2132 | fields->f_dsp_32_u16 = value; |
| 2133 | } | |
| 2134 | break; | |
| 2135 | case M32C_OPERAND_DSP_32_U20 : | |
| 2136 | { | |
| 2137 | long value; | |
| 2138 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2139 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
2140 | fields->f_dsp_32_u24 = value; |
| 2141 | } | |
| 2142 | break; | |
| 2143 | case M32C_OPERAND_DSP_32_U24 : | |
| 2144 | { | |
| 2145 | long value; | |
| 2146 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2147 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
2148 | fields->f_dsp_32_u24 = value; |
| 2149 | } | |
| 2150 | break; | |
| 2151 | case M32C_OPERAND_DSP_32_U8 : | |
| 2152 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2153 | break; | |
| 2154 | case M32C_OPERAND_DSP_40_S16 : | |
| 2155 | { | |
| 2156 | long value; | |
| 2157 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2158 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2159 | fields->f_dsp_40_s16 = value; |
| 2160 | } | |
| 2161 | break; | |
| 2162 | case M32C_OPERAND_DSP_40_S8 : | |
| 2163 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); | |
| 2164 | break; | |
| 2165 | case M32C_OPERAND_DSP_40_U16 : | |
| 2166 | { | |
| 2167 | long value; | |
| 2168 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2169 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2170 | fields->f_dsp_40_u16 = value; |
| 2171 | } | |
| 2172 | break; | |
| 75b06e7b DD |
2173 | case M32C_OPERAND_DSP_40_U20 : |
| 2174 | { | |
| 2175 | long value; | |
| 2176 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value); | |
| fe8afbc4 | 2177 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); |
| 75b06e7b DD |
2178 | fields->f_dsp_40_u20 = value; |
| 2179 | } | |
| 2180 | break; | |
| 49f58d10 JB |
2181 | case M32C_OPERAND_DSP_40_U24 : |
| 2182 | { | |
| 2183 | long value; | |
| 2184 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2185 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
2186 | fields->f_dsp_40_u24 = value; |
| 2187 | } | |
| 2188 | break; | |
| 2189 | case M32C_OPERAND_DSP_40_U8 : | |
| 2190 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); | |
| 2191 | break; | |
| 2192 | case M32C_OPERAND_DSP_48_S16 : | |
| 2193 | { | |
| 2194 | long value; | |
| 2195 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2196 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2197 | fields->f_dsp_48_s16 = value; |
| 2198 | } | |
| 2199 | break; | |
| 2200 | case M32C_OPERAND_DSP_48_S8 : | |
| 2201 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); | |
| 2202 | break; | |
| 2203 | case M32C_OPERAND_DSP_48_U16 : | |
| 2204 | { | |
| 2205 | long value; | |
| 2206 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2207 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2208 | fields->f_dsp_48_u16 = value; |
| 2209 | } | |
| 2210 | break; | |
| 75b06e7b DD |
2211 | case M32C_OPERAND_DSP_48_U20 : |
| 2212 | { | |
| 2213 | { | |
| 2214 | long value; | |
| 2215 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2216 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 75b06e7b DD |
2217 | fields->f_dsp_48_u16 = value; |
| 2218 | } | |
| 2219 | if (length <= 0) break; | |
| 2220 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
| 2221 | if (length <= 0) break; | |
| 2222 | { | |
| 2223 | FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040)))); | |
| 2224 | } | |
| 2225 | } | |
| 2226 | break; | |
| 49f58d10 JB |
2227 | case M32C_OPERAND_DSP_48_U24 : |
| 2228 | { | |
| 2229 | { | |
| 2230 | long value; | |
| 2231 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2232 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2233 | fields->f_dsp_48_u16 = value; |
| 2234 | } | |
| 2235 | if (length <= 0) break; | |
| 2236 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
| 2237 | if (length <= 0) break; | |
| 2238 | { | |
| 2239 | FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680)))); | |
| 2240 | } | |
| 2241 | } | |
| 2242 | break; | |
| 2243 | case M32C_OPERAND_DSP_48_U8 : | |
| 2244 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8); | |
| 2245 | break; | |
| f75eb1c0 DD |
2246 | case M32C_OPERAND_DSP_8_S24 : |
| 2247 | { | |
| 2248 | long value; | |
| 2249 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2250 | value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608)); |
| f75eb1c0 DD |
2251 | fields->f_dsp_8_s24 = value; |
| 2252 | } | |
| 2253 | break; | |
| 49f58d10 JB |
2254 | case M32C_OPERAND_DSP_8_S8 : |
| 2255 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); | |
| 2256 | break; | |
| 2257 | case M32C_OPERAND_DSP_8_U16 : | |
| 2258 | { | |
| 2259 | long value; | |
| 2260 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2261 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2262 | fields->f_dsp_8_u16 = value; |
| 2263 | } | |
| 2264 | break; | |
| e729279b NC |
2265 | case M32C_OPERAND_DSP_8_U24 : |
| 2266 | { | |
| 2267 | long value; | |
| 2268 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2269 | value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| e729279b NC |
2270 | fields->f_dsp_8_u24 = value; |
| 2271 | } | |
| 2272 | break; | |
| 49f58d10 JB |
2273 | case M32C_OPERAND_DSP_8_U6 : |
| 2274 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6); | |
| 2275 | break; | |
| 2276 | case M32C_OPERAND_DSP_8_U8 : | |
| 2277 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); | |
| 2278 | break; | |
| 2279 | case M32C_OPERAND_DST16AN : | |
| 2280 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
| 2281 | break; | |
| 2282 | case M32C_OPERAND_DST16AN_S : | |
| 2283 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s); | |
| 2284 | break; | |
| 2285 | case M32C_OPERAND_DST16ANHI : | |
| 2286 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
| 2287 | break; | |
| 2288 | case M32C_OPERAND_DST16ANQI : | |
| 2289 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
| 2290 | break; | |
| 2291 | case M32C_OPERAND_DST16ANQI_S : | |
| 2292 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); | |
| 2293 | break; | |
| 2294 | case M32C_OPERAND_DST16ANSI : | |
| 2295 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
| 2296 | break; | |
| 2297 | case M32C_OPERAND_DST16RNEXTQI : | |
| 2298 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext); | |
| 2299 | break; | |
| 2300 | case M32C_OPERAND_DST16RNHI : | |
| 2301 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
| 2302 | break; | |
| 2303 | case M32C_OPERAND_DST16RNQI : | |
| 2304 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
| 2305 | break; | |
| 2306 | case M32C_OPERAND_DST16RNQI_S : | |
| 2307 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); | |
| 2308 | break; | |
| 2309 | case M32C_OPERAND_DST16RNSI : | |
| 2310 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
| 2311 | break; | |
| 2312 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
| 2313 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
| 2314 | break; | |
| 2315 | case M32C_OPERAND_DST32ANPREFIXED : | |
| 2316 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
| 2317 | break; | |
| 2318 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
| 2319 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
| 2320 | break; | |
| 2321 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
| 2322 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
| 2323 | break; | |
| 2324 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
| 2325 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
| 2326 | break; | |
| 2327 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
| 2328 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
| 2329 | break; | |
| 2330 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
| 2331 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
| 2332 | break; | |
| 2333 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
| 2334 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
| 2335 | break; | |
| 2336 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
| 2337 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
| 2338 | break; | |
| 2339 | case M32C_OPERAND_DST32R0HI_S : | |
| 2340 | break; | |
| 2341 | case M32C_OPERAND_DST32R0QI_S : | |
| 2342 | break; | |
| 2343 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
| 2344 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); | |
| 2345 | break; | |
| 2346 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
| 2347 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); | |
| 2348 | break; | |
| 2349 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
| 2350 | { | |
| 2351 | long value; | |
| 2352 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
| 2353 | value = ((((value) + (2))) % (4)); | |
| 2354 | fields->f_dst32_rn_prefixed_HI = value; | |
| 2355 | } | |
| 2356 | break; | |
| 2357 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
| 2358 | { | |
| 2359 | long value; | |
| 2360 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
| fe8afbc4 | 2361 | value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 49f58d10 JB |
2362 | fields->f_dst32_rn_prefixed_QI = value; |
| 2363 | } | |
| 2364 | break; | |
| 2365 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
| 2366 | { | |
| 2367 | long value; | |
| 2368 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
| 2369 | value = ((value) - (2)); | |
| 2370 | fields->f_dst32_rn_prefixed_SI = value; | |
| 2371 | } | |
| 2372 | break; | |
| 2373 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
| 2374 | { | |
| 2375 | long value; | |
| 2376 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
| 2377 | value = ((((value) + (2))) % (4)); | |
| 2378 | fields->f_dst32_rn_unprefixed_HI = value; | |
| 2379 | } | |
| 2380 | break; | |
| 2381 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
| 2382 | { | |
| 2383 | long value; | |
| 2384 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
| fe8afbc4 | 2385 | value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 49f58d10 JB |
2386 | fields->f_dst32_rn_unprefixed_QI = value; |
| 2387 | } | |
| 2388 | break; | |
| 2389 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
| 2390 | { | |
| 2391 | long value; | |
| 2392 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
| 2393 | value = ((value) - (2)); | |
| 2394 | fields->f_dst32_rn_unprefixed_SI = value; | |
| 2395 | } | |
| 2396 | break; | |
| 2397 | case M32C_OPERAND_G : | |
| 2398 | break; | |
| 2399 | case M32C_OPERAND_IMM_12_S4 : | |
| 2400 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); | |
| 2401 | break; | |
| c6552317 DD |
2402 | case M32C_OPERAND_IMM_12_S4N : |
| 2403 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); | |
| 2404 | break; | |
| 49f58d10 JB |
2405 | case M32C_OPERAND_IMM_13_U3 : |
| 2406 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); | |
| 2407 | break; | |
| 2408 | case M32C_OPERAND_IMM_16_HI : | |
| 2409 | { | |
| 2410 | long value; | |
| 2411 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2412 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2413 | fields->f_dsp_16_s16 = value; |
| 2414 | } | |
| 2415 | break; | |
| 2416 | case M32C_OPERAND_IMM_16_QI : | |
| 2417 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
| 2418 | break; | |
| 2419 | case M32C_OPERAND_IMM_16_SI : | |
| 2420 | { | |
| 2421 | { | |
| 2422 | long value; | |
| 2423 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2424 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2425 | fields->f_dsp_16_u16 = value; |
| 2426 | } | |
| 2427 | if (length <= 0) break; | |
| 2428 | { | |
| 2429 | long value; | |
| 2430 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2431 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2432 | fields->f_dsp_32_u16 = value; |
| 2433 | } | |
| 2434 | if (length <= 0) break; | |
| 2435 | { | |
| 2436 | FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000)))); | |
| 2437 | } | |
| 2438 | } | |
| 2439 | break; | |
| 2440 | case M32C_OPERAND_IMM_20_S4 : | |
| 2441 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); | |
| 2442 | break; | |
| 2443 | case M32C_OPERAND_IMM_24_HI : | |
| 2444 | { | |
| 2445 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2446 | if (length <= 0) break; | |
| 2447 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2448 | if (length <= 0) break; | |
| 2449 | { | |
| 2450 | FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); | |
| 2451 | } | |
| 2452 | } | |
| 2453 | break; | |
| 2454 | case M32C_OPERAND_IMM_24_QI : | |
| 2455 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); | |
| 2456 | break; | |
| 2457 | case M32C_OPERAND_IMM_24_SI : | |
| 2458 | { | |
| 2459 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2460 | if (length <= 0) break; | |
| 2461 | { | |
| 2462 | long value; | |
| 2463 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2464 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
2465 | fields->f_dsp_32_u24 = value; |
| 2466 | } | |
| 2467 | if (length <= 0) break; | |
| 2468 | { | |
| 2469 | FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00)))); | |
| 2470 | } | |
| 2471 | } | |
| 2472 | break; | |
| 2473 | case M32C_OPERAND_IMM_32_HI : | |
| 2474 | { | |
| 2475 | long value; | |
| 2476 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2477 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2478 | fields->f_dsp_32_s16 = value; |
| 2479 | } | |
| 2480 | break; | |
| 2481 | case M32C_OPERAND_IMM_32_QI : | |
| 2482 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); | |
| 2483 | break; | |
| 2484 | case M32C_OPERAND_IMM_32_SI : | |
| 2485 | { | |
| 2486 | long value; | |
| 2487 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value); | |
| 0c115f84 | 2488 | value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) & (65280))) << (8))) | (((((value) & (255))) << (24))))))); |
| 49f58d10 JB |
2489 | fields->f_dsp_32_s32 = value; |
| 2490 | } | |
| 2491 | break; | |
| 2492 | case M32C_OPERAND_IMM_40_HI : | |
| 2493 | { | |
| 2494 | long value; | |
| 2495 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2496 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2497 | fields->f_dsp_40_s16 = value; |
| 2498 | } | |
| 2499 | break; | |
| 2500 | case M32C_OPERAND_IMM_40_QI : | |
| 2501 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); | |
| 2502 | break; | |
| 2503 | case M32C_OPERAND_IMM_40_SI : | |
| 2504 | { | |
| 2505 | { | |
| 2506 | long value; | |
| 2507 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2508 | value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); |
| 49f58d10 JB |
2509 | fields->f_dsp_40_u24 = value; |
| 2510 | } | |
| 2511 | if (length <= 0) break; | |
| 2512 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
| 2513 | if (length <= 0) break; | |
| 2514 | { | |
| 2515 | FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000)))); | |
| 2516 | } | |
| 2517 | } | |
| 2518 | break; | |
| 2519 | case M32C_OPERAND_IMM_48_HI : | |
| 2520 | { | |
| 2521 | long value; | |
| 2522 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2523 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2524 | fields->f_dsp_48_s16 = value; |
| 2525 | } | |
| 2526 | break; | |
| 2527 | case M32C_OPERAND_IMM_48_QI : | |
| 2528 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); | |
| 2529 | break; | |
| 2530 | case M32C_OPERAND_IMM_48_SI : | |
| 2531 | { | |
| 2532 | { | |
| 2533 | long value; | |
| 2534 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2535 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2536 | fields->f_dsp_48_u16 = value; |
| 2537 | } | |
| 2538 | if (length <= 0) break; | |
| 2539 | { | |
| 2540 | long value; | |
| 2541 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2542 | value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); |
| 49f58d10 JB |
2543 | fields->f_dsp_64_u16 = value; |
| 2544 | } | |
| 2545 | if (length <= 0) break; | |
| 2546 | { | |
| 0c115f84 | 2547 | FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) & (65535))) << (16)))); |
| 49f58d10 JB |
2548 | } |
| 2549 | } | |
| 2550 | break; | |
| 2551 | case M32C_OPERAND_IMM_56_HI : | |
| 2552 | { | |
| 2553 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8); | |
| 2554 | if (length <= 0) break; | |
| 2555 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
| 2556 | if (length <= 0) break; | |
| 2557 | { | |
| 2558 | FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8)))))); | |
| 2559 | } | |
| 2560 | } | |
| 2561 | break; | |
| 2562 | case M32C_OPERAND_IMM_56_QI : | |
| 2563 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8); | |
| 2564 | break; | |
| 2565 | case M32C_OPERAND_IMM_64_HI : | |
| 2566 | { | |
| 2567 | long value; | |
| 2568 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value); | |
| 44e4546f | 2569 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2570 | fields->f_dsp_64_s16 = value; |
| 2571 | } | |
| 2572 | break; | |
| 2573 | case M32C_OPERAND_IMM_8_HI : | |
| 2574 | { | |
| 2575 | long value; | |
| 2576 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value); | |
| cc6aa1a6 | 2577 | value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))))))); |
| 49f58d10 JB |
2578 | fields->f_dsp_8_s16 = value; |
| 2579 | } | |
| 2580 | break; | |
| 2581 | case M32C_OPERAND_IMM_8_QI : | |
| 2582 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); | |
| 2583 | break; | |
| 2584 | case M32C_OPERAND_IMM_8_S4 : | |
| 2585 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); | |
| 2586 | break; | |
| c6552317 DD |
2587 | case M32C_OPERAND_IMM_8_S4N : |
| 2588 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); | |
| 2589 | break; | |
| 49f58d10 JB |
2590 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 2591 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); | |
| 2592 | break; | |
| 2593 | case M32C_OPERAND_IMM_SH_20_S4 : | |
| 2594 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); | |
| 2595 | break; | |
| 2596 | case M32C_OPERAND_IMM_SH_8_S4 : | |
| 2597 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); | |
| 2598 | break; | |
| 2599 | case M32C_OPERAND_IMM1_S : | |
| 2600 | { | |
| 2601 | long value; | |
| 2602 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value); | |
| 2603 | value = ((value) + (1)); | |
| 2604 | fields->f_imm1_S = value; | |
| 2605 | } | |
| 2606 | break; | |
| 2607 | case M32C_OPERAND_IMM3_S : | |
| 2608 | { | |
| 2609 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); | |
| 2610 | if (length <= 0) break; | |
| 2611 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
| 2612 | if (length <= 0) break; | |
| 2613 | { | |
| 2614 | FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); | |
| 2615 | } | |
| 2616 | } | |
| 2617 | break; | |
| 2618 | case M32C_OPERAND_LAB_16_8 : | |
| 2619 | { | |
| 2620 | long value; | |
| 2621 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value); | |
| 2622 | value = ((value) + (((pc) + (2)))); | |
| 2623 | fields->f_lab_16_8 = value; | |
| 2624 | } | |
| 2625 | break; | |
| 2626 | case M32C_OPERAND_LAB_24_8 : | |
| 2627 | { | |
| 2628 | long value; | |
| 2629 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value); | |
| 2630 | value = ((value) + (((pc) + (2)))); | |
| 2631 | fields->f_lab_24_8 = value; | |
| 2632 | } | |
| 2633 | break; | |
| 2634 | case M32C_OPERAND_LAB_32_8 : | |
| 2635 | { | |
| 2636 | long value; | |
| 2637 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value); | |
| 2638 | value = ((value) + (((pc) + (2)))); | |
| 2639 | fields->f_lab_32_8 = value; | |
| 2640 | } | |
| 2641 | break; | |
| 2642 | case M32C_OPERAND_LAB_40_8 : | |
| 2643 | { | |
| 2644 | long value; | |
| 2645 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value); | |
| 2646 | value = ((value) + (((pc) + (2)))); | |
| 2647 | fields->f_lab_40_8 = value; | |
| 2648 | } | |
| 2649 | break; | |
| 2650 | case M32C_OPERAND_LAB_5_3 : | |
| 2651 | { | |
| 2652 | long value; | |
| e729279b | 2653 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value); |
| 49f58d10 JB |
2654 | value = ((value) + (((pc) + (2)))); |
| 2655 | fields->f_lab_5_3 = value; | |
| 2656 | } | |
| 2657 | break; | |
| 2658 | case M32C_OPERAND_LAB_8_16 : | |
| 2659 | { | |
| 2660 | long value; | |
| 2661 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value); | |
| 1d61b032 | 2662 | value = ((((((((((USI) (((value) & (65280))) >> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1)))); |
| 49f58d10 JB |
2663 | fields->f_lab_8_16 = value; |
| 2664 | } | |
| 2665 | break; | |
| 2666 | case M32C_OPERAND_LAB_8_24 : | |
| 2667 | { | |
| 2668 | long value; | |
| 2669 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value); | |
| fe8afbc4 | 2670 | value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); |
| 49f58d10 JB |
2671 | fields->f_lab_8_24 = value; |
| 2672 | } | |
| 2673 | break; | |
| 2674 | case M32C_OPERAND_LAB_8_8 : | |
| 2675 | { | |
| 2676 | long value; | |
| 2677 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value); | |
| 2678 | value = ((value) + (((pc) + (1)))); | |
| 2679 | fields->f_lab_8_8 = value; | |
| 2680 | } | |
| 2681 | break; | |
| 2682 | case M32C_OPERAND_LAB32_JMP_S : | |
| 2683 | { | |
| 2684 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); | |
| 2685 | if (length <= 0) break; | |
| 2686 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
| 2687 | if (length <= 0) break; | |
| 2688 | { | |
| 2689 | FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2)))); | |
| 2690 | } | |
| 2691 | } | |
| 2692 | break; | |
| 2693 | case M32C_OPERAND_Q : | |
| 2694 | break; | |
| 2695 | case M32C_OPERAND_R0 : | |
| 2696 | break; | |
| 2697 | case M32C_OPERAND_R0H : | |
| 2698 | break; | |
| 2699 | case M32C_OPERAND_R0L : | |
| 2700 | break; | |
| 2701 | case M32C_OPERAND_R1 : | |
| 2702 | break; | |
| 2703 | case M32C_OPERAND_R1R2R0 : | |
| 2704 | break; | |
| 2705 | case M32C_OPERAND_R2 : | |
| 2706 | break; | |
| 2707 | case M32C_OPERAND_R2R0 : | |
| 2708 | break; | |
| 2709 | case M32C_OPERAND_R3 : | |
| 2710 | break; | |
| 2711 | case M32C_OPERAND_R3R1 : | |
| 2712 | break; | |
| 2713 | case M32C_OPERAND_REGSETPOP : | |
| 2714 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); | |
| 2715 | break; | |
| 2716 | case M32C_OPERAND_REGSETPUSH : | |
| 2717 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); | |
| 2718 | break; | |
| 2719 | case M32C_OPERAND_RN16_PUSH_S : | |
| 2720 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); | |
| 2721 | break; | |
| 2722 | case M32C_OPERAND_S : | |
| 2723 | break; | |
| 2724 | case M32C_OPERAND_SRC16AN : | |
| 2725 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); | |
| 2726 | break; | |
| 2727 | case M32C_OPERAND_SRC16ANHI : | |
| 2728 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); | |
| 2729 | break; | |
| 2730 | case M32C_OPERAND_SRC16ANQI : | |
| 2731 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); | |
| 2732 | break; | |
| 2733 | case M32C_OPERAND_SRC16RNHI : | |
| 2734 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); | |
| 2735 | break; | |
| 2736 | case M32C_OPERAND_SRC16RNQI : | |
| 2737 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); | |
| 2738 | break; | |
| 2739 | case M32C_OPERAND_SRC32ANPREFIXED : | |
| 2740 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
| 2741 | break; | |
| 2742 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
| 2743 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
| 2744 | break; | |
| 2745 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
| 2746 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
| 2747 | break; | |
| 2748 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
| 2749 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
| 2750 | break; | |
| 2751 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
| 2752 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
| 2753 | break; | |
| 2754 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
| 2755 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
| 2756 | break; | |
| 2757 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
| 2758 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
| 2759 | break; | |
| 2760 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
| 2761 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
| 2762 | break; | |
| 2763 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
| 2764 | { | |
| 2765 | long value; | |
| 2766 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); | |
| 2767 | value = ((((value) + (2))) % (4)); | |
| 2768 | fields->f_src32_rn_prefixed_HI = value; | |
| 2769 | } | |
| 2770 | break; | |
| 2771 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
| 2772 | { | |
| 2773 | long value; | |
| 2774 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); | |
| fe8afbc4 | 2775 | value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 49f58d10 JB |
2776 | fields->f_src32_rn_prefixed_QI = value; |
| 2777 | } | |
| 2778 | break; | |
| 2779 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
| 2780 | { | |
| 2781 | long value; | |
| 2782 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); | |
| 2783 | value = ((value) - (2)); | |
| 2784 | fields->f_src32_rn_prefixed_SI = value; | |
| 2785 | } | |
| 2786 | break; | |
| 2787 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
| 2788 | { | |
| 2789 | long value; | |
| 2790 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); | |
| 2791 | value = ((((value) + (2))) % (4)); | |
| 2792 | fields->f_src32_rn_unprefixed_HI = value; | |
| 2793 | } | |
| 2794 | break; | |
| 2795 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
| 2796 | { | |
| 2797 | long value; | |
| 2798 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); | |
| fe8afbc4 | 2799 | value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); |
| 49f58d10 JB |
2800 | fields->f_src32_rn_unprefixed_QI = value; |
| 2801 | } | |
| 2802 | break; | |
| 2803 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
| 2804 | { | |
| 2805 | long value; | |
| 2806 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); | |
| 2807 | value = ((value) - (2)); | |
| 2808 | fields->f_src32_rn_unprefixed_SI = value; | |
| 2809 | } | |
| 2810 | break; | |
| 2811 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
| 2812 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1); | |
| 2813 | break; | |
| 2814 | case M32C_OPERAND_X : | |
| 2815 | break; | |
| 2816 | case M32C_OPERAND_Z : | |
| 2817 | break; | |
| 2818 | case M32C_OPERAND_COND16_16 : | |
| 2819 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
| 2820 | break; | |
| 2821 | case M32C_OPERAND_COND16_24 : | |
| 2822 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2823 | break; | |
| 2824 | case M32C_OPERAND_COND16_32 : | |
| 2825 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2826 | break; | |
| 2827 | case M32C_OPERAND_COND16C : | |
| 2828 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); | |
| 2829 | break; | |
| 2830 | case M32C_OPERAND_COND16J : | |
| 2831 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); | |
| 2832 | break; | |
| 2833 | case M32C_OPERAND_COND16J5 : | |
| 2834 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5); | |
| 2835 | break; | |
| 2836 | case M32C_OPERAND_COND32 : | |
| 2837 | { | |
| 2838 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1); | |
| 2839 | if (length <= 0) break; | |
| 2840 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
| 2841 | if (length <= 0) break; | |
| 2842 | { | |
| 2843 | FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3))); | |
| 2844 | } | |
| 2845 | } | |
| 2846 | break; | |
| 2847 | case M32C_OPERAND_COND32_16 : | |
| 2848 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
| 2849 | break; | |
| 2850 | case M32C_OPERAND_COND32_24 : | |
| 2851 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
| 2852 | break; | |
| 2853 | case M32C_OPERAND_COND32_32 : | |
| 2854 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
| 2855 | break; | |
| 2856 | case M32C_OPERAND_COND32_40 : | |
| 2857 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); | |
| 2858 | break; | |
| 2859 | case M32C_OPERAND_COND32J : | |
| 2860 | { | |
| 2861 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3); | |
| 2862 | if (length <= 0) break; | |
| 2863 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
| 2864 | if (length <= 0) break; | |
| 2865 | { | |
| 2866 | FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1))); | |
| 2867 | } | |
| 2868 | } | |
| 2869 | break; | |
| 2870 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
| 2871 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); | |
| 2872 | break; | |
| 2873 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
| 2874 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
| 2875 | break; | |
| 2876 | case M32C_OPERAND_CR16 : | |
| 2877 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); | |
| 2878 | break; | |
| 2879 | case M32C_OPERAND_CR2_32 : | |
| 2880 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
| 2881 | break; | |
| 2882 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
| 2883 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); | |
| 2884 | break; | |
| 2885 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
| 2886 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
| 2887 | break; | |
| 2888 | case M32C_OPERAND_FLAGS16 : | |
| 2889 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); | |
| 2890 | break; | |
| 2891 | case M32C_OPERAND_FLAGS32 : | |
| 2892 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
| 2893 | break; | |
| 2894 | case M32C_OPERAND_SCCOND32 : | |
| 2895 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); | |
| 2896 | break; | |
| 2897 | case M32C_OPERAND_SIZE : | |
| 2898 | break; | |
| 2899 | ||
| 2900 | default : | |
| 2901 | /* xgettext:c-format */ | |
| a6743a54 AM |
2902 | opcodes_error_handler |
| 2903 | (_("internal error: unrecognized field %d while decoding insn"), | |
| 2904 | opindex); | |
| 49f58d10 JB |
2905 | abort (); |
| 2906 | } | |
| 2907 | ||
| 2908 | return length; | |
| 2909 | } | |
| 2910 | ||
| 43e65147 | 2911 | cgen_insert_fn * const m32c_cgen_insert_handlers[] = |
| 49f58d10 JB |
2912 | { |
| 2913 | insert_insn_normal, | |
| 2914 | }; | |
| 2915 | ||
| 43e65147 | 2916 | cgen_extract_fn * const m32c_cgen_extract_handlers[] = |
| 49f58d10 JB |
2917 | { |
| 2918 | extract_insn_normal, | |
| 2919 | }; | |
| 2920 | ||
| e729279b NC |
2921 | int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 2922 | bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); | |
| 49f58d10 JB |
2923 | |
| 2924 | /* Getting values from cgen_fields is handled by a collection of functions. | |
| 2925 | They are distinguished by the type of the VALUE argument they return. | |
| 2926 | TODO: floating point, inlining support, remove cases where result type | |
| 2927 | not appropriate. */ | |
| 2928 | ||
| 2929 | int | |
| e729279b NC |
2930 | m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 2931 | int opindex, | |
| 2932 | const CGEN_FIELDS * fields) | |
| 49f58d10 JB |
2933 | { |
| 2934 | int value; | |
| 2935 | ||
| 2936 | switch (opindex) | |
| 2937 | { | |
| 2938 | case M32C_OPERAND_A0 : | |
| 2939 | value = 0; | |
| 2940 | break; | |
| 2941 | case M32C_OPERAND_A1 : | |
| 2942 | value = 0; | |
| 2943 | break; | |
| 2944 | case M32C_OPERAND_AN16_PUSH_S : | |
| 2945 | value = fields->f_4_1; | |
| 2946 | break; | |
| 2947 | case M32C_OPERAND_BIT16AN : | |
| 2948 | value = fields->f_dst16_an; | |
| 2949 | break; | |
| 2950 | case M32C_OPERAND_BIT16RN : | |
| 2951 | value = fields->f_dst16_rn; | |
| 2952 | break; | |
| 5398310a DD |
2953 | case M32C_OPERAND_BIT3_S : |
| 2954 | value = fields->f_imm3_S; | |
| 2955 | break; | |
| 49f58d10 JB |
2956 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 2957 | value = fields->f_dst32_an_prefixed; | |
| 2958 | break; | |
| 2959 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
| 2960 | value = fields->f_dst32_an_unprefixed; | |
| 2961 | break; | |
| 2962 | case M32C_OPERAND_BIT32RNPREFIXED : | |
| 2963 | value = fields->f_dst32_rn_prefixed_QI; | |
| 2964 | break; | |
| 2965 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
| 2966 | value = fields->f_dst32_rn_unprefixed_QI; | |
| 2967 | break; | |
| 2968 | case M32C_OPERAND_BITBASE16_16_S8 : | |
| 2969 | value = fields->f_dsp_16_s8; | |
| 2970 | break; | |
| 2971 | case M32C_OPERAND_BITBASE16_16_U16 : | |
| 2972 | value = fields->f_dsp_16_u16; | |
| 2973 | break; | |
| 2974 | case M32C_OPERAND_BITBASE16_16_U8 : | |
| 2975 | value = fields->f_dsp_16_u8; | |
| 2976 | break; | |
| 2977 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
| 2978 | value = fields->f_bitbase16_u11_S; | |
| 2979 | break; | |
| 2980 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
| 2981 | value = fields->f_bitbase32_16_s11_unprefixed; | |
| 2982 | break; | |
| 2983 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
| 2984 | value = fields->f_bitbase32_16_s19_unprefixed; | |
| 2985 | break; | |
| 2986 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
| 2987 | value = fields->f_bitbase32_16_u11_unprefixed; | |
| 2988 | break; | |
| 2989 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
| 2990 | value = fields->f_bitbase32_16_u19_unprefixed; | |
| 2991 | break; | |
| 2992 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
| 2993 | value = fields->f_bitbase32_16_u27_unprefixed; | |
| 2994 | break; | |
| 2995 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
| 2996 | value = fields->f_bitbase32_24_s11_prefixed; | |
| 2997 | break; | |
| 2998 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
| 2999 | value = fields->f_bitbase32_24_s19_prefixed; | |
| 3000 | break; | |
| 3001 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
| 3002 | value = fields->f_bitbase32_24_u11_prefixed; | |
| 3003 | break; | |
| 3004 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
| 3005 | value = fields->f_bitbase32_24_u19_prefixed; | |
| 3006 | break; | |
| 3007 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
| 3008 | value = fields->f_bitbase32_24_u27_prefixed; | |
| 3009 | break; | |
| 3010 | case M32C_OPERAND_BITNO16R : | |
| 3011 | value = fields->f_dsp_16_u8; | |
| 3012 | break; | |
| 3013 | case M32C_OPERAND_BITNO32PREFIXED : | |
| 3014 | value = fields->f_bitno32_prefixed; | |
| 3015 | break; | |
| 3016 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
| 3017 | value = fields->f_bitno32_unprefixed; | |
| 3018 | break; | |
| 3019 | case M32C_OPERAND_DSP_10_U6 : | |
| 3020 | value = fields->f_dsp_10_u6; | |
| 3021 | break; | |
| 3022 | case M32C_OPERAND_DSP_16_S16 : | |
| 3023 | value = fields->f_dsp_16_s16; | |
| 3024 | break; | |
| 3025 | case M32C_OPERAND_DSP_16_S8 : | |
| 3026 | value = fields->f_dsp_16_s8; | |
| 3027 | break; | |
| 3028 | case M32C_OPERAND_DSP_16_U16 : | |
| 3029 | value = fields->f_dsp_16_u16; | |
| 3030 | break; | |
| 3031 | case M32C_OPERAND_DSP_16_U20 : | |
| 3032 | value = fields->f_dsp_16_u24; | |
| 3033 | break; | |
| 3034 | case M32C_OPERAND_DSP_16_U24 : | |
| 3035 | value = fields->f_dsp_16_u24; | |
| 3036 | break; | |
| 3037 | case M32C_OPERAND_DSP_16_U8 : | |
| 3038 | value = fields->f_dsp_16_u8; | |
| 3039 | break; | |
| 3040 | case M32C_OPERAND_DSP_24_S16 : | |
| 3041 | value = fields->f_dsp_24_s16; | |
| 3042 | break; | |
| 3043 | case M32C_OPERAND_DSP_24_S8 : | |
| 3044 | value = fields->f_dsp_24_s8; | |
| 3045 | break; | |
| 3046 | case M32C_OPERAND_DSP_24_U16 : | |
| 3047 | value = fields->f_dsp_24_u16; | |
| 3048 | break; | |
| 3049 | case M32C_OPERAND_DSP_24_U20 : | |
| 3050 | value = fields->f_dsp_24_u24; | |
| 3051 | break; | |
| 3052 | case M32C_OPERAND_DSP_24_U24 : | |
| 3053 | value = fields->f_dsp_24_u24; | |
| 3054 | break; | |
| 3055 | case M32C_OPERAND_DSP_24_U8 : | |
| 3056 | value = fields->f_dsp_24_u8; | |
| 3057 | break; | |
| 3058 | case M32C_OPERAND_DSP_32_S16 : | |
| 3059 | value = fields->f_dsp_32_s16; | |
| 3060 | break; | |
| 3061 | case M32C_OPERAND_DSP_32_S8 : | |
| 3062 | value = fields->f_dsp_32_s8; | |
| 3063 | break; | |
| 3064 | case M32C_OPERAND_DSP_32_U16 : | |
| 3065 | value = fields->f_dsp_32_u16; | |
| 3066 | break; | |
| 3067 | case M32C_OPERAND_DSP_32_U20 : | |
| 3068 | value = fields->f_dsp_32_u24; | |
| 3069 | break; | |
| 3070 | case M32C_OPERAND_DSP_32_U24 : | |
| 3071 | value = fields->f_dsp_32_u24; | |
| 3072 | break; | |
| 3073 | case M32C_OPERAND_DSP_32_U8 : | |
| 3074 | value = fields->f_dsp_32_u8; | |
| 3075 | break; | |
| 3076 | case M32C_OPERAND_DSP_40_S16 : | |
| 3077 | value = fields->f_dsp_40_s16; | |
| 3078 | break; | |
| 3079 | case M32C_OPERAND_DSP_40_S8 : | |
| 3080 | value = fields->f_dsp_40_s8; | |
| 3081 | break; | |
| 3082 | case M32C_OPERAND_DSP_40_U16 : | |
| 3083 | value = fields->f_dsp_40_u16; | |
| 3084 | break; | |
| 75b06e7b DD |
3085 | case M32C_OPERAND_DSP_40_U20 : |
| 3086 | value = fields->f_dsp_40_u20; | |
| 3087 | break; | |
| 49f58d10 JB |
3088 | case M32C_OPERAND_DSP_40_U24 : |
| 3089 | value = fields->f_dsp_40_u24; | |
| 3090 | break; | |
| 3091 | case M32C_OPERAND_DSP_40_U8 : | |
| 3092 | value = fields->f_dsp_40_u8; | |
| 3093 | break; | |
| 3094 | case M32C_OPERAND_DSP_48_S16 : | |
| 3095 | value = fields->f_dsp_48_s16; | |
| 3096 | break; | |
| 3097 | case M32C_OPERAND_DSP_48_S8 : | |
| 3098 | value = fields->f_dsp_48_s8; | |
| 3099 | break; | |
| 3100 | case M32C_OPERAND_DSP_48_U16 : | |
| 3101 | value = fields->f_dsp_48_u16; | |
| 3102 | break; | |
| 75b06e7b DD |
3103 | case M32C_OPERAND_DSP_48_U20 : |
| 3104 | value = fields->f_dsp_48_u20; | |
| 3105 | break; | |
| 49f58d10 JB |
3106 | case M32C_OPERAND_DSP_48_U24 : |
| 3107 | value = fields->f_dsp_48_u24; | |
| 3108 | break; | |
| 3109 | case M32C_OPERAND_DSP_48_U8 : | |
| 3110 | value = fields->f_dsp_48_u8; | |
| 3111 | break; | |
| f75eb1c0 DD |
3112 | case M32C_OPERAND_DSP_8_S24 : |
| 3113 | value = fields->f_dsp_8_s24; | |
| 3114 | break; | |
| 49f58d10 JB |
3115 | case M32C_OPERAND_DSP_8_S8 : |
| 3116 | value = fields->f_dsp_8_s8; | |
| 3117 | break; | |
| 3118 | case M32C_OPERAND_DSP_8_U16 : | |
| 3119 | value = fields->f_dsp_8_u16; | |
| 3120 | break; | |
| e729279b NC |
3121 | case M32C_OPERAND_DSP_8_U24 : |
| 3122 | value = fields->f_dsp_8_u24; | |
| 3123 | break; | |
| 49f58d10 JB |
3124 | case M32C_OPERAND_DSP_8_U6 : |
| 3125 | value = fields->f_dsp_8_u6; | |
| 3126 | break; | |
| 3127 | case M32C_OPERAND_DSP_8_U8 : | |
| 3128 | value = fields->f_dsp_8_u8; | |
| 3129 | break; | |
| 3130 | case M32C_OPERAND_DST16AN : | |
| 3131 | value = fields->f_dst16_an; | |
| 3132 | break; | |
| 3133 | case M32C_OPERAND_DST16AN_S : | |
| 3134 | value = fields->f_dst16_an_s; | |
| 3135 | break; | |
| 3136 | case M32C_OPERAND_DST16ANHI : | |
| 3137 | value = fields->f_dst16_an; | |
| 3138 | break; | |
| 3139 | case M32C_OPERAND_DST16ANQI : | |
| 3140 | value = fields->f_dst16_an; | |
| 3141 | break; | |
| 3142 | case M32C_OPERAND_DST16ANQI_S : | |
| 3143 | value = fields->f_dst16_rn_QI_s; | |
| 3144 | break; | |
| 3145 | case M32C_OPERAND_DST16ANSI : | |
| 3146 | value = fields->f_dst16_an; | |
| 3147 | break; | |
| 3148 | case M32C_OPERAND_DST16RNEXTQI : | |
| 3149 | value = fields->f_dst16_rn_ext; | |
| 3150 | break; | |
| 3151 | case M32C_OPERAND_DST16RNHI : | |
| 3152 | value = fields->f_dst16_rn; | |
| 3153 | break; | |
| 3154 | case M32C_OPERAND_DST16RNQI : | |
| 3155 | value = fields->f_dst16_rn; | |
| 3156 | break; | |
| 3157 | case M32C_OPERAND_DST16RNQI_S : | |
| 3158 | value = fields->f_dst16_rn_QI_s; | |
| 3159 | break; | |
| 3160 | case M32C_OPERAND_DST16RNSI : | |
| 3161 | value = fields->f_dst16_rn; | |
| 3162 | break; | |
| 3163 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
| 3164 | value = fields->f_dst32_an_unprefixed; | |
| 3165 | break; | |
| 3166 | case M32C_OPERAND_DST32ANPREFIXED : | |
| 3167 | value = fields->f_dst32_an_prefixed; | |
| 3168 | break; | |
| 3169 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
| 3170 | value = fields->f_dst32_an_prefixed; | |
| 3171 | break; | |
| 3172 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
| 3173 | value = fields->f_dst32_an_prefixed; | |
| 3174 | break; | |
| 3175 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
| 3176 | value = fields->f_dst32_an_prefixed; | |
| 3177 | break; | |
| 3178 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
| 3179 | value = fields->f_dst32_an_unprefixed; | |
| 3180 | break; | |
| 3181 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
| 3182 | value = fields->f_dst32_an_unprefixed; | |
| 3183 | break; | |
| 3184 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
| 3185 | value = fields->f_dst32_an_unprefixed; | |
| 3186 | break; | |
| 3187 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
| 3188 | value = fields->f_dst32_an_unprefixed; | |
| 3189 | break; | |
| 3190 | case M32C_OPERAND_DST32R0HI_S : | |
| 3191 | value = 0; | |
| 3192 | break; | |
| 3193 | case M32C_OPERAND_DST32R0QI_S : | |
| 3194 | value = 0; | |
| 3195 | break; | |
| 3196 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
| 3197 | value = fields->f_dst32_rn_ext_unprefixed; | |
| 3198 | break; | |
| 3199 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
| 3200 | value = fields->f_dst32_rn_ext_unprefixed; | |
| 3201 | break; | |
| 3202 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
| 3203 | value = fields->f_dst32_rn_prefixed_HI; | |
| 3204 | break; | |
| 3205 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
| 3206 | value = fields->f_dst32_rn_prefixed_QI; | |
| 3207 | break; | |
| 3208 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
| 3209 | value = fields->f_dst32_rn_prefixed_SI; | |
| 3210 | break; | |
| 3211 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
| 3212 | value = fields->f_dst32_rn_unprefixed_HI; | |
| 3213 | break; | |
| 3214 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
| 3215 | value = fields->f_dst32_rn_unprefixed_QI; | |
| 3216 | break; | |
| 3217 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
| 3218 | value = fields->f_dst32_rn_unprefixed_SI; | |
| 3219 | break; | |
| 3220 | case M32C_OPERAND_G : | |
| 3221 | value = 0; | |
| 3222 | break; | |
| 3223 | case M32C_OPERAND_IMM_12_S4 : | |
| 3224 | value = fields->f_imm_12_s4; | |
| 3225 | break; | |
| c6552317 DD |
3226 | case M32C_OPERAND_IMM_12_S4N : |
| 3227 | value = fields->f_imm_12_s4; | |
| 3228 | break; | |
| 49f58d10 JB |
3229 | case M32C_OPERAND_IMM_13_U3 : |
| 3230 | value = fields->f_imm_13_u3; | |
| 3231 | break; | |
| 3232 | case M32C_OPERAND_IMM_16_HI : | |
| 3233 | value = fields->f_dsp_16_s16; | |
| 3234 | break; | |
| 3235 | case M32C_OPERAND_IMM_16_QI : | |
| 3236 | value = fields->f_dsp_16_s8; | |
| 3237 | break; | |
| 3238 | case M32C_OPERAND_IMM_16_SI : | |
| 3239 | value = fields->f_dsp_16_s32; | |
| 3240 | break; | |
| 3241 | case M32C_OPERAND_IMM_20_S4 : | |
| 3242 | value = fields->f_imm_20_s4; | |
| 3243 | break; | |
| 3244 | case M32C_OPERAND_IMM_24_HI : | |
| 3245 | value = fields->f_dsp_24_s16; | |
| 3246 | break; | |
| 3247 | case M32C_OPERAND_IMM_24_QI : | |
| 3248 | value = fields->f_dsp_24_s8; | |
| 3249 | break; | |
| 3250 | case M32C_OPERAND_IMM_24_SI : | |
| 3251 | value = fields->f_dsp_24_s32; | |
| 3252 | break; | |
| 3253 | case M32C_OPERAND_IMM_32_HI : | |
| 3254 | value = fields->f_dsp_32_s16; | |
| 3255 | break; | |
| 3256 | case M32C_OPERAND_IMM_32_QI : | |
| 3257 | value = fields->f_dsp_32_s8; | |
| 3258 | break; | |
| 3259 | case M32C_OPERAND_IMM_32_SI : | |
| 3260 | value = fields->f_dsp_32_s32; | |
| 3261 | break; | |
| 3262 | case M32C_OPERAND_IMM_40_HI : | |
| 3263 | value = fields->f_dsp_40_s16; | |
| 3264 | break; | |
| 3265 | case M32C_OPERAND_IMM_40_QI : | |
| 3266 | value = fields->f_dsp_40_s8; | |
| 3267 | break; | |
| 3268 | case M32C_OPERAND_IMM_40_SI : | |
| 3269 | value = fields->f_dsp_40_s32; | |
| 3270 | break; | |
| 3271 | case M32C_OPERAND_IMM_48_HI : | |
| 3272 | value = fields->f_dsp_48_s16; | |
| 3273 | break; | |
| 3274 | case M32C_OPERAND_IMM_48_QI : | |
| 3275 | value = fields->f_dsp_48_s8; | |
| 3276 | break; | |
| 3277 | case M32C_OPERAND_IMM_48_SI : | |
| 3278 | value = fields->f_dsp_48_s32; | |
| 3279 | break; | |
| 3280 | case M32C_OPERAND_IMM_56_HI : | |
| 3281 | value = fields->f_dsp_56_s16; | |
| 3282 | break; | |
| 3283 | case M32C_OPERAND_IMM_56_QI : | |
| 3284 | value = fields->f_dsp_56_s8; | |
| 3285 | break; | |
| 3286 | case M32C_OPERAND_IMM_64_HI : | |
| 3287 | value = fields->f_dsp_64_s16; | |
| 3288 | break; | |
| 3289 | case M32C_OPERAND_IMM_8_HI : | |
| 3290 | value = fields->f_dsp_8_s16; | |
| 3291 | break; | |
| 3292 | case M32C_OPERAND_IMM_8_QI : | |
| 3293 | value = fields->f_dsp_8_s8; | |
| 3294 | break; | |
| 3295 | case M32C_OPERAND_IMM_8_S4 : | |
| 3296 | value = fields->f_imm_8_s4; | |
| 3297 | break; | |
| c6552317 DD |
3298 | case M32C_OPERAND_IMM_8_S4N : |
| 3299 | value = fields->f_imm_8_s4; | |
| 3300 | break; | |
| 49f58d10 JB |
3301 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 3302 | value = fields->f_imm_12_s4; | |
| 3303 | break; | |
| 3304 | case M32C_OPERAND_IMM_SH_20_S4 : | |
| 3305 | value = fields->f_imm_20_s4; | |
| 3306 | break; | |
| 3307 | case M32C_OPERAND_IMM_SH_8_S4 : | |
| 3308 | value = fields->f_imm_8_s4; | |
| 3309 | break; | |
| 3310 | case M32C_OPERAND_IMM1_S : | |
| 3311 | value = fields->f_imm1_S; | |
| 3312 | break; | |
| 3313 | case M32C_OPERAND_IMM3_S : | |
| 3314 | value = fields->f_imm3_S; | |
| 3315 | break; | |
| 3316 | case M32C_OPERAND_LAB_16_8 : | |
| 3317 | value = fields->f_lab_16_8; | |
| 3318 | break; | |
| 3319 | case M32C_OPERAND_LAB_24_8 : | |
| 3320 | value = fields->f_lab_24_8; | |
| 3321 | break; | |
| 3322 | case M32C_OPERAND_LAB_32_8 : | |
| 3323 | value = fields->f_lab_32_8; | |
| 3324 | break; | |
| 3325 | case M32C_OPERAND_LAB_40_8 : | |
| 3326 | value = fields->f_lab_40_8; | |
| 3327 | break; | |
| 3328 | case M32C_OPERAND_LAB_5_3 : | |
| 3329 | value = fields->f_lab_5_3; | |
| 3330 | break; | |
| 3331 | case M32C_OPERAND_LAB_8_16 : | |
| 3332 | value = fields->f_lab_8_16; | |
| 3333 | break; | |
| 3334 | case M32C_OPERAND_LAB_8_24 : | |
| 3335 | value = fields->f_lab_8_24; | |
| 3336 | break; | |
| 3337 | case M32C_OPERAND_LAB_8_8 : | |
| 3338 | value = fields->f_lab_8_8; | |
| 3339 | break; | |
| 3340 | case M32C_OPERAND_LAB32_JMP_S : | |
| 3341 | value = fields->f_lab32_jmp_s; | |
| 3342 | break; | |
| 3343 | case M32C_OPERAND_Q : | |
| 3344 | value = 0; | |
| 3345 | break; | |
| 3346 | case M32C_OPERAND_R0 : | |
| 3347 | value = 0; | |
| 3348 | break; | |
| 3349 | case M32C_OPERAND_R0H : | |
| 3350 | value = 0; | |
| 3351 | break; | |
| 3352 | case M32C_OPERAND_R0L : | |
| 3353 | value = 0; | |
| 3354 | break; | |
| 3355 | case M32C_OPERAND_R1 : | |
| 3356 | value = 0; | |
| 3357 | break; | |
| 3358 | case M32C_OPERAND_R1R2R0 : | |
| 3359 | value = 0; | |
| 3360 | break; | |
| 3361 | case M32C_OPERAND_R2 : | |
| 3362 | value = 0; | |
| 3363 | break; | |
| 3364 | case M32C_OPERAND_R2R0 : | |
| 3365 | value = 0; | |
| 3366 | break; | |
| 3367 | case M32C_OPERAND_R3 : | |
| 3368 | value = 0; | |
| 3369 | break; | |
| 3370 | case M32C_OPERAND_R3R1 : | |
| 3371 | value = 0; | |
| 3372 | break; | |
| 3373 | case M32C_OPERAND_REGSETPOP : | |
| 3374 | value = fields->f_8_8; | |
| 3375 | break; | |
| 3376 | case M32C_OPERAND_REGSETPUSH : | |
| 3377 | value = fields->f_8_8; | |
| 3378 | break; | |
| 3379 | case M32C_OPERAND_RN16_PUSH_S : | |
| 3380 | value = fields->f_4_1; | |
| 3381 | break; | |
| 3382 | case M32C_OPERAND_S : | |
| 3383 | value = 0; | |
| 3384 | break; | |
| 3385 | case M32C_OPERAND_SRC16AN : | |
| 3386 | value = fields->f_src16_an; | |
| 3387 | break; | |
| 3388 | case M32C_OPERAND_SRC16ANHI : | |
| 3389 | value = fields->f_src16_an; | |
| 3390 | break; | |
| 3391 | case M32C_OPERAND_SRC16ANQI : | |
| 3392 | value = fields->f_src16_an; | |
| 3393 | break; | |
| 3394 | case M32C_OPERAND_SRC16RNHI : | |
| 3395 | value = fields->f_src16_rn; | |
| 3396 | break; | |
| 3397 | case M32C_OPERAND_SRC16RNQI : | |
| 3398 | value = fields->f_src16_rn; | |
| 3399 | break; | |
| 3400 | case M32C_OPERAND_SRC32ANPREFIXED : | |
| 3401 | value = fields->f_src32_an_prefixed; | |
| 3402 | break; | |
| 3403 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
| 3404 | value = fields->f_src32_an_prefixed; | |
| 3405 | break; | |
| 3406 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
| 3407 | value = fields->f_src32_an_prefixed; | |
| 3408 | break; | |
| 3409 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
| 3410 | value = fields->f_src32_an_prefixed; | |
| 3411 | break; | |
| 3412 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
| 3413 | value = fields->f_src32_an_unprefixed; | |
| 3414 | break; | |
| 3415 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
| 3416 | value = fields->f_src32_an_unprefixed; | |
| 3417 | break; | |
| 3418 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
| 3419 | value = fields->f_src32_an_unprefixed; | |
| 3420 | break; | |
| 3421 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
| 3422 | value = fields->f_src32_an_unprefixed; | |
| 3423 | break; | |
| 3424 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
| 3425 | value = fields->f_src32_rn_prefixed_HI; | |
| 3426 | break; | |
| 3427 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
| 3428 | value = fields->f_src32_rn_prefixed_QI; | |
| 3429 | break; | |
| 3430 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
| 3431 | value = fields->f_src32_rn_prefixed_SI; | |
| 3432 | break; | |
| 3433 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
| 3434 | value = fields->f_src32_rn_unprefixed_HI; | |
| 3435 | break; | |
| 3436 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
| 3437 | value = fields->f_src32_rn_unprefixed_QI; | |
| 3438 | break; | |
| 3439 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
| 3440 | value = fields->f_src32_rn_unprefixed_SI; | |
| 3441 | break; | |
| 3442 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
| 3443 | value = fields->f_5_1; | |
| 3444 | break; | |
| 3445 | case M32C_OPERAND_X : | |
| 3446 | value = 0; | |
| 3447 | break; | |
| 3448 | case M32C_OPERAND_Z : | |
| 3449 | value = 0; | |
| 3450 | break; | |
| 3451 | case M32C_OPERAND_COND16_16 : | |
| 3452 | value = fields->f_dsp_16_u8; | |
| 3453 | break; | |
| 3454 | case M32C_OPERAND_COND16_24 : | |
| 3455 | value = fields->f_dsp_24_u8; | |
| 3456 | break; | |
| 3457 | case M32C_OPERAND_COND16_32 : | |
| 3458 | value = fields->f_dsp_32_u8; | |
| 3459 | break; | |
| 3460 | case M32C_OPERAND_COND16C : | |
| 3461 | value = fields->f_cond16; | |
| 3462 | break; | |
| 3463 | case M32C_OPERAND_COND16J : | |
| 3464 | value = fields->f_cond16; | |
| 3465 | break; | |
| 3466 | case M32C_OPERAND_COND16J5 : | |
| 3467 | value = fields->f_cond16j_5; | |
| 3468 | break; | |
| 3469 | case M32C_OPERAND_COND32 : | |
| 3470 | value = fields->f_cond32; | |
| 3471 | break; | |
| 3472 | case M32C_OPERAND_COND32_16 : | |
| 3473 | value = fields->f_dsp_16_u8; | |
| 3474 | break; | |
| 3475 | case M32C_OPERAND_COND32_24 : | |
| 3476 | value = fields->f_dsp_24_u8; | |
| 3477 | break; | |
| 3478 | case M32C_OPERAND_COND32_32 : | |
| 3479 | value = fields->f_dsp_32_u8; | |
| 3480 | break; | |
| 3481 | case M32C_OPERAND_COND32_40 : | |
| 3482 | value = fields->f_dsp_40_u8; | |
| 3483 | break; | |
| 3484 | case M32C_OPERAND_COND32J : | |
| 3485 | value = fields->f_cond32j; | |
| 3486 | break; | |
| 3487 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
| 3488 | value = fields->f_21_3; | |
| 3489 | break; | |
| 3490 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
| 3491 | value = fields->f_13_3; | |
| 3492 | break; | |
| 3493 | case M32C_OPERAND_CR16 : | |
| 3494 | value = fields->f_9_3; | |
| 3495 | break; | |
| 3496 | case M32C_OPERAND_CR2_32 : | |
| 3497 | value = fields->f_13_3; | |
| 3498 | break; | |
| 3499 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
| 3500 | value = fields->f_21_3; | |
| 3501 | break; | |
| 3502 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
| 3503 | value = fields->f_13_3; | |
| 3504 | break; | |
| 3505 | case M32C_OPERAND_FLAGS16 : | |
| 3506 | value = fields->f_9_3; | |
| 3507 | break; | |
| 3508 | case M32C_OPERAND_FLAGS32 : | |
| 3509 | value = fields->f_13_3; | |
| 3510 | break; | |
| 3511 | case M32C_OPERAND_SCCOND32 : | |
| 3512 | value = fields->f_cond16; | |
| 3513 | break; | |
| 3514 | case M32C_OPERAND_SIZE : | |
| 3515 | value = 0; | |
| 3516 | break; | |
| 3517 | ||
| 3518 | default : | |
| 3519 | /* xgettext:c-format */ | |
| a6743a54 AM |
3520 | opcodes_error_handler |
| 3521 | (_("internal error: unrecognized field %d while getting int operand"), | |
| 3522 | opindex); | |
| 49f58d10 JB |
3523 | abort (); |
| 3524 | } | |
| 3525 | ||
| 3526 | return value; | |
| 3527 | } | |
| 3528 | ||
| 3529 | bfd_vma | |
| e729279b NC |
3530 | m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 3531 | int opindex, | |
| 3532 | const CGEN_FIELDS * fields) | |
| 49f58d10 JB |
3533 | { |
| 3534 | bfd_vma value; | |
| 3535 | ||
| 3536 | switch (opindex) | |
| 3537 | { | |
| 3538 | case M32C_OPERAND_A0 : | |
| 3539 | value = 0; | |
| 3540 | break; | |
| 3541 | case M32C_OPERAND_A1 : | |
| 3542 | value = 0; | |
| 3543 | break; | |
| 3544 | case M32C_OPERAND_AN16_PUSH_S : | |
| 3545 | value = fields->f_4_1; | |
| 3546 | break; | |
| 3547 | case M32C_OPERAND_BIT16AN : | |
| 3548 | value = fields->f_dst16_an; | |
| 3549 | break; | |
| 3550 | case M32C_OPERAND_BIT16RN : | |
| 3551 | value = fields->f_dst16_rn; | |
| 3552 | break; | |
| 5398310a DD |
3553 | case M32C_OPERAND_BIT3_S : |
| 3554 | value = fields->f_imm3_S; | |
| 3555 | break; | |
| 49f58d10 JB |
3556 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 3557 | value = fields->f_dst32_an_prefixed; | |
| 3558 | break; | |
| 3559 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
| 3560 | value = fields->f_dst32_an_unprefixed; | |
| 3561 | break; | |
| 3562 | case M32C_OPERAND_BIT32RNPREFIXED : | |
| 3563 | value = fields->f_dst32_rn_prefixed_QI; | |
| 3564 | break; | |
| 3565 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
| 3566 | value = fields->f_dst32_rn_unprefixed_QI; | |
| 3567 | break; | |
| 3568 | case M32C_OPERAND_BITBASE16_16_S8 : | |
| 3569 | value = fields->f_dsp_16_s8; | |
| 3570 | break; | |
| 3571 | case M32C_OPERAND_BITBASE16_16_U16 : | |
| 3572 | value = fields->f_dsp_16_u16; | |
| 3573 | break; | |
| 3574 | case M32C_OPERAND_BITBASE16_16_U8 : | |
| 3575 | value = fields->f_dsp_16_u8; | |
| 3576 | break; | |
| 3577 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
| 3578 | value = fields->f_bitbase16_u11_S; | |
| 3579 | break; | |
| 3580 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
| 3581 | value = fields->f_bitbase32_16_s11_unprefixed; | |
| 3582 | break; | |
| 3583 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
| 3584 | value = fields->f_bitbase32_16_s19_unprefixed; | |
| 3585 | break; | |
| 3586 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
| 3587 | value = fields->f_bitbase32_16_u11_unprefixed; | |
| 3588 | break; | |
| 3589 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
| 3590 | value = fields->f_bitbase32_16_u19_unprefixed; | |
| 3591 | break; | |
| 3592 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
| 3593 | value = fields->f_bitbase32_16_u27_unprefixed; | |
| 3594 | break; | |
| 3595 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
| 3596 | value = fields->f_bitbase32_24_s11_prefixed; | |
| 3597 | break; | |
| 3598 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
| 3599 | value = fields->f_bitbase32_24_s19_prefixed; | |
| 3600 | break; | |
| 3601 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
| 3602 | value = fields->f_bitbase32_24_u11_prefixed; | |
| 3603 | break; | |
| 3604 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
| 3605 | value = fields->f_bitbase32_24_u19_prefixed; | |
| 3606 | break; | |
| 3607 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
| 3608 | value = fields->f_bitbase32_24_u27_prefixed; | |
| 3609 | break; | |
| 3610 | case M32C_OPERAND_BITNO16R : | |
| 3611 | value = fields->f_dsp_16_u8; | |
| 3612 | break; | |
| 3613 | case M32C_OPERAND_BITNO32PREFIXED : | |
| 3614 | value = fields->f_bitno32_prefixed; | |
| 3615 | break; | |
| 3616 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
| 3617 | value = fields->f_bitno32_unprefixed; | |
| 3618 | break; | |
| 3619 | case M32C_OPERAND_DSP_10_U6 : | |
| 3620 | value = fields->f_dsp_10_u6; | |
| 3621 | break; | |
| 3622 | case M32C_OPERAND_DSP_16_S16 : | |
| 3623 | value = fields->f_dsp_16_s16; | |
| 3624 | break; | |
| 3625 | case M32C_OPERAND_DSP_16_S8 : | |
| 3626 | value = fields->f_dsp_16_s8; | |
| 3627 | break; | |
| 3628 | case M32C_OPERAND_DSP_16_U16 : | |
| 3629 | value = fields->f_dsp_16_u16; | |
| 3630 | break; | |
| 3631 | case M32C_OPERAND_DSP_16_U20 : | |
| 3632 | value = fields->f_dsp_16_u24; | |
| 3633 | break; | |
| 3634 | case M32C_OPERAND_DSP_16_U24 : | |
| 3635 | value = fields->f_dsp_16_u24; | |
| 3636 | break; | |
| 3637 | case M32C_OPERAND_DSP_16_U8 : | |
| 3638 | value = fields->f_dsp_16_u8; | |
| 3639 | break; | |
| 3640 | case M32C_OPERAND_DSP_24_S16 : | |
| 3641 | value = fields->f_dsp_24_s16; | |
| 3642 | break; | |
| 3643 | case M32C_OPERAND_DSP_24_S8 : | |
| 3644 | value = fields->f_dsp_24_s8; | |
| 3645 | break; | |
| 3646 | case M32C_OPERAND_DSP_24_U16 : | |
| 3647 | value = fields->f_dsp_24_u16; | |
| 3648 | break; | |
| 3649 | case M32C_OPERAND_DSP_24_U20 : | |
| 3650 | value = fields->f_dsp_24_u24; | |
| 3651 | break; | |
| 3652 | case M32C_OPERAND_DSP_24_U24 : | |
| 3653 | value = fields->f_dsp_24_u24; | |
| 3654 | break; | |
| 3655 | case M32C_OPERAND_DSP_24_U8 : | |
| 3656 | value = fields->f_dsp_24_u8; | |
| 3657 | break; | |
| 3658 | case M32C_OPERAND_DSP_32_S16 : | |
| 3659 | value = fields->f_dsp_32_s16; | |
| 3660 | break; | |
| 3661 | case M32C_OPERAND_DSP_32_S8 : | |
| 3662 | value = fields->f_dsp_32_s8; | |
| 3663 | break; | |
| 3664 | case M32C_OPERAND_DSP_32_U16 : | |
| 3665 | value = fields->f_dsp_32_u16; | |
| 3666 | break; | |
| 3667 | case M32C_OPERAND_DSP_32_U20 : | |
| 3668 | value = fields->f_dsp_32_u24; | |
| 3669 | break; | |
| 3670 | case M32C_OPERAND_DSP_32_U24 : | |
| 3671 | value = fields->f_dsp_32_u24; | |
| 3672 | break; | |
| 3673 | case M32C_OPERAND_DSP_32_U8 : | |
| 3674 | value = fields->f_dsp_32_u8; | |
| 3675 | break; | |
| 3676 | case M32C_OPERAND_DSP_40_S16 : | |
| 3677 | value = fields->f_dsp_40_s16; | |
| 3678 | break; | |
| 3679 | case M32C_OPERAND_DSP_40_S8 : | |
| 3680 | value = fields->f_dsp_40_s8; | |
| 3681 | break; | |
| 3682 | case M32C_OPERAND_DSP_40_U16 : | |
| 3683 | value = fields->f_dsp_40_u16; | |
| 3684 | break; | |
| 75b06e7b DD |
3685 | case M32C_OPERAND_DSP_40_U20 : |
| 3686 | value = fields->f_dsp_40_u20; | |
| 3687 | break; | |
| 49f58d10 JB |
3688 | case M32C_OPERAND_DSP_40_U24 : |
| 3689 | value = fields->f_dsp_40_u24; | |
| 3690 | break; | |
| 3691 | case M32C_OPERAND_DSP_40_U8 : | |
| 3692 | value = fields->f_dsp_40_u8; | |
| 3693 | break; | |
| 3694 | case M32C_OPERAND_DSP_48_S16 : | |
| 3695 | value = fields->f_dsp_48_s16; | |
| 3696 | break; | |
| 3697 | case M32C_OPERAND_DSP_48_S8 : | |
| 3698 | value = fields->f_dsp_48_s8; | |
| 3699 | break; | |
| 3700 | case M32C_OPERAND_DSP_48_U16 : | |
| 3701 | value = fields->f_dsp_48_u16; | |
| 3702 | break; | |
| 75b06e7b DD |
3703 | case M32C_OPERAND_DSP_48_U20 : |
| 3704 | value = fields->f_dsp_48_u20; | |
| 3705 | break; | |
| 49f58d10 JB |
3706 | case M32C_OPERAND_DSP_48_U24 : |
| 3707 | value = fields->f_dsp_48_u24; | |
| 3708 | break; | |
| 3709 | case M32C_OPERAND_DSP_48_U8 : | |
| 3710 | value = fields->f_dsp_48_u8; | |
| 3711 | break; | |
| f75eb1c0 DD |
3712 | case M32C_OPERAND_DSP_8_S24 : |
| 3713 | value = fields->f_dsp_8_s24; | |
| 3714 | break; | |
| 49f58d10 JB |
3715 | case M32C_OPERAND_DSP_8_S8 : |
| 3716 | value = fields->f_dsp_8_s8; | |
| 3717 | break; | |
| 3718 | case M32C_OPERAND_DSP_8_U16 : | |
| 3719 | value = fields->f_dsp_8_u16; | |
| 3720 | break; | |
| e729279b NC |
3721 | case M32C_OPERAND_DSP_8_U24 : |
| 3722 | value = fields->f_dsp_8_u24; | |
| 3723 | break; | |
| 49f58d10 JB |
3724 | case M32C_OPERAND_DSP_8_U6 : |
| 3725 | value = fields->f_dsp_8_u6; | |
| 3726 | break; | |
| 3727 | case M32C_OPERAND_DSP_8_U8 : | |
| 3728 | value = fields->f_dsp_8_u8; | |
| 3729 | break; | |
| 3730 | case M32C_OPERAND_DST16AN : | |
| 3731 | value = fields->f_dst16_an; | |
| 3732 | break; | |
| 3733 | case M32C_OPERAND_DST16AN_S : | |
| 3734 | value = fields->f_dst16_an_s; | |
| 3735 | break; | |
| 3736 | case M32C_OPERAND_DST16ANHI : | |
| 3737 | value = fields->f_dst16_an; | |
| 3738 | break; | |
| 3739 | case M32C_OPERAND_DST16ANQI : | |
| 3740 | value = fields->f_dst16_an; | |
| 3741 | break; | |
| 3742 | case M32C_OPERAND_DST16ANQI_S : | |
| 3743 | value = fields->f_dst16_rn_QI_s; | |
| 3744 | break; | |
| 3745 | case M32C_OPERAND_DST16ANSI : | |
| 3746 | value = fields->f_dst16_an; | |
| 3747 | break; | |
| 3748 | case M32C_OPERAND_DST16RNEXTQI : | |
| 3749 | value = fields->f_dst16_rn_ext; | |
| 3750 | break; | |
| 3751 | case M32C_OPERAND_DST16RNHI : | |
| 3752 | value = fields->f_dst16_rn; | |
| 3753 | break; | |
| 3754 | case M32C_OPERAND_DST16RNQI : | |
| 3755 | value = fields->f_dst16_rn; | |
| 3756 | break; | |
| 3757 | case M32C_OPERAND_DST16RNQI_S : | |
| 3758 | value = fields->f_dst16_rn_QI_s; | |
| 3759 | break; | |
| 3760 | case M32C_OPERAND_DST16RNSI : | |
| 3761 | value = fields->f_dst16_rn; | |
| 3762 | break; | |
| 3763 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
| 3764 | value = fields->f_dst32_an_unprefixed; | |
| 3765 | break; | |
| 3766 | case M32C_OPERAND_DST32ANPREFIXED : | |
| 3767 | value = fields->f_dst32_an_prefixed; | |
| 3768 | break; | |
| 3769 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
| 3770 | value = fields->f_dst32_an_prefixed; | |
| 3771 | break; | |
| 3772 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
| 3773 | value = fields->f_dst32_an_prefixed; | |
| 3774 | break; | |
| 3775 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
| 3776 | value = fields->f_dst32_an_prefixed; | |
| 3777 | break; | |
| 3778 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
| 3779 | value = fields->f_dst32_an_unprefixed; | |
| 3780 | break; | |
| 3781 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
| 3782 | value = fields->f_dst32_an_unprefixed; | |
| 3783 | break; | |
| 3784 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
| 3785 | value = fields->f_dst32_an_unprefixed; | |
| 3786 | break; | |
| 3787 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
| 3788 | value = fields->f_dst32_an_unprefixed; | |
| 3789 | break; | |
| 3790 | case M32C_OPERAND_DST32R0HI_S : | |
| 3791 | value = 0; | |
| 3792 | break; | |
| 3793 | case M32C_OPERAND_DST32R0QI_S : | |
| 3794 | value = 0; | |
| 3795 | break; | |
| 3796 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
| 3797 | value = fields->f_dst32_rn_ext_unprefixed; | |
| 3798 | break; | |
| 3799 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
| 3800 | value = fields->f_dst32_rn_ext_unprefixed; | |
| 3801 | break; | |
| 3802 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
| 3803 | value = fields->f_dst32_rn_prefixed_HI; | |
| 3804 | break; | |
| 3805 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
| 3806 | value = fields->f_dst32_rn_prefixed_QI; | |
| 3807 | break; | |
| 3808 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
| 3809 | value = fields->f_dst32_rn_prefixed_SI; | |
| 3810 | break; | |
| 3811 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
| 3812 | value = fields->f_dst32_rn_unprefixed_HI; | |
| 3813 | break; | |
| 3814 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
| 3815 | value = fields->f_dst32_rn_unprefixed_QI; | |
| 3816 | break; | |
| 3817 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
| 3818 | value = fields->f_dst32_rn_unprefixed_SI; | |
| 3819 | break; | |
| 3820 | case M32C_OPERAND_G : | |
| 3821 | value = 0; | |
| 3822 | break; | |
| 3823 | case M32C_OPERAND_IMM_12_S4 : | |
| 3824 | value = fields->f_imm_12_s4; | |
| 3825 | break; | |
| c6552317 DD |
3826 | case M32C_OPERAND_IMM_12_S4N : |
| 3827 | value = fields->f_imm_12_s4; | |
| 3828 | break; | |
| 49f58d10 JB |
3829 | case M32C_OPERAND_IMM_13_U3 : |
| 3830 | value = fields->f_imm_13_u3; | |
| 3831 | break; | |
| 3832 | case M32C_OPERAND_IMM_16_HI : | |
| 3833 | value = fields->f_dsp_16_s16; | |
| 3834 | break; | |
| 3835 | case M32C_OPERAND_IMM_16_QI : | |
| 3836 | value = fields->f_dsp_16_s8; | |
| 3837 | break; | |
| 3838 | case M32C_OPERAND_IMM_16_SI : | |
| 3839 | value = fields->f_dsp_16_s32; | |
| 3840 | break; | |
| 3841 | case M32C_OPERAND_IMM_20_S4 : | |
| 3842 | value = fields->f_imm_20_s4; | |
| 3843 | break; | |
| 3844 | case M32C_OPERAND_IMM_24_HI : | |
| 3845 | value = fields->f_dsp_24_s16; | |
| 3846 | break; | |
| 3847 | case M32C_OPERAND_IMM_24_QI : | |
| 3848 | value = fields->f_dsp_24_s8; | |
| 3849 | break; | |
| 3850 | case M32C_OPERAND_IMM_24_SI : | |
| 3851 | value = fields->f_dsp_24_s32; | |
| 3852 | break; | |
| 3853 | case M32C_OPERAND_IMM_32_HI : | |
| 3854 | value = fields->f_dsp_32_s16; | |
| 3855 | break; | |
| 3856 | case M32C_OPERAND_IMM_32_QI : | |
| 3857 | value = fields->f_dsp_32_s8; | |
| 3858 | break; | |
| 3859 | case M32C_OPERAND_IMM_32_SI : | |
| 3860 | value = fields->f_dsp_32_s32; | |
| 3861 | break; | |
| 3862 | case M32C_OPERAND_IMM_40_HI : | |
| 3863 | value = fields->f_dsp_40_s16; | |
| 3864 | break; | |
| 3865 | case M32C_OPERAND_IMM_40_QI : | |
| 3866 | value = fields->f_dsp_40_s8; | |
| 3867 | break; | |
| 3868 | case M32C_OPERAND_IMM_40_SI : | |
| 3869 | value = fields->f_dsp_40_s32; | |
| 3870 | break; | |
| 3871 | case M32C_OPERAND_IMM_48_HI : | |
| 3872 | value = fields->f_dsp_48_s16; | |
| 3873 | break; | |
| 3874 | case M32C_OPERAND_IMM_48_QI : | |
| 3875 | value = fields->f_dsp_48_s8; | |
| 3876 | break; | |
| 3877 | case M32C_OPERAND_IMM_48_SI : | |
| 3878 | value = fields->f_dsp_48_s32; | |
| 3879 | break; | |
| 3880 | case M32C_OPERAND_IMM_56_HI : | |
| 3881 | value = fields->f_dsp_56_s16; | |
| 3882 | break; | |
| 3883 | case M32C_OPERAND_IMM_56_QI : | |
| 3884 | value = fields->f_dsp_56_s8; | |
| 3885 | break; | |
| 3886 | case M32C_OPERAND_IMM_64_HI : | |
| 3887 | value = fields->f_dsp_64_s16; | |
| 3888 | break; | |
| 3889 | case M32C_OPERAND_IMM_8_HI : | |
| 3890 | value = fields->f_dsp_8_s16; | |
| 3891 | break; | |
| 3892 | case M32C_OPERAND_IMM_8_QI : | |
| 3893 | value = fields->f_dsp_8_s8; | |
| 3894 | break; | |
| 3895 | case M32C_OPERAND_IMM_8_S4 : | |
| 3896 | value = fields->f_imm_8_s4; | |
| 3897 | break; | |
| c6552317 DD |
3898 | case M32C_OPERAND_IMM_8_S4N : |
| 3899 | value = fields->f_imm_8_s4; | |
| 3900 | break; | |
| 49f58d10 JB |
3901 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 3902 | value = fields->f_imm_12_s4; | |
| 3903 | break; | |
| 3904 | case M32C_OPERAND_IMM_SH_20_S4 : | |
| 3905 | value = fields->f_imm_20_s4; | |
| 3906 | break; | |
| 3907 | case M32C_OPERAND_IMM_SH_8_S4 : | |
| 3908 | value = fields->f_imm_8_s4; | |
| 3909 | break; | |
| 3910 | case M32C_OPERAND_IMM1_S : | |
| 3911 | value = fields->f_imm1_S; | |
| 3912 | break; | |
| 3913 | case M32C_OPERAND_IMM3_S : | |
| 3914 | value = fields->f_imm3_S; | |
| 3915 | break; | |
| 3916 | case M32C_OPERAND_LAB_16_8 : | |
| 3917 | value = fields->f_lab_16_8; | |
| 3918 | break; | |
| 3919 | case M32C_OPERAND_LAB_24_8 : | |
| 3920 | value = fields->f_lab_24_8; | |
| 3921 | break; | |
| 3922 | case M32C_OPERAND_LAB_32_8 : | |
| 3923 | value = fields->f_lab_32_8; | |
| 3924 | break; | |
| 3925 | case M32C_OPERAND_LAB_40_8 : | |
| 3926 | value = fields->f_lab_40_8; | |
| 3927 | break; | |
| 3928 | case M32C_OPERAND_LAB_5_3 : | |
| 3929 | value = fields->f_lab_5_3; | |
| 3930 | break; | |
| 3931 | case M32C_OPERAND_LAB_8_16 : | |
| 3932 | value = fields->f_lab_8_16; | |
| 3933 | break; | |
| 3934 | case M32C_OPERAND_LAB_8_24 : | |
| 3935 | value = fields->f_lab_8_24; | |
| 3936 | break; | |
| 3937 | case M32C_OPERAND_LAB_8_8 : | |
| 3938 | value = fields->f_lab_8_8; | |
| 3939 | break; | |
| 3940 | case M32C_OPERAND_LAB32_JMP_S : | |
| 3941 | value = fields->f_lab32_jmp_s; | |
| 3942 | break; | |
| 3943 | case M32C_OPERAND_Q : | |
| 3944 | value = 0; | |
| 3945 | break; | |
| 3946 | case M32C_OPERAND_R0 : | |
| 3947 | value = 0; | |
| 3948 | break; | |
| 3949 | case M32C_OPERAND_R0H : | |
| 3950 | value = 0; | |
| 3951 | break; | |
| 3952 | case M32C_OPERAND_R0L : | |
| 3953 | value = 0; | |
| 3954 | break; | |
| 3955 | case M32C_OPERAND_R1 : | |
| 3956 | value = 0; | |
| 3957 | break; | |
| 3958 | case M32C_OPERAND_R1R2R0 : | |
| 3959 | value = 0; | |
| 3960 | break; | |
| 3961 | case M32C_OPERAND_R2 : | |
| 3962 | value = 0; | |
| 3963 | break; | |
| 3964 | case M32C_OPERAND_R2R0 : | |
| 3965 | value = 0; | |
| 3966 | break; | |
| 3967 | case M32C_OPERAND_R3 : | |
| 3968 | value = 0; | |
| 3969 | break; | |
| 3970 | case M32C_OPERAND_R3R1 : | |
| 3971 | value = 0; | |
| 3972 | break; | |
| 3973 | case M32C_OPERAND_REGSETPOP : | |
| 3974 | value = fields->f_8_8; | |
| 3975 | break; | |
| 3976 | case M32C_OPERAND_REGSETPUSH : | |
| 3977 | value = fields->f_8_8; | |
| 3978 | break; | |
| 3979 | case M32C_OPERAND_RN16_PUSH_S : | |
| 3980 | value = fields->f_4_1; | |
| 3981 | break; | |
| 3982 | case M32C_OPERAND_S : | |
| 3983 | value = 0; | |
| 3984 | break; | |
| 3985 | case M32C_OPERAND_SRC16AN : | |
| 3986 | value = fields->f_src16_an; | |
| 3987 | break; | |
| 3988 | case M32C_OPERAND_SRC16ANHI : | |
| 3989 | value = fields->f_src16_an; | |
| 3990 | break; | |
| 3991 | case M32C_OPERAND_SRC16ANQI : | |
| 3992 | value = fields->f_src16_an; | |
| 3993 | break; | |
| 3994 | case M32C_OPERAND_SRC16RNHI : | |
| 3995 | value = fields->f_src16_rn; | |
| 3996 | break; | |
| 3997 | case M32C_OPERAND_SRC16RNQI : | |
| 3998 | value = fields->f_src16_rn; | |
| 3999 | break; | |
| 4000 | case M32C_OPERAND_SRC32ANPREFIXED : | |
| 4001 | value = fields->f_src32_an_prefixed; | |
| 4002 | break; | |
| 4003 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
| 4004 | value = fields->f_src32_an_prefixed; | |
| 4005 | break; | |
| 4006 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
| 4007 | value = fields->f_src32_an_prefixed; | |
| 4008 | break; | |
| 4009 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
| 4010 | value = fields->f_src32_an_prefixed; | |
| 4011 | break; | |
| 4012 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
| 4013 | value = fields->f_src32_an_unprefixed; | |
| 4014 | break; | |
| 4015 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
| 4016 | value = fields->f_src32_an_unprefixed; | |
| 4017 | break; | |
| 4018 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
| 4019 | value = fields->f_src32_an_unprefixed; | |
| 4020 | break; | |
| 4021 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
| 4022 | value = fields->f_src32_an_unprefixed; | |
| 4023 | break; | |
| 4024 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
| 4025 | value = fields->f_src32_rn_prefixed_HI; | |
| 4026 | break; | |
| 4027 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
| 4028 | value = fields->f_src32_rn_prefixed_QI; | |
| 4029 | break; | |
| 4030 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
| 4031 | value = fields->f_src32_rn_prefixed_SI; | |
| 4032 | break; | |
| 4033 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
| 4034 | value = fields->f_src32_rn_unprefixed_HI; | |
| 4035 | break; | |
| 4036 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
| 4037 | value = fields->f_src32_rn_unprefixed_QI; | |
| 4038 | break; | |
| 4039 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
| 4040 | value = fields->f_src32_rn_unprefixed_SI; | |
| 4041 | break; | |
| 4042 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
| 4043 | value = fields->f_5_1; | |
| 4044 | break; | |
| 4045 | case M32C_OPERAND_X : | |
| 4046 | value = 0; | |
| 4047 | break; | |
| 4048 | case M32C_OPERAND_Z : | |
| 4049 | value = 0; | |
| 4050 | break; | |
| 4051 | case M32C_OPERAND_COND16_16 : | |
| 4052 | value = fields->f_dsp_16_u8; | |
| 4053 | break; | |
| 4054 | case M32C_OPERAND_COND16_24 : | |
| 4055 | value = fields->f_dsp_24_u8; | |
| 4056 | break; | |
| 4057 | case M32C_OPERAND_COND16_32 : | |
| 4058 | value = fields->f_dsp_32_u8; | |
| 4059 | break; | |
| 4060 | case M32C_OPERAND_COND16C : | |
| 4061 | value = fields->f_cond16; | |
| 4062 | break; | |
| 4063 | case M32C_OPERAND_COND16J : | |
| 4064 | value = fields->f_cond16; | |
| 4065 | break; | |
| 4066 | case M32C_OPERAND_COND16J5 : | |
| 4067 | value = fields->f_cond16j_5; | |
| 4068 | break; | |
| 4069 | case M32C_OPERAND_COND32 : | |
| 4070 | value = fields->f_cond32; | |
| 4071 | break; | |
| 4072 | case M32C_OPERAND_COND32_16 : | |
| 4073 | value = fields->f_dsp_16_u8; | |
| 4074 | break; | |
| 4075 | case M32C_OPERAND_COND32_24 : | |
| 4076 | value = fields->f_dsp_24_u8; | |
| 4077 | break; | |
| 4078 | case M32C_OPERAND_COND32_32 : | |
| 4079 | value = fields->f_dsp_32_u8; | |
| 4080 | break; | |
| 4081 | case M32C_OPERAND_COND32_40 : | |
| 4082 | value = fields->f_dsp_40_u8; | |
| 4083 | break; | |
| 4084 | case M32C_OPERAND_COND32J : | |
| 4085 | value = fields->f_cond32j; | |
| 4086 | break; | |
| 4087 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
| 4088 | value = fields->f_21_3; | |
| 4089 | break; | |
| 4090 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
| 4091 | value = fields->f_13_3; | |
| 4092 | break; | |
| 4093 | case M32C_OPERAND_CR16 : | |
| 4094 | value = fields->f_9_3; | |
| 4095 | break; | |
| 4096 | case M32C_OPERAND_CR2_32 : | |
| 4097 | value = fields->f_13_3; | |
| 4098 | break; | |
| 4099 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
| 4100 | value = fields->f_21_3; | |
| 4101 | break; | |
| 4102 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
| 4103 | value = fields->f_13_3; | |
| 4104 | break; | |
| 4105 | case M32C_OPERAND_FLAGS16 : | |
| 4106 | value = fields->f_9_3; | |
| 4107 | break; | |
| 4108 | case M32C_OPERAND_FLAGS32 : | |
| 4109 | value = fields->f_13_3; | |
| 4110 | break; | |
| 4111 | case M32C_OPERAND_SCCOND32 : | |
| 4112 | value = fields->f_cond16; | |
| 4113 | break; | |
| 4114 | case M32C_OPERAND_SIZE : | |
| 4115 | value = 0; | |
| 4116 | break; | |
| 4117 | ||
| 4118 | default : | |
| 4119 | /* xgettext:c-format */ | |
| a6743a54 AM |
4120 | opcodes_error_handler |
| 4121 | (_("internal error: unrecognized field %d while getting vma operand"), | |
| 4122 | opindex); | |
| 49f58d10 JB |
4123 | abort (); |
| 4124 | } | |
| 4125 | ||
| 4126 | return value; | |
| 4127 | } | |
| 4128 | ||
| e729279b NC |
4129 | void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); |
| 4130 | void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); | |
| 49f58d10 JB |
4131 | |
| 4132 | /* Stuffing values in cgen_fields is handled by a collection of functions. | |
| 4133 | They are distinguished by the type of the VALUE argument they accept. | |
| 4134 | TODO: floating point, inlining support, remove cases where argument type | |
| 4135 | not appropriate. */ | |
| 4136 | ||
| 4137 | void | |
| e729279b NC |
4138 | m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 4139 | int opindex, | |
| 4140 | CGEN_FIELDS * fields, | |
| 4141 | int value) | |
| 49f58d10 JB |
4142 | { |
| 4143 | switch (opindex) | |
| 4144 | { | |
| 4145 | case M32C_OPERAND_A0 : | |
| 4146 | break; | |
| 4147 | case M32C_OPERAND_A1 : | |
| 4148 | break; | |
| 4149 | case M32C_OPERAND_AN16_PUSH_S : | |
| 4150 | fields->f_4_1 = value; | |
| 4151 | break; | |
| 4152 | case M32C_OPERAND_BIT16AN : | |
| 4153 | fields->f_dst16_an = value; | |
| 4154 | break; | |
| 4155 | case M32C_OPERAND_BIT16RN : | |
| 4156 | fields->f_dst16_rn = value; | |
| 4157 | break; | |
| 5398310a DD |
4158 | case M32C_OPERAND_BIT3_S : |
| 4159 | fields->f_imm3_S = value; | |
| 4160 | break; | |
| 49f58d10 JB |
4161 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 4162 | fields->f_dst32_an_prefixed = value; | |
| 4163 | break; | |
| 4164 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
| 4165 | fields->f_dst32_an_unprefixed = value; | |
| 4166 | break; | |
| 4167 | case M32C_OPERAND_BIT32RNPREFIXED : | |
| 4168 | fields->f_dst32_rn_prefixed_QI = value; | |
| 4169 | break; | |
| 4170 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
| 4171 | fields->f_dst32_rn_unprefixed_QI = value; | |
| 4172 | break; | |
| 4173 | case M32C_OPERAND_BITBASE16_16_S8 : | |
| 4174 | fields->f_dsp_16_s8 = value; | |
| 4175 | break; | |
| 4176 | case M32C_OPERAND_BITBASE16_16_U16 : | |
| 4177 | fields->f_dsp_16_u16 = value; | |
| 4178 | break; | |
| 4179 | case M32C_OPERAND_BITBASE16_16_U8 : | |
| 4180 | fields->f_dsp_16_u8 = value; | |
| 4181 | break; | |
| 4182 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
| 4183 | fields->f_bitbase16_u11_S = value; | |
| 4184 | break; | |
| 4185 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
| 4186 | fields->f_bitbase32_16_s11_unprefixed = value; | |
| 4187 | break; | |
| 4188 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
| 4189 | fields->f_bitbase32_16_s19_unprefixed = value; | |
| 4190 | break; | |
| 4191 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
| 4192 | fields->f_bitbase32_16_u11_unprefixed = value; | |
| 4193 | break; | |
| 4194 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
| 4195 | fields->f_bitbase32_16_u19_unprefixed = value; | |
| 4196 | break; | |
| 4197 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
| 4198 | fields->f_bitbase32_16_u27_unprefixed = value; | |
| 4199 | break; | |
| 4200 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
| 4201 | fields->f_bitbase32_24_s11_prefixed = value; | |
| 4202 | break; | |
| 4203 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
| 4204 | fields->f_bitbase32_24_s19_prefixed = value; | |
| 4205 | break; | |
| 4206 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
| 4207 | fields->f_bitbase32_24_u11_prefixed = value; | |
| 4208 | break; | |
| 4209 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
| 4210 | fields->f_bitbase32_24_u19_prefixed = value; | |
| 4211 | break; | |
| 4212 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
| 4213 | fields->f_bitbase32_24_u27_prefixed = value; | |
| 4214 | break; | |
| 4215 | case M32C_OPERAND_BITNO16R : | |
| 4216 | fields->f_dsp_16_u8 = value; | |
| 4217 | break; | |
| 4218 | case M32C_OPERAND_BITNO32PREFIXED : | |
| 4219 | fields->f_bitno32_prefixed = value; | |
| 4220 | break; | |
| 4221 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
| 4222 | fields->f_bitno32_unprefixed = value; | |
| 4223 | break; | |
| 4224 | case M32C_OPERAND_DSP_10_U6 : | |
| 4225 | fields->f_dsp_10_u6 = value; | |
| 4226 | break; | |
| 4227 | case M32C_OPERAND_DSP_16_S16 : | |
| 4228 | fields->f_dsp_16_s16 = value; | |
| 4229 | break; | |
| 4230 | case M32C_OPERAND_DSP_16_S8 : | |
| 4231 | fields->f_dsp_16_s8 = value; | |
| 4232 | break; | |
| 4233 | case M32C_OPERAND_DSP_16_U16 : | |
| 4234 | fields->f_dsp_16_u16 = value; | |
| 4235 | break; | |
| 4236 | case M32C_OPERAND_DSP_16_U20 : | |
| 4237 | fields->f_dsp_16_u24 = value; | |
| 4238 | break; | |
| 4239 | case M32C_OPERAND_DSP_16_U24 : | |
| 4240 | fields->f_dsp_16_u24 = value; | |
| 4241 | break; | |
| 4242 | case M32C_OPERAND_DSP_16_U8 : | |
| 4243 | fields->f_dsp_16_u8 = value; | |
| 4244 | break; | |
| 4245 | case M32C_OPERAND_DSP_24_S16 : | |
| 4246 | fields->f_dsp_24_s16 = value; | |
| 4247 | break; | |
| 4248 | case M32C_OPERAND_DSP_24_S8 : | |
| 4249 | fields->f_dsp_24_s8 = value; | |
| 4250 | break; | |
| 4251 | case M32C_OPERAND_DSP_24_U16 : | |
| 4252 | fields->f_dsp_24_u16 = value; | |
| 4253 | break; | |
| 4254 | case M32C_OPERAND_DSP_24_U20 : | |
| 4255 | fields->f_dsp_24_u24 = value; | |
| 4256 | break; | |
| 4257 | case M32C_OPERAND_DSP_24_U24 : | |
| 4258 | fields->f_dsp_24_u24 = value; | |
| 4259 | break; | |
| 4260 | case M32C_OPERAND_DSP_24_U8 : | |
| 4261 | fields->f_dsp_24_u8 = value; | |
| 4262 | break; | |
| 4263 | case M32C_OPERAND_DSP_32_S16 : | |
| 4264 | fields->f_dsp_32_s16 = value; | |
| 4265 | break; | |
| 4266 | case M32C_OPERAND_DSP_32_S8 : | |
| 4267 | fields->f_dsp_32_s8 = value; | |
| 4268 | break; | |
| 4269 | case M32C_OPERAND_DSP_32_U16 : | |
| 4270 | fields->f_dsp_32_u16 = value; | |
| 4271 | break; | |
| 4272 | case M32C_OPERAND_DSP_32_U20 : | |
| 4273 | fields->f_dsp_32_u24 = value; | |
| 4274 | break; | |
| 4275 | case M32C_OPERAND_DSP_32_U24 : | |
| 4276 | fields->f_dsp_32_u24 = value; | |
| 4277 | break; | |
| 4278 | case M32C_OPERAND_DSP_32_U8 : | |
| 4279 | fields->f_dsp_32_u8 = value; | |
| 4280 | break; | |
| 4281 | case M32C_OPERAND_DSP_40_S16 : | |
| 4282 | fields->f_dsp_40_s16 = value; | |
| 4283 | break; | |
| 4284 | case M32C_OPERAND_DSP_40_S8 : | |
| 4285 | fields->f_dsp_40_s8 = value; | |
| 4286 | break; | |
| 4287 | case M32C_OPERAND_DSP_40_U16 : | |
| 4288 | fields->f_dsp_40_u16 = value; | |
| 4289 | break; | |
| 75b06e7b DD |
4290 | case M32C_OPERAND_DSP_40_U20 : |
| 4291 | fields->f_dsp_40_u20 = value; | |
| 4292 | break; | |
| 49f58d10 JB |
4293 | case M32C_OPERAND_DSP_40_U24 : |
| 4294 | fields->f_dsp_40_u24 = value; | |
| 4295 | break; | |
| 4296 | case M32C_OPERAND_DSP_40_U8 : | |
| 4297 | fields->f_dsp_40_u8 = value; | |
| 4298 | break; | |
| 4299 | case M32C_OPERAND_DSP_48_S16 : | |
| 4300 | fields->f_dsp_48_s16 = value; | |
| 4301 | break; | |
| 4302 | case M32C_OPERAND_DSP_48_S8 : | |
| 4303 | fields->f_dsp_48_s8 = value; | |
| 4304 | break; | |
| 4305 | case M32C_OPERAND_DSP_48_U16 : | |
| 4306 | fields->f_dsp_48_u16 = value; | |
| 4307 | break; | |
| 75b06e7b DD |
4308 | case M32C_OPERAND_DSP_48_U20 : |
| 4309 | fields->f_dsp_48_u20 = value; | |
| 4310 | break; | |
| 49f58d10 JB |
4311 | case M32C_OPERAND_DSP_48_U24 : |
| 4312 | fields->f_dsp_48_u24 = value; | |
| 4313 | break; | |
| 4314 | case M32C_OPERAND_DSP_48_U8 : | |
| 4315 | fields->f_dsp_48_u8 = value; | |
| 4316 | break; | |
| f75eb1c0 DD |
4317 | case M32C_OPERAND_DSP_8_S24 : |
| 4318 | fields->f_dsp_8_s24 = value; | |
| 4319 | break; | |
| 49f58d10 JB |
4320 | case M32C_OPERAND_DSP_8_S8 : |
| 4321 | fields->f_dsp_8_s8 = value; | |
| 4322 | break; | |
| 4323 | case M32C_OPERAND_DSP_8_U16 : | |
| 4324 | fields->f_dsp_8_u16 = value; | |
| 4325 | break; | |
| e729279b NC |
4326 | case M32C_OPERAND_DSP_8_U24 : |
| 4327 | fields->f_dsp_8_u24 = value; | |
| 4328 | break; | |
| 49f58d10 JB |
4329 | case M32C_OPERAND_DSP_8_U6 : |
| 4330 | fields->f_dsp_8_u6 = value; | |
| 4331 | break; | |
| 4332 | case M32C_OPERAND_DSP_8_U8 : | |
| 4333 | fields->f_dsp_8_u8 = value; | |
| 4334 | break; | |
| 4335 | case M32C_OPERAND_DST16AN : | |
| 4336 | fields->f_dst16_an = value; | |
| 4337 | break; | |
| 4338 | case M32C_OPERAND_DST16AN_S : | |
| 4339 | fields->f_dst16_an_s = value; | |
| 4340 | break; | |
| 4341 | case M32C_OPERAND_DST16ANHI : | |
| 4342 | fields->f_dst16_an = value; | |
| 4343 | break; | |
| 4344 | case M32C_OPERAND_DST16ANQI : | |
| 4345 | fields->f_dst16_an = value; | |
| 4346 | break; | |
| 4347 | case M32C_OPERAND_DST16ANQI_S : | |
| 4348 | fields->f_dst16_rn_QI_s = value; | |
| 4349 | break; | |
| 4350 | case M32C_OPERAND_DST16ANSI : | |
| 4351 | fields->f_dst16_an = value; | |
| 4352 | break; | |
| 4353 | case M32C_OPERAND_DST16RNEXTQI : | |
| 4354 | fields->f_dst16_rn_ext = value; | |
| 4355 | break; | |
| 4356 | case M32C_OPERAND_DST16RNHI : | |
| 4357 | fields->f_dst16_rn = value; | |
| 4358 | break; | |
| 4359 | case M32C_OPERAND_DST16RNQI : | |
| 4360 | fields->f_dst16_rn = value; | |
| 4361 | break; | |
| 4362 | case M32C_OPERAND_DST16RNQI_S : | |
| 4363 | fields->f_dst16_rn_QI_s = value; | |
| 4364 | break; | |
| 4365 | case M32C_OPERAND_DST16RNSI : | |
| 4366 | fields->f_dst16_rn = value; | |
| 4367 | break; | |
| 4368 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
| 4369 | fields->f_dst32_an_unprefixed = value; | |
| 4370 | break; | |
| 4371 | case M32C_OPERAND_DST32ANPREFIXED : | |
| 4372 | fields->f_dst32_an_prefixed = value; | |
| 4373 | break; | |
| 4374 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
| 4375 | fields->f_dst32_an_prefixed = value; | |
| 4376 | break; | |
| 4377 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
| 4378 | fields->f_dst32_an_prefixed = value; | |
| 4379 | break; | |
| 4380 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
| 4381 | fields->f_dst32_an_prefixed = value; | |
| 4382 | break; | |
| 4383 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
| 4384 | fields->f_dst32_an_unprefixed = value; | |
| 4385 | break; | |
| 4386 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
| 4387 | fields->f_dst32_an_unprefixed = value; | |
| 4388 | break; | |
| 4389 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
| 4390 | fields->f_dst32_an_unprefixed = value; | |
| 4391 | break; | |
| 4392 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
| 4393 | fields->f_dst32_an_unprefixed = value; | |
| 4394 | break; | |
| 4395 | case M32C_OPERAND_DST32R0HI_S : | |
| 4396 | break; | |
| 4397 | case M32C_OPERAND_DST32R0QI_S : | |
| 4398 | break; | |
| 4399 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
| 4400 | fields->f_dst32_rn_ext_unprefixed = value; | |
| 4401 | break; | |
| 4402 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
| 4403 | fields->f_dst32_rn_ext_unprefixed = value; | |
| 4404 | break; | |
| 4405 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
| 4406 | fields->f_dst32_rn_prefixed_HI = value; | |
| 4407 | break; | |
| 4408 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
| 4409 | fields->f_dst32_rn_prefixed_QI = value; | |
| 4410 | break; | |
| 4411 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
| 4412 | fields->f_dst32_rn_prefixed_SI = value; | |
| 4413 | break; | |
| 4414 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
| 4415 | fields->f_dst32_rn_unprefixed_HI = value; | |
| 4416 | break; | |
| 4417 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
| 4418 | fields->f_dst32_rn_unprefixed_QI = value; | |
| 4419 | break; | |
| 4420 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
| 4421 | fields->f_dst32_rn_unprefixed_SI = value; | |
| 4422 | break; | |
| 4423 | case M32C_OPERAND_G : | |
| 4424 | break; | |
| 4425 | case M32C_OPERAND_IMM_12_S4 : | |
| 4426 | fields->f_imm_12_s4 = value; | |
| 4427 | break; | |
| c6552317 DD |
4428 | case M32C_OPERAND_IMM_12_S4N : |
| 4429 | fields->f_imm_12_s4 = value; | |
| 4430 | break; | |
| 49f58d10 JB |
4431 | case M32C_OPERAND_IMM_13_U3 : |
| 4432 | fields->f_imm_13_u3 = value; | |
| 4433 | break; | |
| 4434 | case M32C_OPERAND_IMM_16_HI : | |
| 4435 | fields->f_dsp_16_s16 = value; | |
| 4436 | break; | |
| 4437 | case M32C_OPERAND_IMM_16_QI : | |
| 4438 | fields->f_dsp_16_s8 = value; | |
| 4439 | break; | |
| 4440 | case M32C_OPERAND_IMM_16_SI : | |
| 4441 | fields->f_dsp_16_s32 = value; | |
| 4442 | break; | |
| 4443 | case M32C_OPERAND_IMM_20_S4 : | |
| 4444 | fields->f_imm_20_s4 = value; | |
| 4445 | break; | |
| 4446 | case M32C_OPERAND_IMM_24_HI : | |
| 4447 | fields->f_dsp_24_s16 = value; | |
| 4448 | break; | |
| 4449 | case M32C_OPERAND_IMM_24_QI : | |
| 4450 | fields->f_dsp_24_s8 = value; | |
| 4451 | break; | |
| 4452 | case M32C_OPERAND_IMM_24_SI : | |
| 4453 | fields->f_dsp_24_s32 = value; | |
| 4454 | break; | |
| 4455 | case M32C_OPERAND_IMM_32_HI : | |
| 4456 | fields->f_dsp_32_s16 = value; | |
| 4457 | break; | |
| 4458 | case M32C_OPERAND_IMM_32_QI : | |
| 4459 | fields->f_dsp_32_s8 = value; | |
| 4460 | break; | |
| 4461 | case M32C_OPERAND_IMM_32_SI : | |
| 4462 | fields->f_dsp_32_s32 = value; | |
| 4463 | break; | |
| 4464 | case M32C_OPERAND_IMM_40_HI : | |
| 4465 | fields->f_dsp_40_s16 = value; | |
| 4466 | break; | |
| 4467 | case M32C_OPERAND_IMM_40_QI : | |
| 4468 | fields->f_dsp_40_s8 = value; | |
| 4469 | break; | |
| 4470 | case M32C_OPERAND_IMM_40_SI : | |
| 4471 | fields->f_dsp_40_s32 = value; | |
| 4472 | break; | |
| 4473 | case M32C_OPERAND_IMM_48_HI : | |
| 4474 | fields->f_dsp_48_s16 = value; | |
| 4475 | break; | |
| 4476 | case M32C_OPERAND_IMM_48_QI : | |
| 4477 | fields->f_dsp_48_s8 = value; | |
| 4478 | break; | |
| 4479 | case M32C_OPERAND_IMM_48_SI : | |
| 4480 | fields->f_dsp_48_s32 = value; | |
| 4481 | break; | |
| 4482 | case M32C_OPERAND_IMM_56_HI : | |
| 4483 | fields->f_dsp_56_s16 = value; | |
| 4484 | break; | |
| 4485 | case M32C_OPERAND_IMM_56_QI : | |
| 4486 | fields->f_dsp_56_s8 = value; | |
| 4487 | break; | |
| 4488 | case M32C_OPERAND_IMM_64_HI : | |
| 4489 | fields->f_dsp_64_s16 = value; | |
| 4490 | break; | |
| 4491 | case M32C_OPERAND_IMM_8_HI : | |
| 4492 | fields->f_dsp_8_s16 = value; | |
| 4493 | break; | |
| 4494 | case M32C_OPERAND_IMM_8_QI : | |
| 4495 | fields->f_dsp_8_s8 = value; | |
| 4496 | break; | |
| 4497 | case M32C_OPERAND_IMM_8_S4 : | |
| 4498 | fields->f_imm_8_s4 = value; | |
| 4499 | break; | |
| c6552317 DD |
4500 | case M32C_OPERAND_IMM_8_S4N : |
| 4501 | fields->f_imm_8_s4 = value; | |
| 4502 | break; | |
| 49f58d10 JB |
4503 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 4504 | fields->f_imm_12_s4 = value; | |
| 4505 | break; | |
| 4506 | case M32C_OPERAND_IMM_SH_20_S4 : | |
| 4507 | fields->f_imm_20_s4 = value; | |
| 4508 | break; | |
| 4509 | case M32C_OPERAND_IMM_SH_8_S4 : | |
| 4510 | fields->f_imm_8_s4 = value; | |
| 4511 | break; | |
| 4512 | case M32C_OPERAND_IMM1_S : | |
| 4513 | fields->f_imm1_S = value; | |
| 4514 | break; | |
| 4515 | case M32C_OPERAND_IMM3_S : | |
| 4516 | fields->f_imm3_S = value; | |
| 4517 | break; | |
| 4518 | case M32C_OPERAND_LAB_16_8 : | |
| 4519 | fields->f_lab_16_8 = value; | |
| 4520 | break; | |
| 4521 | case M32C_OPERAND_LAB_24_8 : | |
| 4522 | fields->f_lab_24_8 = value; | |
| 4523 | break; | |
| 4524 | case M32C_OPERAND_LAB_32_8 : | |
| 4525 | fields->f_lab_32_8 = value; | |
| 4526 | break; | |
| 4527 | case M32C_OPERAND_LAB_40_8 : | |
| 4528 | fields->f_lab_40_8 = value; | |
| 4529 | break; | |
| 4530 | case M32C_OPERAND_LAB_5_3 : | |
| 4531 | fields->f_lab_5_3 = value; | |
| 4532 | break; | |
| 4533 | case M32C_OPERAND_LAB_8_16 : | |
| 4534 | fields->f_lab_8_16 = value; | |
| 4535 | break; | |
| 4536 | case M32C_OPERAND_LAB_8_24 : | |
| 4537 | fields->f_lab_8_24 = value; | |
| 4538 | break; | |
| 4539 | case M32C_OPERAND_LAB_8_8 : | |
| 4540 | fields->f_lab_8_8 = value; | |
| 4541 | break; | |
| 4542 | case M32C_OPERAND_LAB32_JMP_S : | |
| 4543 | fields->f_lab32_jmp_s = value; | |
| 4544 | break; | |
| 4545 | case M32C_OPERAND_Q : | |
| 4546 | break; | |
| 4547 | case M32C_OPERAND_R0 : | |
| 4548 | break; | |
| 4549 | case M32C_OPERAND_R0H : | |
| 4550 | break; | |
| 4551 | case M32C_OPERAND_R0L : | |
| 4552 | break; | |
| 4553 | case M32C_OPERAND_R1 : | |
| 4554 | break; | |
| 4555 | case M32C_OPERAND_R1R2R0 : | |
| 4556 | break; | |
| 4557 | case M32C_OPERAND_R2 : | |
| 4558 | break; | |
| 4559 | case M32C_OPERAND_R2R0 : | |
| 4560 | break; | |
| 4561 | case M32C_OPERAND_R3 : | |
| 4562 | break; | |
| 4563 | case M32C_OPERAND_R3R1 : | |
| 4564 | break; | |
| 4565 | case M32C_OPERAND_REGSETPOP : | |
| 4566 | fields->f_8_8 = value; | |
| 4567 | break; | |
| 4568 | case M32C_OPERAND_REGSETPUSH : | |
| 4569 | fields->f_8_8 = value; | |
| 4570 | break; | |
| 4571 | case M32C_OPERAND_RN16_PUSH_S : | |
| 4572 | fields->f_4_1 = value; | |
| 4573 | break; | |
| 4574 | case M32C_OPERAND_S : | |
| 4575 | break; | |
| 4576 | case M32C_OPERAND_SRC16AN : | |
| 4577 | fields->f_src16_an = value; | |
| 4578 | break; | |
| 4579 | case M32C_OPERAND_SRC16ANHI : | |
| 4580 | fields->f_src16_an = value; | |
| 4581 | break; | |
| 4582 | case M32C_OPERAND_SRC16ANQI : | |
| 4583 | fields->f_src16_an = value; | |
| 4584 | break; | |
| 4585 | case M32C_OPERAND_SRC16RNHI : | |
| 4586 | fields->f_src16_rn = value; | |
| 4587 | break; | |
| 4588 | case M32C_OPERAND_SRC16RNQI : | |
| 4589 | fields->f_src16_rn = value; | |
| 4590 | break; | |
| 4591 | case M32C_OPERAND_SRC32ANPREFIXED : | |
| 4592 | fields->f_src32_an_prefixed = value; | |
| 4593 | break; | |
| 4594 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
| 4595 | fields->f_src32_an_prefixed = value; | |
| 4596 | break; | |
| 4597 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
| 4598 | fields->f_src32_an_prefixed = value; | |
| 4599 | break; | |
| 4600 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
| 4601 | fields->f_src32_an_prefixed = value; | |
| 4602 | break; | |
| 4603 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
| 4604 | fields->f_src32_an_unprefixed = value; | |
| 4605 | break; | |
| 4606 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
| 4607 | fields->f_src32_an_unprefixed = value; | |
| 4608 | break; | |
| 4609 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
| 4610 | fields->f_src32_an_unprefixed = value; | |
| 4611 | break; | |
| 4612 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
| 4613 | fields->f_src32_an_unprefixed = value; | |
| 4614 | break; | |
| 4615 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
| 4616 | fields->f_src32_rn_prefixed_HI = value; | |
| 4617 | break; | |
| 4618 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
| 4619 | fields->f_src32_rn_prefixed_QI = value; | |
| 4620 | break; | |
| 4621 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
| 4622 | fields->f_src32_rn_prefixed_SI = value; | |
| 4623 | break; | |
| 4624 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
| 4625 | fields->f_src32_rn_unprefixed_HI = value; | |
| 4626 | break; | |
| 4627 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
| 4628 | fields->f_src32_rn_unprefixed_QI = value; | |
| 4629 | break; | |
| 4630 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
| 4631 | fields->f_src32_rn_unprefixed_SI = value; | |
| 4632 | break; | |
| 4633 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
| 4634 | fields->f_5_1 = value; | |
| 4635 | break; | |
| 4636 | case M32C_OPERAND_X : | |
| 4637 | break; | |
| 4638 | case M32C_OPERAND_Z : | |
| 4639 | break; | |
| 4640 | case M32C_OPERAND_COND16_16 : | |
| 4641 | fields->f_dsp_16_u8 = value; | |
| 4642 | break; | |
| 4643 | case M32C_OPERAND_COND16_24 : | |
| 4644 | fields->f_dsp_24_u8 = value; | |
| 4645 | break; | |
| 4646 | case M32C_OPERAND_COND16_32 : | |
| 4647 | fields->f_dsp_32_u8 = value; | |
| 4648 | break; | |
| 4649 | case M32C_OPERAND_COND16C : | |
| 4650 | fields->f_cond16 = value; | |
| 4651 | break; | |
| 4652 | case M32C_OPERAND_COND16J : | |
| 4653 | fields->f_cond16 = value; | |
| 4654 | break; | |
| 4655 | case M32C_OPERAND_COND16J5 : | |
| 4656 | fields->f_cond16j_5 = value; | |
| 4657 | break; | |
| 4658 | case M32C_OPERAND_COND32 : | |
| 4659 | fields->f_cond32 = value; | |
| 4660 | break; | |
| 4661 | case M32C_OPERAND_COND32_16 : | |
| 4662 | fields->f_dsp_16_u8 = value; | |
| 4663 | break; | |
| 4664 | case M32C_OPERAND_COND32_24 : | |
| 4665 | fields->f_dsp_24_u8 = value; | |
| 4666 | break; | |
| 4667 | case M32C_OPERAND_COND32_32 : | |
| 4668 | fields->f_dsp_32_u8 = value; | |
| 4669 | break; | |
| 4670 | case M32C_OPERAND_COND32_40 : | |
| 4671 | fields->f_dsp_40_u8 = value; | |
| 4672 | break; | |
| 4673 | case M32C_OPERAND_COND32J : | |
| 4674 | fields->f_cond32j = value; | |
| 4675 | break; | |
| 4676 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
| 4677 | fields->f_21_3 = value; | |
| 4678 | break; | |
| 4679 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
| 4680 | fields->f_13_3 = value; | |
| 4681 | break; | |
| 4682 | case M32C_OPERAND_CR16 : | |
| 4683 | fields->f_9_3 = value; | |
| 4684 | break; | |
| 4685 | case M32C_OPERAND_CR2_32 : | |
| 4686 | fields->f_13_3 = value; | |
| 4687 | break; | |
| 4688 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
| 4689 | fields->f_21_3 = value; | |
| 4690 | break; | |
| 4691 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
| 4692 | fields->f_13_3 = value; | |
| 4693 | break; | |
| 4694 | case M32C_OPERAND_FLAGS16 : | |
| 4695 | fields->f_9_3 = value; | |
| 4696 | break; | |
| 4697 | case M32C_OPERAND_FLAGS32 : | |
| 4698 | fields->f_13_3 = value; | |
| 4699 | break; | |
| 4700 | case M32C_OPERAND_SCCOND32 : | |
| 4701 | fields->f_cond16 = value; | |
| 4702 | break; | |
| 4703 | case M32C_OPERAND_SIZE : | |
| 4704 | break; | |
| 4705 | ||
| 4706 | default : | |
| 4707 | /* xgettext:c-format */ | |
| a6743a54 AM |
4708 | opcodes_error_handler |
| 4709 | (_("internal error: unrecognized field %d while setting int operand"), | |
| 4710 | opindex); | |
| 49f58d10 JB |
4711 | abort (); |
| 4712 | } | |
| 4713 | } | |
| 4714 | ||
| 4715 | void | |
| e729279b NC |
4716 | m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 4717 | int opindex, | |
| 4718 | CGEN_FIELDS * fields, | |
| 4719 | bfd_vma value) | |
| 49f58d10 JB |
4720 | { |
| 4721 | switch (opindex) | |
| 4722 | { | |
| 4723 | case M32C_OPERAND_A0 : | |
| 4724 | break; | |
| 4725 | case M32C_OPERAND_A1 : | |
| 4726 | break; | |
| 4727 | case M32C_OPERAND_AN16_PUSH_S : | |
| 4728 | fields->f_4_1 = value; | |
| 4729 | break; | |
| 4730 | case M32C_OPERAND_BIT16AN : | |
| 4731 | fields->f_dst16_an = value; | |
| 4732 | break; | |
| 4733 | case M32C_OPERAND_BIT16RN : | |
| 4734 | fields->f_dst16_rn = value; | |
| 4735 | break; | |
| 5398310a DD |
4736 | case M32C_OPERAND_BIT3_S : |
| 4737 | fields->f_imm3_S = value; | |
| 4738 | break; | |
| 49f58d10 JB |
4739 | case M32C_OPERAND_BIT32ANPREFIXED : |
| 4740 | fields->f_dst32_an_prefixed = value; | |
| 4741 | break; | |
| 4742 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
| 4743 | fields->f_dst32_an_unprefixed = value; | |
| 4744 | break; | |
| 4745 | case M32C_OPERAND_BIT32RNPREFIXED : | |
| 4746 | fields->f_dst32_rn_prefixed_QI = value; | |
| 4747 | break; | |
| 4748 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
| 4749 | fields->f_dst32_rn_unprefixed_QI = value; | |
| 4750 | break; | |
| 4751 | case M32C_OPERAND_BITBASE16_16_S8 : | |
| 4752 | fields->f_dsp_16_s8 = value; | |
| 4753 | break; | |
| 4754 | case M32C_OPERAND_BITBASE16_16_U16 : | |
| 4755 | fields->f_dsp_16_u16 = value; | |
| 4756 | break; | |
| 4757 | case M32C_OPERAND_BITBASE16_16_U8 : | |
| 4758 | fields->f_dsp_16_u8 = value; | |
| 4759 | break; | |
| 4760 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
| 4761 | fields->f_bitbase16_u11_S = value; | |
| 4762 | break; | |
| 4763 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
| 4764 | fields->f_bitbase32_16_s11_unprefixed = value; | |
| 4765 | break; | |
| 4766 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
| 4767 | fields->f_bitbase32_16_s19_unprefixed = value; | |
| 4768 | break; | |
| 4769 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
| 4770 | fields->f_bitbase32_16_u11_unprefixed = value; | |
| 4771 | break; | |
| 4772 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
| 4773 | fields->f_bitbase32_16_u19_unprefixed = value; | |
| 4774 | break; | |
| 4775 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
| 4776 | fields->f_bitbase32_16_u27_unprefixed = value; | |
| 4777 | break; | |
| 4778 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
| 4779 | fields->f_bitbase32_24_s11_prefixed = value; | |
| 4780 | break; | |
| 4781 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
| 4782 | fields->f_bitbase32_24_s19_prefixed = value; | |
| 4783 | break; | |
| 4784 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
| 4785 | fields->f_bitbase32_24_u11_prefixed = value; | |
| 4786 | break; | |
| 4787 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
| 4788 | fields->f_bitbase32_24_u19_prefixed = value; | |
| 4789 | break; | |
| 4790 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
| 4791 | fields->f_bitbase32_24_u27_prefixed = value; | |
| 4792 | break; | |
| 4793 | case M32C_OPERAND_BITNO16R : | |
| 4794 | fields->f_dsp_16_u8 = value; | |
| 4795 | break; | |
| 4796 | case M32C_OPERAND_BITNO32PREFIXED : | |
| 4797 | fields->f_bitno32_prefixed = value; | |
| 4798 | break; | |
| 4799 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
| 4800 | fields->f_bitno32_unprefixed = value; | |
| 4801 | break; | |
| 4802 | case M32C_OPERAND_DSP_10_U6 : | |
| 4803 | fields->f_dsp_10_u6 = value; | |
| 4804 | break; | |
| 4805 | case M32C_OPERAND_DSP_16_S16 : | |
| 4806 | fields->f_dsp_16_s16 = value; | |
| 4807 | break; | |
| 4808 | case M32C_OPERAND_DSP_16_S8 : | |
| 4809 | fields->f_dsp_16_s8 = value; | |
| 4810 | break; | |
| 4811 | case M32C_OPERAND_DSP_16_U16 : | |
| 4812 | fields->f_dsp_16_u16 = value; | |
| 4813 | break; | |
| 4814 | case M32C_OPERAND_DSP_16_U20 : | |
| 4815 | fields->f_dsp_16_u24 = value; | |
| 4816 | break; | |
| 4817 | case M32C_OPERAND_DSP_16_U24 : | |
| 4818 | fields->f_dsp_16_u24 = value; | |
| 4819 | break; | |
| 4820 | case M32C_OPERAND_DSP_16_U8 : | |
| 4821 | fields->f_dsp_16_u8 = value; | |
| 4822 | break; | |
| 4823 | case M32C_OPERAND_DSP_24_S16 : | |
| 4824 | fields->f_dsp_24_s16 = value; | |
| 4825 | break; | |
| 4826 | case M32C_OPERAND_DSP_24_S8 : | |
| 4827 | fields->f_dsp_24_s8 = value; | |
| 4828 | break; | |
| 4829 | case M32C_OPERAND_DSP_24_U16 : | |
| 4830 | fields->f_dsp_24_u16 = value; | |
| 4831 | break; | |
| 4832 | case M32C_OPERAND_DSP_24_U20 : | |
| 4833 | fields->f_dsp_24_u24 = value; | |
| 4834 | break; | |
| 4835 | case M32C_OPERAND_DSP_24_U24 : | |
| 4836 | fields->f_dsp_24_u24 = value; | |
| 4837 | break; | |
| 4838 | case M32C_OPERAND_DSP_24_U8 : | |
| 4839 | fields->f_dsp_24_u8 = value; | |
| 4840 | break; | |
| 4841 | case M32C_OPERAND_DSP_32_S16 : | |
| 4842 | fields->f_dsp_32_s16 = value; | |
| 4843 | break; | |
| 4844 | case M32C_OPERAND_DSP_32_S8 : | |
| 4845 | fields->f_dsp_32_s8 = value; | |
| 4846 | break; | |
| 4847 | case M32C_OPERAND_DSP_32_U16 : | |
| 4848 | fields->f_dsp_32_u16 = value; | |
| 4849 | break; | |
| 4850 | case M32C_OPERAND_DSP_32_U20 : | |
| 4851 | fields->f_dsp_32_u24 = value; | |
| 4852 | break; | |
| 4853 | case M32C_OPERAND_DSP_32_U24 : | |
| 4854 | fields->f_dsp_32_u24 = value; | |
| 4855 | break; | |
| 4856 | case M32C_OPERAND_DSP_32_U8 : | |
| 4857 | fields->f_dsp_32_u8 = value; | |
| 4858 | break; | |
| 4859 | case M32C_OPERAND_DSP_40_S16 : | |
| 4860 | fields->f_dsp_40_s16 = value; | |
| 4861 | break; | |
| 4862 | case M32C_OPERAND_DSP_40_S8 : | |
| 4863 | fields->f_dsp_40_s8 = value; | |
| 4864 | break; | |
| 4865 | case M32C_OPERAND_DSP_40_U16 : | |
| 4866 | fields->f_dsp_40_u16 = value; | |
| 4867 | break; | |
| 75b06e7b DD |
4868 | case M32C_OPERAND_DSP_40_U20 : |
| 4869 | fields->f_dsp_40_u20 = value; | |
| 4870 | break; | |
| 49f58d10 JB |
4871 | case M32C_OPERAND_DSP_40_U24 : |
| 4872 | fields->f_dsp_40_u24 = value; | |
| 4873 | break; | |
| 4874 | case M32C_OPERAND_DSP_40_U8 : | |
| 4875 | fields->f_dsp_40_u8 = value; | |
| 4876 | break; | |
| 4877 | case M32C_OPERAND_DSP_48_S16 : | |
| 4878 | fields->f_dsp_48_s16 = value; | |
| 4879 | break; | |
| 4880 | case M32C_OPERAND_DSP_48_S8 : | |
| 4881 | fields->f_dsp_48_s8 = value; | |
| 4882 | break; | |
| 4883 | case M32C_OPERAND_DSP_48_U16 : | |
| 4884 | fields->f_dsp_48_u16 = value; | |
| 4885 | break; | |
| 75b06e7b DD |
4886 | case M32C_OPERAND_DSP_48_U20 : |
| 4887 | fields->f_dsp_48_u20 = value; | |
| 4888 | break; | |
| 49f58d10 JB |
4889 | case M32C_OPERAND_DSP_48_U24 : |
| 4890 | fields->f_dsp_48_u24 = value; | |
| 4891 | break; | |
| 4892 | case M32C_OPERAND_DSP_48_U8 : | |
| 4893 | fields->f_dsp_48_u8 = value; | |
| 4894 | break; | |
| f75eb1c0 DD |
4895 | case M32C_OPERAND_DSP_8_S24 : |
| 4896 | fields->f_dsp_8_s24 = value; | |
| 4897 | break; | |
| 49f58d10 JB |
4898 | case M32C_OPERAND_DSP_8_S8 : |
| 4899 | fields->f_dsp_8_s8 = value; | |
| 4900 | break; | |
| 4901 | case M32C_OPERAND_DSP_8_U16 : | |
| 4902 | fields->f_dsp_8_u16 = value; | |
| 4903 | break; | |
| e729279b NC |
4904 | case M32C_OPERAND_DSP_8_U24 : |
| 4905 | fields->f_dsp_8_u24 = value; | |
| 4906 | break; | |
| 49f58d10 JB |
4907 | case M32C_OPERAND_DSP_8_U6 : |
| 4908 | fields->f_dsp_8_u6 = value; | |
| 4909 | break; | |
| 4910 | case M32C_OPERAND_DSP_8_U8 : | |
| 4911 | fields->f_dsp_8_u8 = value; | |
| 4912 | break; | |
| 4913 | case M32C_OPERAND_DST16AN : | |
| 4914 | fields->f_dst16_an = value; | |
| 4915 | break; | |
| 4916 | case M32C_OPERAND_DST16AN_S : | |
| 4917 | fields->f_dst16_an_s = value; | |
| 4918 | break; | |
| 4919 | case M32C_OPERAND_DST16ANHI : | |
| 4920 | fields->f_dst16_an = value; | |
| 4921 | break; | |
| 4922 | case M32C_OPERAND_DST16ANQI : | |
| 4923 | fields->f_dst16_an = value; | |
| 4924 | break; | |
| 4925 | case M32C_OPERAND_DST16ANQI_S : | |
| 4926 | fields->f_dst16_rn_QI_s = value; | |
| 4927 | break; | |
| 4928 | case M32C_OPERAND_DST16ANSI : | |
| 4929 | fields->f_dst16_an = value; | |
| 4930 | break; | |
| 4931 | case M32C_OPERAND_DST16RNEXTQI : | |
| 4932 | fields->f_dst16_rn_ext = value; | |
| 4933 | break; | |
| 4934 | case M32C_OPERAND_DST16RNHI : | |
| 4935 | fields->f_dst16_rn = value; | |
| 4936 | break; | |
| 4937 | case M32C_OPERAND_DST16RNQI : | |
| 4938 | fields->f_dst16_rn = value; | |
| 4939 | break; | |
| 4940 | case M32C_OPERAND_DST16RNQI_S : | |
| 4941 | fields->f_dst16_rn_QI_s = value; | |
| 4942 | break; | |
| 4943 | case M32C_OPERAND_DST16RNSI : | |
| 4944 | fields->f_dst16_rn = value; | |
| 4945 | break; | |
| 4946 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
| 4947 | fields->f_dst32_an_unprefixed = value; | |
| 4948 | break; | |
| 4949 | case M32C_OPERAND_DST32ANPREFIXED : | |
| 4950 | fields->f_dst32_an_prefixed = value; | |
| 4951 | break; | |
| 4952 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
| 4953 | fields->f_dst32_an_prefixed = value; | |
| 4954 | break; | |
| 4955 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
| 4956 | fields->f_dst32_an_prefixed = value; | |
| 4957 | break; | |
| 4958 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
| 4959 | fields->f_dst32_an_prefixed = value; | |
| 4960 | break; | |
| 4961 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
| 4962 | fields->f_dst32_an_unprefixed = value; | |
| 4963 | break; | |
| 4964 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
| 4965 | fields->f_dst32_an_unprefixed = value; | |
| 4966 | break; | |
| 4967 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
| 4968 | fields->f_dst32_an_unprefixed = value; | |
| 4969 | break; | |
| 4970 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
| 4971 | fields->f_dst32_an_unprefixed = value; | |
| 4972 | break; | |
| 4973 | case M32C_OPERAND_DST32R0HI_S : | |
| 4974 | break; | |
| 4975 | case M32C_OPERAND_DST32R0QI_S : | |
| 4976 | break; | |
| 4977 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
| 4978 | fields->f_dst32_rn_ext_unprefixed = value; | |
| 4979 | break; | |
| 4980 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
| 4981 | fields->f_dst32_rn_ext_unprefixed = value; | |
| 4982 | break; | |
| 4983 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
| 4984 | fields->f_dst32_rn_prefixed_HI = value; | |
| 4985 | break; | |
| 4986 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
| 4987 | fields->f_dst32_rn_prefixed_QI = value; | |
| 4988 | break; | |
| 4989 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
| 4990 | fields->f_dst32_rn_prefixed_SI = value; | |
| 4991 | break; | |
| 4992 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
| 4993 | fields->f_dst32_rn_unprefixed_HI = value; | |
| 4994 | break; | |
| 4995 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
| 4996 | fields->f_dst32_rn_unprefixed_QI = value; | |
| 4997 | break; | |
| 4998 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
| 4999 | fields->f_dst32_rn_unprefixed_SI = value; | |
| 5000 | break; | |
| 5001 | case M32C_OPERAND_G : | |
| 5002 | break; | |
| 5003 | case M32C_OPERAND_IMM_12_S4 : | |
| 5004 | fields->f_imm_12_s4 = value; | |
| 5005 | break; | |
| c6552317 DD |
5006 | case M32C_OPERAND_IMM_12_S4N : |
| 5007 | fields->f_imm_12_s4 = value; | |
| 5008 | break; | |
| 49f58d10 JB |
5009 | case M32C_OPERAND_IMM_13_U3 : |
| 5010 | fields->f_imm_13_u3 = value; | |
| 5011 | break; | |
| 5012 | case M32C_OPERAND_IMM_16_HI : | |
| 5013 | fields->f_dsp_16_s16 = value; | |
| 5014 | break; | |
| 5015 | case M32C_OPERAND_IMM_16_QI : | |
| 5016 | fields->f_dsp_16_s8 = value; | |
| 5017 | break; | |
| 5018 | case M32C_OPERAND_IMM_16_SI : | |
| 5019 | fields->f_dsp_16_s32 = value; | |
| 5020 | break; | |
| 5021 | case M32C_OPERAND_IMM_20_S4 : | |
| 5022 | fields->f_imm_20_s4 = value; | |
| 5023 | break; | |
| 5024 | case M32C_OPERAND_IMM_24_HI : | |
| 5025 | fields->f_dsp_24_s16 = value; | |
| 5026 | break; | |
| 5027 | case M32C_OPERAND_IMM_24_QI : | |
| 5028 | fields->f_dsp_24_s8 = value; | |
| 5029 | break; | |
| 5030 | case M32C_OPERAND_IMM_24_SI : | |
| 5031 | fields->f_dsp_24_s32 = value; | |
| 5032 | break; | |
| 5033 | case M32C_OPERAND_IMM_32_HI : | |
| 5034 | fields->f_dsp_32_s16 = value; | |
| 5035 | break; | |
| 5036 | case M32C_OPERAND_IMM_32_QI : | |
| 5037 | fields->f_dsp_32_s8 = value; | |
| 5038 | break; | |
| 5039 | case M32C_OPERAND_IMM_32_SI : | |
| 5040 | fields->f_dsp_32_s32 = value; | |
| 5041 | break; | |
| 5042 | case M32C_OPERAND_IMM_40_HI : | |
| 5043 | fields->f_dsp_40_s16 = value; | |
| 5044 | break; | |
| 5045 | case M32C_OPERAND_IMM_40_QI : | |
| 5046 | fields->f_dsp_40_s8 = value; | |
| 5047 | break; | |
| 5048 | case M32C_OPERAND_IMM_40_SI : | |
| 5049 | fields->f_dsp_40_s32 = value; | |
| 5050 | break; | |
| 5051 | case M32C_OPERAND_IMM_48_HI : | |
| 5052 | fields->f_dsp_48_s16 = value; | |
| 5053 | break; | |
| 5054 | case M32C_OPERAND_IMM_48_QI : | |
| 5055 | fields->f_dsp_48_s8 = value; | |
| 5056 | break; | |
| 5057 | case M32C_OPERAND_IMM_48_SI : | |
| 5058 | fields->f_dsp_48_s32 = value; | |
| 5059 | break; | |
| 5060 | case M32C_OPERAND_IMM_56_HI : | |
| 5061 | fields->f_dsp_56_s16 = value; | |
| 5062 | break; | |
| 5063 | case M32C_OPERAND_IMM_56_QI : | |
| 5064 | fields->f_dsp_56_s8 = value; | |
| 5065 | break; | |
| 5066 | case M32C_OPERAND_IMM_64_HI : | |
| 5067 | fields->f_dsp_64_s16 = value; | |
| 5068 | break; | |
| 5069 | case M32C_OPERAND_IMM_8_HI : | |
| 5070 | fields->f_dsp_8_s16 = value; | |
| 5071 | break; | |
| 5072 | case M32C_OPERAND_IMM_8_QI : | |
| 5073 | fields->f_dsp_8_s8 = value; | |
| 5074 | break; | |
| 5075 | case M32C_OPERAND_IMM_8_S4 : | |
| 5076 | fields->f_imm_8_s4 = value; | |
| 5077 | break; | |
| c6552317 DD |
5078 | case M32C_OPERAND_IMM_8_S4N : |
| 5079 | fields->f_imm_8_s4 = value; | |
| 5080 | break; | |
| 49f58d10 JB |
5081 | case M32C_OPERAND_IMM_SH_12_S4 : |
| 5082 | fields->f_imm_12_s4 = value; | |
| 5083 | break; | |
| 5084 | case M32C_OPERAND_IMM_SH_20_S4 : | |
| 5085 | fields->f_imm_20_s4 = value; | |
| 5086 | break; | |
| 5087 | case M32C_OPERAND_IMM_SH_8_S4 : | |
| 5088 | fields->f_imm_8_s4 = value; | |
| 5089 | break; | |
| 5090 | case M32C_OPERAND_IMM1_S : | |
| 5091 | fields->f_imm1_S = value; | |
| 5092 | break; | |
| 5093 | case M32C_OPERAND_IMM3_S : | |
| 5094 | fields->f_imm3_S = value; | |
| 5095 | break; | |
| 5096 | case M32C_OPERAND_LAB_16_8 : | |
| 5097 | fields->f_lab_16_8 = value; | |
| 5098 | break; | |
| 5099 | case M32C_OPERAND_LAB_24_8 : | |
| 5100 | fields->f_lab_24_8 = value; | |
| 5101 | break; | |
| 5102 | case M32C_OPERAND_LAB_32_8 : | |
| 5103 | fields->f_lab_32_8 = value; | |
| 5104 | break; | |
| 5105 | case M32C_OPERAND_LAB_40_8 : | |
| 5106 | fields->f_lab_40_8 = value; | |
| 5107 | break; | |
| 5108 | case M32C_OPERAND_LAB_5_3 : | |
| 5109 | fields->f_lab_5_3 = value; | |
| 5110 | break; | |
| 5111 | case M32C_OPERAND_LAB_8_16 : | |
| 5112 | fields->f_lab_8_16 = value; | |
| 5113 | break; | |
| 5114 | case M32C_OPERAND_LAB_8_24 : | |
| 5115 | fields->f_lab_8_24 = value; | |
| 5116 | break; | |
| 5117 | case M32C_OPERAND_LAB_8_8 : | |
| 5118 | fields->f_lab_8_8 = value; | |
| 5119 | break; | |
| 5120 | case M32C_OPERAND_LAB32_JMP_S : | |
| 5121 | fields->f_lab32_jmp_s = value; | |
| 5122 | break; | |
| 5123 | case M32C_OPERAND_Q : | |
| 5124 | break; | |
| 5125 | case M32C_OPERAND_R0 : | |
| 5126 | break; | |
| 5127 | case M32C_OPERAND_R0H : | |
| 5128 | break; | |
| 5129 | case M32C_OPERAND_R0L : | |
| 5130 | break; | |
| 5131 | case M32C_OPERAND_R1 : | |
| 5132 | break; | |
| 5133 | case M32C_OPERAND_R1R2R0 : | |
| 5134 | break; | |
| 5135 | case M32C_OPERAND_R2 : | |
| 5136 | break; | |
| 5137 | case M32C_OPERAND_R2R0 : | |
| 5138 | break; | |
| 5139 | case M32C_OPERAND_R3 : | |
| 5140 | break; | |
| 5141 | case M32C_OPERAND_R3R1 : | |
| 5142 | break; | |
| 5143 | case M32C_OPERAND_REGSETPOP : | |
| 5144 | fields->f_8_8 = value; | |
| 5145 | break; | |
| 5146 | case M32C_OPERAND_REGSETPUSH : | |
| 5147 | fields->f_8_8 = value; | |
| 5148 | break; | |
| 5149 | case M32C_OPERAND_RN16_PUSH_S : | |
| 5150 | fields->f_4_1 = value; | |
| 5151 | break; | |
| 5152 | case M32C_OPERAND_S : | |
| 5153 | break; | |
| 5154 | case M32C_OPERAND_SRC16AN : | |
| 5155 | fields->f_src16_an = value; | |
| 5156 | break; | |
| 5157 | case M32C_OPERAND_SRC16ANHI : | |
| 5158 | fields->f_src16_an = value; | |
| 5159 | break; | |
| 5160 | case M32C_OPERAND_SRC16ANQI : | |
| 5161 | fields->f_src16_an = value; | |
| 5162 | break; | |
| 5163 | case M32C_OPERAND_SRC16RNHI : | |
| 5164 | fields->f_src16_rn = value; | |
| 5165 | break; | |
| 5166 | case M32C_OPERAND_SRC16RNQI : | |
| 5167 | fields->f_src16_rn = value; | |
| 5168 | break; | |
| 5169 | case M32C_OPERAND_SRC32ANPREFIXED : | |
| 5170 | fields->f_src32_an_prefixed = value; | |
| 5171 | break; | |
| 5172 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
| 5173 | fields->f_src32_an_prefixed = value; | |
| 5174 | break; | |
| 5175 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
| 5176 | fields->f_src32_an_prefixed = value; | |
| 5177 | break; | |
| 5178 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
| 5179 | fields->f_src32_an_prefixed = value; | |
| 5180 | break; | |
| 5181 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
| 5182 | fields->f_src32_an_unprefixed = value; | |
| 5183 | break; | |
| 5184 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
| 5185 | fields->f_src32_an_unprefixed = value; | |
| 5186 | break; | |
| 5187 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
| 5188 | fields->f_src32_an_unprefixed = value; | |
| 5189 | break; | |
| 5190 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
| 5191 | fields->f_src32_an_unprefixed = value; | |
| 5192 | break; | |
| 5193 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
| 5194 | fields->f_src32_rn_prefixed_HI = value; | |
| 5195 | break; | |
| 5196 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
| 5197 | fields->f_src32_rn_prefixed_QI = value; | |
| 5198 | break; | |
| 5199 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
| 5200 | fields->f_src32_rn_prefixed_SI = value; | |
| 5201 | break; | |
| 5202 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
| 5203 | fields->f_src32_rn_unprefixed_HI = value; | |
| 5204 | break; | |
| 5205 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
| 5206 | fields->f_src32_rn_unprefixed_QI = value; | |
| 5207 | break; | |
| 5208 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
| 5209 | fields->f_src32_rn_unprefixed_SI = value; | |
| 5210 | break; | |
| 5211 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
| 5212 | fields->f_5_1 = value; | |
| 5213 | break; | |
| 5214 | case M32C_OPERAND_X : | |
| 5215 | break; | |
| 5216 | case M32C_OPERAND_Z : | |
| 5217 | break; | |
| 5218 | case M32C_OPERAND_COND16_16 : | |
| 5219 | fields->f_dsp_16_u8 = value; | |
| 5220 | break; | |
| 5221 | case M32C_OPERAND_COND16_24 : | |
| 5222 | fields->f_dsp_24_u8 = value; | |
| 5223 | break; | |
| 5224 | case M32C_OPERAND_COND16_32 : | |
| 5225 | fields->f_dsp_32_u8 = value; | |
| 5226 | break; | |
| 5227 | case M32C_OPERAND_COND16C : | |
| 5228 | fields->f_cond16 = value; | |
| 5229 | break; | |
| 5230 | case M32C_OPERAND_COND16J : | |
| 5231 | fields->f_cond16 = value; | |
| 5232 | break; | |
| 5233 | case M32C_OPERAND_COND16J5 : | |
| 5234 | fields->f_cond16j_5 = value; | |
| 5235 | break; | |
| 5236 | case M32C_OPERAND_COND32 : | |
| 5237 | fields->f_cond32 = value; | |
| 5238 | break; | |
| 5239 | case M32C_OPERAND_COND32_16 : | |
| 5240 | fields->f_dsp_16_u8 = value; | |
| 5241 | break; | |
| 5242 | case M32C_OPERAND_COND32_24 : | |
| 5243 | fields->f_dsp_24_u8 = value; | |
| 5244 | break; | |
| 5245 | case M32C_OPERAND_COND32_32 : | |
| 5246 | fields->f_dsp_32_u8 = value; | |
| 5247 | break; | |
| 5248 | case M32C_OPERAND_COND32_40 : | |
| 5249 | fields->f_dsp_40_u8 = value; | |
| 5250 | break; | |
| 5251 | case M32C_OPERAND_COND32J : | |
| 5252 | fields->f_cond32j = value; | |
| 5253 | break; | |
| 5254 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
| 5255 | fields->f_21_3 = value; | |
| 5256 | break; | |
| 5257 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
| 5258 | fields->f_13_3 = value; | |
| 5259 | break; | |
| 5260 | case M32C_OPERAND_CR16 : | |
| 5261 | fields->f_9_3 = value; | |
| 5262 | break; | |
| 5263 | case M32C_OPERAND_CR2_32 : | |
| 5264 | fields->f_13_3 = value; | |
| 5265 | break; | |
| 5266 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
| 5267 | fields->f_21_3 = value; | |
| 5268 | break; | |
| 5269 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
| 5270 | fields->f_13_3 = value; | |
| 5271 | break; | |
| 5272 | case M32C_OPERAND_FLAGS16 : | |
| 5273 | fields->f_9_3 = value; | |
| 5274 | break; | |
| 5275 | case M32C_OPERAND_FLAGS32 : | |
| 5276 | fields->f_13_3 = value; | |
| 5277 | break; | |
| 5278 | case M32C_OPERAND_SCCOND32 : | |
| 5279 | fields->f_cond16 = value; | |
| 5280 | break; | |
| 5281 | case M32C_OPERAND_SIZE : | |
| 5282 | break; | |
| 5283 | ||
| 5284 | default : | |
| 5285 | /* xgettext:c-format */ | |
| a6743a54 AM |
5286 | opcodes_error_handler |
| 5287 | (_("internal error: unrecognized field %d while setting vma operand"), | |
| 5288 | opindex); | |
| 49f58d10 JB |
5289 | abort (); |
| 5290 | } | |
| 5291 | } | |
| 5292 | ||
| 5293 | /* Function to call before using the instruction builder tables. */ | |
| 5294 | ||
| 5295 | void | |
| e729279b | 5296 | m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd) |
| 49f58d10 JB |
5297 | { |
| 5298 | cd->insert_handlers = & m32c_cgen_insert_handlers[0]; | |
| 5299 | cd->extract_handlers = & m32c_cgen_extract_handlers[0]; | |
| 5300 | ||
| 5301 | cd->insert_operand = m32c_cgen_insert_operand; | |
| 5302 | cd->extract_operand = m32c_cgen_extract_operand; | |
| 5303 | ||
| 5304 | cd->get_int_operand = m32c_cgen_get_int_operand; | |
| 5305 | cd->set_int_operand = m32c_cgen_set_int_operand; | |
| 5306 | cd->get_vma_operand = m32c_cgen_get_vma_operand; | |
| 5307 | cd->set_vma_operand = m32c_cgen_set_vma_operand; | |
| 5308 | } |