[thirdparty/binutils-gdb.git] / sim / arm / wrapper.c

/* run front end support for arm
   Copyright (C) 1995, 1996, 1997, 2000, 2001, 2002
   Free Software Foundation, Inc.

   This file is part of ARM SIM.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 2, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but
   WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
   the GNU General Public License for more details.

   You should have received a copy of the GNU General Public
   License along with this program; if not, write to the Free
   Software Foundation, Inc., 59 Temple Place - Suite 330,
   Boston, MA 02111-1307, USA.  */

/* This file provides the interface between the simulator and
   run.c and gdb (when the simulator is linked with gdb).
   All simulator interaction should go through this file.  */

#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include <bfd.h>
#include <signal.h>
#include "gdb/callback.h"
#include "gdb/remote-sim.h"
#include "armdefs.h"
#include "armemu.h"
#include "dbg_rdi.h"
#include "ansidecl.h"
#include "sim-utils.h"
#include "run-sim.h"
#include "gdb/sim-arm.h"

host_callback *sim_callback;

static struct ARMul_State *state;

/* Who is using the simulator.  */
static SIM_OPEN_KIND sim_kind;

/* argv[0] */
static char *myname;

/* Memory size in bytes.  */
static int mem_size = (1 << 23);

/* Non-zero to display start up banner, and maybe other things.  */
static int verbosity;

/* Non-zero to set big endian mode.  */
static int big_endian;

int stop_simulator;

static void
init ()
{
  static int done;

  if (!done)
    {
      ARMul_EmulateInit ();
      state = ARMul_NewState ();
      state->bigendSig = (big_endian ? HIGH : LOW);
      ARMul_MemoryInit (state, mem_size);
      ARMul_OSInit (state);
      ARMul_CoProInit (state);
      state->verbose = verbosity;
      done = 1;
    }
}

/* Set verbosity level of simulator.
   This is not intended to produce detailed tracing or debugging information.
   Just summaries.  */
/* FIXME: common/run.c doesn't do this yet.  */

void
sim_set_verbose (v)
     int v;
{
  verbosity = v;
}

/* Set the memory size to SIZE bytes.
   Must be called before initializing simulator.  */
/* FIXME: Rename to sim_set_mem_size.  */

void
sim_size (size)
     int size;
{
  mem_size = size;
}

void
ARMul_ConsolePrint VPARAMS ((ARMul_State * state,
			     const char * format,
			     ...))
{
  va_list ap;

  if (state->verbose)
    {
      va_start (ap, format);
      vprintf (format, ap);
      va_end (ap);
    }
}

ARMword
ARMul_Debug (state, pc, instr)
     ARMul_State * state ATTRIBUTE_UNUSED;
     ARMword       pc    ATTRIBUTE_UNUSED;
     ARMword       instr ATTRIBUTE_UNUSED;
{
  return 0;
}

int
sim_write (sd, addr, buffer, size)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     SIM_ADDR addr;
     unsigned char * buffer;
     int size;
{
  int i;

  init ();

  for (i = 0; i < size; i++)
    ARMul_SafeWriteByte (state, addr + i, buffer[i]);

  return size;
}

int
sim_read (sd, addr, buffer, size)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     SIM_ADDR addr;
     unsigned char * buffer;
     int size;
{
  int i;

  init ();

  for (i = 0; i < size; i++)
    buffer[i] = ARMul_SafeReadByte (state, addr + i);

  return size;
}

int
sim_trace (sd)
     SIM_DESC sd ATTRIBUTE_UNUSED;
{  
  (*sim_callback->printf_filtered)
    (sim_callback,
     "This simulator does not support tracing\n");
  return 1;
}

int
sim_stop (sd)
     SIM_DESC sd ATTRIBUTE_UNUSED;
{
  state->Emulate = STOP;
  stop_simulator = 1;
  return 1;
}

void
sim_resume (sd, step, siggnal)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     int step;
     int siggnal ATTRIBUTE_UNUSED;
{
  state->EndCondition = 0;
  stop_simulator = 0;

  if (step)
    {
      state->Reg[15] = ARMul_DoInstr (state);
      if (state->EndCondition == 0)
	state->EndCondition = RDIError_BreakpointReached;
    }
  else
    {
      state->NextInstr = RESUME;	/* treat as PC change */
      state->Reg[15] = ARMul_DoProg (state);
    }

  FLUSHPIPE;
}

SIM_RC
sim_create_inferior (sd, abfd, argv, env)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     struct _bfd * abfd;
     char ** argv;
     char ** env;
{
  int argvlen = 0;
  int mach;
  char **arg;

  if (abfd != NULL)
    ARMul_SetPC (state, bfd_get_start_address (abfd));
  else
    ARMul_SetPC (state, 0);	/* ??? */

  mach = bfd_get_mach (abfd);

  switch (mach)
    {
    default:
      (*sim_callback->printf_filtered)
	(sim_callback,
	 "Unknown machine type '%d'; please update sim_create_inferior.\n",
	 mach);
      /* fall through */

    case 0:
      /* We wouldn't set the machine type with earlier toolchains, so we
	 explicitly select a processor capable of supporting all ARMs in
	 32bit mode.  */
    case bfd_mach_arm_XScale:
      ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
      break;

    case bfd_mach_arm_5:
      if (bfd_family_coff (abfd))
	{
	  /* This is a special case in order to support COFF based ARM toolchains.
	     The COFF header does not have enough room to store all the different
	     kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
	     to v5.  (See coff_set_flags() in bdf/coffcode.h).  So if we see a v5
	     machine type here, we assume it could be any of the above architectures
	     and so select the most feature-full.  */
	  ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
	  break;
	}
      /* Otherwise drop through.  */

    case bfd_mach_arm_5T:
      ARMul_SelectProcessor (state, ARM_v5_Prop);
      break;

    case bfd_mach_arm_5TE:
      ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop);
      break;

    case bfd_mach_arm_4:
    case bfd_mach_arm_4T:
      ARMul_SelectProcessor (state, ARM_v4_Prop);
      break;

    case bfd_mach_arm_3:
    case bfd_mach_arm_3M:
      ARMul_SelectProcessor (state, ARM_Lock_Prop);
      break;

    case bfd_mach_arm_2:
    case bfd_mach_arm_2a:
      ARMul_SelectProcessor (state, ARM_Fix26_Prop);
      break;
    }

  if (   mach != bfd_mach_arm_3
      && mach != bfd_mach_arm_3M
      && mach != bfd_mach_arm_2
      && mach != bfd_mach_arm_2a)
    {
      /* Reset mode to ARM.  A gdb user may rerun a program that had entered
	 THUMB mode from the start and cause the ARM-mode startup code to be
	 executed in THUMB mode.  */
      ARMul_SetCPSR (state, SVC32MODE);
    }
  
  if (argv != NULL)
    {
      /* Set up the command line by laboriously stringing together
	 the environment carefully picked apart by our caller.  */

      /* Free any old stuff.  */
      if (state->CommandLine != NULL)
	{
	  free (state->CommandLine);
	  state->CommandLine = NULL;
	}

      /* See how much we need.  */
      for (arg = argv; *arg != NULL; arg++)
	argvlen += strlen (*arg) + 1;

      /* Allocate it.  */
      state->CommandLine = malloc (argvlen + 1);
      if (state->CommandLine != NULL)
	{
	  arg = argv;
	  state->CommandLine[0] = '\0';

	  for (arg = argv; *arg != NULL; arg++)
	    {
	      strcat (state->CommandLine, *arg);
	      strcat (state->CommandLine, " ");
	    }
	}
    }

  if (env != NULL)
    {
      /* Now see if there's a MEMSIZE spec in the environment.  */
      while (*env)
	{
	  if (strncmp (*env, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
	    {
	      char *end_of_num;

	      /* Set up memory limit.  */
	      state->MemSize =
		strtoul (*env + sizeof ("MEMSIZE=") - 1, &end_of_num, 0);
	    }
	  env++;
	}
    }

  return SIM_RC_OK;
}

void
sim_info (sd, verbose)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     int verbose ATTRIBUTE_UNUSED;
{
}

static int
frommem (state, memory)
     struct ARMul_State *state;
     unsigned char *memory;
{
  if (state->bigendSig == HIGH)
    return (memory[0] << 24) | (memory[1] << 16)
      | (memory[2] << 8) | (memory[3] << 0);
  else
    return (memory[3] << 24) | (memory[2] << 16)
      | (memory[1] << 8) | (memory[0] << 0);
}

static void
tomem (state, memory, val)
     struct ARMul_State *state;
     unsigned char *memory;
     int val;
{
  if (state->bigendSig == HIGH)
    {
      memory[0] = val >> 24;
      memory[1] = val >> 16;
      memory[2] = val >> 8;
      memory[3] = val >> 0;
    }
  else
    {
      memory[3] = val >> 24;
      memory[2] = val >> 16;
      memory[1] = val >> 8;
      memory[0] = val >> 0;
    }
}

int
sim_store_register (sd, rn, memory, length)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     int rn;
     unsigned char *memory;
     int length ATTRIBUTE_UNUSED;
{
  init ();

  switch ((enum sim_arm_regs) rn)
    {
    case SIM_ARM_R0_REGNUM:
    case SIM_ARM_R1_REGNUM:
    case SIM_ARM_R2_REGNUM:
    case SIM_ARM_R3_REGNUM:
    case SIM_ARM_R4_REGNUM:
    case SIM_ARM_R5_REGNUM:
    case SIM_ARM_R6_REGNUM:
    case SIM_ARM_R7_REGNUM:
    case SIM_ARM_R8_REGNUM:
    case SIM_ARM_R9_REGNUM:
    case SIM_ARM_R10_REGNUM:
    case SIM_ARM_R11_REGNUM:
    case SIM_ARM_R12_REGNUM:
    case SIM_ARM_R13_REGNUM:
    case SIM_ARM_R14_REGNUM:
    case SIM_ARM_R15_REGNUM: /* PC */
    case SIM_ARM_FP0_REGNUM:
    case SIM_ARM_FP1_REGNUM:
    case SIM_ARM_FP2_REGNUM:
    case SIM_ARM_FP3_REGNUM:
    case SIM_ARM_FP4_REGNUM:
    case SIM_ARM_FP5_REGNUM:
    case SIM_ARM_FP6_REGNUM:
    case SIM_ARM_FP7_REGNUM:
    case SIM_ARM_FPS_REGNUM:
      ARMul_SetReg (state, state->Mode, rn, frommem (state, memory));
      break;

    case SIM_ARM_PS_REGNUM:
      state->Cpsr = frommem (state, memory);
      ARMul_CPSRAltered (state);
      break;

    default:
      return 0;
    }

  return -1;
}

int
sim_fetch_register (sd, rn, memory, length)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     int rn;
     unsigned char *memory;
     int length ATTRIBUTE_UNUSED;
{
  ARMword regval;

  init ();

  switch ((enum sim_arm_regs) rn)
    {
    case SIM_ARM_R0_REGNUM:
    case SIM_ARM_R1_REGNUM:
    case SIM_ARM_R2_REGNUM:
    case SIM_ARM_R3_REGNUM:
    case SIM_ARM_R4_REGNUM:
    case SIM_ARM_R5_REGNUM:
    case SIM_ARM_R6_REGNUM:
    case SIM_ARM_R7_REGNUM:
    case SIM_ARM_R8_REGNUM:
    case SIM_ARM_R9_REGNUM:
    case SIM_ARM_R10_REGNUM:
    case SIM_ARM_R11_REGNUM:
    case SIM_ARM_R12_REGNUM:
    case SIM_ARM_R13_REGNUM:
    case SIM_ARM_R14_REGNUM:
    case SIM_ARM_R15_REGNUM: /* PC */
      regval = ARMul_GetReg (state, state->Mode, rn);
      break;

    case SIM_ARM_FP0_REGNUM:
    case SIM_ARM_FP1_REGNUM:
    case SIM_ARM_FP2_REGNUM:
    case SIM_ARM_FP3_REGNUM:
    case SIM_ARM_FP4_REGNUM:
    case SIM_ARM_FP5_REGNUM:
    case SIM_ARM_FP6_REGNUM:
    case SIM_ARM_FP7_REGNUM:
    case SIM_ARM_FPS_REGNUM:
      memset (memory, 0, length);
      return 0;

    case SIM_ARM_PS_REGNUM:
      regval = ARMul_GetCPSR (state);
      break;

    default:
      return 0;
    }

  while (length)
    {
      tomem (state, memory, regval);

      length -= 4;
      memory += 4;
      regval = 0;
    }  

  return -1;
}

#ifdef SIM_TARGET_SWITCHES

static void sim_target_parse_arg_array PARAMS ((char **));

typedef struct
{
  char * 	swi_option;
  unsigned int	swi_mask;
} swi_options;

#define SWI_SWITCH	"--swi-support"

static swi_options options[] =
  {
    { "none",    0 },
    { "demon",   SWI_MASK_DEMON },
    { "angel",   SWI_MASK_ANGEL },
    { "redboot", SWI_MASK_REDBOOT },
    { "all",     -1 },
    { "NONE",    0 },
    { "DEMON",   SWI_MASK_DEMON },
    { "ANGEL",   SWI_MASK_ANGEL },
    { "REDBOOT", SWI_MASK_REDBOOT },
    { "ALL",     -1 }
  };


int
sim_target_parse_command_line (argc, argv)
     int argc;
     char ** argv;
{
  int i;

  for (i = 1; i < argc; i++)
    {
      char * ptr = argv[i];
      int arg;

      if ((ptr == NULL) || (* ptr != '-'))
	break;

      if (strncmp (ptr, SWI_SWITCH, sizeof SWI_SWITCH - 1) != 0)
	continue;

      if (ptr[sizeof SWI_SWITCH - 1] == 0)
	{
	  /* Remove this option from the argv array.  */
	  for (arg = i; arg < argc; arg ++)
	    argv[arg] = argv[arg + 1];
	  argc --;
	  
	  ptr = argv[i];
	}
      else
	ptr += sizeof SWI_SWITCH;

      swi_mask = 0;
      
      while (* ptr)
	{
	  int i;

	  for (i = sizeof options / sizeof options[0]; i--;)
	    if (strncmp (ptr, options[i].swi_option,
			 strlen (options[i].swi_option)) == 0)
	      {
		swi_mask |= options[i].swi_mask;
		ptr += strlen (options[i].swi_option);

		if (* ptr == ',')
		  ++ ptr;

		break;
	      }

	  if (i < 0)
	    break;
	}

      if (* ptr != 0)
	fprintf (stderr, "Ignoring swi options: %s\n", ptr);
      
      /* Remove this option from the argv array.  */
      for (arg = i; arg < argc; arg ++)
	argv[arg] = argv[arg + 1];
      argc --;
      i --;
    }
  return argc;
}

static void
sim_target_parse_arg_array (argv)
     char ** argv;
{
  int i;

  for (i = 0; argv[i]; i++)
    ;

  return (void) sim_target_parse_command_line (i, argv);
}

void
sim_target_display_usage ()
{
  fprintf (stderr, "%s=<list>  Comma seperated list of SWI protocols to supoport.\n\
                This list can contain: NONE, DEMON, ANGEL, REDBOOT and/or ALL.\n",
	   SWI_SWITCH);
}
#endif

SIM_DESC
sim_open (kind, ptr, abfd, argv)
     SIM_OPEN_KIND kind;
     host_callback *ptr;
     struct _bfd *abfd;
     char **argv;
{
  sim_kind = kind;
  if (myname) free (myname);
  myname = (char *) xstrdup (argv[0]);
  sim_callback = ptr;

#ifdef SIM_TARGET_SWITCHES
  sim_target_parse_arg_array (argv);
#endif
  
  /* Decide upon the endian-ness of the processor.
     If we can, get the information from the bfd itself.
     Otherwise look to see if we have been given a command
     line switch that tells us.  Otherwise default to little endian.  */
  if (abfd != NULL)
    big_endian = bfd_big_endian (abfd);
  else if (argv[1] != NULL)
    {
      int i;

      /* Scan for endian-ness switch.  */
      for (i = 0; (argv[i] != NULL) && (argv[i][0] != 0); i++)
	if (argv[i][0] == '-' && argv[i][1] == 'E')
	  {
	    char c;

	    if ((c = argv[i][2]) == 0)
	      {
		++i;
		c = argv[i][0];
	      }

	    switch (c)
	      {
	      case 0:
		sim_callback->printf_filtered
		  (sim_callback, "No argument to -E option provided\n");
		break;

	      case 'b':
	      case 'B':
		big_endian = 1;
		break;

	      case 'l':
	      case 'L':
		big_endian = 0;
		break;

	      default:
		sim_callback->printf_filtered
		  (sim_callback, "Unrecognised argument to -E option\n");
		break;
	      }
	  }
    }

  return (SIM_DESC) 1;
}

void
sim_close (sd, quitting)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     int quitting ATTRIBUTE_UNUSED;
{
  if (myname)
    free (myname);
  myname = NULL;
}

SIM_RC
sim_load (sd, prog, abfd, from_tty)
     SIM_DESC sd;
     char *prog;
     bfd *abfd;
     int from_tty ATTRIBUTE_UNUSED;
{
  bfd *prog_bfd;

  prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
			    sim_kind == SIM_OPEN_DEBUG, 0, sim_write);
  if (prog_bfd == NULL)
    return SIM_RC_FAIL;
  ARMul_SetPC (state, bfd_get_start_address (prog_bfd));
  if (abfd == NULL)
    bfd_close (prog_bfd);
  return SIM_RC_OK;
}

void
sim_stop_reason (sd, reason, sigrc)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     enum sim_stop *reason;
     int *sigrc;
{
  if (stop_simulator)
    {
      *reason = sim_stopped;
      *sigrc = SIGINT;
    }
  else if (state->EndCondition == 0)
    {
      *reason = sim_exited;
      *sigrc = state->Reg[0] & 255;
    }
  else
    {
      *reason = sim_stopped;
      if (state->EndCondition == RDIError_BreakpointReached)
	*sigrc = SIGTRAP;
      else
	*sigrc = 0;
    }
}

void
sim_do_command (sd, cmd)
     SIM_DESC sd ATTRIBUTE_UNUSED;
     char *cmd ATTRIBUTE_UNUSED;
{  
  (*sim_callback->printf_filtered)
    (sim_callback,
     "This simulator does not accept any commands.\n");
}

void
sim_set_callbacks (ptr)
     host_callback *ptr;
{
  sim_callback = ptr;
}
Commit	Line	Data
c906108c	1	/* run front end support for arm
86c735a5 NC	2	Copyright (C) 1995, 1996, 1997, 2000, 2001, 2002
86c735a5 NC	3	Free Software Foundation, Inc.
c906108c	4
86c735a5	5	This file is part of ARM SIM.
c906108c	6
86c735a5 NC	7	GCC is free software; you can redistribute it and/or modify it
	8	under the terms of the GNU General Public License as published
	9	by the Free Software Foundation; either version 2, or (at your
	10	option) any later version.
c906108c	11
86c735a5 NC	12	GCC is distributed in the hope that it will be useful, but
	13	WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	15	the GNU General Public License for more details.
c906108c	16
86c735a5 NC	17	You should have received a copy of the GNU General Public
	18	License along with this program; if not, write to the Free
	19	Software Foundation, Inc., 59 Temple Place - Suite 330,
	20	Boston, MA 02111-1307, USA. */
c906108c	21
86c735a5 NC	22	/* This file provides the interface between the simulator and
86c735a5 NC	23	run.c and gdb (when the simulator is linked with gdb).
c906108c SS	24	All simulator interaction should go through this file. */
	25
	26	#include <stdio.h>
	27	#include <stdarg.h>
6d358e86	28	#include <string.h>
c906108c SS	29	#include <bfd.h>
c906108c SS	30	#include <signal.h>
3c25f8c7 AC	31	#include "gdb/callback.h"
3c25f8c7 AC	32	#include "gdb/remote-sim.h"
c906108c SS	33	#include "armdefs.h"
	34	#include "armemu.h"
	35	#include "dbg_rdi.h"
6d358e86	36	#include "ansidecl.h"
86c735a5	37	#include "sim-utils.h"
de4112fa	38	#include "run-sim.h"
26216b98	39	#include "gdb/sim-arm.h"
c906108c SS	40
	41	host_callback *sim_callback;
	42
	43	static struct ARMul_State *state;
	44
	45	/* Who is using the simulator. */
	46	static SIM_OPEN_KIND sim_kind;
	47
	48	/* argv[0] */
	49	static char *myname;
	50
	51	/* Memory size in bytes. */
ae60d3dd	52	static int mem_size = (1 << 23);
c906108c SS	53
	54	/* Non-zero to display start up banner, and maybe other things. */
	55	static int verbosity;
	56
	57	/* Non-zero to set big endian mode. */
	58	static int big_endian;
	59
7a292a7a SS	60	int stop_simulator;
7a292a7a SS	61
dfcd3bfb	62	static void
c906108c SS	63	init ()
	64	{
	65	static int done;
	66
	67	if (!done)
	68	{
dfcd3bfb	69	ARMul_EmulateInit ();
c906108c SS	70	state = ARMul_NewState ();
c906108c SS	71	state->bigendSig = (big_endian ? HIGH : LOW);
dfcd3bfb JM	72	ARMul_MemoryInit (state, mem_size);
	73	ARMul_OSInit (state);
	74	ARMul_CoProInit (state);
c906108c SS	75	state->verbose = verbosity;
	76	done = 1;
	77	}
	78	}
	79
	80	/* Set verbosity level of simulator.
	81	This is not intended to produce detailed tracing or debugging information.
	82	Just summaries. */
	83	/* FIXME: common/run.c doesn't do this yet. */
	84
	85	void
	86	sim_set_verbose (v)
	87	int v;
	88	{
	89	verbosity = v;
	90	}
	91
	92	/* Set the memory size to SIZE bytes.
dfcd3bfb	93	Must be called before initializing simulator. */
c906108c SS	94	/* FIXME: Rename to sim_set_mem_size. */
c906108c SS	95
dfcd3bfb	96	void
c906108c SS	97	sim_size (size)
	98	int size;
	99	{
	100	mem_size = size;
	101	}
	102
dfcd3bfb	103	void
86c735a5 NC	104	ARMul_ConsolePrint VPARAMS ((ARMul_State * state,
	105	const char * format,
	106	...))
c906108c SS	107	{
	108	va_list ap;
	109
	110	if (state->verbose)
	111	{
	112	va_start (ap, format);
	113	vprintf (format, ap);
	114	va_end (ap);
	115	}
	116	}
	117
6d358e86	118	ARMword
86c735a5 NC	119	ARMul_Debug (state, pc, instr)
	120	ARMul_State * state ATTRIBUTE_UNUSED;
	121	ARMword pc ATTRIBUTE_UNUSED;
	122	ARMword instr ATTRIBUTE_UNUSED;
c906108c	123	{
6d358e86	124	return 0;
c906108c SS	125	}
	126
	127	int
	128	sim_write (sd, addr, buffer, size)
6d358e86	129	SIM_DESC sd ATTRIBUTE_UNUSED;
c906108c	130	SIM_ADDR addr;
86c735a5	131	unsigned char * buffer;
c906108c SS	132	int size;
	133	{
	134	int i;
3943c96b	135
c906108c	136	init ();
3943c96b	137
c906108c	138	for (i = 0; i < size; i++)
917bca4f	139	ARMul_SafeWriteByte (state, addr + i, buffer[i]);
3943c96b	140
c906108c SS	141	return size;
	142	}
	143
	144	int
	145	sim_read (sd, addr, buffer, size)
6d358e86	146	SIM_DESC sd ATTRIBUTE_UNUSED;
c906108c	147	SIM_ADDR addr;
86c735a5	148	unsigned char * buffer;
c906108c SS	149	int size;
	150	{
	151	int i;
917bca4f	152
c906108c	153	init ();
86c735a5	154
c906108c	155	for (i = 0; i < size; i++)
917bca4f NC	156	buffer[i] = ARMul_SafeReadByte (state, addr + i);
917bca4f NC	157
c906108c SS	158	return size;
	159	}
	160
	161	int
	162	sim_trace (sd)
6d358e86	163	SIM_DESC sd ATTRIBUTE_UNUSED;
dfcd3bfb	164	{
86c735a5 NC	165	(*sim_callback->printf_filtered)
	166	(sim_callback,
	167	"This simulator does not support tracing\n");
c906108c SS	168	return 1;
	169	}
	170
	171	int
	172	sim_stop (sd)
6d358e86	173	SIM_DESC sd ATTRIBUTE_UNUSED;
c906108c	174	{
7a292a7a SS	175	state->Emulate = STOP;
	176	stop_simulator = 1;
	177	return 1;
c906108c SS	178	}
	179
	180	void
	181	sim_resume (sd, step, siggnal)
6d358e86 NC	182	SIM_DESC sd ATTRIBUTE_UNUSED;
	183	int step;
	184	int siggnal ATTRIBUTE_UNUSED;
c906108c SS	185	{
c906108c SS	186	state->EndCondition = 0;
7a292a7a	187	stop_simulator = 0;
c906108c SS	188
	189	if (step)
	190	{
	191	state->Reg[15] = ARMul_DoInstr (state);
	192	if (state->EndCondition == 0)
	193	state->EndCondition = RDIError_BreakpointReached;
	194	}
	195	else
	196	{
dfcd3bfb	197	state->NextInstr = RESUME; /* treat as PC change */
c906108c SS	198	state->Reg[15] = ARMul_DoProg (state);
	199	}
	200
	201	FLUSHPIPE;
	202	}
	203
	204	SIM_RC
	205	sim_create_inferior (sd, abfd, argv, env)
6d358e86	206	SIM_DESC sd ATTRIBUTE_UNUSED;
86c735a5 NC	207	struct _bfd * abfd;
	208	char ** argv;
	209	char ** env;
c906108c	210	{
dfcd3bfb	211	int argvlen = 0;
1e6b544a	212	int mach;
c906108c SS	213	char **arg;
	214
	215	if (abfd != NULL)
	216	ARMul_SetPC (state, bfd_get_start_address (abfd));
	217	else
dfcd3bfb	218	ARMul_SetPC (state, 0); /* ??? */
c906108c	219
1e6b544a AO	220	mach = bfd_get_mach (abfd);
1e6b544a AO	221
3943c96b NC	222	switch (mach)
	223	{
	224	default:
86c735a5 NC	225	(*sim_callback->printf_filtered)
86c735a5 NC	226	(sim_callback,
10b57fcb NC	227	"Unknown machine type '%d'; please update sim_create_inferior.\n",
10b57fcb NC	228	mach);
3943c96b NC	229	/* fall through */
3943c96b NC	230
f1129fb8	231	case 0:
3943c96b	232	/* We wouldn't set the machine type with earlier toolchains, so we
f1129fb8 NC	233	explicitly select a processor capable of supporting all ARMs in
f1129fb8 NC	234	32bit mode. */
272fcdcd NC	235	case bfd_mach_arm_XScale:
	236	ARMul_SelectProcessor (state, ARM_v5_Prop \| ARM_v5e_Prop \| ARM_XScale_Prop);
	237	break;
	238
f1129fb8	239	case bfd_mach_arm_5:
c17aa318 NC	240	if (bfd_family_coff (abfd))
	241	{
	242	/* This is a special case in order to support COFF based ARM toolchains.
	243	The COFF header does not have enough room to store all the different
	244	kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
	245	to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
	246	machine type here, we assume it could be any of the above architectures
	247	and so select the most feature-full. */
	248	ARMul_SelectProcessor (state, ARM_v5_Prop \| ARM_v5e_Prop \| ARM_XScale_Prop);
	249	break;
	250	}
	251	/* Otherwise drop through. */
25180f8a	252
f1129fb8 NC	253	case bfd_mach_arm_5T:
	254	ARMul_SelectProcessor (state, ARM_v5_Prop);
	255	break;
3943c96b	256
f1129fb8 NC	257	case bfd_mach_arm_5TE:
	258	ARMul_SelectProcessor (state, ARM_v5_Prop \| ARM_v5e_Prop);
	259	break;
	260
f1129fb8 NC	261	case bfd_mach_arm_4:
	262	case bfd_mach_arm_4T:
	263	ARMul_SelectProcessor (state, ARM_v4_Prop);
	264	break;
	265
	266	case bfd_mach_arm_3:
	267	case bfd_mach_arm_3M:
3943c96b NC	268	ARMul_SelectProcessor (state, ARM_Lock_Prop);
	269	break;
	270
f1129fb8 NC	271	case bfd_mach_arm_2:
f1129fb8 NC	272	case bfd_mach_arm_2a:
3943c96b NC	273	ARMul_SelectProcessor (state, ARM_Fix26_Prop);
	274	break;
	275	}
	276
5f7d0a33 NC	277	if ( mach != bfd_mach_arm_3
	278	&& mach != bfd_mach_arm_3M
	279	&& mach != bfd_mach_arm_2
	280	&& mach != bfd_mach_arm_2a)
f1129fb8 NC	281	{
	282	/* Reset mode to ARM. A gdb user may rerun a program that had entered
	283	THUMB mode from the start and cause the ARM-mode startup code to be
5f7d0a33 NC	284	executed in THUMB mode. */
5f7d0a33 NC	285	ARMul_SetCPSR (state, SVC32MODE);
f1129fb8 NC	286	}
f1129fb8 NC	287
c906108c SS	288	if (argv != NULL)
c906108c SS	289	{
5f7d0a33 NC	290	/* Set up the command line by laboriously stringing together
	291	the environment carefully picked apart by our caller. */
	292
	293	/* Free any old stuff. */
c906108c SS	294	if (state->CommandLine != NULL)
c906108c SS	295	{
dfcd3bfb	296	free (state->CommandLine);
c906108c SS	297	state->CommandLine = NULL;
c906108c SS	298	}
dfcd3bfb	299
5f7d0a33	300	/* See how much we need. */
c906108c	301	for (arg = argv; *arg != NULL; arg++)
dfcd3bfb JM	302	argvlen += strlen (*arg) + 1;
dfcd3bfb JM	303
5f7d0a33	304	/* Allocate it. */
dfcd3bfb	305	state->CommandLine = malloc (argvlen + 1);
c906108c SS	306	if (state->CommandLine != NULL)
	307	{
	308	arg = argv;
dfcd3bfb	309	state->CommandLine[0] = '\0';
5f7d0a33	310
c906108c SS	311	for (arg = argv; *arg != NULL; arg++)
c906108c SS	312	{
dfcd3bfb JM	313	strcat (state->CommandLine, *arg);
dfcd3bfb JM	314	strcat (state->CommandLine, " ");
c906108c SS	315	}
	316	}
	317	}
	318
	319	if (env != NULL)
	320	{
5f7d0a33	321	/* Now see if there's a MEMSIZE spec in the environment. */
c906108c SS	322	while (*env)
c906108c SS	323	{
dfcd3bfb	324	if (strncmp (*env, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
c906108c	325	{
c906108c	326	char *end_of_num;
dfcd3bfb	327
5f7d0a33	328	/* Set up memory limit. */
dfcd3bfb JM	329	state->MemSize =
dfcd3bfb JM	330	strtoul (*env + sizeof ("MEMSIZE=") - 1, &end_of_num, 0);
c906108c SS	331	}
	332	env++;
	333	}
	334	}
	335
	336	return SIM_RC_OK;
	337	}
	338
	339	void
	340	sim_info (sd, verbose)
6d358e86 NC	341	SIM_DESC sd ATTRIBUTE_UNUSED;
6d358e86 NC	342	int verbose ATTRIBUTE_UNUSED;
c906108c SS	343	{
	344	}
	345
dfcd3bfb	346	static int
c906108c SS	347	frommem (state, memory)
	348	struct ARMul_State *state;
	349	unsigned char *memory;
	350	{
	351	if (state->bigendSig == HIGH)
86c735a5 NC	352	return (memory[0] << 24) \| (memory[1] << 16)
86c735a5 NC	353	\| (memory[2] << 8) \| (memory[3] << 0);
c906108c	354	else
86c735a5 NC	355	return (memory[3] << 24) \| (memory[2] << 16)
86c735a5 NC	356	\| (memory[1] << 8) \| (memory[0] << 0);
c906108c SS	357	}
c906108c SS	358
c906108c	359	static void
dfcd3bfb	360	tomem (state, memory, val)
c906108c SS	361	struct ARMul_State *state;
	362	unsigned char *memory;
	363	int val;
	364	{
	365	if (state->bigendSig == HIGH)
	366	{
	367	memory[0] = val >> 24;
	368	memory[1] = val >> 16;
	369	memory[2] = val >> 8;
	370	memory[3] = val >> 0;
	371	}
	372	else
	373	{
	374	memory[3] = val >> 24;
	375	memory[2] = val >> 16;
	376	memory[1] = val >> 8;
	377	memory[0] = val >> 0;
	378	}
	379	}
	380
	381	int
	382	sim_store_register (sd, rn, memory, length)
6d358e86	383	SIM_DESC sd ATTRIBUTE_UNUSED;
c906108c SS	384	int rn;
c906108c SS	385	unsigned char *memory;
6d358e86	386	int length ATTRIBUTE_UNUSED;
c906108c SS	387	{
c906108c SS	388	init ();
f1129fb8	389
26216b98	390	switch ((enum sim_arm_regs) rn)
3463c3fb	391	{
26216b98 AC	392	case SIM_ARM_R0_REGNUM:
	393	case SIM_ARM_R1_REGNUM:
	394	case SIM_ARM_R2_REGNUM:
	395	case SIM_ARM_R3_REGNUM:
	396	case SIM_ARM_R4_REGNUM:
	397	case SIM_ARM_R5_REGNUM:
	398	case SIM_ARM_R6_REGNUM:
	399	case SIM_ARM_R7_REGNUM:
	400	case SIM_ARM_R8_REGNUM:
	401	case SIM_ARM_R9_REGNUM:
	402	case SIM_ARM_R10_REGNUM:
	403	case SIM_ARM_R11_REGNUM:
	404	case SIM_ARM_R12_REGNUM:
	405	case SIM_ARM_R13_REGNUM:
	406	case SIM_ARM_R14_REGNUM:
	407	case SIM_ARM_R15_REGNUM: /* PC */
	408	case SIM_ARM_FP0_REGNUM:
	409	case SIM_ARM_FP1_REGNUM:
	410	case SIM_ARM_FP2_REGNUM:
	411	case SIM_ARM_FP3_REGNUM:
	412	case SIM_ARM_FP4_REGNUM:
	413	case SIM_ARM_FP5_REGNUM:
	414	case SIM_ARM_FP6_REGNUM:
	415	case SIM_ARM_FP7_REGNUM:
	416	case SIM_ARM_FPS_REGNUM:
	417	ARMul_SetReg (state, state->Mode, rn, frommem (state, memory));
	418	break;
	419
	420	case SIM_ARM_PS_REGNUM:
3463c3fb	421	state->Cpsr = frommem (state, memory);
10b57fcb	422	ARMul_CPSRAltered (state);
26216b98 AC	423	break;
	424
	425	default:
	426	return 0;
3463c3fb	427	}
26216b98	428
c906108c SS	429	return -1;
	430	}
	431
	432	int
	433	sim_fetch_register (sd, rn, memory, length)
6d358e86	434	SIM_DESC sd ATTRIBUTE_UNUSED;
c906108c SS	435	int rn;
c906108c SS	436	unsigned char *memory;
6d358e86	437	int length ATTRIBUTE_UNUSED;
c906108c SS	438	{
	439	ARMword regval;
	440
	441	init ();
f1129fb8	442
26216b98 AC	443	switch ((enum sim_arm_regs) rn)
	444	{
	445	case SIM_ARM_R0_REGNUM:
	446	case SIM_ARM_R1_REGNUM:
	447	case SIM_ARM_R2_REGNUM:
	448	case SIM_ARM_R3_REGNUM:
	449	case SIM_ARM_R4_REGNUM:
	450	case SIM_ARM_R5_REGNUM:
	451	case SIM_ARM_R6_REGNUM:
	452	case SIM_ARM_R7_REGNUM:
	453	case SIM_ARM_R8_REGNUM:
	454	case SIM_ARM_R9_REGNUM:
	455	case SIM_ARM_R10_REGNUM:
	456	case SIM_ARM_R11_REGNUM:
	457	case SIM_ARM_R12_REGNUM:
	458	case SIM_ARM_R13_REGNUM:
	459	case SIM_ARM_R14_REGNUM:
	460	case SIM_ARM_R15_REGNUM: /* PC */
	461	regval = ARMul_GetReg (state, state->Mode, rn);
	462	break;
	463
	464	case SIM_ARM_FP0_REGNUM:
	465	case SIM_ARM_FP1_REGNUM:
	466	case SIM_ARM_FP2_REGNUM:
	467	case SIM_ARM_FP3_REGNUM:
	468	case SIM_ARM_FP4_REGNUM:
	469	case SIM_ARM_FP5_REGNUM:
	470	case SIM_ARM_FP6_REGNUM:
	471	case SIM_ARM_FP7_REGNUM:
	472	case SIM_ARM_FPS_REGNUM:
	473	memset (memory, 0, length);
	474	return 0;
	475
	476	case SIM_ARM_PS_REGNUM:
	477	regval = ARMul_GetCPSR (state);
	478	break;
	479
	480	default:
	481	return 0;
	482	}
272fcdcd NC	483
	484	while (length)
	485	{
	486	tomem (state, memory, regval);
	487
	488	length -= 4;
	489	memory += 4;
	490	regval = 0;
	491	}
	492
c906108c SS	493	return -1;
	494	}
	495
de4112fa NC	496	#ifdef SIM_TARGET_SWITCHES
	497
	498	static void sim_target_parse_arg_array PARAMS ((char **));
	499
	500	typedef struct
	501	{
	502	char * swi_option;
	503	unsigned int swi_mask;
	504	} swi_options;
	505
	506	#define SWI_SWITCH "--swi-support"
	507
	508	static swi_options options[] =
	509	{
	510	{ "none", 0 },
	511	{ "demon", SWI_MASK_DEMON },
	512	{ "angel", SWI_MASK_ANGEL },
	513	{ "redboot", SWI_MASK_REDBOOT },
	514	{ "all", -1 },
	515	{ "NONE", 0 },
	516	{ "DEMON", SWI_MASK_DEMON },
	517	{ "ANGEL", SWI_MASK_ANGEL },
	518	{ "REDBOOT", SWI_MASK_REDBOOT },
	519	{ "ALL", -1 }
	520	};
	521
	522
	523	int
	524	sim_target_parse_command_line (argc, argv)
	525	int argc;
	526	char ** argv;
	527	{
	528	int i;
	529
	530	for (i = 1; i < argc; i++)
	531	{
	532	char * ptr = argv[i];
	533	int arg;
	534
	535	if ((ptr == NULL) \|\| (* ptr != '-'))
	536	break;
	537
	538	if (strncmp (ptr, SWI_SWITCH, sizeof SWI_SWITCH - 1) != 0)
	539	continue;
	540
	541	if (ptr[sizeof SWI_SWITCH - 1] == 0)
	542	{
	543	/* Remove this option from the argv array. */
	544	for (arg = i; arg < argc; arg ++)
	545	argv[arg] = argv[arg + 1];
	546	argc --;
	547
	548	ptr = argv[i];
	549	}
	550	else
	551	ptr += sizeof SWI_SWITCH;
	552
	553	swi_mask = 0;
	554
	555	while (* ptr)
	556	{
	557	int i;
	558
	559	for (i = sizeof options / sizeof options[0]; i--;)
560	if (strncmp (ptr, options[i].swi_option,
561	strlen (options[i].swi_option)) == 0)
562	{
563	swi_mask \|= options[i].swi_mask;
564	ptr += strlen (options[i].swi_option);
565
566	if (* ptr == ',')
567	++ ptr;
568
569	break;
570	}
571
572	if (i < 0)
573	break;
574	}
575
576	if (* ptr != 0)
577	fprintf (stderr, "Ignoring swi options: %s\n", ptr);
578
579	/* Remove this option from the argv array. */
580	for (arg = i; arg < argc; arg ++)
581	argv[arg] = argv[arg + 1];
582	argc --;
583	i --;
584	}
585	return argc;
586	}
587
588	static void
589	sim_target_parse_arg_array (argv)
590	char ** argv;
591	{
592	int i;
593
594	for (i = 0; argv[i]; i++)
595	;
596
597	return (void) sim_target_parse_command_line (i, argv);
598	}
599
600	void
601	sim_target_display_usage ()
602	{
603	fprintf (stderr, "%s=<list> Comma seperated list of SWI protocols to supoport.\n\
604	This list can contain: NONE, DEMON, ANGEL, REDBOOT and/or ALL.\n",
605	SWI_SWITCH);
606	}
607	#endif
608
c906108c SS	609	SIM_DESC
	610	sim_open (kind, ptr, abfd, argv)
	611	SIM_OPEN_KIND kind;
	612	host_callback *ptr;
	613	struct _bfd *abfd;
	614	char **argv;
	615	{
	616	sim_kind = kind;
6c9e0292	617	if (myname) free (myname);
c1a72ffd	618	myname = (char *) xstrdup (argv[0]);
c906108c	619	sim_callback = ptr;
dfcd3bfb	620
de4112fa NC	621	#ifdef SIM_TARGET_SWITCHES
	622	sim_target_parse_arg_array (argv);
	623	#endif
	624
c906108c SS	625	/* Decide upon the endian-ness of the processor.
	626	If we can, get the information from the bfd itself.
	627	Otherwise look to see if we have been given a command
	628	line switch that tells us. Otherwise default to little endian. */
	629	if (abfd != NULL)
	630	big_endian = bfd_big_endian (abfd);
	631	else if (argv[1] != NULL)
	632	{
	633	int i;
dfcd3bfb	634
c906108c SS	635	/* Scan for endian-ness switch. */
c906108c SS	636	for (i = 0; (argv[i] != NULL) && (argv[i][0] != 0); i++)
dfcd3bfb JM	637	if (argv[i][0] == '-' && argv[i][1] == 'E')
	638	{
	639	char c;
	640
	641	if ((c = argv[i][2]) == 0)
	642	{
	643	++i;
	644	c = argv[i][0];
	645	}
	646
	647	switch (c)
	648	{
	649	case 0:
	650	sim_callback->printf_filtered
	651	(sim_callback, "No argument to -E option provided\n");
	652	break;
	653
	654	case 'b':
	655	case 'B':
	656	big_endian = 1;
	657	break;
	658
	659	case 'l':
	660	case 'L':
	661	big_endian = 0;
	662	break;
	663
	664	default:
	665	sim_callback->printf_filtered
	666	(sim_callback, "Unrecognised argument to -E option\n");
	667	break;
	668	}
	669	}
c906108c SS	670	}
	671
	672	return (SIM_DESC) 1;
	673	}
	674
	675	void
	676	sim_close (sd, quitting)
6d358e86 NC	677	SIM_DESC sd ATTRIBUTE_UNUSED;
6d358e86 NC	678	int quitting ATTRIBUTE_UNUSED;
c906108c	679	{
86c735a5 NC	680	if (myname)
86c735a5 NC	681	free (myname);
6c9e0292	682	myname = NULL;
c906108c SS	683	}
	684
	685	SIM_RC
	686	sim_load (sd, prog, abfd, from_tty)
	687	SIM_DESC sd;
	688	char *prog;
	689	bfd *abfd;
6d358e86	690	int from_tty ATTRIBUTE_UNUSED;
c906108c	691	{
c906108c SS	692	bfd *prog_bfd;
	693
	694	prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
dfcd3bfb	695	sim_kind == SIM_OPEN_DEBUG, 0, sim_write);
c906108c SS	696	if (prog_bfd == NULL)
	697	return SIM_RC_FAIL;
	698	ARMul_SetPC (state, bfd_get_start_address (prog_bfd));
	699	if (abfd == NULL)
	700	bfd_close (prog_bfd);
	701	return SIM_RC_OK;
	702	}
	703
	704	void
	705	sim_stop_reason (sd, reason, sigrc)
6d358e86	706	SIM_DESC sd ATTRIBUTE_UNUSED;
c906108c SS	707	enum sim_stop *reason;
	708	int *sigrc;
	709	{
7a292a7a SS	710	if (stop_simulator)
	711	{
	712	*reason = sim_stopped;
	713	*sigrc = SIGINT;
	714	}
	715	else if (state->EndCondition == 0)
c906108c SS	716	{
	717	*reason = sim_exited;
	718	*sigrc = state->Reg[0] & 255;
	719	}
	720	else
	721	{
	722	*reason = sim_stopped;
	723	if (state->EndCondition == RDIError_BreakpointReached)
	724	*sigrc = SIGTRAP;
	725	else
	726	*sigrc = 0;
	727	}
	728	}
	729
	730	void
	731	sim_do_command (sd, cmd)
6d358e86 NC	732	SIM_DESC sd ATTRIBUTE_UNUSED;
6d358e86 NC	733	char *cmd ATTRIBUTE_UNUSED;
dfcd3bfb	734	{
86c735a5 NC	735	(*sim_callback->printf_filtered)
	736	(sim_callback,
	737	"This simulator does not accept any commands.\n");
c906108c SS	738	}
c906108c SS	739
c906108c SS	740	void
	741	sim_set_callbacks (ptr)
	742	host_callback *ptr;
	743	{
	744	sim_callback = ptr;
	745	}