[thirdparty/binutils-gdb.git] / sim / bpf / defs-le.h

/* ISA definitions header for ebpfle.

THIS FILE IS MACHINE GENERATED WITH CGEN.

Copyright (C) 1996-2021 Free Software Foundation, Inc.

This file is part of the GNU simulators.

   This file is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License along
   with this program; if not, write to the Free Software Foundation, Inc.,
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.

*/

#ifndef DEFS_BPFBF_EBPFLE_H
#define DEFS_BPFBF_EBPFLE_H

/* Instruction argument buffer.  */

union sem_fields {
  struct { /* no operands */
    int empty;
  } sfmt_empty;
  struct { /*  */
    INT f_imm32;
    UINT f_srcle;
  } sfmt_ldindwle;
  struct { /*  */
    DI f_imm64;
    UINT f_dstle;
  } sfmt_lddwle;
  struct { /*  */
    INT f_imm32;
    UINT f_dstle;
    HI f_offset16;
  } sfmt_stble;
  struct { /*  */
    UINT f_dstle;
    UINT f_srcle;
    HI f_offset16;
  } sfmt_ldxwle;
#if WITH_SCACHE_PBB
  /* Writeback handler.  */
  struct {
    /* Pointer to argbuf entry for insn whose results need writing back.  */
    const struct argbuf *abuf;
  } write;
  /* x-before handler */
  struct {
    /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
    int first_p;
  } before;
  /* x-after handler */
  struct {
    int empty;
  } after;
  /* This entry is used to terminate each pbb.  */
  struct {
    /* Number of insns in pbb.  */
    int insn_count;
    /* Next pbb to execute.  */
    SCACHE *next;
    SCACHE *branch_target;
  } chain;
#endif
};

/* The ARGBUF struct.  */
struct argbuf {
  /* These are the baseclass definitions.  */
  IADDR addr;
  const IDESC *idesc;
  char trace_p;
  char profile_p;
  /* ??? Temporary hack for skip insns.  */
  char skip_count;
  char unused;
  /* cpu specific data follows */
  union sem semantic;
  int written;
  union sem_fields fields;
};

/* A cached insn.

   ??? SCACHE used to contain more than just argbuf.  We could delete the
   type entirely and always just use ARGBUF, but for future concerns and as
   a level of abstraction it is left in.  */

struct scache {
  struct argbuf argbuf;
};

/* Macros to simplify extraction, reading and semantic code.
   These define and assign the local vars that contain the insn's fields.  */

#define EXTRACT_IFMT_EMPTY_VARS \
  unsigned int length;
#define EXTRACT_IFMT_EMPTY_CODE \
  length = 0; \

#define EXTRACT_IFMT_ADDILE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_code; \
  UINT f_dstle; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_ADDILE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_ADDRLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_code; \
  UINT f_dstle; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_ADDRLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_NEGLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_code; \
  UINT f_dstle; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_NEGLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_ENDLELE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_code; \
  UINT f_dstle; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_ENDLELE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_LDDWLE_VARS \
  UINT f_imm64_a; \
  UINT f_imm64_b; \
  UINT f_imm64_c; \
  DI f_imm64; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_mode; \
  UINT f_op_size; \
  UINT f_dstle; \
  UINT f_op_class; \
  /* Contents of trailing part of insn.  */ \
  UINT word_1; \
  UINT word_2; \
  unsigned int length;
#define EXTRACT_IFMT_LDDWLE_CODE \
  length = 16; \
  word_1 = GETIMEMUSI (current_cpu, pc + 8); \
  word_2 = GETIMEMUSI (current_cpu, pc + 12); \
  f_imm64_a = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_imm64_b = (0|(EXTRACT_LSB0_UINT (word_1, 32, 31, 32) << 0)); \
  f_imm64_c = (0|(EXTRACT_LSB0_UINT (word_2, 32, 31, 32) << 0)); \
{\
  f_imm64 = ((((((UDI) (UINT) (f_imm64_c))) << (32))) | (((UDI) (UINT) (f_imm64_a))));\
}\
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
  f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_LDABSW_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_regs; \
  UINT f_op_mode; \
  UINT f_op_size; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_LDABSW_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
  f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
  f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_LDINDWLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_mode; \
  UINT f_op_size; \
  UINT f_dstle; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_LDINDWLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
  f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_LDXWLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_mode; \
  UINT f_op_size; \
  UINT f_dstle; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_LDXWLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
  f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_STBLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_mode; \
  UINT f_op_size; \
  UINT f_dstle; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_STBLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
  f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_JEQILE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_code; \
  UINT f_dstle; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_JEQILE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_JEQRLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_srcle; \
  UINT f_op_code; \
  UINT f_dstle; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_JEQRLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_CALLLE_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_regs; \
  UINT f_op_code; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_CALLLE_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_JA_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_regs; \
  UINT f_op_code; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_JA_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#define EXTRACT_IFMT_EXIT_VARS \
  INT f_imm32; \
  HI f_offset16; \
  UINT f_regs; \
  UINT f_op_code; \
  UINT f_op_src; \
  UINT f_op_class; \
  unsigned int length;
#define EXTRACT_IFMT_EXIT_CODE \
  length = 8; \
  f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
  f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
  f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
  f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
  f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
  f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \

#endif /* DEFS_BPFBF_EBPFLE_H */
Commit	Line	Data
8c4c1818 JM	1	/* ISA definitions header for ebpfle.
	2
	3	THIS FILE IS MACHINE GENERATED WITH CGEN.
	4
3666a048	5	Copyright (C) 1996-2021 Free Software Foundation, Inc.
8c4c1818 JM	6
	7	This file is part of the GNU simulators.
	8
	9	This file is free software; you can redistribute it and/or modify
	10	it under the terms of the GNU General Public License as published by
	11	the Free Software Foundation; either version 3, or (at your option)
	12	any later version.
	13
	14	It is distributed in the hope that it will be useful, but WITHOUT
	15	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	16	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	17	License for more details.
	18
	19	You should have received a copy of the GNU General Public License along
	20	with this program; if not, write to the Free Software Foundation, Inc.,
	21	51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
	22
	23	*/
	24
	25	#ifndef DEFS_BPFBF_EBPFLE_H
	26	#define DEFS_BPFBF_EBPFLE_H
	27
	28	/* Instruction argument buffer. */
	29
	30	union sem_fields {
	31	struct { /* no operands */
	32	int empty;
	33	} sfmt_empty;
	34	struct { /* */
	35	INT f_imm32;
	36	UINT f_srcle;
	37	} sfmt_ldindwle;
	38	struct { /* */
	39	DI f_imm64;
	40	UINT f_dstle;
	41	} sfmt_lddwle;
	42	struct { /* */
	43	INT f_imm32;
	44	UINT f_dstle;
	45	HI f_offset16;
	46	} sfmt_stble;
	47	struct { /* */
	48	UINT f_dstle;
	49	UINT f_srcle;
	50	HI f_offset16;
	51	} sfmt_ldxwle;
	52	#if WITH_SCACHE_PBB
	53	/* Writeback handler. */
	54	struct {
	55	/* Pointer to argbuf entry for insn whose results need writing back. */
	56	const struct argbuf *abuf;
	57	} write;
	58	/* x-before handler */
	59	struct {
	60	/const SCACHE insns[MAX_PARALLEL_INSNS];*/
	61	int first_p;
	62	} before;
	63	/* x-after handler */
	64	struct {
	65	int empty;
	66	} after;
	67	/* This entry is used to terminate each pbb. */
	68	struct {
	69	/* Number of insns in pbb. */
70	int insn_count;
71	/* Next pbb to execute. */
72	SCACHE *next;
73	SCACHE *branch_target;
74	} chain;
75	#endif
76	};
77
78	/* The ARGBUF struct. */
79	struct argbuf {
80	/* These are the baseclass definitions. */
81	IADDR addr;
82	const IDESC *idesc;
83	char trace_p;
84	char profile_p;
85	/* ??? Temporary hack for skip insns. */
86	char skip_count;
87	char unused;
88	/* cpu specific data follows */
89	union sem semantic;
90	int written;
91	union sem_fields fields;
92	};
93
94	/* A cached insn.
95
96	??? SCACHE used to contain more than just argbuf. We could delete the
97	type entirely and always just use ARGBUF, but for future concerns and as
98	a level of abstraction it is left in. */
99
100	struct scache {
101	struct argbuf argbuf;
102	};
103
104	/* Macros to simplify extraction, reading and semantic code.
105	These define and assign the local vars that contain the insn's fields. */
106
107	#define EXTRACT_IFMT_EMPTY_VARS \
108	unsigned int length;
109	#define EXTRACT_IFMT_EMPTY_CODE \
110	length = 0; \
111
112	#define EXTRACT_IFMT_ADDILE_VARS \
113	INT f_imm32; \
114	HI f_offset16; \
115	UINT f_srcle; \
116	UINT f_op_code; \
117	UINT f_dstle; \
118	UINT f_op_src; \
119	UINT f_op_class; \
120	unsigned int length;
121	#define EXTRACT_IFMT_ADDILE_CODE \
122	length = 8; \
123	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
124	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
125	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
126	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
127	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
128	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
129	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
130
131	#define EXTRACT_IFMT_ADDRLE_VARS \
132	INT f_imm32; \
133	HI f_offset16; \
134	UINT f_srcle; \
135	UINT f_op_code; \
136	UINT f_dstle; \
137	UINT f_op_src; \
138	UINT f_op_class; \
139	unsigned int length;
140	#define EXTRACT_IFMT_ADDRLE_CODE \
141	length = 8; \
142	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
143	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
144	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
145	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
146	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
147	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
148	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
149
150	#define EXTRACT_IFMT_NEGLE_VARS \
151	INT f_imm32; \
152	HI f_offset16; \
153	UINT f_srcle; \
154	UINT f_op_code; \
155	UINT f_dstle; \
156	UINT f_op_src; \
157	UINT f_op_class; \
158	unsigned int length;
159	#define EXTRACT_IFMT_NEGLE_CODE \
160	length = 8; \
161	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
162	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
163	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
164	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
165	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
166	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
167	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
168
169	#define EXTRACT_IFMT_ENDLELE_VARS \
170	INT f_imm32; \
171	HI f_offset16; \
172	UINT f_srcle; \
173	UINT f_op_code; \
174	UINT f_dstle; \
175	UINT f_op_src; \
176	UINT f_op_class; \
177	unsigned int length;
178	#define EXTRACT_IFMT_ENDLELE_CODE \
179	length = 8; \
180	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
181	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
182	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
183	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
184	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
185	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
186	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
187
188	#define EXTRACT_IFMT_LDDWLE_VARS \
189	UINT f_imm64_a; \
190	UINT f_imm64_b; \
191	UINT f_imm64_c; \
192	DI f_imm64; \
193	HI f_offset16; \
194	UINT f_srcle; \
195	UINT f_op_mode; \
196	UINT f_op_size; \
197	UINT f_dstle; \
198	UINT f_op_class; \
199	/* Contents of trailing part of insn. */ \
200	UINT word_1; \
201	UINT word_2; \
202	unsigned int length;
203	#define EXTRACT_IFMT_LDDWLE_CODE \
204	length = 16; \
205	word_1 = GETIMEMUSI (current_cpu, pc + 8); \
206	word_2 = GETIMEMUSI (current_cpu, pc + 12); \
207	f_imm64_a = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
208	f_imm64_b = (0\|(EXTRACT_LSB0_UINT (word_1, 32, 31, 32) << 0)); \
209	f_imm64_c = (0\|(EXTRACT_LSB0_UINT (word_2, 32, 31, 32) << 0)); \
210	{\
211	f_imm64 = ((((((UDI) (UINT) (f_imm64_c))) << (32))) \| (((UDI) (UINT) (f_imm64_a))));\
212	}\
213	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
214	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
215	f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
216	f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
217	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
218	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
219
220	#define EXTRACT_IFMT_LDABSW_VARS \
221	INT f_imm32; \
222	HI f_offset16; \
223	UINT f_regs; \
224	UINT f_op_mode; \
225	UINT f_op_size; \
226	UINT f_op_class; \
227	unsigned int length;
228	#define EXTRACT_IFMT_LDABSW_CODE \
229	length = 8; \
230	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
231	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
232	f_regs = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
233	f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
234	f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
235	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
236
237	#define EXTRACT_IFMT_LDINDWLE_VARS \
238	INT f_imm32; \
239	HI f_offset16; \
240	UINT f_srcle; \
241	UINT f_op_mode; \
242	UINT f_op_size; \
243	UINT f_dstle; \
244	UINT f_op_class; \
245	unsigned int length;
246	#define EXTRACT_IFMT_LDINDWLE_CODE \
247	length = 8; \
248	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
249	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
250	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
251	f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
252	f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
253	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
254	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
255
256	#define EXTRACT_IFMT_LDXWLE_VARS \
257	INT f_imm32; \
258	HI f_offset16; \
259	UINT f_srcle; \
260	UINT f_op_mode; \
261	UINT f_op_size; \
262	UINT f_dstle; \
263	UINT f_op_class; \
264	unsigned int length;
265	#define EXTRACT_IFMT_LDXWLE_CODE \
266	length = 8; \
267	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
268	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
269	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
270	f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
271	f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
272	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
273	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
274
275	#define EXTRACT_IFMT_STBLE_VARS \
276	INT f_imm32; \
277	HI f_offset16; \
278	UINT f_srcle; \
279	UINT f_op_mode; \
280	UINT f_op_size; \
281	UINT f_dstle; \
282	UINT f_op_class; \
283	unsigned int length;
284	#define EXTRACT_IFMT_STBLE_CODE \
285	length = 8; \
286	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
287	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
288	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
289	f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
290	f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
291	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
292	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
293
294	#define EXTRACT_IFMT_JEQILE_VARS \
295	INT f_imm32; \
296	HI f_offset16; \
297	UINT f_srcle; \
298	UINT f_op_code; \
299	UINT f_dstle; \
300	UINT f_op_src; \
301	UINT f_op_class; \
302	unsigned int length;
303	#define EXTRACT_IFMT_JEQILE_CODE \
304	length = 8; \
305	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
306	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
307	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
308	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
309	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
310	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
311	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
312
313	#define EXTRACT_IFMT_JEQRLE_VARS \
314	INT f_imm32; \
315	HI f_offset16; \
316	UINT f_srcle; \
317	UINT f_op_code; \
318	UINT f_dstle; \
319	UINT f_op_src; \
320	UINT f_op_class; \
321	unsigned int length;
322	#define EXTRACT_IFMT_JEQRLE_CODE \
323	length = 8; \
324	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
325	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
326	f_srcle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
327	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
328	f_dstle = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
329	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
330	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
331
332	#define EXTRACT_IFMT_CALLLE_VARS \
333	INT f_imm32; \
334	HI f_offset16; \
335	UINT f_regs; \
336	UINT f_op_code; \
337	UINT f_op_src; \
338	UINT f_op_class; \
339	unsigned int length;
340	#define EXTRACT_IFMT_CALLLE_CODE \
341	length = 8; \
342	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
343	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
344	f_regs = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
345	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
346	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
347	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
348
349	#define EXTRACT_IFMT_JA_VARS \
350	INT f_imm32; \
351	HI f_offset16; \
352	UINT f_regs; \
353	UINT f_op_code; \
354	UINT f_op_src; \
355	UINT f_op_class; \
356	unsigned int length;
357	#define EXTRACT_IFMT_JA_CODE \
358	length = 8; \
359	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
360	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
361	f_regs = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
362	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
363	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
364	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
365
366	#define EXTRACT_IFMT_EXIT_VARS \
367	INT f_imm32; \
368	HI f_offset16; \
369	UINT f_regs; \
370	UINT f_op_code; \
371	UINT f_op_src; \
372	UINT f_op_class; \
373	unsigned int length;
374	#define EXTRACT_IFMT_EXIT_CODE \
375	length = 8; \
376	f_imm32 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
377	f_offset16 = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
378	f_regs = (0\|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
379	f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
380	f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
381	f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
382
383	#endif /* DEFS_BPFBF_EBPFLE_H */