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1# Makefile template for Configure for the CRIS simulator, based on a mix
2# of the ones for m32r and i960.
3#
213516ef 4# Copyright (C) 2004-2023 Free Software Foundation, Inc.
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5# Contributed by Axis Communications.
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
4744ac1b 9# the Free Software Foundation; either version 3 of the License, or
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10# (at your option) any later version.
11#
12# This program is distributed in the hope that it will be useful,
13# but WITHOUT ANY WARRANTY; without even the implied warranty of
14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15# GNU General Public License for more details.
16#
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17# You should have received a copy of the GNU General Public License
18# along with this program. If not, see <http://www.gnu.org/licenses/>.
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19
20## COMMON_PRE_CONFIG_FRAG
21
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22arch = cris
23
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24CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
25CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
f6bcefef 26
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27SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
f6bcefef 29 cgen-utils.o cgen-trace.o cgen-scache.o \
797eee42 30 cgen-run.o \
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31 sim-if.o arch.o \
32 $(CRISV10F_OBJS) \
33 $(CRISV32F_OBJS) \
54711280 34 traps.o
f6bcefef 35
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36SIM_EXTRA_CLEAN = cris-clean
37
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38## COMMON_POST_CONFIG_FRAG
39
f6bcefef 40cris-clean:
54711280 41 -rm -f stamp-arch
cb9bdc02 42 -rm -f tmp-*
f6bcefef 43
f6bcefef 44# Useful when making CGEN-generated files manually, without --enable-cgen-maint.
0a129eb1 45stamps: stamp-arch stamp-v10fcpu stamp-v32fcpu
f6bcefef 46
23ebf378 47stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
f6bcefef 48 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
23ebf378 49 archfile=$(CPU_DIR)/cris.cpu \
f6bcefef 50 FLAGS="with-scache with-profile=fn"
b6143d31 51 $(SILENCE) touch $@
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52arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
53
cce0efb5 54# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
23ebf378 55stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
f6bcefef 56 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
23ebf378 57 archfile=$(CPU_DIR)/cris.cpu \
f6bcefef 58 cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
4f2b181e 59 $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
b6143d31 60 $(SILENCE) touch $@
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61cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
62
23ebf378 63stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
f6bcefef 64 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
23ebf378 65 archfile=$(CPU_DIR)/cris.cpu \
f6bcefef 66 cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
4f2b181e 67 $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
b6143d31 68 $(SILENCE) touch $@
f6bcefef 69cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu