]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - sim/cris/Makefile.in
sim: move -Werror disabling to Makefile
[thirdparty/binutils-gdb.git] / sim / cris / Makefile.in
CommitLineData
f6bcefef
HPN
1# Makefile template for Configure for the CRIS simulator, based on a mix
2# of the ones for m32r and i960.
3#
3666a048 4# Copyright (C) 2004-2021 Free Software Foundation, Inc.
f6bcefef
HPN
5# Contributed by Axis Communications.
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
4744ac1b 9# the Free Software Foundation; either version 3 of the License, or
f6bcefef
HPN
10# (at your option) any later version.
11#
12# This program is distributed in the hope that it will be useful,
13# but WITHOUT ANY WARRANTY; without even the implied warranty of
14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15# GNU General Public License for more details.
16#
4744ac1b
JB
17# You should have received a copy of the GNU General Public License
18# along with this program. If not, see <http://www.gnu.org/licenses/>.
f6bcefef
HPN
19
20## COMMON_PRE_CONFIG_FRAG
21
530d5813
HPN
22CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
23CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
f6bcefef 24
f6bcefef
HPN
25SIM_OBJS = \
26 $(SIM_NEW_COMMON_OBJS) \
f6bcefef 27 cgen-utils.o cgen-trace.o cgen-scache.o \
797eee42 28 cgen-run.o \
f6bcefef
HPN
29 sim-if.o arch.o \
30 $(CRISV10F_OBJS) \
31 $(CRISV32F_OBJS) \
54711280 32 traps.o
f6bcefef
HPN
33
34# Extra headers included by sim-main.h.
35# FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
36SIM_EXTRA_DEPS = \
37 $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
54711280 38 arch.h cpuall.h cris-sim.h engv10.h engv32.h
f6bcefef 39
f6bcefef
HPN
40SIM_EXTRA_CLEAN = cris-clean
41
982c3a65
MF
42# Code doesn't build cleanly yet.
43SIM_WERROR_CFLAGS =
44
f6bcefef
HPN
45## COMMON_POST_CONFIG_FRAG
46
f6bcefef
HPN
47arch = cris
48
aad3b3cb
HPN
49# rvdummy is just used for testing. It does nothing if
50# --enable-sim-hardware isn't active.
51
52all: rvdummy$(EXEEXT)
53
54check: rvdummy$(EXEEXT)
55
56rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
57 $(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
58
52d37d2c 59rvdummy.o: rvdummy.c $(remote_sim_h) $(callback_h)
aad3b3cb 60
f6bcefef
HPN
61# CRISV10 objs
62
63CRISV10F_INCLUDE_DEPS = \
64 $(CGEN_MAIN_CPU_DEPS) \
65 cpuv10.h decodev10.h engv10.h
66
f6bcefef
HPN
67# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
68# than the apparent; some "mono" feature is work in progress)?
69mloopv10f.c engv10.h: stamp-v10fmloop
70stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
086c6838 71 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
f6bcefef
HPN
72 -mono -no-fast -pbb -switch semcrisv10f-switch.c \
73 -cpu crisv10f -infile $(srcdir)/mloop.in
74 $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
75 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
76 touch stamp-v10fmloop
f6bcefef
HPN
77
78# CRISV32 objs
79
80CRISV32F_INCLUDE_DEPS = \
81 $(CGEN_MAIN_CPU_DEPS) \
82 cpuv32.h decodev32.h engv32.h
83
f6bcefef
HPN
84# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
85# than the apparent; some "mono" feature is work in progress)?
86mloopv32f.c engv32.h: stamp-v32fmloop
c3182514
HPN
87# We depend on stamp-v10fmloop to get serialization to avoid
88# racing with it for the same temporary file-names when "make -j".
89stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile
086c6838 90 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
f6bcefef
HPN
91 -mono -no-fast -pbb -switch semcrisv32f-switch.c \
92 -cpu crisv32f -infile $(srcdir)/mloop.in
93 $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
94 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
95 touch stamp-v32fmloop
f6bcefef
HPN
96
97cris-clean:
98 for v in 10 32; do \
99 rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \
100 rm -f stamp-v$${v}fcpu; \
101 done
54711280 102 -rm -f stamp-arch
f6bcefef
HPN
103 -rm -f tmp-*
104
105# cgen support, enable with --enable-cgen-maint
106CGEN_MAINT = ; @true
107# The following line is commented in or out depending upon --enable-cgen-maint.
108@CGEN_MAINT@CGEN_MAINT =
109
110# Useful when making CGEN-generated files manually, without --enable-cgen-maint.
54711280 111stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu
f6bcefef 112
23ebf378 113stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
f6bcefef 114 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
23ebf378 115 archfile=$(CPU_DIR)/cris.cpu \
f6bcefef
HPN
116 FLAGS="with-scache with-profile=fn"
117 touch stamp-arch
118arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
119
cce0efb5 120# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
23ebf378 121stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
f6bcefef 122 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
23ebf378 123 archfile=$(CPU_DIR)/cris.cpu \
f6bcefef
HPN
124 cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
125 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
cce0efb5
HPN
126 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
127 mv decodev10.c.tmp $(srcdir)/decodev10.c
f6bcefef
HPN
128 touch stamp-v10fcpu
129cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
130
23ebf378 131stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
f6bcefef 132 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
23ebf378 133 archfile=$(CPU_DIR)/cris.cpu \
f6bcefef
HPN
134 cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
135 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
cce0efb5
HPN
136 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
137 mv decodev32.c.tmp $(srcdir)/decodev32.c
f6bcefef
HPN
138 touch stamp-v32fcpu
139cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu