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1/* Misc. support for CPU family crisv10f.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
8acc9f48 5Copyright 1996-2013 Free Software Foundation, Inc.
f6bcefef
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6
7This file is part of the GNU simulators.
8
c9b3544a
HPN
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
f6bcefef 13
c9b3544a
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14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
f6bcefef 18
c9b3544a 19 You should have received a copy of the GNU General Public License along
51b318de 20 with this program; if not, see <http://www.gnu.org/licenses/>.
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HPN
21
22*/
23
24#define WANT_CPU crisv10f
25#define WANT_CPU_CRISV10F
26
27#include "sim-main.h"
28#include "cgen-ops.h"
29
30/* Get the value of h-v32-non-v32. */
31
32BI
33crisv10f_h_v32_non_v32_get (SIM_CPU *current_cpu)
34{
35 return GET_H_V32_NON_V32 ();
36}
37
38/* Set a value for h-v32-non-v32. */
39
40void
41crisv10f_h_v32_non_v32_set (SIM_CPU *current_cpu, BI newval)
42{
43 SET_H_V32_NON_V32 (newval);
44}
45
46/* Get the value of h-pc. */
47
48USI
49crisv10f_h_pc_get (SIM_CPU *current_cpu)
50{
51 return CPU (h_pc);
52}
53
54/* Set a value for h-pc. */
55
56void
57crisv10f_h_pc_set (SIM_CPU *current_cpu, USI newval)
58{
59 SET_H_PC (newval);
60}
61
62/* Get the value of h-gr. */
63
64SI
65crisv10f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
66{
67 return GET_H_GR (regno);
68}
69
70/* Set a value for h-gr. */
71
72void
73crisv10f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
74{
75 SET_H_GR (regno, newval);
76}
77
78/* Get the value of h-gr-pc. */
79
80SI
81crisv10f_h_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
82{
83 return GET_H_GR_PC (regno);
84}
85
86/* Set a value for h-gr-pc. */
87
88void
89crisv10f_h_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
90{
91 SET_H_GR_PC (regno, newval);
92}
93
94/* Get the value of h-gr-real-pc. */
95
96SI
97crisv10f_h_gr_real_pc_get (SIM_CPU *current_cpu, UINT regno)
98{
99 return CPU (h_gr_real_pc[regno]);
100}
101
102/* Set a value for h-gr-real-pc. */
103
104void
105crisv10f_h_gr_real_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
106{
107 CPU (h_gr_real_pc[regno]) = newval;
108}
109
110/* Get the value of h-raw-gr-pc. */
111
112SI
113crisv10f_h_raw_gr_pc_get (SIM_CPU *current_cpu, UINT regno)
114{
115 return GET_H_RAW_GR_PC (regno);
116}
117
118/* Set a value for h-raw-gr-pc. */
119
120void
121crisv10f_h_raw_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
122{
123 SET_H_RAW_GR_PC (regno, newval);
124}
125
126/* Get the value of h-sr. */
127
128SI
129crisv10f_h_sr_get (SIM_CPU *current_cpu, UINT regno)
130{
131 return GET_H_SR (regno);
132}
133
134/* Set a value for h-sr. */
135
136void
137crisv10f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
138{
139 SET_H_SR (regno, newval);
140}
141
142/* Get the value of h-sr-v10. */
143
144SI
145crisv10f_h_sr_v10_get (SIM_CPU *current_cpu, UINT regno)
146{
147 return GET_H_SR_V10 (regno);
148}
149
150/* Set a value for h-sr-v10. */
151
152void
153crisv10f_h_sr_v10_set (SIM_CPU *current_cpu, UINT regno, SI newval)
154{
155 SET_H_SR_V10 (regno, newval);
156}
157
158/* Get the value of h-cbit. */
159
160BI
161crisv10f_h_cbit_get (SIM_CPU *current_cpu)
162{
163 return CPU (h_cbit);
164}
165
166/* Set a value for h-cbit. */
167
168void
169crisv10f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
170{
171 CPU (h_cbit) = newval;
172}
173
174/* Get the value of h-cbit-move. */
175
176BI
177crisv10f_h_cbit_move_get (SIM_CPU *current_cpu)
178{
179 return GET_H_CBIT_MOVE ();
180}
181
182/* Set a value for h-cbit-move. */
183
184void
185crisv10f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
186{
187 SET_H_CBIT_MOVE (newval);
188}
189
190/* Get the value of h-cbit-move-pre-v32. */
191
192BI
193crisv10f_h_cbit_move_pre_v32_get (SIM_CPU *current_cpu)
194{
195 return GET_H_CBIT_MOVE_PRE_V32 ();
196}
197
198/* Set a value for h-cbit-move-pre-v32. */
199
200void
201crisv10f_h_cbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
202{
203 SET_H_CBIT_MOVE_PRE_V32 (newval);
204}
205
206/* Get the value of h-vbit. */
207
208BI
209crisv10f_h_vbit_get (SIM_CPU *current_cpu)
210{
211 return CPU (h_vbit);
212}
213
214/* Set a value for h-vbit. */
215
216void
217crisv10f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
218{
219 CPU (h_vbit) = newval;
220}
221
222/* Get the value of h-vbit-move. */
223
224BI
225crisv10f_h_vbit_move_get (SIM_CPU *current_cpu)
226{
227 return GET_H_VBIT_MOVE ();
228}
229
230/* Set a value for h-vbit-move. */
231
232void
233crisv10f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
234{
235 SET_H_VBIT_MOVE (newval);
236}
237
238/* Get the value of h-vbit-move-pre-v32. */
239
240BI
241crisv10f_h_vbit_move_pre_v32_get (SIM_CPU *current_cpu)
242{
243 return GET_H_VBIT_MOVE_PRE_V32 ();
244}
245
246/* Set a value for h-vbit-move-pre-v32. */
247
248void
249crisv10f_h_vbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
250{
251 SET_H_VBIT_MOVE_PRE_V32 (newval);
252}
253
254/* Get the value of h-zbit. */
255
256BI
257crisv10f_h_zbit_get (SIM_CPU *current_cpu)
258{
259 return CPU (h_zbit);
260}
261
262/* Set a value for h-zbit. */
263
264void
265crisv10f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
266{
267 CPU (h_zbit) = newval;
268}
269
270/* Get the value of h-zbit-move. */
271
272BI
273crisv10f_h_zbit_move_get (SIM_CPU *current_cpu)
274{
275 return GET_H_ZBIT_MOVE ();
276}
277
278/* Set a value for h-zbit-move. */
279
280void
281crisv10f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
282{
283 SET_H_ZBIT_MOVE (newval);
284}
285
286/* Get the value of h-zbit-move-pre-v32. */
287
288BI
289crisv10f_h_zbit_move_pre_v32_get (SIM_CPU *current_cpu)
290{
291 return GET_H_ZBIT_MOVE_PRE_V32 ();
292}
293
294/* Set a value for h-zbit-move-pre-v32. */
295
296void
297crisv10f_h_zbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
298{
299 SET_H_ZBIT_MOVE_PRE_V32 (newval);
300}
301
302/* Get the value of h-nbit. */
303
304BI
305crisv10f_h_nbit_get (SIM_CPU *current_cpu)
306{
307 return CPU (h_nbit);
308}
309
310/* Set a value for h-nbit. */
311
312void
313crisv10f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
314{
315 CPU (h_nbit) = newval;
316}
317
318/* Get the value of h-nbit-move. */
319
320BI
321crisv10f_h_nbit_move_get (SIM_CPU *current_cpu)
322{
323 return GET_H_NBIT_MOVE ();
324}
325
326/* Set a value for h-nbit-move. */
327
328void
329crisv10f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
330{
331 SET_H_NBIT_MOVE (newval);
332}
333
334/* Get the value of h-nbit-move-pre-v32. */
335
336BI
337crisv10f_h_nbit_move_pre_v32_get (SIM_CPU *current_cpu)
338{
339 return GET_H_NBIT_MOVE_PRE_V32 ();
340}
341
342/* Set a value for h-nbit-move-pre-v32. */
343
344void
345crisv10f_h_nbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
346{
347 SET_H_NBIT_MOVE_PRE_V32 (newval);
348}
349
350/* Get the value of h-xbit. */
351
352BI
353crisv10f_h_xbit_get (SIM_CPU *current_cpu)
354{
355 return CPU (h_xbit);
356}
357
358/* Set a value for h-xbit. */
359
360void
361crisv10f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
362{
363 CPU (h_xbit) = newval;
364}
365
366/* Get the value of h-ibit. */
367
368BI
369crisv10f_h_ibit_get (SIM_CPU *current_cpu)
370{
371 return GET_H_IBIT ();
372}
373
374/* Set a value for h-ibit. */
375
376void
377crisv10f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
378{
379 SET_H_IBIT (newval);
380}
381
382/* Get the value of h-ibit-pre-v32. */
383
384BI
385crisv10f_h_ibit_pre_v32_get (SIM_CPU *current_cpu)
386{
387 return CPU (h_ibit_pre_v32);
388}
389
390/* Set a value for h-ibit-pre-v32. */
391
392void
393crisv10f_h_ibit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
394{
395 CPU (h_ibit_pre_v32) = newval;
396}
397
398/* Get the value of h-pbit. */
399
400BI
401crisv10f_h_pbit_get (SIM_CPU *current_cpu)
402{
403 return CPU (h_pbit);
404}
405
406/* Set a value for h-pbit. */
407
408void
409crisv10f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
410{
411 CPU (h_pbit) = newval;
412}
413
414/* Get the value of h-ubit. */
415
416BI
417crisv10f_h_ubit_get (SIM_CPU *current_cpu)
418{
419 return GET_H_UBIT ();
420}
421
422/* Set a value for h-ubit. */
423
424void
425crisv10f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
426{
427 SET_H_UBIT (newval);
428}
429
430/* Get the value of h-ubit-pre-v32. */
431
432BI
433crisv10f_h_ubit_pre_v32_get (SIM_CPU *current_cpu)
434{
435 return CPU (h_ubit_pre_v32);
436}
437
438/* Set a value for h-ubit-pre-v32. */
439
440void
441crisv10f_h_ubit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
442{
443 CPU (h_ubit_pre_v32) = newval;
444}
445
446/* Get the value of h-insn-prefixed-p. */
447
448BI
449crisv10f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)
450{
451 return GET_H_INSN_PREFIXED_P ();
452}
453
454/* Set a value for h-insn-prefixed-p. */
455
456void
457crisv10f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
458{
459 SET_H_INSN_PREFIXED_P (newval);
460}
461
462/* Get the value of h-insn-prefixed-p-pre-v32. */
463
464BI
465crisv10f_h_insn_prefixed_p_pre_v32_get (SIM_CPU *current_cpu)
466{
467 return CPU (h_insn_prefixed_p_pre_v32);
468}
469
470/* Set a value for h-insn-prefixed-p-pre-v32. */
471
472void
473crisv10f_h_insn_prefixed_p_pre_v32_set (SIM_CPU *current_cpu, BI newval)
474{
475 CPU (h_insn_prefixed_p_pre_v32) = newval;
476}
477
478/* Get the value of h-prefixreg-pre-v32. */
479
480SI
481crisv10f_h_prefixreg_pre_v32_get (SIM_CPU *current_cpu)
482{
483 return CPU (h_prefixreg_pre_v32);
484}
485
486/* Set a value for h-prefixreg-pre-v32. */
487
488void
489crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)
490{
491 CPU (h_prefixreg_pre_v32) = newval;
492}
493
494/* Record trace results for INSN. */
495
496void
497crisv10f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
498 int *indices, TRACE_RECORD *tr)
499{
500}