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Commit | Line | Data |
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df59058c JM |
1 | 1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com) |
2 | ||
3 | * simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation | |
4 | comparison. | |
5 | (OP_5607): Ditto. | |
6 | (OP_2A00): Ditto. | |
7 | (OP_2800): Ditto. | |
8 | ||
9 | 1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com) | |
10 | ||
11 | * simops.c (OP_1223): Sign extend MIN32 and MAX32 before saturation | |
12 | comparison. | |
13 | ||
14 | Tue Nov 24 17:04:43 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
15 | ||
16 | * simops.c (sys/syscall.h): Include targ-vals.h instead. | |
17 | (SYS_*): Replace with TARGET_SYS_*. | |
18 | ||
19 | * Makefile.in: Add dependency on targ-vals.h. | |
20 | (NL_TARGET): Define as NL_TARGET_d10v. | |
21 | ||
22 | Wed Sep 30 00:06:32 1998 Andrew Cagney <cagney@amy.cygnus.com> | |
23 | ||
24 | * interp.c (xfer_mem): Missing break, instruction memory case | |
25 | flowed into unified memory case. | |
26 | ||
1ee490ca NC |
27 | Wed Sep 30 10:14:18 1998 Nick Clifton <nickc@cygnus.com> |
28 | ||
29 | * simops.c: If load instruction with auto increment/decrement | |
30 | addressing is used when the destination register is the same as | |
31 | the address register, then ignore the auto increment/decrement. | |
32 | ||
33 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
34 | ||
35 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
36 | ||
5da9ce07 TT |
37 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> |
38 | ||
39 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
40 | * config.in: Ditto. | |
41 | ||
42 | Sun Apr 26 15:20:23 1998 Tom Tromey <tromey@cygnus.com> | |
43 | ||
44 | * acconfig.h: New file. | |
45 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
46 | ||
b1df34b9 TT |
47 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> |
48 | ||
49 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
50 | * config.in: Ditto. | |
51 | ||
52 | Fri Apr 24 11:20:06 1998 Tom Tromey <tromey@cygnus.com> | |
53 | ||
54 | * configure.in: Don't call sinclude. | |
55 | ||
21566f9f AC |
56 | Fri Apr 24 11:04:46 1998 Andrew Cagney <cagney@chook.cygnus.com> |
57 | ||
58 | * interp.c (struct hash_entry): OPCODE and MASK are unsigned. | |
59 | ||
60 | * d10v_sim.h (remote-sim.h, sim-config.h): Include. | |
61 | ||
62 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
63 | ||
64 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
65 | ||
66 | Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
67 | ||
68 | * simops.c (trace_input_func): Use move_from_cr / CREGS to obtain | |
69 | up-to-date CR value. | |
70 | (OP_OP_1000000, add3): Trace inputs before performing add. | |
71 | (OP_5F00, <*>): Trace input registers before making system call. | |
72 | (OP_5F00, <kill>): Trace R0, R1 not REGn. | |
73 | (OP_5F00, <getpid>): Always return 47. | |
74 | ||
75 | * d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND, | |
76 | SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write | |
77 | back slots. | |
78 | (struct _state): Add struct slot slot to global state variable. | |
79 | (struct _state): Delete fields SM, EA, DB, DM, IE, RP, MD, FX, ST, | |
80 | F0, F1, C from global State variable. | |
81 | (struct _state): Add struct trace to global State variable. | |
82 | (GPR, SET_GPR): Define. SET_GPR uses SLOT_PEND. | |
83 | (PSW*, SET_PSW*): Define. SET_PSW* uses SET_CREG. | |
84 | (CREG, SET_CREG, SET_*): Define. SET_CREG uses func move_to_cr. | |
85 | (INC_ADDR): Re-implement. Use SET_GPR to update registers. | |
86 | (JMP): Re-implement. Use SET_* to update registers. | |
87 | ||
88 | * interp.c: Use new SET_* et.al. macros to fetch / store | |
89 | registers. | |
90 | (get_operands): Squirrel away trace values at start of each | |
91 | operand decode. | |
92 | (do_2_short): Flush pending writes before issuing second | |
93 | instruction. | |
94 | (sim_resume): Flush pending writes at end of instruction cycle. | |
95 | (sim_fetch_register, sim_store_register, sim_create_inferior): | |
96 | After scheduling updates to registers using SET_*, flush updates. | |
97 | (sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so | |
98 | that each sets pc using SET_* and last SET_* eventually winds out. | |
99 | ||
100 | * simops.c: Use new SET_* et.al. macros to fetch / store | |
101 | registers. | |
102 | (move_to_cr): Add MASK argument for selective update of CREG bits. | |
103 | Re-implement using new SET_* macros. | |
104 | (trace_output_func, trace_output): Delete. Replace with. | |
105 | (do_trace_output_flush, trace_output_finish, trace_output_40, | |
106 | trace_output_32, trace_output_16, trace_output_void, | |
107 | trace_output_flag): New functions. Handle specific trace cases. | |
108 | (OP_*): Re-write tracing to use new trace_output_* functions. | |
109 | (OP_*): Re-write to use new SET_* et.al. macros. | |
110 | (FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition. | |
111 | (RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32. | |
112 | ||
e1fe7a79 AC |
113 | Wed Apr 1 12:55:18 1998 Andrew Cagney <cagney@b1.cygnus.com> |
114 | ||
115 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
116 | configure: Re-generate. | |
117 | ||
d8f53049 AC |
118 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> |
119 | ||
120 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
121 | ||
122 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
123 | ||
124 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
125 | ||
126 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
127 | ||
128 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
129 | ||
130 | Tue Feb 17 12:38:42 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
131 | ||
132 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
133 | length parameter. Return -1. | |
134 | ||
729295b5 AC |
135 | Mon Oct 27 14:43:33 1997 Fred Fish <fnf@cygnus.com> |
136 | ||
137 | * (dmem_addr): If address is illegal or in I/O space, signal a bus | |
138 | error. Allocate unified memory on demand. Fix DMEM address | |
139 | calculations. | |
140 | ||
141 | Mon Feb 16 10:27:53 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
142 | ||
143 | * simops.c (OP_5F20): Implement "dbt". | |
144 | (OP_5F60): Implement "rtd". | |
145 | ||
146 | * d10v_sim.h (DPC_CR): Define enum. | |
147 | (DBT_VECTOR_START): Define | |
148 | (DPSW, DPC): Define. | |
149 | ||
ac9a7d8a AC |
150 | Fri Feb 13 15:15:58 1998 Andrew Cagney <cagney@b1.cygnus.com> |
151 | ||
152 | * simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according | |
153 | to PSW:SM. | |
154 | ||
155 | * d10v_sim.h (struct _state): Add sp, as holding area for SPI/SPU. | |
156 | (SP_IDX): Define. | |
157 | ||
19431a02 AC |
158 | Wed Feb 11 16:53:49 1998 Andrew Cagney <cagney@b1.cygnus.com> |
159 | ||
b41dff6b AC |
160 | * simops.c (OP_5F00): Call error instead of abort for unknown |
161 | syscalls. | |
162 | ||
19431a02 AC |
163 | * d10v_sim.h (enum): Define DPSW_CR. |
164 | ||
165 | * simops.c (move_to_cr): Mask out hardwired zero bits in DPSW. | |
166 | ||
167 | Tue Feb 10 18:28:38 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
168 | ||
169 | * interp.c (sim_write_phys): Delete. | |
170 | (sim_load): Call sim_load_file with sim_write and LMA. | |
171 | ||
172 | Mon Feb 9 12:05:01 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
173 | ||
174 | * interp.c: Rewrite xfer_mem so that it translates addresses as - | |
175 | 0x00... - DMAP translated memory, 0x01... IMAP translated memory, | |
176 | 0x10... - on-chip data, 0x11... - on-chip insn, 0x12... - unified | |
177 | memory. | |
178 | (pc_addr): Delete. | |
179 | (imem_addr): New function - translate IMEM address. | |
180 | (sim_resume): Use imem_addr to translate insn address, abort if | |
181 | translation failed. | |
182 | (sim_create_inferior): Write ARGV to memory using sim_write. Pass | |
183 | argc/argv using r0/r1 not r2/r3. | |
184 | (sim_size): Do not initialize IMAP/DMAP here. | |
185 | (sim_open): Call sim_create_inferior and sim_size to initialize | |
186 | the system. | |
187 | (sim_create_inferior): Initialize IMAP/DMAP to hardware reset | |
188 | defaults. | |
189 | (init_system): Delete. | |
190 | (xfer_mem, sim_fetch_register, sim_store_register): Do not call | |
191 | init_system. | |
192 | (decode_pc): Check prog_bfd is defined before looking up .text | |
193 | section. | |
194 | ||
195 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
196 | ||
197 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
198 | ||
412c4e94 AC |
199 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
200 | ||
201 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
202 | ||
629cfff0 MM |
203 | Sun Jan 25 22:23:01 1998 Michael Meissner <meissner@cygnus.com> |
204 | ||
205 | * interp.c (sim_stop_reason): Exit status is now in r0, not r2. | |
206 | ||
88f7d309 MM |
207 | Sat Jan 24 19:00:30 1998 Michael Meissner <meissner@cygnus.com> |
208 | ||
209 | * d10v_sim.h (DEBUG_TRAP): New debug flag. | |
210 | ||
211 | * simops.c (OP_5F00): If DEBUG_TRAP is on, turn traps 0-14 into | |
212 | printing the registers. | |
213 | ||
8831cb01 MM |
214 | Thu Jan 22 17:54:01 1998 Michael Meissner <meissner@cygnus.com> |
215 | ||
216 | * simops.c (op_types): New ABI, args are r0..r3, system call # is | |
217 | in r4. | |
218 | (trace_{in,out}put_func): Ditto. | |
219 | (OP_4900): Ditto. | |
220 | (OP_24800000): Ditto. | |
221 | (OP_4D00): Ditto. | |
222 | (OP_5F00): Ditto. | |
223 | ||
cee68738 FF |
224 | Thu Jan 22 14:30:36 1998 Fred Fish <fnf@cygnus.com> |
225 | ||
226 | * interp.c (UMEM_SEGMENTS): New define, set to 128. | |
227 | (sim_size): Use UMEM_SEGMENTS rather than hardwired constant. | |
228 | (sim_close): Reset prog_bfd to NULL after closing it. Also | |
229 | reset prog_bfd_was_opened_p after closing prog_bfd. | |
230 | (sim_load): Reset prog_bfd_was_opened_p after closing prog_bfd. | |
231 | (sim_create_inferior): Get start address from abfd not prog_bfd. | |
232 | (xfer_mem): Do bounds checking on addresses and return zero length | |
233 | read/write on bad addresses, rather than aborting. Prepare to | |
234 | be able to handle xfers that cross segment boundaries, but not | |
235 | yet implemented. Only emit debug message when d10v_debug is | |
236 | set as well as DEBUG being defined. | |
237 | ||
462cfbc4 DE |
238 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> |
239 | ||
240 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
241 | ||
242 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
243 | ||
244 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
245 | * config.in: Ditto. | |
246 | ||
38d0ccc2 AC |
247 | Tue Dec 9 10:28:31 1997 Andrew Cagney <cagney@b1.cygnus.com> |
248 | ||
249 | * d10v_sim.h (RPT_S): Index cregs with RPT_S_CR not RPT_E_CR. | |
462cfbc4 | 250 | (BPSW): Ditto for BPSW_CR and not PSW_CR. |
38d0ccc2 | 251 | |
462cfbc4 DE |
252 | * simops.c (OP_5F40): JMP to BPC instead of assigning PC directly. |
253 | ||
bc6df23d AC |
254 | Mon Dec 8 12:58:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
255 | ||
256 | * simops.c (OP_5F00): From Martin Hunt <hunt@cygnus.com>. Change | |
257 | reserved trap from 0 to 15. Add trap emulation code for 0-14. | |
258 | ||
259 | * interp.c (sim_resume): From Martin Hunt <hunt@cygnus.com>. Check | |
260 | IBA for SDBT. | |
261 | ||
262 | * d10v_sim.h (AE_VECTOR_START, RIE_VECTOR_START, | |
263 | SDBT_VECTOR_START, TRAP_VECTOR_START): Define. | |
264 | ||
265 | * simops.c (OP_5F00): For "trap", mask out all but SM bit in PSW, | |
266 | use move_to_cr. | |
267 | (OP_5F00): For "trap", update BPSW with move_to_cr. | |
268 | ||
269 | Fri Dec 5 15:31:17 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
270 | ||
271 | * d10v_sim.h (enum): Enumerate CR register names. | |
272 | (enum): Enumerate PSW bit values. | |
273 | (PSW): Obtain value uing move_from_cr. | |
274 | (MOD_S, MOD_E, BPSW): Make r-values. | |
275 | (move_from_cr, move_to_cr): Declare functions. | |
276 | ||
277 | * interp.c (sim_fetch_register, sim_store_register): Use | |
278 | move_from_cr and move_to_cr for CR register transfers. | |
279 | ||
280 | * simops.c (move_from_cr, move_to_cr): New functions. | |
281 | (OP_5F40): Move BPSW to PSW using move_to_cr and move_from_cr. | |
282 | (OP_5600): For "mvtc", use function move_to_cr. | |
283 | (OP_5200): For "mvfc", use function move_from_cr. | |
284 | ||
285 | Fri Dec 5 13:33:14 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
286 | ||
287 | * simops.c (OP_5600): For "mvtc" MOD_E and MOD_S, ensure that the | |
288 | LSbit is zero. | |
289 | ||
6e51f990 DE |
290 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> |
291 | ||
292 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
293 | ||
7f48c9fe AC |
294 | Thu Dec 4 16:51:02 1997 Andrew Cagney <cagney@b1.cygnus.com> |
295 | ||
296 | * d10v_sim.h (struct _state): Add DM - PSW debug mask. | |
297 | ||
298 | * simops.c (OP_5600): For "mvtc", save PSW.DM. | |
299 | (OP_5200): Ditto for "mvfc". | |
300 | ||
aa49c64f AC |
301 | Wed Dec 3 17:27:06 1997 Andrew Cagney <cagney@b1.cygnus.com> |
302 | ||
303 | * d10v_sim.h (SEXT56): Define. | |
304 | ||
305 | * simops.c (OP_4201): For "rac", sign extend 56 bit value before | |
306 | it is shifted. | |
307 | ||
308 | * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using | |
309 | SIGNED64 macro. | |
310 | ||
193e528c FF |
311 | Tue Dec 2 15:38:34 1997 Fred Fish <fnf@cygnus.com> |
312 | ||
313 | * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or | |
314 | RIGHT_FIRST, as appropriate, instead of hardcoded ints that | |
315 | don't match enum values. | |
316 | ||
ae558075 AC |
317 | Tue Dec 2 15:01:08 1997 Andrew Cagney <cagney@b1.cygnus.com> |
318 | ||
319 | * simops.c (OP_3A00): For "macu", perform multiply stage using 32 | |
320 | bit rather than 16 bit precision. | |
9420287e | 321 | (OP_3C00): For "mulxu", store unsigned product in ACC. |
d294a657 | 322 | (OP_3800): For "msbu", subtract unsigned product from ACC, |
193e528c | 323 | (OP_0): For "sub", compute carry by comparing inputs. |
ae558075 | 324 | |
51b057f2 | 325 | Tue Dec 2 11:04:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
70ee56c5 | 326 | |
51b057f2 AC |
327 | * simops.c (OP_1000): For "sub2w", compute carry by comparing |
328 | inputs. | |
70ee56c5 AC |
329 | |
330 | Mon Nov 17 20:57:21 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
331 | ||
332 | * simops.c (OP_1): Use 32 bit unsigned arithmetic for subtract, | |
333 | carry indicated by value > 0xffff. | |
334 | ||
335 | Fri Nov 14 12:51:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
336 | ||
337 | * interp.c (sim_resume): Don't set up SIGINT handler using signal, | |
338 | handled by client. | |
339 | (sim_resume): Fix race condition of a direct assignment to | |
340 | stop_simulator, conditionally call sim_stop. | |
341 | (sim_stop_reason): Check stop_simulator returning SIGINT. Clear | |
342 | stop_simulator ready for next sim_resume call. | |
343 | (sim_ctrl_c): Delete function. | |
344 | ||
345 | Thu Nov 13 19:29:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
346 | ||
347 | * interp.c (sim_resume): For "REP", only check/update the PC when | |
348 | a branch instruction has not been executed. | |
349 | ||
87192c63 AC |
350 | Mon Nov 10 17:50:18 1997 Andrew Cagney <cagney@b1.cygnus.com> |
351 | ||
352 | * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign | |
353 | extend bit 44 all constants. | |
354 | (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro. | |
355 | ||
1315b4cb AC |
356 | Fri Oct 24 10:26:29 1997 Andrew Cagney <cagney@b1.cygnus.com> |
357 | ||
358 | * d10v_sim.h: Include sim-types.h. | |
359 | (uint8, in816, uiny16, int32, uint32, int64, uint64): Typedef | |
360 | using unsigned8 et.al. from sim-types.h. | |
361 | (SEXT32, SEXT40, SEXT44, SEXT60): Replace GCC specific 0x..LL with | |
362 | SIGNED64 macro. | |
363 | ||
9e03a68f AC |
364 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
365 | ||
366 | * interp.c (sim_write_phys): New function, write to physical | |
367 | instead of virtual memory. | |
368 | ||
b5da31ac | 369 | * interp.c (sim_load): Pass lma_p and sim_write_phys to |
9e03a68f AC |
370 | sim_load_file. |
371 | ||
1155e06e FF |
372 | Mon Oct 13 10:55:07 1997 Fred Fish <cygnus.com> |
373 | ||
374 | * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move | |
375 | exception generation code to OP_6E01. | |
376 | (OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception | |
377 | generation code. | |
378 | ||
93f0cb69 FF |
379 | Sat Oct 11 09:02:08 1997 Fred Fish <fnf@cygnus.com> |
380 | ||
381 | * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. | |
382 | (OP_6601): Ditto. | |
383 | ||
384 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
385 | ||
386 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
387 | ||
823f2df4 FF |
388 | Sat Sep 27 12:51:34 1997 Fred Fish <fnf@cygnus.com> |
389 | ||
390 | * interp.c (pc_addr): Discard upper bit(s) of PC in case | |
391 | IMAP1 selects unified memory. | |
5f90b21e FF |
392 | * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing |
393 | for end condition. | |
823f2df4 FF |
394 | |
395 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
396 | ||
397 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
398 | ||
92f91d1f AC |
399 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
400 | ||
401 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
402 | ||
794e9ac9 AC |
403 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
404 | ||
405 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
406 | ||
b45caf05 AC |
407 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
408 | ||
409 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
410 | ||
411 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
412 | ||
413 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
414 | ||
30d81984 MH |
415 | Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com> |
416 | ||
417 | * interp.c (sim_resume): Increment PC at end of rep | |
418 | loop. | |
419 | ||
420 | * simops.c (OP_4201): Fix rachi instruction. | |
421 | ||
6fea4763 DE |
422 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
423 | ||
424 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
425 | ||
88117054 AC |
426 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
427 | ||
428 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
429 | * config.in: Ditto. | |
430 | ||
7230ff0f AC |
431 | Tue Aug 26 10:37:49 1997 Andrew Cagney <cagney@b1.cygnus.com> |
432 | ||
433 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
434 | (sim_create_inferior): Add ABFD argument. |
435 | (sim_load): Move setting of PC from here. | |
436 | (sim_create_inferior): To here. | |
437 | (start_address): Delete variable. | |
7230ff0f | 438 | |
247fccde AC |
439 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
440 | ||
441 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
442 | * config.in: Ditto. | |
443 | ||
444 | Mon Aug 25 15:39:29 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
445 | ||
446 | * interp.c (sim_open): Add ABFD argument. | |
447 | ||
448 | Tue May 20 10:14:45 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
449 | ||
450 | * interp.c (sim_open): Add callback argument. | |
451 | (sim_set_callbacks): Remove SIM_DESC argument. | |
452 | ||
453 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
454 | ||
455 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
456 | ||
81f46481 DE |
457 | Tue Apr 22 10:29:23 1997 Doug Evans <dje@canuck.cygnus.com> |
458 | ||
459 | * interp.c (sim_open): Undo patch to add -E support. | |
460 | ||
8517f62b AC |
461 | Fri Apr 18 13:39:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
462 | ||
463 | * interp.c (sim_stop): New function. | |
464 | ||
04885cc3 DE |
465 | Thu Apr 17 02:42:00 1997 Doug Evans <dje@canuck.cygnus.com> |
466 | ||
467 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
468 | * d10v_sim.h (exec_bfd): Rename to prog_bfd. | |
469 | * interp.c: #include bfd.h. | |
470 | (myname, sim_kind, start_address): New static locals. | |
471 | (prog_bfd_was_opened_p, prog_bfd): New static locals. | |
472 | (decode_pc): Update to use prog_bfd. | |
473 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
474 | (sim_close): Close prog_bfd if simulator opened it. | |
475 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
476 | (sim_load): Return SIM_RC. New arg abfd. Set start address from bfd. | |
477 | Call sim_load_file to load file into simulator. | |
478 | * simops.c (trace_input_func): exec_bfd renamed to prog_bfd. | |
479 | ||
87e43259 AC |
480 | Wed Apr 16 16:12:03 1997 Andrew Cagney <cagney@b1.cygnus.com> |
481 | ||
482 | * simops.c (OP_5F00): Only provide system calls SYS_execv, | |
483 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
484 | ||
485 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
486 | ||
487 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
488 | * config.in: Ditto. | |
489 | ||
fbda74b1 DE |
490 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
491 | ||
8020feac DE |
492 | * interp.c (sim_open): New arg `kind'. |
493 | ||
fbda74b1 DE |
494 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
495 | ||
a35e91c3 AC |
496 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
497 | ||
498 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
499 | ||
500 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
501 | ||
502 | * configure: Re-generate. | |
503 | ||
601fb8ae MM |
504 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
505 | ||
506 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
507 | ||
508 | * simops.c (OP_5F00): Remove old traps 1-3. Make trap 15 the same | |
eb312eff MM |
509 | as trap 0, which will be deprecated. Only set errno, if an error |
510 | in fact was returned. | |
601fb8ae | 511 | |
395adcff DE |
512 | Thu Mar 13 12:41:20 1997 Doug Evans <dje@canuck.cygnus.com> |
513 | ||
514 | * interp.c: Delete redundant prototypes of sim_foo fns. | |
515 | (sim_open): New SIM_DESC result. Argument is now in argv form. | |
516 | (other sim_*): New SIM_DESC argument. | |
517 | ||
fd435e9f MM |
518 | Thu Mar 13 10:29:04 1997 Michael Meissner <meissner@cygnus.com> |
519 | ||
520 | * simops.c (trace_{input,output}_func): Call flush_stdout from the | |
521 | callback functions. | |
522 | (OP_5F00): Ditto. | |
f4b022d3 MM |
523 | (OP_6{4,6,C,A}01): Test for post decrement on the stack pointer. |
524 | (OP_{1200,1000000,201,5FE0,1003,17001002}): Fix problems in | |
525 | setting the carry bit after an add or a subtract. | |
fd435e9f MM |
526 | |
527 | Wed Feb 12 16:04:15 1997 Michael Meissner <meissner@cygnus.com> | |
528 | ||
529 | * simops.c (OP_{1403,15002A02,3{0,4}0{0,1}}): Only use the bottom | |
530 | 40 bits of accumulators. Sign/zero extend as appropriate. | |
531 | ||
19c5af72 DE |
532 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> |
533 | ||
534 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
535 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
536 | * configure.in: sinclude ../common/aclocal.m4. | |
537 | * configure: Regenerated. | |
538 | ||
295dbbe4 SG |
539 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
540 | ||
541 | * configure configure.in Makefile.in: Update to new configure | |
542 | scheme which is more compatible with WinGDB builds. | |
543 | * configure.in: Improve comment on how to run autoconf. | |
544 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
545 | * Makefile.in: Use autoconf substitution to install common | |
546 | makefile fragment. | |
547 | ||
548 | Fri Dec 27 22:54:05 1996 Angela Marie Thomas (angela@cygnus.com) | |
549 | ||
550 | * gencode.c: patch to not #include "d10v_sim.h" which | |
551 | unecessarily includes bfd.h and causes wingdb configure | |
552 | to fail. | |
553 | ||
dbdae3de MH |
554 | Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
555 | ||
556 | * interp.c (xfer_mem): Change unified memory to 0x0. | |
557 | ||
558 | Thu Nov 28 20:42:56 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
559 | ||
560 | * simops.c (OP_3E01): Fix tracing information. | |
561 | (OP_300{0,1}): Do not propigate sign. | |
562 | ||
72eeb006 DE |
563 | Mon Nov 25 19:47:40 1996 Doug Evans <dje@canuck.cygnus.com> |
564 | ||
565 | * config.in (WORDS_BIGENDIAN): Add. | |
566 | * configure: Regenerated. | |
567 | * d10v_sim.h: #include "config.h" | |
568 | ||
569 | Sat Nov 23 09:34:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
570 | ||
571 | * gencode.c (write_opcodes): Eliminate warnings when generated | |
572 | table.c is compiled. | |
573 | ||
24cbf0a4 MM |
574 | Wed Nov 20 19:41:40 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
575 | ||
576 | * interp.c (sim_open): Cast result of calloc, and make sure NULL | |
577 | was not returned. | |
578 | (dmem_addr): If address is illegal or in I/O space, signal a bus | |
579 | error. | |
580 | (pc_addr): Signal bus error, not illegal instruction for bogus | |
581 | pc. | |
582 | ||
cee402dd DE |
583 | Wed Nov 20 01:23:03 1996 Doug Evans <dje@canuck.cygnus.com> |
584 | ||
585 | * Makefile.in: Delete all stuff moved to ../common/Make-common.in. | |
586 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
587 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
588 | Call AC_CHECK_HEADERS(unistd.h). | |
589 | * configure: Regenerated. | |
590 | * config.in: New file. | |
591 | * interp.c: #include "callback.h". | |
592 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
593 | ||
594 | Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com> | |
595 | ||
596 | * d10v-sim.h (simops): Add flag is_long. | |
597 | (State): Add pc_changed. Instructions which update the PC should | |
598 | use the JMP macro which sets this. | |
599 | (JMP): New macro. Sets the PC and the pc_changed flag. | |
600 | ||
601 | * gencode.c (write_opcodes): Add is_long field. | |
602 | ||
603 | * interp.c (lookup_hash): If we blindly apply a short opcode's mask | |
604 | to a long opcode we could get a false match. Check the opcode size. | |
605 | (hash): Add a size field to the hash table. | |
606 | (sim_open): Initialize size field in hash table. | |
607 | (sim_resume): Change to logic for setting the PC. Used to increment the | |
608 | PC if it had not been changed. This didn't allow single-instruction loops. | |
609 | Now checks the flag State.pc_changed. Also now stops when ^C is received. | |
610 | (dmem_addr): Fix translation of data segments to unified memory. | |
611 | (sim_ctrl_c): New function. When ^C is received, set stop_simulator flag. | |
612 | ||
613 | * simops.c: Changed all branch and jump instructions to use new JMP macro. | |
614 | (OP_20000000): Corrected trace information to show this is a ldi.l, not | |
615 | a ldi.s instruction. | |
616 | ||
5c839c67 MH |
617 | Thu Oct 31 19:13:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
618 | ||
619 | * interp.c (sim_fetch_register, sim_store_register): Fix bug where | |
620 | updating the accumulators was overwriting other parts of the global | |
621 | State variable. | |
622 | ||
b30cdd35 MM |
623 | Wed Oct 30 17:35:14 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
624 | ||
625 | * interp.c (bfd.h) Don't include it here any more. | |
626 | (text{,_start,_end}): Move here from simops.c and make extern. | |
627 | (decode_pc): New function to return the PC as an address that the | |
628 | debugger can use. | |
629 | (dmem_addr): Print decoded PC in error message. | |
630 | (pc_addr): Ditto. | |
631 | ||
632 | * simops.c (bfd.h) Don't include it here any more. | |
633 | (text{,_start,_end}): Move to simops.c. | |
634 | (trace_input_func): Move decoding of PC, and looking up .text | |
635 | start to decode_pc. | |
636 | ||
637 | * d10v_sim.h (bfd.h): Include it here. | |
638 | (text{,_start,_end}): Add external declarations. | |
639 | (exec_bfd): Ditto. | |
640 | (decode_pc): Ditto. | |
641 | ||
c422ecc7 MH |
642 | Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
643 | ||
644 | * interp.c (sim_size): Now allocates unified memory for imap segments | |
645 | 0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0. | |
646 | (sim_write): Just call xfer_mem(). | |
647 | (sim_read): Just call xfer_mem(). | |
648 | (xfer_mem): New function. Does appropriate memory mapping and copies bytes. | |
649 | (dmem_addr): New function. Reads dmap register and translates data | |
650 | addresses to local addresses. | |
651 | (pc_addr): New function. Reads imap register and computes local address | |
652 | corresponding to contents of the PC. | |
653 | (sim_resume): Change to use pc_addr(). | |
654 | (sim_create_inferior): Change reinitialization code. Also reinitializes | |
655 | imap[01] and dmap. | |
656 | (sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap. | |
657 | (sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap. | |
658 | ||
659 | * simops.c (MEMPTR): Redefine to use dmem_addr(). | |
660 | (OP_5F00): Replace references to STate.imem with dmem_addr(). | |
661 | ||
662 | * d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128]. | |
663 | (RB,SW,RW,SLW,RLW): Redefine to use dmem_addr(). | |
664 | (IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define. | |
665 | ||
666 | Tue Oct 22 15:22:33 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
667 | ||
668 | * d10v_sim.h (_ins_type): Reorganize, so that we can provide | |
669 | better statistics, like not counting NOPS as parallel | |
670 | instructions, and printing total cycles. | |
671 | (ins_type_counters): Make unsigned long. | |
672 | (left_nops,right_nops): Fold into ins_type_counters. | |
673 | ||
674 | * simops.c (trace_input_func): Print new instruction types. | |
675 | Handle OP_R2R3 as input types. | |
676 | (OP_{38000000,7000}): Correctly sign extend bytes. | |
677 | (OP_5E00): Don't count NOPs as parallel instructions. | |
678 | (OP_460B): Remove unused variable. | |
679 | (OP_5F00): Ditto. | |
680 | ||
681 | * interp.c (ins_type_counters): Make unsigned long. | |
682 | (left_nops,right_nops): Delete. | |
683 | (most functions): Add prototypes. | |
684 | (INLINE): If GCC and optimize define as __inline__. | |
685 | ({,lookup_}hash,get_operands): Declare as INLINE. | |
686 | (do_parallel): Count conditional operations. | |
687 | (add_commas): New function, to add commas every 3 digits. | |
688 | (sim_size): Call add_commas to print numbers. | |
689 | (sim_{open,resume}): Delete unused variables. | |
690 | (sim_info): Provide better statistics. | |
691 | (sim_read): Add int return type. | |
692 | ||
eca43eb1 MH |
693 | Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
694 | ||
695 | * interp.c (sim_resume): Change the way single-stepping and exceptions | |
696 | are handled so single-stepping works again. | |
697 | ||
55116079 MM |
698 | Thu Oct 17 12:24:16 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
699 | ||
700 | * endian.c: Optimize simulated loads/stores on x86, AIX, and big | |
701 | endian hosts. | |
702 | ||
703 | * configure.in (--enable-sim-bswap): New switch to enable using | |
704 | the BSWAP instruction on x86's. | |
705 | * configure: Regenerate. | |
706 | ||
707 | * Makefile.in ({SWAP,CONFIG}_CFLAGS): Add --enable-sim-bswap | |
708 | support. | |
709 | ||
11ec4de6 MM |
710 | Wed Oct 16 13:50:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
711 | ||
5c255669 MM |
712 | * endian.c: New file. Move endian functions here from interp.c. |
713 | Optimize code, and make it work as either inline functions or as a | |
714 | separate file. | |
715 | ||
716 | * interp.c: Move endian functions from here to endian.c. | |
717 | ||
718 | * Makefile.in (INCLUDE): Add endian.c. | |
719 | (run,libsim.a): Add dependency on endian.o. | |
720 | (endian.o): Add dependency. | |
721 | ||
722 | * d10v_sim.h (read/write support): Always go through the machine | |
723 | independent endian functions. If compiling with GCC and | |
724 | optimizing, include endian.c so the endian functions are inlined. | |
725 | ||
11ec4de6 MM |
726 | * simops.c (OP_5F00): Correct tracing of accumulators. |
727 | ||
57bc1a72 MM |
728 | Tue Oct 15 10:57:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
729 | ||
730 | * simops.c (OP_5F00): Add support for getpid, kill system calls. | |
731 | ||
732 | * interp.c (do_{2_short,parallel}): If an exception is raised, | |
733 | don't execute the second instruction. | |
734 | ||
8918b3a7 MM |
735 | Sat Oct 12 22:17:43 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
736 | ||
737 | * simops.c (OP_{31000000,6601,6201,6200}): Store address in a | |
738 | temporary in case the register is overriden when loading. | |
739 | (OP_6200): Output type is OP_DREG for tracing. | |
740 | ||
741 | Fri Oct 4 23:46:18 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
742 | ||
743 | * d10v_sim.h (struct _state): Add mem_{min,max} fields. | |
744 | ||
745 | * interp.c (sim_size): Initialize mem_{min,max} fields. | |
746 | (sim_write): Update mem_{min,max} fields. | |
747 | (sim_resume): If PC is not in the minimum/maximum memory range, | |
748 | abort. | |
749 | (sim_create_inferior): Preserve mem_{min,max} fields. | |
750 | ||
751 | Fri Sep 27 13:11:58 1996 Mark Alexander <marka@cygnus.com> | |
752 | ||
753 | * simops.c (OP_5F00): Add support for time() system call. | |
754 | ||
a18cb100 MM |
755 | Wed Sep 25 16:31:41 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
756 | ||
757 | * simops.c (OP_{6E01,6A01,6E1F,6A00}): Print both words being | |
758 | stored if tracing. | |
8918b3a7 MM |
759 | (OP_5F00,trace_{in,out}put_func): Add finer grain tracing for |
760 | system calls. | |
a18cb100 MM |
761 | |
762 | Mon Sep 23 17:55:30 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
763 | ||
764 | * simops.c (op_types): Add OP_{CONSTANT8,R2,R3}. | |
765 | (trace_input_func): Add support for OP_{CONSTANT8,R2,R3}. | |
766 | (OP_{4900,24800000,4800,4A00,4B00,4D00,4C00}): Add OP_R2 and OP_R3 | |
767 | to call/subroutine returns to trace the first two arguments and | |
768 | the return value. For small jumps, use CONSTANT8, not CONSTANT16. | |
769 | ||
c58a1ec2 MH |
770 | Fri Sep 20 15:36:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
771 | ||
772 | * interp.c (sim_create_inferior): Reinitialize State every time | |
773 | sim_create_inferior() is called. | |
774 | ||
c12f5c67 MM |
775 | Thu Sep 19 21:38:20 1996 Michael Meissner <meissner@wogglebug.ziplink.net> |
776 | ||
777 | * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right | |
778 | on comparisons. | |
779 | (OP_401): Fix tracing information. | |
780 | ||
74473ea1 MM |
781 | Thu Sep 19 10:30:22 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
782 | ||
891513ee MM |
783 | * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output. |
784 | (trace_input_func): Use them. | |
f061ddf6 MM |
785 | (trace_input_func): Make sure there is a trailing space after the |
786 | instruction. | |
addb61a5 | 787 | (OP_6200): Fix tracing info. |
891513ee | 788 | |
74473ea1 MM |
789 | * Makefile.in (run): Add dependencies on libbfd.a and |
790 | libiberity.a. | |
791 | ||
a49a15ad MM |
792 | Wed Sep 18 09:13:25 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
793 | ||
794 | * d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line | |
795 | numbers and function names in debug trace. | |
796 | (DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and | |
797 | DEBUG_LINE_NUMBER. | |
798 | (SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction | |
799 | and exit system call trap being executed. | |
800 | ||
801 | * interp.c (sim_stop_reason): Set exit code correctly for stop | |
802 | instruction and exit system call trap. | |
803 | ||
804 | * configure.in (--enable-sim-cflags): Remove trace case. | |
805 | (--enable-sim-debug): New switch to set the debug values. | |
806 | * configure: Regenerate. | |
807 | ||
808 | * simops.c (trace_{input,output}_func): Rename from | |
809 | trace_{input,output}. | |
810 | (trace_{input,output}): Call trace_{input,output}_func if | |
811 | d10v_debug is non-zero. | |
812 | (SIZE_INSTRUCTION): Cut down to 8. | |
813 | (SIZE_OPERANDS): Cut down to 18. | |
814 | (SIZE_LOCATION): New value for size of line number, function name | |
815 | field. | |
816 | (init_text_p,text{,_start,_end}): New static variables for | |
817 | printing line number and function name. | |
0535fa1a | 818 | (exec_bfd): New external that run.c sets. |
a49a15ad MM |
819 | (trace_input_func): Print line number and function name if |
820 | available and if desired. | |
821 | (OP_4E09): Don't print out DBT message. | |
822 | (OP_5FE0): Set exception field to SIG_D10V_STOP. | |
823 | (OP_5F00): Set exception field to SIG_D10V_EXIT. | |
824 | ||
215ac953 MM |
825 | Sat Sep 14 22:18:43 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
826 | ||
827 | * interp.c (do_2_short): If the instruction encodes jump->ins, | |
828 | don't do the second instruction if the jump succeeds. | |
829 | ||
19d44375 MM |
830 | Fri Sep 13 22:35:19 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
831 | ||
832 | * simops.c (OP_5F00): Use unknown traps to print all GPRs, | |
833 | accumulators, PC, and F0/F1/C flags. | |
834 | ||
65c0d7de MA |
835 | Thu Sep 12 12:50:11 1996 Mark Alexander <marka@cygnus.com> |
836 | ||
837 | * simops.c (OP_5F00): Fix problems with system calls. | |
838 | ||
a5719092 MM |
839 | Thu Sep 12 12:19:28 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
840 | ||
841 | * simops.c (OP_5F00): Correct tracing information for trap. | |
842 | ||
5ceef1b5 MM |
843 | Wed Sep 11 18:55:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
844 | ||
845 | * Makefile.in (CSEARCH): Correctly find opcodes directory. | |
846 | ||
069398aa MM |
847 | Mon Sep 9 13:27:26 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
848 | ||
849 | * simops.c (trace_output): Properly align accumulator output. | |
850 | (OP_3{0,2,4}00): Properly parenthesize test expression. Add error | |
851 | if shift count is too high. | |
293c76a3 | 852 | (OP_4E{00,02,04,20,22,40,42}): Make tests agree with book. |
60fc5b72 MM |
853 | (OP_4E09): Make cpfg properly trace the input flags. |
854 | (op_types): Add OP_FLAG_OUTPUT. | |
855 | (trace_{input,output}): Support OP_FLAG_OUTPUT. | |
308f64d3 MM |
856 | (OP_31000000): This ld2w varient is a 16-bit memory reference, not |
857 | an 8-bit memory reference instruction for tracing purposes. | |
2254cd90 | 858 | (OP_201): Addi needs to set the carry. |
069398aa | 859 | |
ea2155e8 MH |
860 | Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
861 | ||
862 | * simops.c (OP_2600, OP_2601): Changed min and max comparisons | |
863 | to use signed register values. | |
864 | ||
87178dbd MM |
865 | Wed Sep 4 11:35:17 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
866 | ||
867 | * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug | |
868 | output. | |
869 | (_ins_type): New enumeration to specify which container an | |
870 | instruction is in, and whether it is part of a parallel operation. | |
871 | (_state): Add ins_type field. | |
7eebfc62 MM |
872 | ({,u}int{8,16,32,64}): Use limits.h to size the appropriate types. |
873 | (ins_type_counters): Counters for the various instruction types. | |
874 | ({left,right}_nops): Counters for the number of nops in each | |
875 | container. | |
876 | (d10v_debug): New variable to indicate whether debugging is turned | |
877 | on. | |
878 | ||
879 | * simops.c: (all functions): Change all #ifdef DEBUG code so that | |
880 | the input and output values can be traced, along with the | |
881 | instruction type. Make the -t option enable tracing. | |
882 | (all functions): Change printf calls to use the printf_filtered | |
883 | function in the callback table. | |
87178dbd MM |
884 | |
885 | * interp.c (_leftright): New enumeration to say whether 2 short | |
886 | instructions are done left first or right first. | |
887 | (do_{long,2_short,parallel}): Indicate in the machine state which | |
7eebfc62 MM |
888 | type of instruction this is. Count each of the types of |
889 | instructions executed. | |
87178dbd MM |
890 | (sim_size): Only print the memory sizes if DEBUG_MEMSIZE debug |
891 | flag is set. | |
892 | (sim_resume): Pass left/right indication to do_2_short. | |
7eebfc62 MM |
893 | (all functions): Change printf calls to use the printf_filtered |
894 | function in the callback table. | |
895 | (sim_trace): Turn on debug flag if DEBUG was defined, and call | |
896 | sim_resume. | |
897 | (sim_info): Print out statistics on instructions. | |
898 | (sim_{trace,create_inferior}): Eliminate extraneous output unless | |
899 | debugging. | |
1eaaf305 MM |
900 | (sim_open): If args == -t and DEBUG was defined, set d10v_debug. |
901 | Only initialize the hash table the first time sim_open is called. | |
7eebfc62 MM |
902 | |
903 | * Makefile.in: Make objects depend on d10v_sim.h. | |
1eaaf305 MM |
904 | ({,SIM_}CFLAGS): Include configure dependent switches. Setting |
905 | CFLAGS does not override host/target defines or SIM_CFLAGS. | |
906 | (CC_FOR_BUILD,gencode): Use CC_FOR_BUILD to compile gencode. | |
907 | (run): By default, the math library is not needed to be linked | |
908 | in. | |
9b86c7e2 | 909 | ({BFD,LIBIBERTY}_LIB): Define as variables so they can be |
1eaaf305 | 910 | overridden. |
9b86c7e2 MM |
911 | (VPATH): Don't set to anything but @srcdir@ to work with non-GNU |
912 | makes. | |
913 | ({run,callback}.o): Provide explicit paths to their appropriate | |
914 | source directories. | |
915 | (gencode{,.o},d10v-opc.o): Split compilation into creating object | |
916 | and linking. Instead of linking in libopcodes.a, just compile | |
917 | d10v-opc.o directly to handle canadian cross. | |
918 | (CSEARCH): Add opcodes directory. | |
7eebfc62 MM |
919 | |
920 | * configure.in (--enable-sim-cflags): New switch to allow user to | |
921 | set the defaults. | |
1eaaf305 | 922 | (CC_FOR_BUILD): Deal with canadian crosses. |
7eebfc62 | 923 | * configure: Regenerate. |
87178dbd | 924 | |
8719be26 MA |
925 | Wed Sep 04 04:45:34 1996 Mark Alexander <marka@cygnus.com> |
926 | ||
927 | * simops.c: Include correct syscall.h for d10v, not host's. | |
928 | Fix #ifdef SYS_stat. | |
929 | ||
930 | Tue Sep 3 14:00:04 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
931 | ||
932 | * simops.c (OP_5F00): Wrap all SYS_xxx traps with #ifdef. | |
933 | Add trap 2 to be printf and trap 3 to be putchar. | |
934 | ||
935 | Wed Aug 28 21:42:34 1996 Mark Alexander <marka@cygnus.com> | |
936 | ||
937 | * Makefile.in, d10v_sim.h, interp.c, simops.c: Add support | |
938 | for low-level system calls. | |
939 | ||
d70b4d42 MH |
940 | Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
941 | ||
942 | * Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems. | |
943 | ||
944 | Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com> | |
945 | ||
946 | * d10v_sim.h (SEXT32): Added. | |
947 | * interp.c: Commented out printfs. | |
948 | * simops.c: Fixed error in sb and st2w. | |
949 | ||
950 | Thu Aug 15 13:30:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com> | |
951 | ||
952 | * Makefile.in, d10v_sim.h, interp.c, simops.c: Added remaining | |
953 | DSP instructions. Added modulo addressing. | |
954 | ||
955 | Sun Aug 11 12:57:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com> | |
956 | ||
957 | * Makefile.in, d10v_sim.h, interp.c, simops.c: Snapshot. | |
958 | ||
4c38885c MH |
959 | Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
960 | ||
961 | * d10v_sim.h, simops.c: Snapshot. | |
962 | ||
2934d1c9 MH |
963 | Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com> |
964 | ||
965 | * ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h, | |
966 | gencode.c, interp.c, simops.c: Created. | |
967 |